From nobody Mon Feb 9 01:16:24 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+82327+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+82327+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=hpe.com ARC-Seal: i=1; a=rsa-sha256; t=1634634519; cv=none; d=zohomail.com; s=zohoarc; b=ThhZhIv9VawqvSM3C3/a55gDOkzxSQNB3TVE0TmnRJ+P2HP7tiZHNy7+1U3kVtDfaVB+IGBdZShtK7GMwMZAiFkIcQA4JVbmDN64BN9YZZYyeFd5+Ad9iWfmWbchzzWPSVxCpCsb7/lxe4O4sNto/NPUvHIh4ZsFq64UHQ/8uvs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1634634519; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=6yOwe11AgCt4SNrvNejX0YfHFnJ9mNS45S/Jd/mVW9k=; b=GTIffBqm/x4klmeUji08xxEh0KvF4lbrAj6qv/Yu19Wn6u9DwF9K8toVrWM9tYrMs+J0oVyG3nSFW+TrFu7deAwm8uiEAkyqwX9LIg2JByFx1wN4lQVibfHrBS0/IChW7oXABEyNxhgtWxEM0EW1kIooCMfLusE8usOJkczTH/c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+82327+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1634634519250170.01564838694298; Tue, 19 Oct 2021 02:08:39 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id GlWhYY1788612x7ETJfxk96e; Tue, 19 Oct 2021 02:08:38 -0700 X-Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by mx.groups.io with SMTP id smtpd.web11.7154.1634634514249341246 for ; Tue, 19 Oct 2021 02:08:38 -0700 X-Received: from pps.filterd (m0134425.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19J41xF6026456; Tue, 19 Oct 2021 09:08:32 GMT X-Received: from g4t3427.houston.hpe.com (g4t3427.houston.hpe.com [15.241.140.73]) by mx0b-002e3701.pphosted.com with ESMTP id 3bs9u4ygub-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Oct 2021 09:08:32 +0000 X-Received: from g9t2301.houston.hpecorp.net (g9t2301.houston.hpecorp.net [16.220.97.129]) by g4t3427.houston.hpe.com (Postfix) with ESMTP id BCCD75C; Tue, 19 Oct 2021 09:08:31 +0000 (UTC) X-Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g9t2301.houston.hpecorp.net (Postfix) with ESMTP id AF69451; Tue, 19 Oct 2021 09:08:30 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Sunil V L , Daniel Schaefer Subject: [edk2-devel] [edk2-platforms][PATCH 14/30] RiscVPlatformPkg/Sec: Initial hart_index2Id array Date: Tue, 19 Oct 2021 16:09:51 +0800 Message-Id: <20211019081007.31165-15-abner.chang@hpe.com> In-Reply-To: <20211019081007.31165-1-abner.chang@hpe.com> References: <20211019081007.31165-1-abner.chang@hpe.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 7VzD1J5C09Bxuv06ZbWq9k8Gt6xBN_UU X-Proofpoint-GUID: 7VzD1J5C09Bxuv06ZbWq9k8Gt6xBN_UU X-HPE-SCL: -1 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,abner.chang@hpe.com X-Gm-Message-State: sNjXbZAECaQAqTep0ezrFPggx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1634634518; bh=ftS4foHFEd/nnjdQo8HIiUfFIeNXW0WCsUoF4q7BM2M=; h=Cc:Date:From:Reply-To:Subject:To; b=VNHBTeAiCNcWyyXO/72A9GydQ31A9xlFyzY3qv5xHUoXr3PocNKgBUivG/1OtIPZrRy SGKIugymiwU8XXZtE/CJlPCAuxgGHkMkAmJkaxDmEWenM96uf2I1Hj34ehhySzE2ZQETg LYUQqZ1ubXoIrxEOs3ohuxyTVp+awjOSZ1c= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1634634520528100013 Content-Type: text/plain; charset="utf-8" Initial hart index to Id array by invoking OpenSBI fw_platform_init function. Introduce PcdBootableHartIndexToId PCD which could be used to overwrite the hart_index2Id arrary built from Devie tree according to platform demand. Cc: Sunil V L Cc: Daniel Schaefer Signed-off-by: Abner Chang --- .../RISC-V/PlatformPkg/RiscVPlatformPkg.dec | 13 +++- .../RISC-V/PlatformPkg/RiscVPlatformPkg.dsc | 3 +- .../PlatformPkg/Universal/Sec/SecMain.inf | 2 + .../PlatformPkg/Universal/Sec/SecMain.c | 62 ++++++++++++++++--- .../Universal/Sec/Riscv64/SecEntry.S | 29 ++++++++- 5 files changed, 96 insertions(+), 13 deletions(-) diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec b/Platform/RI= SC-V/PlatformPkg/RiscVPlatformPkg.dec index 7e41e7bdb2..947ae40e20 100644 --- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec +++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec @@ -55,10 +55,21 @@ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount|0|UINT32|0x00001083 gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId|0|UINT32|0x00001084 # -# The bootable hart core number, which is incorporate with OpenSBI platfor= m hart_index2id value. +# The bootable hart core number, which incorporates with OpenSBI platform = hart_index2id value. +# PcdBootableHartNumber =3D 0 means the number of bootable hart comes from= Device Tree. +# Otherwise the number assigned in PcdBootableHartNumber overwrite it. # gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber|0|UINT32|0x000= 01085 # +# PcdBootableHartIndexToId is valid if PcdBootableHartNumber !=3D 0. +# If PcdBootableHartNumber !=3D 0, then PcdBootableHartIndexToId is an arr= ay of +# bootable hart ID. +# For example, +# if PcdBootableHartNumber =3D=3D 3 then PcdBootableHartIndexToId could be= defined +# as {0x1, 0x2, 0x3}. +# + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartIndexToId|NULL|VOID*|= 0x00001086 +# # Definitions for OpenSbi # gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamBase|0|UINT32|0x00001100 diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc b/Platform/RI= SC-V/PlatformPkg/RiscVPlatformPkg.dsc index 93b3cd8de9..97d5dd08a0 100644 --- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc +++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc @@ -39,7 +39,8 @@ !include MdePkg/MdeLibs.dsc.inc =20 [LibraryClasses.common] - RiscVOpensbiPlatformLib|Platform/RISC-V/PlatformPkg/Library/OpensbiPlatf= ormLibNull/OpensbiPlatformLibNull.inf + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf + RiscVOpensbiPlatformLib|Platform/RISC-V/PlatformPkg/Library/OpensbiPlatf= ormLib/OpensbiPlatformLib.inf RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.= inf RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/Risc= VEdk2SbiLib.inf RiscVOpensbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/Risc= VOpensbiLib.inf diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platfo= rm/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf index 9736277fa1..1cfbef961f 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf +++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf @@ -41,6 +41,7 @@ DebugAgentLib DebugLib ExtractGuidedSectionLib + FdtLib IoLib PcdLib PeCoffLib @@ -62,6 +63,7 @@ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartIndexToId gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainBaseAddress gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainSize gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform= /RISC-V/PlatformPkg/Universal/Sec/SecMain.c index fb0adbca54..51d9edfe75 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c +++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c @@ -615,16 +615,17 @@ GetDeviceTreeAddress ( EFI_COMMON_SECTION_HEADER *FoundSection; =20 if (FixedPcdGet32 (PcdDeviceTreeAddress)) { + DEBUG ((DEBUG_INFO, "Use fixed address of DBT from PcdDeviceTreeAddr= ess.\n")); return (VOID *)*((unsigned long *)FixedPcdGet32 (PcdDeviceTreeAddres= s)); } else if (FixedPcdGet32 (PcdRiscVDtbFvBase)) { + DEBUG ((DEBUG_INFO, "Use DBT FV\n")); Status =3D FindFfsFileAndSection ( (EFI_FIRMWARE_VOLUME_HEADER *)FixedPcdGet32 (PcdRiscVDtbF= vBase), EFI_FV_FILETYPE_FREEFORM, EFI_SECTION_RAW, &FoundSection - ); + ); if (EFI_ERROR(Status)) { - DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found from FV.\n= ")); return NULL; } FoundSection ++; @@ -635,6 +636,35 @@ GetDeviceTreeAddress ( } return NULL; } +/** + Overwrite hart_index2id array if platform would like to use the + bootable harts other than those declared in Device Tree + + @param[in] SbiPlatform Pointer to SBI platform + @retval hart_index2id Index to ID value may be overwrote. + @retval hart_count Index to ID value may be overwrote. + +**/ +VOID +Edk2PlatformHartIndex2Id ( + IN struct sbi_platform *SbiPlatform + ) +{ + UINT32 Index; + UINT32 *HartIndexToId; + UINT32 BootableHartCount; + UINT8 *PlatformHartIndex2IdArray; + + BootableHartCount =3D FixedPcdGet32(PcdBootableHartNumber); + if (BootableHartCount !=3D 0) { + HartIndexToId =3D (UINT32 *)SbiPlatform->hart_index2id; + PlatformHartIndex2IdArray =3D (UINT8 *)FixedPcdGetPtr (PcdBootableHart= IndexToId); + for (Index =3D 0; Index < BootableHartCount; Index++) { + *(HartIndexToId + Index) =3D (UINT32)(*(PlatformHartIndex2IdArray + = Index)); + } + SbiPlatform->hart_count =3D BootableHartCount; + } +} =20 /** This function initilizes hart specific information and SBI. @@ -671,17 +701,13 @@ VOID EFIAPI SecCoreStartUpWithStack( IN struct sbi_scratch *Scratch ) { + UINT32 HardIndex; UINT64 BootHartDoneSbiInit; UINT64 NonBootHartMessageLockValue; struct sbi_platform *ThisSbiPlatform; EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *HartFirmwareContext; =20 - Scratch->next_arg1 =3D (unsigned long)GetDeviceTreeAddress (); - if (Scratch->next_arg1 =3D=3D (unsigned long)NULL) { - DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found\n")); - ASSERT (FALSE); - } - DEBUG ((DEBUG_INFO, "DTB address: 0x%08x\n", Scratch->next_arg1)); + DEBUG ((DEBUG_INFO, "HART ID: 0x%x enter SecCoreStartUpWithStack\n", Har= tId)); =20 // // Setup EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC for each hart. @@ -705,6 +731,18 @@ VOID EFIAPI SecCoreStartUpWithStack( ThisSbiPlatform->platform_ops_addr =3D (unsigned long)&Edk2OpensbiPlatfo= rmOps; =20 if (HartId =3D=3D FixedPcdGet32(PcdBootHartId)) { + + Scratch->next_arg1 =3D (unsigned long)GetDeviceTreeAddress (); + if (Scratch->next_arg1 =3D=3D (unsigned long)NULL) { + DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found\n")); + ASSERT (FALSE); + } + + DEBUG ((DEBUG_INFO, "HART number: 0x%x\n", ThisSbiPlatform->hart_count= )); + DEBUG ((DEBUG_INFO, "HART index to HART ID:\n")); + for (HardIndex =3D 0; HardIndex < ThisSbiPlatform->hart_count; HardInd= ex ++) { + DEBUG ((DEBUG_INFO, " Index: %d -> Hard ID: %x\n", HardIndex, ThisS= biPlatform->hart_index2id [HardIndex])); + } LaunchPeiCore (HartId, Scratch); } =20 @@ -739,3 +777,11 @@ VOID EFIAPI SecCoreStartUpWithStack( sbi_init(Scratch); } =20 +void xxxx (char *debugstr, ...) +{ + VA_LIST Marker; + + VA_START (Marker, debugstr); + DebugVPrint (DEBUG_INFO, debugstr, Marker); + VA_END (Marker); +} diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S b= /Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S index 0a69c50065..dc410703e0 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S +++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S @@ -101,16 +101,35 @@ _scratch_init: /* Loop to next hart */ blt t1, s7, _scratch_init =20 - /* Fill-out temporary memory with 55aa*/ + li a4, FixedPcdGet32 (PcdTemporaryRamBase) + li a5, FixedPcdGet32 (PcdTemporaryRamSize) + + /* Use Temp memory as the stack for calling to C code */ + add sp, a4, a5 + /* Get the address of device tree and call generic fw_platform_init */ + call GetDeviceTreeAddress /* a0 return the device tree address */ + beqz a0, skip_fw_init + add a1, a0, 0 /* a1 is device tree */ + csrr a0, CSR_MHARTID /* a0 is hart ID */ + call fw_platform_init +skip_fw_init: + + /* Zero out temporary memory */ li a4, FixedPcdGet32 (PcdTemporaryRamBase) li a5, FixedPcdGet32 (PcdTemporaryRamSize) add a5, a4, a5 1: - li a3, 0x5AA55AA55AA55AA5 + li a3, 0x0 sd a3, (a4) add a4, a4, __SIZEOF_POINTER__ blt a4, a5, 1b =20 + /* Overwrite hart_index2id array of + platform would like to use the bootable hart + other than it defined in Device Tree */ + la a0, platform + call Edk2PlatformHartIndex2Id + /* Update boot hart flag */ la a4, _boot_hart_done li a5, 1 @@ -136,6 +155,10 @@ _start_warm: csrw CSR_MIP, zero =20 li s7, FixedPcdGet32 (PcdBootableHartNumber) + bnez s7, 1f + la a4, platform + REG_L s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4) +1: li s8, FixedPcdGet32 (PcdOpenSbiStackSize) la a4, platform =20 @@ -205,7 +228,7 @@ _start_warm: /* Setup stack */ add sp, tp, zero =20 - /* Setup stack for the Hart executing EFI to top of temporary ram*/ + /* Setup stack for the boot hart executing EFI to top of temporary ram*/ csrr a6, CSR_MHARTID li a5, FixedPcdGet32 (PcdBootHartId) bne a6, a5, 1f --=20 2.31.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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