From nobody Tue Feb 10 10:04:18 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+81646+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+81646+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1633670143; cv=none; d=zohomail.com; s=zohoarc; b=BY/YaSK59mxg6EFSQQJL6V9hqhM5R+OYsNUit14InW+JnqhI7FsfaXZtb2KrAIvd293g0+1DISeR9PcjqL7lYSZQ456Zj4a4/lsksZ7vKP6EASVUrcr9U9R/eZEVHgJjRON1yYUs/2znn0Tl/oflDOa0SnOHn8XUPgZ3rFZ/qRk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1633670143; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=8YpANTZsX3yrwJS2EF5Zb/29T7EkM8ocSjtrfBhP+Y8=; b=duwn2qwKCzOGMuQhlLrssOKNOg0YN79omBVJ+cwFzj2lRVIHfT+iwEBiKMKXKCWeKHkyCdHcDisUKfR8tQi2etGf8a8s5fuwdqCeo0v3CggonzVkwyf8AJCEEgwByVdTKY/oBBVF3gJoI7Hf+qTErsKvrHpi4CAgS4PzEoovx0w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+81646+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1633670143365829.6969196287263; Thu, 7 Oct 2021 22:15:43 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id VMGuYY1788612xD1Gg2nwEiX; Thu, 07 Oct 2021 22:15:43 -0700 X-Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web12.5209.1633670134884967157 for ; Thu, 07 Oct 2021 22:15:42 -0700 X-IronPort-AV: E=McAfee;i="6200,9189,10130"; a="249794498" X-IronPort-AV: E=Sophos;i="5.85,356,1624345200"; d="scan'208";a="249794498" X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Oct 2021 22:15:41 -0700 X-IronPort-AV: E=Sophos;i="5.85,356,1624345200"; d="scan'208";a="489312843" X-Received: from cchiu4-mobl.gar.corp.intel.com ([10.252.188.53]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Oct 2021 22:15:40 -0700 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone Subject: [edk2-devel] [edk2-platforms: PATCH v2 7/9] WhiskeylakeOpenBoardPkg: Use same variable name for FspNvsHob. Date: Fri, 8 Oct 2021 13:15:00 +0800 Message-Id: <20211008051502.1243-8-chasel.chiu@intel.com> In-Reply-To: <20211008051502.1243-1-chasel.chiu@intel.com> References: <20211008051502.1243-1-chasel.chiu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,chasel.chiu@intel.com X-Gm-Message-State: 0clH3nJqIvn2dW8FFzQvpD67x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1633670143; bh=s4VjsR2U2NVHKXWM97ctJwCtTO48OON1JojzCwDo+8o=; h=Cc:Date:From:Reply-To:Subject:To; b=dC71U7UV1+X40fb1J1zDHuOTJmVp2Bc5PLrZhx81Y1IS0x9jK8ACwp0M2Fx1FtZ8lOY OgdNVA+N0e11buZuT5nfUL8e6M6B9fKFtgZLqC1yEq0FiSKKFPp/70BmqCokQnX4EWpNq 3klzN1Dx1OcllEm6CwZ9iOUrV4CsAKpoj7c= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1633670144310100001 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3678 To simplify the implementation the variable Name/GUID has been changed to "FspNvsBuffer" and gFspNvsBufferVariableGuid regardless it stores the data from FSP_NON_VOLATILE_STORAGE_HOB2 or FSP_NON_VOLATILE_STORAGE_HOB. Cc: Nate DeSimone Signed-off-by: Chasel Chiu --- Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconPolicy= UpdateLibFsp/PeiFspMiscUpdUpdateLib.c | 63 ++++++++++++---= ------------------------------------------------ Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/PeiSili= conPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c | 63 ++++++++++++---= ------------------------------------------------ Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconPolicy= UpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf | 5 ++--- Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/PeiSili= conPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf | 4 ++-- Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclud= e.fdf | 18 +++++++++------= --- Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc = | 3 +++ Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc = | 3 +++ 7 files changed, 43 insertions(+), 116 deletions(-) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiS= iliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform/Intel/Whiskeyl= akeOpenBoardPkg/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscU= pdUpdateLib.c index a341a58930..ab35bc3f8f 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconP= olicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconP= olicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c @@ -2,7 +2,7 @@ Implementation of Fsp Misc UPD Initialization. =20 =20 - Copyright (c) 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ =20 @@ -17,11 +17,9 @@ #include #include =20 -#include #include #include #include -#include #include #include =20 @@ -44,55 +42,18 @@ PeiFspMiscUpdUpdatePreMem ( ) { EFI_STATUS Status; - EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariableServices; - UINTN VariableSize; - VOID *MemorySavedData; - - Status =3D PeiServicesLocatePpi ( - &gEfiPeiReadOnlyVariable2PpiGuid, - 0, - NULL, - (VOID **) &VariableServices - ); - if (EFI_ERROR (Status)) { - ASSERT_EFI_ERROR (Status); - return Status; - } - - VariableSize =3D 0; - MemorySavedData =3D NULL; - Status =3D VariableServices->GetVariable ( - VariableServices, - L"MemoryConfig", - &gFspNonVolatileStorageHobGuid, - NULL, - &VariableSize, - MemorySavedData - ); - if (Status =3D=3D EFI_BUFFER_TOO_SMALL) { - MemorySavedData =3D AllocatePool (VariableSize); - if (MemorySavedData =3D=3D NULL) { - ASSERT (MemorySavedData !=3D NULL); - return EFI_OUT_OF_RESOURCES; - } - - DEBUG ((DEBUG_INFO, "VariableSize is 0x%x\n", VariableSize)); - Status =3D VariableServices->GetVariable ( - VariableServices, - L"MemoryConfig", - &gFspNonVolatileStorageHobGuid, - NULL, - &VariableSize, - MemorySavedData - ); - if (Status =3D=3D EFI_SUCCESS) { - FspmUpd->FspmArchUpd.NvsBufferPtr =3D MemorySavedData; - } else { - DEBUG ((DEBUG_ERROR, "Fail to retrieve Variable:\"MemoryConfig\" gMe= moryConfigVariableGuid, Status =3D %r\n", Status)); - ASSERT_EFI_ERROR (Status); - } + UINTN FspNvsBufferSize; + VOID *FspNvsBufferPtr; + + FspNvsBufferPtr =3D NULL; + FspNvsBufferSize =3D 0; + Status =3D PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVariableG= uid, &FspNvsBufferPtr, &FspNvsBufferSize); + if (Status =3D=3D EFI_SUCCESS) { + FspmUpd->FspmArchUpd.NvsBufferPtr =3D FspNvsBufferPtr; + } else { + DEBUG ((DEBUG_INFO, "Cannot create FSP NVS Buffer, UEFI variable does = not exist (this is likely a first boot)\n")); + FspmUpd->FspmArchUpd.NvsBufferPtr =3D NULL; } - FspmUpd->FspmArchUpd.NvsBufferPtr =3D MemorySavedData; =20 return EFI_SUCCESS; } diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Lib= rary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform/Intel= /WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/PeiSiliconPolicyUpdate= LibFsp/PeiFspMiscUpdUpdateLib.c index 145deb5de3..381ef232ea 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/Pe= iSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/Pe= iSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c @@ -2,7 +2,7 @@ Implementation of Fsp Misc UPD Initialization. =20 =20 - Copyright (c) 2020, Intel Corporation. All rights reserved.
+ Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ =20 @@ -18,11 +18,9 @@ #include #include =20 -#include #include #include #include -#include #include #include #include @@ -46,54 +44,17 @@ PeiFspMiscUpdUpdatePreMem ( ) { EFI_STATUS Status; - EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariableServices; - UINTN VariableSize; - VOID *MemorySavedData; - - Status =3D PeiServicesLocatePpi ( - &gEfiPeiReadOnlyVariable2PpiGuid, - 0, - NULL, - (VOID **) &VariableServices - ); - if (EFI_ERROR (Status)) { - ASSERT_EFI_ERROR (Status); - return Status; - } - - VariableSize =3D 0; - MemorySavedData =3D NULL; - Status =3D VariableServices->GetVariable ( - VariableServices, - L"MemoryConfig", - &gFspNonVolatileStorageHobGuid, - NULL, - &VariableSize, - MemorySavedData - ); - if (Status =3D=3D EFI_BUFFER_TOO_SMALL) { - MemorySavedData =3D AllocatePool (VariableSize); - if (MemorySavedData =3D=3D NULL) { - ASSERT (MemorySavedData !=3D NULL); - return EFI_OUT_OF_RESOURCES; - } - - DEBUG ((DEBUG_INFO, "VariableSize is 0x%x\n", VariableSize)); - Status =3D VariableServices->GetVariable ( - VariableServices, - L"MemoryConfig", - &gFspNonVolatileStorageHobGuid, - NULL, - &VariableSize, - MemorySavedData - ); - if (Status =3D=3D EFI_SUCCESS) { - FspmUpd->FspmArchUpd.NvsBufferPtr =3D MemorySavedData; - } else { - FspmUpd->FspmArchUpd.NvsBufferPtr =3D NULL; - DEBUG ((DEBUG_ERROR, "Fail to retrieve Variable:\"MemoryConfig\" gMe= moryConfigVariableGuid, Status =3D %r\n", Status)); - ASSERT_EFI_ERROR (Status); - } + UINTN FspNvsBufferSize; + VOID *FspNvsBufferPtr; + + FspNvsBufferPtr =3D NULL; + FspNvsBufferSize =3D 0; + Status =3D PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVariableG= uid, &FspNvsBufferPtr, &FspNvsBufferSize); + if (Status =3D=3D EFI_SUCCESS) { + FspmUpd->FspmArchUpd.NvsBufferPtr =3D FspNvsBufferPtr; + } else { + DEBUG ((DEBUG_INFO, "Cannot create FSP NVS Buffer, UEFI variable does = not exist (this is likely a first boot)\n")); + FspmUpd->FspmArchUpd.NvsBufferPtr =3D NULL; } =20 FspmUpd->FspmConfig.TsegSize =3D FixedPcdGet32 (PcdTsegSize= ); diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiS= iliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf b/Platform/Intel/= WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/Pei= SiliconPolicyUpdateLibFsp.inf index 2c90d0cb94..362dc2c995 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconP= olicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconP= olicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf @@ -2,7 +2,7 @@ # Provide FSP wrapper platform related function. # # -# Copyright (c) 2019 - 2020 Intel Corporation. All rights reserved.
+# Copyright (c) 2019 - 2021 Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -82,7 +82,6 @@ PchInfoLib PchHsioLib PchPcieRpLib - MemoryAllocationLib DebugPrintErrorLevelLib SiPolicyLib PchGbeLib @@ -132,7 +131,7 @@ gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdMrcSpdAddressTable3 =20 [Guids] - gFspNonVolatileStorageHobGuid ## CONSUMES + gFspNvsBufferVariableGuid ## CONSUMES gTianoLogoGuid ## CONSUMES gEfiMemoryOverwriteControlDataGuid =20 diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Lib= rary/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf b/Platfo= rm/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/PeiSiliconPoli= cyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf index 529c2f1253..1a664b1327 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/Pe= iSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/Pe= iSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf @@ -2,7 +2,7 @@ # FSP silicon policy updates for the Up Xtreme board. # # -# Copyright (c) 2020, Intel Corporation. All rights reserved.
+# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -136,7 +136,7 @@ gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdBoardBomId =20 [Guids] - gFspNonVolatileStorageHobGuid ## CONSUMES + gFspNvsBufferVariableGuid ## CONSUMES gTianoLogoGuid ## CONSUMES gEfiMemoryOverwriteControlDataGuid =20 diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/Fl= ashMapInclude.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include= /Fdf/FlashMapInclude.fdf index f7aa730ae7..698efce248 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapI= nclude.fdf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapI= nclude.fdf @@ -2,7 +2,7 @@ # Flash map for the UpXtreme Board. # # -# Copyright (c) 2020, Intel Corporation. All rights reserved.
+# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -35,16 +35,16 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = =3D 0x00090000 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset =3D 0x= 00190000 # Flash addr (0xFFAE0000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =3D 0x= 00190000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D 0x= 00320000 # Flash addr (0xFFC70000) -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D 0x= 00170000 # -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D 0x= 00490000 # Flash addr (0xFFDE0000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D 0x= 00160000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D 0x= 00480000 # Flash addr (0xFFDD0000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D 0x= 00070000 # -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 00500000 # Flash addr (0xFFE50000) +SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 004F0000 # Flash addr (0xFFE40000) SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x= 00050000 # -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D 0x= 00550000 # Flash addr (0xFFEA0000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D 0x= 00540000 # Flash addr (0xFFE90000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize =3D 0x= 000EA000 # -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset =3D 0x= 0063A000 # Flash addr (0xFFF8A000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset =3D 0x= 0062A000 # Flash addr (0xFFF7A000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize =3D 0x= 00006000 # -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset =3D 0x= 00640000 # Flash addr (0xFFF90000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset =3D 0x= 00630000 # Flash addr (0xFFF80000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize =3D 0x= 00010000 # -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset =3D 0x= 00650000 # Flash addr (0xFFFA0000) -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize =3D 0x= 00060000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset =3D 0x= 00640000 # Flash addr (0xFFF90000) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize =3D 0x= 00070000 # diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.d= sc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc index ee2aedd978..9d08dc3fe4 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc @@ -142,6 +142,9 @@ ####################################### PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHookL= ib.inf =20 +[LibraryClasses.Common.SEC] + VariableReadLib|MinPlatformPkg/Library/BaseVariableReadLibNull/BaseVaria= bleReadLibNull.inf + [LibraryClasses.IA32.SEC] ####################################### # Platform Package diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoa= rdPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoar= dPkg.dsc index b69cc8deb0..8d25b818ee 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.d= sc +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.d= sc @@ -142,6 +142,9 @@ ####################################### PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHookL= ib.inf =20 +[LibraryClasses.Common.SEC] + VariableReadLib|MinPlatformPkg/Library/BaseVariableReadLibNull/BaseVaria= bleReadLibNull.inf + [LibraryClasses.IA32.SEC] ####################################### # Platform Package --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#81646): https://edk2.groups.io/g/devel/message/81646 Mute This Topic: https://groups.io/mt/86163907/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-