From nobody Mon Feb 9 06:00:46 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+78025+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+78025+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1626877706; cv=none; d=zohomail.com; s=zohoarc; b=HtFRXOjW8JTtb0oXikE7K4d2O6wZYNhCXTGi1h+NDdukjeyQuxzXhcU/bwTaSejUaXguVxAQPiqNem0cKgjh3j5VVmAzULr+HvBqN+CwLMuzm9Ldh/b6sSM33lInSXAOuDjoE+YkTjKVJ3yPgtp25l9sCWvGmxHg6DQ5yJLvOv8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1626877706; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=JkX/JV6aeBPisKakGg+8HE5hkSIbF1tTqR6+9i38SKE=; b=T7vb75vwG0W8QOYhxDpkQoW5vAdXuRnEQmLW+hNyuWxbB8hwtULSgDnk0l0K9WLCaFgsEyt4X8ANci/KFspfmIbbR1cAUb4ZSd3lS1Eqq+wYcNTxIZto80bKR8v9PqG4R2PkKG+CCjaQ9rWOBAPksMSRMvv6xp5eL9s3vdiFHtk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+78025+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1626877706084556.5697995587893; Wed, 21 Jul 2021 07:28:26 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id uAwfYY1788612x5tW4Shsm9m; Wed, 21 Jul 2021 07:28:25 -0700 X-Received: from mail-yb1-f202.google.com (mail-yb1-f202.google.com [209.85.219.202]) by mx.groups.io with SMTP id smtpd.web12.3895.1626873862823102837 for ; Wed, 21 Jul 2021 06:24:22 -0700 X-Received: by mail-yb1-f202.google.com with SMTP id 132-20020a25158a0000b029055791ebe1e6so3143806ybv.20 for ; Wed, 21 Jul 2021 06:24:22 -0700 (PDT) X-Gm-Message-State: PWhQwqF2hdheaoe74XjkTS7yx1787277AA= X-Google-Smtp-Source: ABdhPJyNaqGmjjEgB+A0cc0190zoHSN35G1Ddew2jPQPIy0K4Z2Lry8fdUnHauitv8Mvulya2FgdN+AU6ETvMS47 X-Received: from ratho96.c.googlers.com ([fda3:e722:ac3:cc00:3:22c1:c0a8:aae]) (user=chengchieh job=sendgmr) by 2002:a25:d88a:: with SMTP id p132mr47959033ybg.409.1626873861600; Wed, 21 Jul 2021 06:24:21 -0700 (PDT) Date: Wed, 21 Jul 2021 13:23:23 +0000 In-Reply-To: <20210721132328.1415485-1-chengchieh@google.com> Message-Id: <20210721132328.1415485-2-chengchieh@google.com> Mime-Version: 1.0 References: <20210721132328.1415485-1-chengchieh@google.com> Subject: [edk2-devel] [PATCH v1 1/6] UefiPayloadPkg: Add LINUXBOOT payload target From: "Cheng-Chieh Huang via groups.io" To: devel@edk2.groups.io Cc: Cheng-Chieh Huang Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,chengchieh@google.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1626877705; bh=fS0oSZemKd/FJH56hcsa9U35r6q+OhusRX/yoyFktCA=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=UgDITqvzwPwr9NOyOzfzvSaKBdhfw4uvTKxW6CRwsc3Do58dTVX2uNcf19U2eqNbSQT xxmmz15RHDZAFzyLIUb+FB4pXjQgUhDnT6PK9mwRzsuJMoGkPgK+JXfwc6GT8wSPYt1So n5JTTU1zN+a9NS2/EDoFY/rCTQYGEiFhKCI= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1626877706742100004 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Initial commit to support linuxboot payload. Signed-off-by: Cheng-Chieh Huang --- UefiPayloadPkg/UefiPayloadPkg.dsc | 16 +- UefiPayloadPkg/Library/LbParseLib/LbParseLib.inf | 39 +++++ UefiPayloadPkg/Include/Linuxboot.h | 47 ++++++ UefiPayloadPkg/Library/LbParseLib/LbParseLib.c | 168 +++++= +++++++++++++++ UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c | 6 +- CryptoPkg/Library/OpensslLib/openssl | 2 +- 6 files changed, 270 insertions(+), 8 deletions(-) diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayload= Pkg.dsc index bcedf1c746b4..54576ba485b7 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dsc +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc @@ -33,6 +33,7 @@ [Defines] # # SBL: UEFI payload for Slim Bootloader # COREBOOT: UEFI payload for coreboot + # LINUXBOOT: UEFI payload for linuxboot # DEFINE BOOTLOADER =3D SBL =20 @@ -93,6 +94,9 @@ [Defines] =20 [BuildOptions] *_*_*_CC_FLAGS =3D -D DISABLE_NEW_DEPRECATED_INTERFACES +!if $(BOOTLOADER) =3D=3D "LINUXBOOT" + *_*_*_CC_FLAGS =3D -D LINUXBOOT_PAYLOAD +!endif GCC:*_UNIXGCC_*_CC_FLAGS =3D -DMDEPKG_NDEBUG GCC:RELEASE_*_*_CC_FLAGS =3D -DMDEPKG_NDEBUG INTEL:RELEASE_*_*_CC_FLAGS =3D /D MDEPKG_NDEBUG @@ -222,11 +226,13 @@ [LibraryClasses] !endif PlatformSupportLib|UefiPayloadPkg/Library/PlatformSupportLibNull/Platfor= mSupportLibNull.inf !if $(UNIVERSAL_PAYLOAD) =3D=3D FALSE - !if $(BOOTLOADER) =3D=3D "COREBOOT" - BlParseLib|UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf - !else - BlParseLib|UefiPayloadPkg/Library/SblParseLib/SblParseLib.inf - !endif + !if $(BOOTLOADER) =3D=3D "COREBOOT" + BlParseLib|UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf + !elseif $(BOOTLOADER) =3D=3D "LINUXBOOT" + BlParseLib|UefiPayloadPkg/Library/LbParseLib/LbParseLib.inf + !else + BlParseLib|UefiPayloadPkg/Library/SblParseLib/SblParseLib.inf + !endif !endif =20 DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf diff --git a/UefiPayloadPkg/Library/LbParseLib/LbParseLib.inf b/UefiPayload= Pkg/Library/LbParseLib/LbParseLib.inf new file mode 100644 index 000000000000..d75ba8db8cf3 --- /dev/null +++ b/UefiPayloadPkg/Library/LbParseLib/LbParseLib.inf @@ -0,0 +1,39 @@ +## @file +# Linuxboot Table Parse Library. +# +# Copyright (c) 2021, the u-root Authors. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D LbParseLib + FILE_GUID =3D DBA15E1E-4C16-47DF-93C0-AB5888ED14C3 + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D BlParseLib + +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D IA32 X64 +# + +[Sources] + LbParseLib.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + UefiPayloadPkg/UefiPayloadPkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + IoLib + DebugLib + PcdLib + +[Pcd] + gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemBase diff --git a/UefiPayloadPkg/Include/Linuxboot.h b/UefiPayloadPkg/Include/Li= nuxboot.h new file mode 100644 index 000000000000..34ca18069983 --- /dev/null +++ b/UefiPayloadPkg/Include/Linuxboot.h @@ -0,0 +1,47 @@ +/** @file + LinuxBoot PEI module include file. +**/ +#ifndef _LINUXBOOT_PEI_H_INCLUDED_ +#define _LINUXBOOT_PEI_H_INCLUDED_ + +#if defined(_MSC_VER) +#pragma warning(disable : 4200) +#endif + +#pragma pack(1) +typedef struct SerialPortConfigStruct { + UINT32 Type; + UINT32 BaseAddr; + UINT32 Baud; + UINT32 RegWidth; + UINT32 InputHertz; + UINT32 UartPciAddr; +} SerialPortConfig; + +typedef struct MemoryMapEntryStruct { + UINT64 Start; + UINT64 End; + UINT32 Type; +} MemoryMapEntry; + +typedef struct UefiPayloadConfigStruct { + UINT64 Version; + UINT64 AcpiBase; + UINT64 AcpiSize; + UINT64 SmbiosBase; + UINT64 SmbiosSize; + SerialPortConfig SerialConfig; + UINT32 NumMemoryMapEntries; + MemoryMapEntry MemoryMapEntries[0]; +} UefiPayloadConfig; +#pragma pack() + +#define UEFI_PAYLOAD_CONFIG_VERSION 1 + +#define LINUXBOOT_MEM_RAM 1 +#define LINUXBOOT_MEM_DEFAULT 2 +#define LINUXBOOT_MEM_ACPI 3 +#define LINUXBOOT_MEM_NVS 4 +#define LINUXBOOT_MEM_RESERVED 5 + +#endif // _LINUXBOOT_PEI_H_INCLUDED_ diff --git a/UefiPayloadPkg/Library/LbParseLib/LbParseLib.c b/UefiPayloadPk= g/Library/LbParseLib/LbParseLib.c new file mode 100644 index 000000000000..34bfb6a1073f --- /dev/null +++ b/UefiPayloadPkg/Library/LbParseLib/LbParseLib.c @@ -0,0 +1,168 @@ +/** @file + This library will parse the linuxboot table in memory and extract those = required + information. + + Copyright (c) 2021, the u-root Authors. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +// Retrieve UefiPayloadConfig from Linuxboot's uefiboot +UefiPayloadConfig* GetUefiPayLoadConfig() { + UefiPayloadConfig* config =3D + (UefiPayloadConfig*)(UINTN)(PcdGet32(PcdPayloadFdMemBase) - SIZE_64K= B); + if (config->Version !=3D UEFI_PAYLOAD_CONFIG_VERSION) { + DEBUG((DEBUG_ERROR, "Expect payload config version: %d, but get %d\n", + UEFI_PAYLOAD_CONFIG_VERSION, config->Version)); + CpuDeadLoop (); + } + return config; +} + +// Align the address and add memory rang to MemInfoCallback +void AddMemoryRange(IN BL_MEM_INFO_CALLBACK MemInfoCallback, IN UINTN star= t, + IN UINTN end, IN int type) { + MEMROY_MAP_ENTRY MemoryMap; + UINTN AlignedStart; + UINTN AlignedEnd; + AlignedStart =3D ALIGN_VALUE(start, SIZE_4KB); + AlignedEnd =3D ALIGN_VALUE(end, SIZE_4KB); + // Conservative adjustment on Memory map. This should happen when bootin= g from + // non UEFI bios and it may report a memory region less than 4KB. + if (AlignedStart > start && type !=3D LINUXBOOT_MEM_RAM) { + AlignedStart -=3D SIZE_4KB; + } + if (AlignedEnd > end + 1 && type =3D=3D LINUXBOOT_MEM_RAM) { + AlignedEnd -=3D SIZE_4KB; + } + MemoryMap.Base =3D AlignedStart; + MemoryMap.Size =3D AlignedEnd - AlignedStart; + MemoryMap.Type =3D type; + MemoryMap.Flag =3D 0; + MemInfoCallback(&MemoryMap, NULL); +} + +/** + Acquire the memory information from the linuxboot table in memory. + + @param MemInfoCallback The callback routine + @param Params Pointer to the callback routine parameter + + @retval RETURN_SUCCESS Successfully find out the memory information. + @retval RETURN_NOT_FOUND Failed to find the memory information. + +**/ +RETURN_STATUS +EFIAPI +ParseMemoryInfo(IN BL_MEM_INFO_CALLBACK MemInfoCallback, IN VOID* Params) { + UefiPayloadConfig* config; + int i; + + config =3D GetUefiPayLoadConfig(); + + DEBUG((DEBUG_INFO, "MemoryMap #entries: %d\n", config->NumMemoryMapEntri= es)); + + MemoryMapEntry* entry =3D &config->MemoryMapEntries[0]; + for (i =3D 0; i < config->NumMemoryMapEntries; i++) { + DEBUG((DEBUG_INFO, "Start: 0x%lx End: 0x%lx Type:%d\n", entry->Start, + entry->End, entry->Type)); + AddMemoryRange(MemInfoCallback, entry->Start, entry->End, entry->Type); + entry++; + } + return RETURN_SUCCESS; +} + +/** + Acquire acpi table and smbios table from linuxboot + + @param SystemTableInfo Pointer to the system table info + + @retval RETURN_SUCCESS Successfully find out the tables. + @retval RETURN_NOT_FOUND Failed to find the tables. + +**/ +RETURN_STATUS +EFIAPI +ParseSystemTable(OUT SYSTEM_TABLE_INFO* SystemTableInfo) { + UefiPayloadConfig* config; + + config =3D GetUefiPayLoadConfig(); + SystemTableInfo->AcpiTableBase =3D config->AcpiBase; + SystemTableInfo->AcpiTableSize =3D config->AcpiSize; + + SystemTableInfo->SmbiosTableBase =3D config->SmbiosBase; + SystemTableInfo->SmbiosTableSize =3D config->SmbiosSize; + + return RETURN_SUCCESS; +} + +/** + Find the serial port information + + @param SERIAL_PORT_INFO Pointer to serial port info structure + + @retval RETURN_SUCCESS Successfully find the serial port information. + @retval RETURN_NOT_FOUND Failed to find the serial port information . + +**/ +RETURN_STATUS +EFIAPI +ParseSerialInfo(OUT SERIAL_PORT_INFO* SerialPortInfo) { + UefiPayloadConfig* config; + config =3D GetUefiPayLoadConfig(); + + SerialPortInfo->BaseAddr =3D config->SerialConfig.BaseAddr; + SerialPortInfo->RegWidth =3D config->SerialConfig.RegWidth; + SerialPortInfo->Type =3D config->SerialConfig.Type; + SerialPortInfo->Baud =3D config->SerialConfig.Baud; + SerialPortInfo->InputHertz =3D config->SerialConfig.InputHertz; + SerialPortInfo->UartPciAddr =3D config->SerialConfig.UartPciAddr; + + return RETURN_SUCCESS; +} + +/** + Find the video frame buffer information + + @param GfxInfo Pointer to the EFI_PEI_GRAPHICS_INFO_HOB str= ucture + + @retval RETURN_SUCCESS Successfully find the video frame buffer +information. + @retval RETURN_NOT_FOUND Failed to find the video frame buffer informa= tion . + +**/ +RETURN_STATUS +EFIAPI +ParseGfxInfo(OUT EFI_PEI_GRAPHICS_INFO_HOB* GfxInfo) { + // Not supported + return RETURN_NOT_FOUND; +} + +/** + Find the video frame buffer device information + + @param GfxDeviceInfo Pointer to the EFI_PEI_GRAPHICS_DEVICE_INFO_H= OB +structure + + @retval RETURN_SUCCESS Successfully find the video frame buffer +information. + @retval RETURN_NOT_FOUND Failed to find the video frame buffer informa= tion. + +**/ +RETURN_STATUS +EFIAPI +ParseGfxDeviceInfo(OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB* GfxDeviceInfo) { + return RETURN_NOT_FOUND; +} diff --git a/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c= b/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c index b0268f05069c..a4f714f765ea 100644 --- a/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c +++ b/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c @@ -40,8 +40,9 @@ AdjustRootBridgeResource ( IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G ) { +#ifndef LINUXBOOT_PAYLOAD UINT64 Mask; - +#endif // // For now try to downgrade everything into MEM32 since // - coreboot does not assign resource above 4GB @@ -80,7 +81,7 @@ AdjustRootBridgeResource ( PMemAbove4G->Base =3D MAX_UINT64; PMemAbove4G->Limit =3D 0; } - +#ifndef LINUXBOOT_PAYLOAD // // Align IO resource at 4K boundary // @@ -98,6 +99,7 @@ AdjustRootBridgeResource ( if (Mem->Base !=3D MAX_UINT64) { Mem->Base &=3D ~Mask; } +#endif } =20 /** diff --git a/CryptoPkg/Library/OpensslLib/openssl b/CryptoPkg/Library/Opens= slLib/openssl index 52c587d60be6..e2e09d9fba11 160000 --- a/CryptoPkg/Library/OpensslLib/openssl +++ b/CryptoPkg/Library/OpensslLib/openssl @@ -1 +1 @@ -Subproject commit 52c587d60be67c337364b830dd3fdc15404a2f04 +Subproject commit e2e09d9fba1187f8d6aafaa34d4172f56f1ffb72 --=20 2.32.0.402.g57bb445576-goog -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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