From nobody Mon May 6 01:31:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+76763+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+76763+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1624030094; cv=none; d=zohomail.com; s=zohoarc; b=V7EgiungnjLZ1rjr5MXimLcwD0nqDagoF5m1x5pn17tJqQesFHMDb2Bui0DyA9ZvLpmUGwWuwzjck1u8Wh8B02q/dWAMG7cEGOXL//dOh6Xuk7V4XG+bvsdgfzxirUDms5UVytB0esgMh3UYOJfMAwp79KKSUQm3tsVMwAqra4w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1624030094; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=N7K1zIG1S6X2h/dFALeCJ0P8ISzPkImV9x6721IqgNI=; b=jrJS6sJBgWAhBaHlKKar+QbUi83Bl/Z12F9uJC35TZ9RKZuESNOV3Wpnz/vrAY7/SuQxG/esPVY1S934ggdG5aSQQrdVVwuWZRN27CWXs0fek+Qr8wdW4xW5q3C+mS7Ev8+UGqcRfd8PkLB5NtHbFyvNq3WoS3RC08nrlRG8A64= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+76763+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1624030094395714.3542399623483; Fri, 18 Jun 2021 08:28:14 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id SLRpYY1788612xzielUT7DU5; Fri, 18 Jun 2021 08:28:14 -0700 X-Received: from mail-pl1-f177.google.com (mail-pl1-f177.google.com [209.85.214.177]) by mx.groups.io with SMTP id smtpd.web11.9401.1624030088634153568 for ; Fri, 18 Jun 2021 08:28:08 -0700 X-Received: by mail-pl1-f177.google.com with SMTP id e1so4835462plh.8 for ; Fri, 18 Jun 2021 08:28:08 -0700 (PDT) X-Gm-Message-State: 8jswMfDBbrxw2n1Dd7E17l0fx1787277AA= X-Google-Smtp-Source: ABdhPJzARhaZ0Jg7f2PSzejb5pEfL/Gmf1aeTK8u1tbcmPG2727IAexX78iZVWb/9mG6bNnMQCLEKQ== X-Received: by 2002:a17:90a:7025:: with SMTP id f34mr21142559pjk.95.1624030087945; Fri, 18 Jun 2021 08:28:07 -0700 (PDT) X-Received: from embedded-PC.puresoft.int ([125.63.92.170]) by smtp.gmail.com with ESMTPSA id v15sm8326360pfm.216.2021.06.18.08.28.04 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 Jun 2021 08:28:07 -0700 (PDT) From: "Vikas Singh via groups.io" To: devel@edk2.groups.io Cc: sami.mujawar@arm.com, leif@nuviainc.com, meenakshi.aggarwal@nxp.com, samer.el-haj-mahmoud@arm.com, v.sethi@nxp.com, arokia.samy@puresoftware.com, kuldip.dwivedi@puresoftware.com, ard.biesheuvel@arm.com, vikas.singh@nxp.com, Sunny.Wang@arm.com Subject: [edk2-devel] [PATCH V2 1/4] Platform/NXP: Make SoC version log in ConfigurationManager generic Date: Fri, 18 Jun 2021 20:57:37 +0530 Message-Id: <20210618152740.14819-2-vikas.singh@puresoftware.com> In-Reply-To: <20210618152740.14819-1-vikas.singh@puresoftware.com> References: <20210618152740.14819-1-vikas.singh@puresoftware.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,vikas.singh@puresoftware.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1624030094; bh=goFQl+l8ycUarLEcEId/a55tUCFWWGc6+0lk+/NfZ3M=; h=Cc:Date:From:Reply-To:Subject:To; b=M0X18GneHzddtuQExQvlVKyqg/84j454QdLM5bgRPurRrw7cOPcU1uG1N3UbiLzxGnM ym8si/2h0MzOqfDlLAy/jfZpPNyBGUAdvn6oDOpp6sibPCXsfLZXHOXH8PFG1If+m0QIC 8X9//dTe571fjCC0qurqHg++gJ2BPt26E78= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" This patch replaces the logic in ConfigurationManager to print platform name based on platform ID with a simple #define PLAT_SOC_NAME defined in platform headers. This also removes duplication of the SVR_LX2160A, SVR_SOC_VER, SVR_MAJOR and SVR_MINOR macro definitions between SoC headers and platform headers. Signed-off-by: Vikas Singh --- Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Configuration= Manager.c | 11 ++++------- Platform/NXP/LX2160aRdbPkg/Include/Platform.h = | 8 ++------ Silicon/NXP/LX2160A/LX2160A.dsc.inc = | 3 ++- 3 files changed, 8 insertions(+), 14 deletions(-) diff --git a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/C= onfigurationManager.c b/Platform/NXP/ConfigurationManagerPkg/ConfigurationM= anagerDxe/ConfigurationManager.c index 80ce8412c4..39376d900b 100644 --- a/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Configur= ationManager.c +++ b/Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Configur= ationManager.c @@ -2,7 +2,7 @@ Configuration Manager Dxe =20 Copyright 2020 NXP - Copyright 2020 Puresoftware Ltd + Copyright 2020-2021 Puresoftware Ltd =20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -25,6 +25,7 @@ */ #include "ConfigurationManager.h" #include +#include =20 /** The platform configuration repository information. */ @@ -170,12 +171,8 @@ InitializePlatformRepository ( PlatformRepo =3D This->PlatRepoInfo; =20 Svr =3D SocGetSvr (); - if (SVR_SOC_VER(Svr) =3D=3D SVR_LX2160A) { - PlatformRepo->FslBoardRevision =3D SVR_MAJOR(Svr); - DEBUG ((DEBUG_INFO, "Fsl : SoC LX2160A Rev =3D 0x%x\n", PlatformRepo->= FslBoardRevision)); - } else { - DEBUG ((DEBUG_INFO, "Fsl : SoC Unknown Rev =3D 0x%x\n", PlatformRepo->= FslBoardRevision)); - } + PlatformRepo->FslBoardRevision =3D SVR_MAJOR(Svr); + DEBUG ((DEBUG_INFO, "Fsl : SoC =3D %s Rev =3D 0x%x\n", PLAT_SOC_NAME, Pl= atformRepo->FslBoardRevision)); =20 return EFI_SUCCESS; } diff --git a/Platform/NXP/LX2160aRdbPkg/Include/Platform.h b/Platform/NXP/L= X2160aRdbPkg/Include/Platform.h index 76a41d4369..f2e831f033 100644 --- a/Platform/NXP/LX2160aRdbPkg/Include/Platform.h +++ b/Platform/NXP/LX2160aRdbPkg/Include/Platform.h @@ -2,7 +2,7 @@ * Platform headers * * Copyright 2020 NXP - * Copyright 2020 Puresoftware Ltd + * Copyright 2020-2021 Puresoftware Ltd * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -15,11 +15,7 @@ #define EFI_ACPI_ARM_OEM_REVISION 0x00000000 =20 // Soc defines -#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFE) -#define SVR_MAJOR(svr) (((svr) >> 4) & 0xf) -#define SVR_MINOR(svr) (((svr) >> 0) & 0xf) - -#define SVR_LX2160A 0x873600 +#define PLAT_SOC_NAME "LX2160ARDB" =20 // PCLK #define DCFG_BASE 0x1E00000 diff --git a/Silicon/NXP/LX2160A/LX2160A.dsc.inc b/Silicon/NXP/LX2160A/LX21= 60A.dsc.inc index ea7e54fa89..15a06bea1f 100644 --- a/Silicon/NXP/LX2160A/LX2160A.dsc.inc +++ b/Silicon/NXP/LX2160A/LX2160A.dsc.inc @@ -2,7 +2,7 @@ # LX2160A Soc package. # # Copyright 2018-2020 NXP -# Copyright 2020 Puresoftware Ltd +# Copyright 2020-2021 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -70,6 +70,7 @@ Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Configurati= onManagerDxe.inf { *_*_*_PLATFORM_FLAGS =3D -I$(WORKSPACE)/Platform/NXP/LX2160aRdbPkg/I= nclude + *_*_*_PLATFORM_FLAGS =3D -I$(WORKSPACE)/Silicon/NXP/Chassis3V2/Inclu= de } !endif =20 --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#76763): https://edk2.groups.io/g/devel/message/76763 Mute This Topic: https://groups.io/mt/83630881/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon May 6 01:31:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+76764+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+76764+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1624030098; cv=none; d=zohomail.com; s=zohoarc; b=lXrJOXYWAGxbwro1yGo4E1Z+KTbTlKcARyfGi/kB2tYROE04HWAPq4cIsu2LpwOUNVuXDSWOGNYo9VaW5mbafaKG4/yMctM+tpKxXf1vBxcpDoUnMOCNV42hDpIq9AwXKiXSU0IF8TqSCdqXvznDPdW+/zIEOinDhCzlPdgMD/k= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1624030098; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=/biD92+b9Sje8jo17gjvhtqoR6c5glgRBvTiaL6kql4=; b=BQMv+MBCEB5z4uS9fdVqIHFMuGfQB7KFUmqExQ4Xr/GTq9SLEW8Yg/4PL2sgaPWUrJfRoNa/BBiAaUU3dEFBye3O9T/r7yXUahnd4eYmo/B/3WIX/cZDRMfJOd1uxdqmQmFxLp+TQAYW+c30Qp81zBbaWi48gtkjN67ZOks5t8Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+76764+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1624030098396193.28668352634486; Fri, 18 Jun 2021 08:28:18 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id eVsEYY1788612xbIkvqaf8lN; Fri, 18 Jun 2021 08:28:17 -0700 X-Received: from mail-pg1-f171.google.com (mail-pg1-f171.google.com [209.85.215.171]) by mx.groups.io with SMTP id smtpd.web08.9406.1624030092451897293 for ; Fri, 18 Jun 2021 08:28:12 -0700 X-Received: by mail-pg1-f171.google.com with SMTP id m2so8078398pgk.7 for ; Fri, 18 Jun 2021 08:28:12 -0700 (PDT) X-Gm-Message-State: C0PFnwIepAMw4ZEo2Fo8sgJIx1787277AA= X-Google-Smtp-Source: ABdhPJyWlAsVfvPvchXRM27s2RZcHepjbd/7VVPCmn0FjVKxCpCZbHlHPPb/+VZ5q9QNuzMy7PUUFw== X-Received: by 2002:a05:6a00:7ca:b029:2fc:daf6:d0f0 with SMTP id n10-20020a056a0007cab02902fcdaf6d0f0mr5628592pfu.15.1624030091819; Fri, 18 Jun 2021 08:28:11 -0700 (PDT) X-Received: from embedded-PC.puresoft.int ([125.63.92.170]) by smtp.gmail.com with ESMTPSA id v15sm8326360pfm.216.2021.06.18.08.28.08 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 Jun 2021 08:28:11 -0700 (PDT) From: "Vikas Singh via groups.io" To: devel@edk2.groups.io Cc: sami.mujawar@arm.com, leif@nuviainc.com, meenakshi.aggarwal@nxp.com, samer.el-haj-mahmoud@arm.com, v.sethi@nxp.com, arokia.samy@puresoftware.com, kuldip.dwivedi@puresoftware.com, ard.biesheuvel@arm.com, vikas.singh@nxp.com, Sunny.Wang@arm.com Subject: [edk2-devel] [PATCH V2 2/4] Silicon/NXP: Add support of SVR handling for LS1046A SoC Date: Fri, 18 Jun 2021 20:57:38 +0530 Message-Id: <20210618152740.14819-3-vikas.singh@puresoftware.com> In-Reply-To: <20210618152740.14819-1-vikas.singh@puresoftware.com> References: <20210618152740.14819-1-vikas.singh@puresoftware.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,vikas.singh@puresoftware.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1624030097; bh=1pB+Fx2Rm4wZAeniLYuUbEEyVpSjjQ1nQ1ENxUy05uo=; h=Cc:Date:From:Reply-To:Subject:To; b=dSXIyRtZOYYtNJcM97gal8mSq7PhA/AdPsKLx572/bPhYx7fP57lGJ8rnh9BSluU5ey 8E0RR0VIOV2Yp8y8ud655lPsXnWuwy36E+HwdZ7ZYuyDBLuTxeH43PdFC/yMW/gcjhirn zIYu7zcY9bvkK7BNA9TE5xmv5WGixDY408w= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" This patch adds a generic method to get Silicon Version Register (SVR) on LS1046A SoC. This method will be generic for all platfroms based on LS1046A SoC, like - LS1046AFRWY, LS1046ARDB. Signed-off-by: Vikas Singh --- Silicon/NXP/LS1046A/Library/SocLib/SocLib.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c b/Silicon/NXP/LS10= 46A/Library/SocLib/SocLib.c index 8fa6a7dd00..003f5bd82f 100644 --- a/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c +++ b/Silicon/NXP/LS1046A/Library/SocLib/SocLib.c @@ -2,6 +2,7 @@ SoC specific Library containg functions to initialize various SoC compon= ents =20 Copyright 2017-2020 NXP + Copyright 2021 Puresoftware Ltd =20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -64,6 +65,21 @@ SocGetClock ( return ReturnValue; } =20 +/** + Function to get SoC's System Version Register(SVR) + **/ +UINT32 +SocGetSvr ( + VOID + ) +{ + LS1046A_DEVICE_CONFIG *Dcfg; + + Dcfg =3D (LS1046A_DEVICE_CONFIG *)LS1046A_DCFG_ADDRESS; + + return DcfgRead32 ((UINTN)&Dcfg->Svr); +} + /** Function to select pins depending upon pcd using supplemental configuration unit(SCFG) extended RCW controlled pinmux control --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#76764): https://edk2.groups.io/g/devel/message/76764 Mute This Topic: https://groups.io/mt/83630883/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon May 6 01:31:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+76765+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+76765+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1624030103; cv=none; d=zohomail.com; s=zohoarc; b=H2+OQoaBm57s1h+u4z2SFHOiud13bs3derow/xodErVlwcIg9eV2pQaGhF05FmGQVX35zQBzxCUoDFfD/DY9Sd1B1BDabwBqpglb6Qa3UyHmYWIegKcs/gHo3VrFgr+3oaCYYVWVV9HjnV0dsBslp8szyvWCcZeMUbEkWShijDU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1624030103; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=1hOFZfHyEXoccIBJTjZPTWgsFwA7JGkeJGwf7atRcK0=; b=TcyLZXSi9mC52enXGtIXIQodwPbQnaAtNo4fLjL+x6/2EKg2g6g1+O5wTYfa7/e2Oschp6gbe4NPnc/tgiHsbnlKJJoLkEXM7mHnoeZ3HjJEIlHjSSKEZNkMgqKMEVemymrZiKLPN9DbUGxdEEaqsg7X8YgQiNZvQ3CIBrhpHcc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+76765+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1624030103437847.1437444201076; Fri, 18 Jun 2021 08:28:23 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id QaCxYY1788612xCkg8eMp0KD; Fri, 18 Jun 2021 08:28:22 -0700 X-Received: from mail-pg1-f175.google.com (mail-pg1-f175.google.com [209.85.215.175]) by mx.groups.io with SMTP id smtpd.web08.9408.1624030096592877778 for ; Fri, 18 Jun 2021 08:28:16 -0700 X-Received: by mail-pg1-f175.google.com with SMTP id t17so8087853pga.5 for ; Fri, 18 Jun 2021 08:28:16 -0700 (PDT) X-Gm-Message-State: Hk8fvSRk7AxUR2bhlJDGpyiZx1787277AA= X-Google-Smtp-Source: ABdhPJwmxuufJ9RXNd1/DjkwuAFSNBgNA8O9R2/45SLRLMrF+nsEOuJ58SQimNg1/SzW8yG4QlJJLA== X-Received: by 2002:aa7:8e18:0:b029:2ec:a754:570e with SMTP id c24-20020aa78e180000b02902eca754570emr5513317pfr.38.1624030095816; Fri, 18 Jun 2021 08:28:15 -0700 (PDT) X-Received: from embedded-PC.puresoft.int ([125.63.92.170]) by smtp.gmail.com with ESMTPSA id v15sm8326360pfm.216.2021.06.18.08.28.12 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 Jun 2021 08:28:15 -0700 (PDT) From: "Vikas Singh via groups.io" To: devel@edk2.groups.io Cc: sami.mujawar@arm.com, leif@nuviainc.com, meenakshi.aggarwal@nxp.com, samer.el-haj-mahmoud@arm.com, v.sethi@nxp.com, arokia.samy@puresoftware.com, kuldip.dwivedi@puresoftware.com, ard.biesheuvel@arm.com, vikas.singh@nxp.com, Sunny.Wang@arm.com Subject: [edk2-devel] [PATCH V2 3/4] NXP/LS1046aFrwyPkg: Enable ConfigurationManager on LS1046AFRWY Date: Fri, 18 Jun 2021 20:57:39 +0530 Message-Id: <20210618152740.14819-4-vikas.singh@puresoftware.com> In-Reply-To: <20210618152740.14819-1-vikas.singh@puresoftware.com> References: <20210618152740.14819-1-vikas.singh@puresoftware.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,vikas.singh@puresoftware.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1624030102; bh=BLpTFMwsvu/eEDx3mfjeAvNTfIBh0llgHAZoF3KRxgs=; h=Cc:Date:From:Reply-To:Subject:To; b=JqFboFhwDeOYiBT6qBJE8r4VkLUp2+grd1KmkPxNLgMyNuGnTsVW9WbRczazrTMbg1a s5CXV25MeR77vYyr9a9htoAy732+1kJ5AwpnLVZGidQVXGVwvaB2nUELoL4hAGWCKJ2+Q XbCKgJ1VcuoCVO0ZL8tWOMCggl8rsIkIONE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" This patch enables the use of ConfigurationManager (CM) and its services to leverage the Dynamic ACPI support for NXP's LS1046aFrwy platform. Signed-off-by: Vikas Singh Reviewed-by: Sunny Wang > --- Platform/NXP/LS1046aFrwyPkg/Include/Platform.h | 152 ++++++++++++++++++++ Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc | 28 ++++ Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf | 13 ++ Silicon/NXP/LS1046A/LS1046A.dsc.inc | 11 ++ 4 files changed, 204 insertions(+) diff --git a/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h b/Platform/NXP/= LS1046aFrwyPkg/Include/Platform.h new file mode 100644 index 0000000000..3c68d65cd3 --- /dev/null +++ b/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h @@ -0,0 +1,152 @@ +/** @file + * Platform headers + * + * Copyright 2021 NXP + * Copyright 2021 Puresoftware Ltd + * + * SPDX-License-Identifier: BSD-2-Clause-Patent + * +**/ + + +#ifndef LS1046AFRWY_PLATFORM_H +#define LS1046AFRWY_PLATFORM_H + +#define EFI_ACPI_ARM_OEM_REVISION 0x00000000 + +// Soc defines +#define PLAT_SOC_NAME "LS1046AFRWY" + +// Gic +#define GIC_VERSION 2 +#define GICD_BASE 0x1410000 +#define GICC_BASE 0x142f000 +#define GICH_BASE 0x1440000 +#define GICV_BASE 0x1460000 + +// UART +#define UART0_BASE 0x21C0500 +#define UART0_IT 86 +#define UART0_LENGTH 0x100 +#define SPCR_FLOW_CONTROL_NONE 0 + +// Timer +#define TIMER_BLOCK_COUNT 1 +#define TIMER_FRAME_COUNT 4 +#define TIMER_WATCHDOG_COUNT 1 +#define TIMER_BASE_ADDRESS 0x23E0000 // a.k.a CNTControlBase +#define TIMER_READ_BASE_ADDRESS 0x23F0000 // a.k.a CNTReadBase +#define TIMER_SEC_IT 29 +#define TIMER_NON_SEC_IT 30 +#define TIMER_VIRT_IT 27 +#define TIMER_HYP_IT 26 +#define TIMER_FRAME0_IT 78 +#define TIMER_FRAME1_IT 79 +#define TIMER_FRAME2_IT 92 + +// Mcfg +#define LS1046A_PCI_SEG0_CONFIG_BASE 0x4000000000 +#define LS1046A_PCI_SEG0 0x0 +#define LS1046A_PCI_SEG_BUSNUM_MIN 0x0 +#define LS1046A_PCI_SEG_BUSNUM_MAX 0xff +#define LS1046A_PCI_SEG1_CONFIG_BASE 0x4800000000 +#define LS1046A_PCI_SEG2_CONFIG_BASE 0x5000000000 +#define LS1046A_PCI_SEG1 0x1 +#define LS1046A_PCI_SEG2 0x2 + +// Platform specific info needed by Configuration Manager + +#define CFG_MGR_TABLE_ID SIGNATURE_64 ('L','S','1','0','4','6',' ',' ') + +// Specify the OEM defined tables +#define OEM_ACPI_TABLES 0 + +#define PLAT_PCI_SEG0 LS1046A_PCI_SEG0 +#define PLAT_PCI_SEG1_CONFIG_BASE LS1046A_PCI_SEG1_CONFIG_BASE +#define PLAT_PCI_SEG1 LS1046A_PCI_SEG1 +#define PLAT_PCI_SEG_BUSNUM_MIN LS1046A_PCI_SEG_BUSNUM_MIN +#define PLAT_PCI_SEG_BUSNUM_MAX LS1046A_PCI_SEG_BUSNUM_MAX +#define PLAT_PCI_SEG2_CONFIG_BASE LS1046A_PCI_SEG2_CONFIG_BASE +#define PLAT_PCI_SEG2 LS1046A_PCI_SEG2 + +#define PLAT_GIC_VERSION GIC_VERSION +#define PLAT_GICD_BASE GICD_BASE +#define PLAT_GICI_BASE GICI_BASE +#define PLAT_GICR_BASE GICR_BASE +#define PLAT_GICR_LEN GICR_LEN +#define PLAT_GICC_BASE GICC_BASE +#define PLAT_GICH_BASE GICH_BASE +#define PLAT_GICV_BASE GICV_BASE + +#define PLAT_CPU_COUNT 4 +#define PLAT_GTBLOCK_COUNT 0 +#define PLAT_GTFRAME_COUNT 0 +#define PLAT_PCI_CONFG_COUNT 2 + +#define PLAT_WATCHDOG_COUNT 0 +#define PLAT_GIC_REDISTRIBUTOR_COUNT 0 +#define PLAT_GIC_ITS_COUNT 0 + +/* GIC CPU Interface information + GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq, EnergyEfficiency) + */ +#define PLAT_GIC_CPU_INTERFACE { \ + GICC_ENTRY (0, GET_MPID (0, 0), 138, 0x19, 0), \ + GICC_ENTRY (1, GET_MPID (0, 1), 139, 0x19, 0), \ + GICC_ENTRY (2, GET_MPID (0, 2), 127, 0x19, 0), \ + GICC_ENTRY (3, GET_MPID (0, 3), 129, 0x19, 0), \ +} + +#define PLAT_WATCHDOG_INFO \ + { \ + } \ + +#define PLAT_TIMER_BLOCK_INFO \ + { \ + } \ + +#define PLAT_TIMER_FRAME_INFO \ + { \ + } \ + +#define PLAT_GIC_DISTRIBUTOR_INFO \ + { \ + PLAT_GICD_BASE, /* UINT64 PhysicalBaseAddress */ \ + 0, /* UINT32 SystemVectorBase */ \ + PLAT_GIC_VERSION /* UINT8 GicVersion */ \ + } \ + +#define PLAT_GIC_REDISTRIBUTOR_INFO \ + { \ + } \ + +#define PLAT_GIC_ITS_INFO \ + { \ + } \ + +#define PLAT_MCFG_INFO \ + { \ + { \ + PLAT_PCI_SEG1_CONFIG_BASE, \ + PLAT_PCI_SEG1, \ + PLAT_PCI_SEG_BUSNUM_MIN, \ + PLAT_PCI_SEG_BUSNUM_MAX, \ + }, \ + { \ + PLAT_PCI_SEG2_CONFIG_BASE, \ + PLAT_PCI_SEG2, \ + PLAT_PCI_SEG_BUSNUM_MIN, \ + PLAT_PCI_SEG_BUSNUM_MAX, \ + } \ + } \ + +#define PLAT_SPCR_INFO = \ + { = \ + UART0_BASE, = \ + UART0_IT, = \ + 115200, = \ + 0, = \ + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16550 = \ + } = \ + +#endif // LS1046AFRWY_PLATFORM_H diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc b/Platform/NXP/= LS1046aFrwyPkg/LS1046aFrwyPkg.dsc index 67cf15cbe4..20111e6037 100755 --- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc +++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc @@ -3,6 +3,7 @@ # LS1046AFRWY Board package. # # Copyright 2019-2020 NXP +# Copyright 2021 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,10 +23,18 @@ OUTPUT_DIRECTORY =3D Build/LS1046aFrwyPkg FLASH_DEFINITION =3D Platform/NXP/LS1046aFrwyPkg/LS1046aFr= wyPkg.fdf =20 + # This flag controls the dynamic acpi generation + # + DEFINE DYNAMIC_ACPI_ENABLE =3D TRUE + !include Silicon/NXP/NxpQoriqLs.dsc.inc !include MdePkg/MdeLibs.dsc.inc !include Silicon/NXP/LS1046A/LS1046A.dsc.inc =20 +!if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE + !include DynamicTablesPkg/DynamicTables.dsc.inc +!endif + [LibraryClasses.common] ArmPlatformLib|Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPla= tformLib.inf RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualReal= TimeClockLib.inf @@ -46,4 +55,23 @@ =20 Silicon/NXP/Drivers/UsbHcdInitDxe/UsbHcd.inf =20 + # + # Dynamic Table Factory + !if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE + DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe= .inf { + + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/AcpiFadtLibA= rm.inf + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/AcpiGtdtLibA= rm.inf + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibA= rm.inf + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibA= rm.inf + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiSpcrLibArm/AcpiSpcrLibA= rm.inf + } + !endif + + # + # Acpi Support + # + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + ## diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf b/Platform/NXP/= LS1046aFrwyPkg/LS1046aFrwyPkg.fdf index 34c4e5a025..f3cac033bc 100755 --- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf +++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf @@ -3,6 +3,7 @@ # FLASH layout file for LS1046a board. # # Copyright 2019-2020 NXP +# Copyright 2021 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -99,6 +100,18 @@ READ_LOCK_STATUS =3D TRUE INF MdeModulePkg/Universal/Metronome/Metronome.inf INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf =20 + + # + # Acpi Support + # + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + + !if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE + INF Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Confi= gurationManagerDxe.inf + !include DynamicTablesPkg/DynamicTables.fdf.inc + !endif + # # Multiple Console IO support # diff --git a/Silicon/NXP/LS1046A/LS1046A.dsc.inc b/Silicon/NXP/LS1046A/LS10= 46A.dsc.inc index 7004533ed5..caebb321d0 100644 --- a/Silicon/NXP/LS1046A/LS1046A.dsc.inc +++ b/Silicon/NXP/LS1046A/LS1046A.dsc.inc @@ -2,6 +2,7 @@ # LS1046A Soc package. # # Copyright 2017-2020 NXP +# Copyright 2021-2021 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -48,4 +49,14 @@ [Components.common] MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf =20 +# +# Configuration Manager +!if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE + Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Configurati= onManagerDxe.inf { + + *_*_*_PLATFORM_FLAGS =3D -I$(WORKSPACE)/Platform/NXP/LS1046aFrwyPkg/= Include + *_*_*_PLATFORM_FLAGS =3D -I$(WORKSPACE)/Silicon/NXP/Chassis2/Include + } +!endif + ## --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#76765): https://edk2.groups.io/g/devel/message/76765 Mute This Topic: https://groups.io/mt/83630884/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon May 6 01:31:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+76766+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+76766+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1624030101; cv=none; d=zohomail.com; s=zohoarc; b=EVT12HJNzG698bpeceDXzQt9bYcY+JCGg1m31hBGGDSnPyXYBZ59Ga7+6FSRVIJjSp/qf4PObSH2T3Wm1950AqC29hCcRpmlV4l15kIkayCBp/THYuVVsk4yjElCsPWQbw/gTE0xiaEZXNKXVfYRDQg9HsCUuSPRSerz6f0miiE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1624030101; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=cllACzxUtn1HvA8YH8jZPcAnVluqSIukq2eJmnali3M=; b=Llj+VM4212/sNBmHbbkdYbau3R2oDZLrMaQoayCa++vNoWtjPyM2NbamF9pEqo01JFrKbIhaL3+d1pyagqfjSGd7v6Nu7PHkOJOHxPU0FQGiDLnopnuoN9GX+h/l7fASBavmg+Dq1GZLE4QeMaSC4gak/MzRtLsqAzUvmgxFGTI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+76766+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1624030101557789.2733282339295; Fri, 18 Jun 2021 08:28:21 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id U3YmYY1788612xAyCmesdYoK; Fri, 18 Jun 2021 08:28:21 -0700 X-Received: from mail-pf1-f182.google.com (mail-pf1-f182.google.com [209.85.210.182]) by mx.groups.io with SMTP id smtpd.web11.9403.1624030100665429376 for ; Fri, 18 Jun 2021 08:28:20 -0700 X-Received: by mail-pf1-f182.google.com with SMTP id k6so7909140pfk.12 for ; Fri, 18 Jun 2021 08:28:20 -0700 (PDT) X-Gm-Message-State: nBMdCjWjYXkGoHhOvSmNGCPbx1787277AA= X-Google-Smtp-Source: ABdhPJyUabdmVqdC2r3pFeWgOw0ed7IoOIBHIbMMNE9d6yzgPbOppKArfzsy6RQvYGXsteL7UzFwxw== X-Received: by 2002:a65:6a16:: with SMTP id m22mr10767617pgu.29.1624030099835; Fri, 18 Jun 2021 08:28:19 -0700 (PDT) X-Received: from embedded-PC.puresoft.int ([125.63.92.170]) by smtp.gmail.com with ESMTPSA id v15sm8326360pfm.216.2021.06.18.08.28.16 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 Jun 2021 08:28:19 -0700 (PDT) From: "Vikas Singh via groups.io" To: devel@edk2.groups.io Cc: sami.mujawar@arm.com, leif@nuviainc.com, meenakshi.aggarwal@nxp.com, samer.el-haj-mahmoud@arm.com, v.sethi@nxp.com, arokia.samy@puresoftware.com, kuldip.dwivedi@puresoftware.com, ard.biesheuvel@arm.com, vikas.singh@nxp.com, Sunny.Wang@arm.com Subject: [edk2-devel] [PATCH V2 4/4] Platform/NXP/LS1046aFrwyPkg: Add OEM specific DSDT generator Date: Fri, 18 Jun 2021 20:57:40 +0530 Message-Id: <20210618152740.14819-5-vikas.singh@puresoftware.com> In-Reply-To: <20210618152740.14819-1-vikas.singh@puresoftware.com> References: <20210618152740.14819-1-vikas.singh@puresoftware.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,vikas.singh@puresoftware.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1624030101; bh=HFhrARQpszcH0eyN2ThUMYc3v71XS26oMCpW9tpiXy0=; h=Cc:Date:From:Reply-To:Subject:To; b=axGNUXdHutTNMKWT+pFBrrQkLM6ipDEdWTrcMP3ND/iHrRa+Yo7kYFnVuoRnwVAuQrl MAKBTe2j5Ohx5a/pIcnDSPOmUw0k1DWgl6hxM/w0Id8f2uVVDLZ4357J9QWD3u15Jfhet 8eg00IrpfnmxlwgUh1OlOX/NZDD//nuBgz0= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" This patch adds platform specific DSDT generator and Clk dsdt properties for LS1046AFRWY platform. Reviewed-by: Leif Lindholm Signed-off-by: Vikas Singh --- Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/Dsdt/Clk.asl = | 60 +++++++++ Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/Dsdt/Dsdt.asl = | 15 +++ Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/PlatformAcpiDsdtLib.inf = | 39 ++++++ Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/PlatformAcpiDsdtLib/RawDsdtG= enerator.c | 138 ++++++++++++++++++++ Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/PlatformAcpiLib.h = | 23 ++++ Platform/NXP/LS1046aFrwyPkg/Include/Platform.h = | 6 +- Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc = | 1 + 7 files changed, 281 insertions(+), 1 deletion(-) diff --git a/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/Dsdt/Clk.asl b/P= latform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/Dsdt/Clk.asl new file mode 100644 index 0000000000..58541c3019 --- /dev/null +++ b/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/Dsdt/Clk.asl @@ -0,0 +1,60 @@ +/** @file +* DSDT : Dynamic Clock ACPI Information +* +* Copyright 2021 NXP +* Copyright 2021 Puresoftware Ltd. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +Scope(_SB) +{ + Device(PCLK) { + Name(_HID, "NXP0017") + Name(CLK, 0) // Maximum Platform Clock (Hz) + Name(CCLK, 0) // Maximum CPU Core Clock (MHz) + Name(AVBL, 0) + OperationRegion(RCWS, SystemMemory, DCFG_BASE, DCFG_LEN) + Method(_REG,2) { + if (Arg0 =3D=3D "RCWS") { + Store(Arg1, AVBL) + } + } + Field (RCWS, ByteAcc, NoLock, Preserve) { + /* The below table provides the func of diff bits in 512 bits RCW da= ta: + SYS_PLL_CFG : 0-1 bits + SYS_PLL_RAT : 2-6 bits + SYSCLK_FREQ : 472-481 bits etc. + Refer LS1046ARM for more info. + For LS1046 RCWSRs are read as RCW[0:31] . + */ + offset(0x100), + RESV, 1, + PRAT, 5, + PCFG, 2, + offset(0x103), + CPRT, 6, // Cluster Group PLL Multiplier ratio + offset(0x13B), + HFRQ, 8, // Higher 8 bits of SYSCLK_FREQ + RESX, 6, + LFRQ, 2 // Lower bits of SYSCLK_FREQ + } + + Method(_INI, 0, NotSerialized) { + /* Calculating Platform Clock */ + Local0 =3D (HFRQ<<2 | LFRQ) // Concatinating LFRQ at end of HFRQ + Multiply(Local0, 500000, Local0) + Multiply(Local0, PRAT, Local0) + Divide(Local0, 3, , Local0) + Store(Local0, CLK) + + /* Calculating Maximum Core Clock */ + Local0 =3D (HFRQ<<2 | LFRQ) // Concatinating LFRQ at end of HFRQ + Multiply(Local0, 500000, Local0) + Divide(Local0, 3, , Local0) + Divide(Local0, 1000000, , Local0) //Just the MHz part of SYSCLK. + Multiply(Local0, CPRT, CCLK) // PLL_Ratio * SYSCLK, Max freq of clus= ter + } + } // end of device PCLK +} diff --git a/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/Dsdt/Dsdt.asl b/= Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/Dsdt/Dsdt.asl new file mode 100644 index 0000000000..19f3f1c0e8 --- /dev/null +++ b/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/Dsdt/Dsdt.asl @@ -0,0 +1,15 @@ +/** @file + Differentiated System Description Table Fields (DSDT) + + Copyright 2021 NXP + Copyright 2021 Puresoftware Ltd. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "Platform.h" + +DefinitionBlock("DsdtTable.aml", "DSDT", 2, "NXP ", "LS1046 ", EFI_ACPI_= ARM_OEM_REVISION) { + include ("Clk.asl") +} diff --git a/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/PlatformAcpiDsdt= Lib.inf b/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/PlatformAcpiDsdtLib= .inf new file mode 100644 index 0000000000..ed5f9dd442 --- /dev/null +++ b/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/PlatformAcpiDsdtLib.inf @@ -0,0 +1,39 @@ +## @file +# Raw Table Generator +# +# Copyright 2021 NXP +# Copyright 2021 Puresoftware Ltd +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +[Defines] + INF_VERSION =3D 0x00010019 + BASE_NAME =3D PlatformAcpiDsdtLib + FILE_GUID =3D A97F70AC-3BB4-4596-B4D2-9F948EC12D17 + VERSION_STRING =3D 1.0 + MODULE_TYPE =3D DXE_DRIVER + LIBRARY_CLASS =3D NULL|DXE_DRIVER + CONSTRUCTOR =3D AcpiDsdtLibConstructor + DESTRUCTOR =3D AcpiDsdtLibDestructor + +[Sources] + PlatformAcpiDsdtLib/RawDsdtGenerator.c + Dsdt/Dsdt.asl + +[Packages] + DynamicTablesPkg/DynamicTablesPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dec + Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerPkg.dec + +[LibraryClasses] + BaseLib + +[Pcd] + +[Protocols] + +[Guids] diff --git a/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/PlatformAcpiDsdt= Lib/RawDsdtGenerator.c b/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/Plat= formAcpiDsdtLib/RawDsdtGenerator.c new file mode 100644 index 0000000000..7d886396ca --- /dev/null +++ b/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/PlatformAcpiDsdtLib/Raw= DsdtGenerator.c @@ -0,0 +1,138 @@ +/** @file + Raw DSDT Table Generator + + Copyright 2021 NXP + Copyright 2021 Puresoftware Ltd. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include + +// Module specific include files. +#include +#include +#include +#include +#include + +#include "PlatformAcpiLib.h" + +/** Construct the ACPI table using the ACPI table data provided. + This function invokes the Configuration Manager protocol interface + to get the required hardware information for generating the ACPI + table. + If this function allocates any resources then they must be freed + in the FreeXXXXTableResources function. + @param [in] This Pointer to the table generator. + @param [in] AcpiTableInfo Pointer to the ACPI Table Info. + @param [in] CfgMgrProtocol Pointer to the Configuration Manager + Protocol Interface. + @param [out] Table Pointer to the constructed ACPI Table. + @retval EFI_SUCCESS Table generated successfully. + @retval EFI_INVALID_PARAMETER A parameter is invalid. +**/ +STATIC +EFI_STATUS +EFIAPI +BuildRawDsdtTable ( + IN CONST ACPI_TABLE_GENERATOR * CONST This, + IN CONST CM_STD_OBJ_ACPI_TABLE_INFO * CONST AcpiTableInfo, + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL * CONST CfgMgrProtocol, + OUT EFI_ACPI_DESCRIPTION_HEADER ** CONST Table + ) +{ + ASSERT (This !=3D NULL); + ASSERT (AcpiTableInfo !=3D NULL); + ASSERT (CfgMgrProtocol !=3D NULL); + ASSERT (Table !=3D NULL); + ASSERT (AcpiTableInfo->TableGeneratorId =3D=3D This->GeneratorID); + + if (AcpiTableInfo->AcpiTableData =3D=3D NULL) { + // Add the dsdt aml code here. + *Table =3D (EFI_ACPI_DESCRIPTION_HEADER *)&dsdt_aml_code; + } + + return EFI_SUCCESS; +} + +/** This macro defines the Raw Generator revision. +*/ +#define DSDT_GENERATOR_REVISION CREATE_REVISION (1, 0) + +/** The interface for the Raw Table Generator. +*/ +STATIC +CONST +ACPI_TABLE_GENERATOR RawDsdtGenerator =3D { + // Generator ID + CREATE_OEM_ACPI_TABLE_GEN_ID (PlatAcpiTableIdDsdt), + // Generator Description + L"ACPI.OEM.RAW.DSDT.GENERATOR", + // ACPI Table Signature - Unused + 0, + // ACPI Table Revision - Unused + 0, + // Minimum ACPI Table Revision - Unused + 0, + // Creator ID + TABLE_GENERATOR_CREATOR_ID_ARM, + // Creator Revision + DSDT_GENERATOR_REVISION, + // Build Table function + BuildRawDsdtTable, + // No additional resources are allocated by the generator. + // Hence the Free Resource function is not required. + NULL, + // Extended build function not needed + NULL, + // Extended build function not implemented by the generator. + // Hence extended free resource function is not required. + NULL +}; + +/** Register the Generator with the ACPI Table Factory. + @param [in] ImageHandle The handle to the image. + @param [in] SystemTable Pointer to the System Table. + @retval EFI_SUCCESS The Generator is registered. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_ALREADY_STARTED The Generator for the Table ID + is already registered. +**/ +EFI_STATUS +EFIAPI +AcpiDsdtLibConstructor ( + IN CONST EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE * CONST SystemTable + ) +{ + EFI_STATUS Status; + Status =3D RegisterAcpiTableGenerator (&RawDsdtGenerator); + DEBUG ((DEBUG_INFO, "OEM: Register DSDT Generator. Status =3D %r\n", Sta= tus)); + ASSERT_EFI_ERROR (Status); + return Status; +} + +/** Deregister the Generator from the ACPI Table Factory. + @param [in] ImageHandle The handle to the image. + @param [in] SystemTable Pointer to the System Table. + @retval EFI_SUCCESS The Generator is deregistered. + @retval EFI_INVALID_PARAMETER A parameter is invalid. + @retval EFI_NOT_FOUND The Generator is not registered. +**/ +EFI_STATUS +EFIAPI +AcpiDsdtLibDestructor ( + IN CONST EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE * CONST SystemTable + ) +{ + EFI_STATUS Status; + Status =3D DeregisterAcpiTableGenerator (&RawDsdtGenerator); + DEBUG ((DEBUG_INFO, "OEM: Deregister DSDT Generator. Status =3D %r\n", S= tatus)); + ASSERT_EFI_ERROR (Status); + return Status; +} diff --git a/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/PlatformAcpiLib.= h b/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/PlatformAcpiLib.h new file mode 100644 index 0000000000..e5f907a7d4 --- /dev/null +++ b/Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/PlatformAcpiLib.h @@ -0,0 +1,23 @@ +/** @file + * Acpi lib headers + * + * Copyright 2021 NXP + * Copyright 2021 Puresoftware Ltd + * + * SPDX-License-Identifier: BSD-2-Clause-Patent + * +**/ + + +#ifndef LS1046AFRWY_PLATFORM_ACPI_LIB_H +#define LS1046AFRWY_PLATFORM_ACPI_LIB_H + +#include + +/** C array containing the compiled AML template. + These symbols are defined in the auto generated C file + containing the AML bytecode array. +*/ +extern CHAR8 dsdt_aml_code[]; + +#endif diff --git a/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h b/Platform/NXP/= LS1046aFrwyPkg/Include/Platform.h index 3c68d65cd3..0483bf2dc8 100644 --- a/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h +++ b/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h @@ -17,6 +17,10 @@ // Soc defines #define PLAT_SOC_NAME "LS1046AFRWY" =20 +// PCLK : Dynamic Clock +#define DCFG_BASE 0x1EE0000 /* Device configuration da= ta Base Address */ +#define DCFG_LEN 0xFFF /* Device configuration da= ta length */ + // Gic #define GIC_VERSION 2 #define GICD_BASE 0x1410000 @@ -59,7 +63,7 @@ #define CFG_MGR_TABLE_ID SIGNATURE_64 ('L','S','1','0','4','6',' ',' ') =20 // Specify the OEM defined tables -#define OEM_ACPI_TABLES 0 +#define OEM_ACPI_TABLES 1 // Added DSDT =20 #define PLAT_PCI_SEG0 LS1046A_PCI_SEG0 #define PLAT_PCI_SEG1_CONFIG_BASE LS1046A_PCI_SEG1_CONFIG_BASE diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc b/Platform/NXP/= LS1046aFrwyPkg/LS1046aFrwyPkg.dsc index 20111e6037..7041d15da5 100755 --- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc +++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc @@ -65,6 +65,7 @@ NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibA= rm.inf NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibA= rm.inf NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiSpcrLibArm/AcpiSpcrLibA= rm.inf + NULL|Platform/NXP/LS1046aFrwyPkg/AcpiTablesInclude/PlatformAcpiDsd= tLib.inf } !endif =20 --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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