From nobody Sun Feb 8 22:58:07 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+76398+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+76398+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1623426757; cv=none; d=zohomail.com; s=zohoarc; b=btdIkgBDk8t9LKc0vvx/gdUBTiCoWC9x3va/ooaKqW/Ue8G74kVo+Xdv05hr8IBTaM0u8xP07J8jLSnY5imaCAIpbGJI5qwe4GcVEx/3pI5suFvG+GVf7pQ4aft7xQ81LMnmfzTJbprO4SGdtDAb5cFDhjpyvUhRuzBWY+kg/qI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1623426757; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=YCYBeO4d9N45Yxp1ksZMT4MsNWyfaejD0/cpouvc4YA=; b=hig62BRUneoaCetddIiZp5WEuPntppZrXxtKjLr7cFdvK++vQ5vD9zk69WSu39jdnZI6F2wEBVXOJAQBby4cgSpD7bGQ5qNWYuDALMTNitvImXf5JA1JUgbRsL1ZT57+X3E3Ctnofi7wQsRWC0RO8RgkHhC9m9Fo4E6KrJFTOYc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+76398+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1623426757629860.5284520352601; Fri, 11 Jun 2021 08:52:37 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id gob1YY1788612xFiltwXdwQm; Fri, 11 Jun 2021 08:52:37 -0700 X-Received: from mail-pg1-f194.google.com (mail-pg1-f194.google.com [209.85.215.194]) by mx.groups.io with SMTP id smtpd.web09.10358.1623426751681008346 for ; Fri, 11 Jun 2021 08:52:31 -0700 X-Received: by mail-pg1-f194.google.com with SMTP id 27so2817311pgy.3 for ; Fri, 11 Jun 2021 08:52:31 -0700 (PDT) X-Gm-Message-State: hPtWP3oLFEBDzTzUiXZdhWWDx1787277AA= X-Google-Smtp-Source: ABdhPJz49tHI+DZNYuhJdB8q7zW7te/KCb1PawpKZyq8OITNXvlouLuZgYeXtrOPuf2wMm0g3+vmOg== X-Received: by 2002:a62:7b4c:0:b029:2e9:cec2:e252 with SMTP id w73-20020a627b4c0000b02902e9cec2e252mr8769354pfc.56.1623426751001; Fri, 11 Jun 2021 08:52:31 -0700 (PDT) X-Received: from embedded-PC.puresoft.int ([125.63.92.170]) by smtp.gmail.com with ESMTPSA id h8sm5458689pjf.7.2021.06.11.08.52.27 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 11 Jun 2021 08:52:30 -0700 (PDT) From: "Vikas Singh via groups.io" To: devel@edk2.groups.io Cc: sami.mujawar@arm.com, leif@nuviainc.com, meenakshi.aggarwal@nxp.com, samer.el-haj-mahmoud@arm.com, v.sethi@nxp.com, arokia.samy@puresoftware.com, kuldip.dwivedi@puresoftware.com, ard.biesheuvel@arm.com, vikas.singh@nxp.com, Sunny.Wang@arm.com Subject: [edk2-devel] [PATCH V1 3/4] Platform/NXP/LS1046aFrwyPkg: Extend Dynamic ACPI support Date: Fri, 11 Jun 2021 21:21:59 +0530 Message-Id: <20210611155200.15535-4-vikas.singh@puresoftware.com> In-Reply-To: <20210611155200.15535-1-vikas.singh@puresoftware.com> References: <20210611155200.15535-1-vikas.singh@puresoftware.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,vikas.singh@puresoftware.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1623426757; bh=LDK4FA44kCg8nG1eA8yJro91i43u8pM1PlO6vA4fjbY=; h=Cc:Date:From:Reply-To:Subject:To; b=LkvH4LoFBe9gDPpBamy/vv1sr49A8upnNmMpCx0nd6Jpy4iSQ+q96e3Nem1e1ubUMfC h8E2vsawwEP+8nx5wJy6aWiC1zSswcF8tAHfcripMnhEmQ9dY+dpQoUnVB3KYIpa4JsYd SUYADPjUs/usah1ypJ/+dGC6r+lLU/34l8M= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" This patch set extends Configuration Manager (CM) and its services to leverage the Dynamic ACPI support for NXP's LS1046aFrwy platform. Refer-https://edk2.groups.io/g/devel/message/71710 Signed-off-by: Vikas Singh --- Platform/NXP/LS1046aFrwyPkg/Include/Platform.h | 155 ++++++++++++++++++++ Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc | 28 ++++ Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf | 13 ++ Silicon/NXP/LS1046A/LS1046A.dsc.inc | 10 ++ 4 files changed, 206 insertions(+) diff --git a/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h b/Platform/NXP/= LS1046aFrwyPkg/Include/Platform.h new file mode 100644 index 0000000000..19e879ec6d --- /dev/null +++ b/Platform/NXP/LS1046aFrwyPkg/Include/Platform.h @@ -0,0 +1,155 @@ +/** @file + * Platform headers + * + * Copyright 2021 NXP + * Copyright 2021 Puresoftware Ltd + * + * SPDX-License-Identifier: BSD-2-Clause-Patent + * +**/ + + +#ifndef LS1046AFRWY_PLATFORM_H +#define LS1046AFRWY_PLATFORM_H + +#define EFI_ACPI_ARM_OEM_REVISION 0x00000000 + +// Soc defines +#define PLAT_SOC_NAME "LS1046AFRWY" +#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFE) +#define SVR_MAJOR(svr) (((svr) >> 4) & 0xf) +#define SVR_MINOR(svr) (((svr) >> 0) & 0xf) + +// Gic +#define GIC_VERSION 2 +#define GICD_BASE 0x1410000 +#define GICC_BASE 0x142f000 +#define GICH_BASE 0x1440000 +#define GICV_BASE 0x1460000 + +// UART +#define UART0_BASE 0x21C0500 +#define UART0_IT 86 +#define UART0_LENGTH 0x100 +#define SPCR_FLOW_CONTROL_NONE 0 + +// Timer +#define TIMER_BLOCK_COUNT 1 +#define TIMER_FRAME_COUNT 4 +#define TIMER_WATCHDOG_COUNT 1 +#define TIMER_BASE_ADDRESS 0x23E0000 // a.k.a CNTControlBase +#define TIMER_READ_BASE_ADDRESS 0x23F0000 // a.k.a CNTReadBase +#define TIMER_SEC_IT 29 +#define TIMER_NON_SEC_IT 30 +#define TIMER_VIRT_IT 27 +#define TIMER_HYP_IT 26 +#define TIMER_FRAME0_IT 78 +#define TIMER_FRAME1_IT 79 +#define TIMER_FRAME2_IT 92 + +// Mcfg +#define LS1046A_PCI_SEG0_CONFIG_BASE 0x4000000000 +#define LS1046A_PCI_SEG0 0x0 +#define LS1046A_PCI_SEG_BUSNUM_MIN 0x0 +#define LS1046A_PCI_SEG_BUSNUM_MAX 0xff +#define LS1046A_PCI_SEG1_CONFIG_BASE 0x4800000000 +#define LS1046A_PCI_SEG2_CONFIG_BASE 0x5000000000 +#define LS1046A_PCI_SEG1 0x1 +#define LS1046A_PCI_SEG2 0x2 + +// Platform specific info needed by Configuration Manager + +#define CFG_MGR_TABLE_ID SIGNATURE_64 ('L','S','1','0','4','6',' ',' ') + +// Specify the OEM defined tables +#define OEM_ACPI_TABLES 0 + +#define PLAT_PCI_SEG0 LS1046A_PCI_SEG0 +#define PLAT_PCI_SEG1_CONFIG_BASE LS1046A_PCI_SEG1_CONFIG_BASE +#define PLAT_PCI_SEG1 LS1046A_PCI_SEG1 +#define PLAT_PCI_SEG_BUSNUM_MIN LS1046A_PCI_SEG_BUSNUM_MIN +#define PLAT_PCI_SEG_BUSNUM_MAX LS1046A_PCI_SEG_BUSNUM_MAX +#define PLAT_PCI_SEG2_CONFIG_BASE LS1046A_PCI_SEG2_CONFIG_BASE +#define PLAT_PCI_SEG2 LS1046A_PCI_SEG2 + +#define PLAT_GIC_VERSION GIC_VERSION +#define PLAT_GICD_BASE GICD_BASE +#define PLAT_GICI_BASE GICI_BASE +#define PLAT_GICR_BASE GICR_BASE +#define PLAT_GICR_LEN GICR_LEN +#define PLAT_GICC_BASE GICC_BASE +#define PLAT_GICH_BASE GICH_BASE +#define PLAT_GICV_BASE GICV_BASE + +#define PLAT_CPU_COUNT 4 +#define PLAT_GTBLOCK_COUNT 0 +#define PLAT_GTFRAME_COUNT 0 +#define PLAT_PCI_CONFG_COUNT 2 + +#define PLAT_WATCHDOG_COUNT 0 +#define PLAT_GIC_REDISTRIBUTOR_COUNT 0 +#define PLAT_GIC_ITS_COUNT 0 + +/* GIC CPU Interface information + GIC_ENTRY (CPUInterfaceNumber, Mpidr, PmuIrq, VGicIrq, EnergyEfficiency) + */ +#define PLAT_GIC_CPU_INTERFACE { \ + GICC_ENTRY (0, GET_MPID (0, 0), 138, 0x19, 0), \ + GICC_ENTRY (1, GET_MPID (0, 1), 139, 0x19, 0), \ + GICC_ENTRY (2, GET_MPID (0, 2), 127, 0x19, 0), \ + GICC_ENTRY (3, GET_MPID (0, 3), 129, 0x19, 0), \ +} + +#define PLAT_WATCHDOG_INFO \ + { \ + } \ + +#define PLAT_TIMER_BLOCK_INFO \ + { \ + } \ + +#define PLAT_TIMER_FRAME_INFO \ + { \ + } \ + +#define PLAT_GIC_DISTRIBUTOR_INFO \ + { \ + PLAT_GICD_BASE, /* UINT64 PhysicalBaseAddress */ \ + 0, /* UINT32 SystemVectorBase */ \ + PLAT_GIC_VERSION /* UINT8 GicVersion */ \ + } \ + +#define PLAT_GIC_REDISTRIBUTOR_INFO \ + { \ + } \ + +#define PLAT_GIC_ITS_INFO \ + { \ + } \ + +#define PLAT_MCFG_INFO \ + { \ + { \ + PLAT_PCI_SEG1_CONFIG_BASE, \ + PLAT_PCI_SEG1, \ + PLAT_PCI_SEG_BUSNUM_MIN, \ + PLAT_PCI_SEG_BUSNUM_MAX, \ + }, \ + { \ + PLAT_PCI_SEG2_CONFIG_BASE, \ + PLAT_PCI_SEG2, \ + PLAT_PCI_SEG_BUSNUM_MIN, \ + PLAT_PCI_SEG_BUSNUM_MAX, \ + } \ + } \ + +#define PLAT_SPCR_INFO = \ + { = \ + UART0_BASE, = \ + UART0_IT, = \ + 115200, = \ + 0, = \ + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16550 = \ + } = \ + +#endif // LS1046AFRWY_PLATFORM_H diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc b/Platform/NXP/= LS1046aFrwyPkg/LS1046aFrwyPkg.dsc index 67cf15cbe4..20111e6037 100755 --- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc +++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.dsc @@ -3,6 +3,7 @@ # LS1046AFRWY Board package. # # Copyright 2019-2020 NXP +# Copyright 2021 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,10 +23,18 @@ OUTPUT_DIRECTORY =3D Build/LS1046aFrwyPkg FLASH_DEFINITION =3D Platform/NXP/LS1046aFrwyPkg/LS1046aFr= wyPkg.fdf =20 + # This flag controls the dynamic acpi generation + # + DEFINE DYNAMIC_ACPI_ENABLE =3D TRUE + !include Silicon/NXP/NxpQoriqLs.dsc.inc !include MdePkg/MdeLibs.dsc.inc !include Silicon/NXP/LS1046A/LS1046A.dsc.inc =20 +!if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE + !include DynamicTablesPkg/DynamicTables.dsc.inc +!endif + [LibraryClasses.common] ArmPlatformLib|Platform/NXP/LS1046aFrwyPkg/Library/ArmPlatformLib/ArmPla= tformLib.inf RealTimeClockLib|EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualReal= TimeClockLib.inf @@ -46,4 +55,23 @@ =20 Silicon/NXP/Drivers/UsbHcdInitDxe/UsbHcd.inf =20 + # + # Dynamic Table Factory + !if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE + DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe= .inf { + + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/AcpiFadtLibA= rm.inf + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/AcpiGtdtLibA= rm.inf + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibA= rm.inf + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibA= rm.inf + NULL|DynamicTablesPkg/Library/Acpi/Arm/AcpiSpcrLibArm/AcpiSpcrLibA= rm.inf + } + !endif + + # + # Acpi Support + # + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + ## diff --git a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf b/Platform/NXP/= LS1046aFrwyPkg/LS1046aFrwyPkg.fdf index 34c4e5a025..f3cac033bc 100755 --- a/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf +++ b/Platform/NXP/LS1046aFrwyPkg/LS1046aFrwyPkg.fdf @@ -3,6 +3,7 @@ # FLASH layout file for LS1046a board. # # Copyright 2019-2020 NXP +# Copyright 2021 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -99,6 +100,18 @@ READ_LOCK_STATUS =3D TRUE INF MdeModulePkg/Universal/Metronome/Metronome.inf INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf =20 + + # + # Acpi Support + # + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + + !if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE + INF Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Confi= gurationManagerDxe.inf + !include DynamicTablesPkg/DynamicTables.fdf.inc + !endif + # # Multiple Console IO support # diff --git a/Silicon/NXP/LS1046A/LS1046A.dsc.inc b/Silicon/NXP/LS1046A/LS10= 46A.dsc.inc index 7004533ed5..98f999edfd 100644 --- a/Silicon/NXP/LS1046A/LS1046A.dsc.inc +++ b/Silicon/NXP/LS1046A/LS1046A.dsc.inc @@ -2,6 +2,7 @@ # LS1046A Soc package. # # Copyright 2017-2020 NXP +# Copyright 2021 Puresoftware Ltd # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -48,4 +49,13 @@ [Components.common] MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf =20 +# +# Configuration Manager +!if $(DYNAMIC_ACPI_ENABLE) =3D=3D TRUE + Platform/NXP/ConfigurationManagerPkg/ConfigurationManagerDxe/Configurati= onManagerDxe.inf { + + *_*_*_PLATFORM_FLAGS =3D -I$(WORKSPACE)/Platform/NXP/LS1046aFrwyPkg/= Include + } +!endif + ## --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#76398): https://edk2.groups.io/g/devel/message/76398 Mute This Topic: https://groups.io/mt/83471709/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-