From nobody Tue Feb 10 20:48:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+76382+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+76382+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1623407678; cv=none; d=zohomail.com; s=zohoarc; b=H9x/yWaJWD+S3uutzqCelL6nvTRRX1e+aE2YICWwyRvyhezcGSdj8sJQGDnocNc77VQFvocN9Ms6U+PUwltgyGIHH9OR/UXGlXfXj7jMePQaW9qSuozfRdA9C4XFnAhqB8u9GYboRxAuxKHX+xUeAtFiBDPQAjXWp1X5FKqXHFo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1623407678; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=qCbm7TgtFh2MCqwjXdCOnUDhfrSbVY9DBdwglikCWIQ=; b=ixIOR9izavK2xkSWA/xf51wWi6h7YV28czS5stWO5jdgMWWLLHBb0VMSSqHZscAZ7YDcQWXrcZukIGR1nnOHvcR8caiAr+gDA7uaE0OEt7IIYmtqSjCJOu/exPGWzex2qDdqZrPgIBfAdZQKqOBhO98jdgEaaxISw/UHLDYj5y0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+76382+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1623407678033427.2611529073371; Fri, 11 Jun 2021 03:34:38 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id T7PAYY1788612xHyNeaOBd5G; Fri, 11 Jun 2021 03:34:37 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.6684.1623407676979806404 for ; Fri, 11 Jun 2021 03:34:37 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 869E21396; Fri, 11 Jun 2021 03:34:36 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 216603F694; Fri, 11 Jun 2021 03:34:34 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar Subject: [edk2-devel] [edk2-platforms][PATCH v2 4/5] Platform/Sgi: update _OSC control method to control LPI and CPPC Date: Fri, 11 Jun 2021 16:04:20 +0530 Message-Id: <20210611103421.32518-5-pranav.madhu@arm.com> In-Reply-To: <20210611103421.32518-1-pranav.madhu@arm.com> References: <20210611103421.32518-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: Eh9a1jo0Rz1aq4QaesEBD7V4x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1623407677; bh=XUTY0vP2IqFgduDZsDNqiuo5UC2OqBv4ANA7DJzI2QA=; h=Cc:Date:From:Reply-To:Subject:To; b=Kx+JRWuNS5d3KDh52q0Wa5Mrc1i5H4hYK+vZryqVL42pz+R2fFujexrSIMl3pPRC1bN CXbJrNYgNp68zmc2stmQkIVpFwW50MrCXfWnCm9lCCWeMt/5AulxzfFJ8SwaZWPfN9Z08 GCw519SK4X8pSXIvpfkkgihTcD9IG0aJUjE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Define and use the global macro LPI_EN and CPPC_EN to enable low power idle and CPPC support for reference design platforms. Update platform wide _OSC control method to enable/disable low power idle and CPPC support based on pcd PcdOscLpiEnable and PcdOscCppcEnable. The pcds are controlled by the global macros LPI_EN and CPPC_EN. Signed-off-by: Pranav Madhu Reviewed-by: Thomas Abraham --- Platform/ARM/SgiPkg/SgiPlatform.dec | 4 ++++ Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 14 ++++++++++++++ Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf | 1 + Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf | 1 + Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf | 2 ++ Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf | 2 ++ Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf | 2 ++ Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf | 2 ++ Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf | 1 + Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 2 ++ Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl | 8 ++++++++ Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl | 8 ++++++++ Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl | 15 +++++++++++++= ++ Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl | 15 +++++++++++++= ++ Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl | 15 +++++++++++++= ++ Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl | 15 +++++++++++++= ++ Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl | 8 ++++++++ 17 files changed, 115 insertions(+) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiP= latform.dec index ffbbb24f1c33..8cd818a9bf64 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -86,5 +86,9 @@ gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize|0|UINT32|0x00000023 gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt|0|UINT32|0x00000024 =20 + # ACPI platform wide _OSC + gArmSgiTokenSpaceGuid.PcdOscLpiEnable|0|UINT32|0x00000025 + gArmSgiTokenSpaceGuid.PcdOscCppcEnable|0|UINT32|0x00000026 + [Ppis] gNtFwConfigDtInfoPpiGuid =3D { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8, 0= x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } } diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/= SgiPlatform.dsc.inc index 2851cf180c0e..7e37732fb93c 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc @@ -17,6 +17,10 @@ # To allow HDLCD display using the Graphics Output Protocol, set this to= TRUE. DEFINE ENABLE_GOP =3D FALSE =20 + # To enable LPI and CPPC power management functionality, set this to TRU= E. + DEFINE LPI_EN =3D FALSE + DEFINE CPPC_EN =3D FALSE + [BuildOptions] *_*_*_CC_FLAGS =3D -D DISABLE_NEW_DEPRECATED_INTERFACES =20 @@ -108,6 +112,16 @@ gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0x8080000000 gArmSgiTokenSpaceGuid.PcdDramBlock2Size|0x180000000 =20 +!if $(LPI_EN) =3D=3D TRUE + # Allow use of LPI in the response to _OSC method call + gArmSgiTokenSpaceGuid.PcdOscLpiEnable|1 +!endif + +!if $(CPPC_EN) =3D=3D TRUE + # Allow use of CPPC in the response to _OSC method call + gArmSgiTokenSpaceGuid.PcdOscCppcEnable|1 +!endif + # NV Storage PCDs. Use base of 0x08000000 for NOR0, 0xC0000000 for NOR 1 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x01400000 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x01400000 diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf b/Platfo= rm/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf index 8d46b001444c..ce89aa93ea7b 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf @@ -57,6 +57,7 @@ gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdOscLpiEnable gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Plat= form/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf index 473c9eff0f55..1999bc1553e9 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf @@ -66,6 +66,7 @@ gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdOscLpiEnable gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf b/Platform/A= RM/SgiPkg/AcpiTables/RdN2AcpiTables.inf index c537db45e08f..25be2e276e85 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf @@ -57,6 +57,8 @@ gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdOscLpiEnable + gArmSgiTokenSpaceGuid.PcdOscCppcEnable gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf b/Platfo= rm/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf index 6bbc3fc230ae..4b36c3e5ceb2 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf @@ -57,6 +57,8 @@ gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdOscLpiEnable + gArmSgiTokenSpaceGuid.PcdOscCppcEnable gArmSgiTokenSpaceGuid.PcdSmmuBase gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf b/Platform/A= RM/SgiPkg/AcpiTables/RdV1AcpiTables.inf index d461cbe54c68..97a87462932b 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf @@ -57,6 +57,8 @@ gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdOscLpiEnable + gArmSgiTokenSpaceGuid.PcdOscCppcEnable gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf b/Platform= /ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf index 3b699b0acbb8..deaca3719ae4 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf @@ -66,6 +66,8 @@ gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdOscLpiEnable + gArmSgiTokenSpaceGuid.PcdOscCppcEnable gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf b/Platform= /ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf index 3ee66b1dfd5a..a1bd71fde761 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf @@ -57,6 +57,7 @@ gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdOscLpiEnable gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/Sgi= Pkg/Include/SgiAcpiHeader.h index 7b8c16b172c0..d75d54055436 100644 --- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h @@ -37,6 +37,8 @@ =20 // ACPI OSC for Platform-Wide Capability #define OSC_CAP_CPPC_SUPPORT (1U << 5) +#define OSC_CAP_CPPC2_SUPPORT (1U << 6) +#define OSC_CAP_PLAT_COORDINATED_LPI (1U << 7) #define OSC_CAP_OS_INITIATED_LPI (1U << 8) =20 #pragma pack(1) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl b/Platform/AR= M/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl index a2258f61aeca..bd8efa544a59 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl @@ -29,6 +29,14 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "= ARMSGI", And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0) Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) } + + If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) { + if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) { + And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0) + Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) + } + } + } Else { And (STS0, Not (OSC_STS_MASK), STS0) Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl b/Platform/= ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl index 5807658e7815..9cb2b175418c 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl @@ -31,6 +31,14 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "= ARMSGI", And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0) Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) } + + If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) { + if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) { + And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0) + Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) + } + } + } Else { And (STS0, Not (OSC_STS_MASK), STS0) Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl b/Platform/ARM/Sg= iPkg/AcpiTables/RdN2/Dsdt.asl index a318ef48ded9..ccd98f829652 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl @@ -30,11 +30,26 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", = "ARMSGI", Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) } =20 + If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) { + if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) { + And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0) + Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) + } + } + If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) { /* CPPC revision 1 and below not supported */ And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0) Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) } + + If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) { + if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) { + And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0) + Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) + } + } + } Else { And (STS0, Not (OSC_STS_MASK), STS0) Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl b/Platform/AR= M/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl index 411eff84334a..b6decc77f480 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Dsdt.asl @@ -36,11 +36,26 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", = "ARMSGI", Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) } =20 + If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) { + if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) { + And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0) + Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) + } + } + If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) { /* CPPC revision 1 and below not supported */ And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0) Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) } + + If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) { + if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) { + And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0) + Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) + } + } + } Else { And (STS0, Not (OSC_STS_MASK), STS0) Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl b/Platform/ARM/Sg= iPkg/AcpiTables/RdV1/Dsdt.asl index 0f632673d050..db9c19780e16 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl @@ -30,11 +30,26 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", = "ARMSGI", Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) } =20 + If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) { + if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) { + And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0) + Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) + } + } + If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) { /* CPPC revision 1 and below not supported */ And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0) Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) } + + If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) { + if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) { + And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0) + Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) + } + } + } Else { And (STS0, Not (OSC_STS_MASK), STS0) Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl b/Platform/ARM/= SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl index 622d522532a3..e084d82de7c0 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl @@ -30,11 +30,26 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", = "ARMSGI", Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) } =20 + If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) { + if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) { + And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0) + Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) + } + } + If (And (CAP0, OSC_CAP_CPPC_SUPPORT)) { /* CPPC revision 1 and below not supported */ And (CAP0, Not (OSC_CAP_CPPC_SUPPORT), CAP0) Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) } + + If (And (CAP0, OSC_CAP_CPPC2_SUPPORT)) { + if (LEqual (FixedPcdGet32 (PcdOscCppcEnable), Zero)) { + And (CAP0, Not (OSC_CAP_CPPC2_SUPPORT), CAP0) + Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) + } + } + } Else { And (STS0, Not (OSC_STS_MASK), STS0) Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0) diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl b/Platform/ARM/= SgiPkg/AcpiTables/Sgi575/Dsdt.asl index e879a681fabf..a292d20d8afb 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl @@ -28,6 +28,14 @@ DefinitionBlock("DsdtTable.aml", "DSDT", 2, "ARMLTD", "A= RMSGI", EFI_ACPI_ARM_OEM And (CAP0, Not (OSC_CAP_OS_INITIATED_LPI), CAP0) Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) } + + If (And (CAP0, OSC_CAP_PLAT_COORDINATED_LPI)) { + if (LEqual (FixedPcdGet32 (PcdOscLpiEnable), Zero)) { + And (CAP0, Not (OSC_CAP_PLAT_COORDINATED_LPI), CAP0) + Or (STS0, OSC_STS_CAPABILITY_MASKED, STS0) + } + } + } Else { And (STS0, Not (OSC_STS_MASK), STS0) Or (STS0, Or (OSC_STS_FAILURE, OSC_STS_UNRECOGNIZED_REV), STS0) --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#76382): https://edk2.groups.io/g/devel/message/76382 Mute This Topic: https://groups.io/mt/83465459/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-