From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75307+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75307+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396819; cv=none; d=zohomail.com; s=zohoarc; b=DrwOiCKRzcI5D61lQDOk18npsaMJ6WAqwq7NYflUtTFF8kOxzCb+vuqjIsvBDbr6OG+0dqo25IavcwfLugnDurJGCiRUDQwYJ+OTRj48Ob17/LMirXa1NEF1tzM65DL2NeIkFeLFlJzktcinHxkCChurkycQA5F5T0fJdE12Jz8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396819; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=HqTBbb5Izd6viLfqQFCvy9/wH51G3N+FJouYuSlT98g=; b=bxJpQZp3zz+EBDohoFIC+JRTLvFKg0sJMYeobWDRgx74bWbXDp/hrsP9y5MQkYoX4VzJkDl27uegiaAGsi3NJbOeMBtdnTcjnm4y1MbXjwUUZTSJCYlbA5ob/q5VPVjCgf9EF99dVQx7NV9SfukZE2arOztcYnquZcWxunpBOCc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75307+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396819285758.6248945663524; Tue, 18 May 2021 21:00:19 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id aBhuYY1788612xMq6dsruQSP; Tue, 18 May 2021 21:00:18 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web09.6888.1621396811917939818 for ; Tue, 18 May 2021 21:00:12 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 92F0E20B7188; Tue, 18 May 2021 21:00:11 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 92F0E20B7188 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Rangasai V Chaganty , Deepika Kethi Reddy , Kathappan Esakkithevar Subject: [edk2-devel] [edk2-platforms][PATCH v2 01/35] CometlakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry Date: Tue, 18 May 2021 20:59:13 -0700 Message-Id: <20210519035947.1234-2-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: 8qAMVTTYBStUGTeCF6I0LO1vx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396818; bh=w3GAmcXeE81WMRX0xrnJmP1TXKoJ76tUR1zyz6ZT9fg=; h=Cc:Date:From:Reply-To:Subject:To; b=Y+svfGjOtzy0ltG9+RsD0a8hnw+hAT7KrA5DIEeIWTEooxei0KD91t7QKBGJEBFtitf KT4O2bMEdf/G0/ldIcfteCdBdE6BhFS1U0WxUAWf8QJEMPJDR/rI0vX7rIPR2cv8gM6Uc ROmiopI5wDhmrWDQhwIvz77E7nOJQy/PPW8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Removes extra IntelSiliconPkg.dec entry in PeiPolicyUpdateLib.inf. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Rangasai V Chaganty Cc: Deepika Kethi Reddy Cc: Kathappan Esakkithevar Signed-off-by: Michael Kubacki Reviewed-by: Chasel Chiu Reviewed-by: Nate DeSimone --- Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/Pei= PolicyUpdateLib.inf | 1 - 1 file changed, 1 deletion(-) diff --git a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyU= pdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/CometlakeOpenBoardPkg/Poli= cy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf index 014967c7f65a..fd51e2b8c40b 100644 --- a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLi= b/PeiPolicyUpdateLib.inf +++ b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLi= b/PeiPolicyUpdateLib.inf @@ -52,7 +52,6 @@ [Packages] SecurityPkg/SecurityPkg.dec IntelSiliconPkg/IntelSiliconPkg.dec MinPlatformPkg/MinPlatformPkg.dec - IntelSiliconPkg/IntelSiliconPkg.dec =20 [FixedPcd] gSiPkgTokenSpaceGuid.PcdTsegSize ## CONSUMES --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75307): https://edk2.groups.io/g/devel/message/75307 Mute This Topic: https://groups.io/mt/82929204/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75308+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75308+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396819; cv=none; d=zohomail.com; s=zohoarc; b=nlkthFNvSzCmrw1ybbAt71MegpIvuEjT3yRnPhFk6z/NGNnykimak95vmsqS0du/ZKrr97NEkjTMnni+wwqKpOw511XRcXJdo7S+Jw3hp6O89pK/pnVzIyzOSPLJfe1LOop7XuXbZUCdq7u6KsJww8Ww63UgbqWCxiqajFlaf6w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396819; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=I7f7221Esk0VDPwbrlxvQK0rhTgguN/It/BOOT0sAFo=; b=J8itHXyJGUoIW6e9x/xZa74mvkM6MlniDhnLeAYJNIntKKTsBA9WKmqnolMnvIK+QQpz6V/Xw/hLf+/pfh9O3uYK0ziVCAPtSZvoqJMM6e0UYu84uY+93Rqv1I95FzbsGdTUUO/0NRRABU1yAknuVPVJaaUVCmTGWshE8L4lsjY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75308+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396819771160.68771942825776; Tue, 18 May 2021 21:00:19 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 7L1mYY1788612xI9eG0k94nH; Tue, 18 May 2021 21:00:19 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web11.6936.1621396813764337868 for ; Tue, 18 May 2021 21:00:13 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 6080520B7178; Tue, 18 May 2021 21:00:13 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 6080520B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 02/35] WhiskeylakeOpenBoardPkg: Remove redundant IntelSiliconPkg.dec entry Date: Tue, 18 May 2021 20:59:14 -0700 Message-Id: <20210519035947.1234-3-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: OxnFuTqZP72wmKzVuyoZ1Q4Ox1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396819; bh=+hOxb3W+Fjea7ViNyQ94wN8EAoU/hHaCzhoOXE7NiCk=; h=Cc:Date:From:Reply-To:Subject:To; b=FPsngKRGyvskjmkmMj6Otr0bMgD7lpl4pKxadYohcKXDRdPjc/p5TecdDRo4r8hMoJR riudRYvX4Y6i4+lkthzHO99doUbEFDKOutaTuCRM5yVSQ446EtLEjWEVimFofzuK21JbS FXEnR8imHKoFOvWKH68v4DZjP+6zhGLoM8c= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Removes extra IntelSiliconPkg.dec entry in PeiPolicyUpdateLib.inf. Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/P= eiPolicyUpdateLib.inf | 1 - 1 file changed, 1 deletion(-) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolic= yUpdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/= Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf index 252f92f48736..b36dc2b4097c 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdate= Lib/PeiPolicyUpdateLib.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdate= Lib/PeiPolicyUpdateLib.inf @@ -52,7 +52,6 @@ [Packages] SecurityPkg/SecurityPkg.dec IntelSiliconPkg/IntelSiliconPkg.dec MinPlatformPkg/MinPlatformPkg.dec - IntelSiliconPkg/IntelSiliconPkg.dec =20 [FixedPcd] gSiPkgTokenSpaceGuid.PcdTsegSize ## CONSUMES --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75308): https://edk2.groups.io/g/devel/message/75308 Mute This Topic: https://groups.io/mt/82929207/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75312+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75312+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396821; cv=none; d=zohomail.com; s=zohoarc; b=b9vAtEwgwlfN5f0kEmilc/2crsQT/lAPJ7tNqZu7SiC1g4sMUf3yzAm02UiHS165+TDOBVXlOFiyJWr2UIvU0gOfLfJ8arrQjEXPaxwDM5v9mRdErxIc1TipASp357awVXWZG3PuBAUbZPFPUiC5kwHuOiNBepOoymC2/1zMyrY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396821; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=r3lp7wXhe/ej4BB1Uh2ALBywvXHSrw8lZFXmfAKMNfE=; b=k3SwOv6Q0tbuF59+tRFvk2PQh0sYXkL2xtrCGpDwDkcQmB8s4dYYOfMydVhnyx0ZMeQQX6JPrpY5SM1MVpGvOEQpKhGPEP1JYlWFtXv0xxwRRffnPE2tAMrw8Z//54dRKxkP2aYo9HpOGdjxc+E4Sv0pcALzsc19rd/FdAF807U= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75312+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396821359378.07108053595175; Tue, 18 May 2021 21:00:21 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id WS7DYY1788612xKgTQxFW0G7; Tue, 18 May 2021 21:00:20 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web09.6890.1621396815499002830 for ; Tue, 18 May 2021 21:00:20 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 1E18820B7178; Tue, 18 May 2021 21:00:15 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 1E18820B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Rangasai V Chaganty , Deepika Kethi Reddy , Kathappan Esakkithevar Subject: [edk2-devel] [edk2-platforms][PATCH v2 03/35] CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Add missing GUID to INF Date: Tue, 18 May 2021 20:59:15 -0700 Message-Id: <20210519035947.1234-4-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: PrFmcxfRswXyBPbdJcC8ufyJx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396820; bh=6PiWDrWXTlpO//g6qvsxX4Ux6+CjQLnfGYNRthrx9+A=; h=Cc:Date:From:Reply-To:Subject:To; b=EKc1oJQkleGAro4Mi93feg1ucDQSkoDzo/n8RcltoNPnMNLezrNBlX7rDa0ONwW3nre FT0cmhoOCvPasalgp/dMvde1fXVb5Y8MbUgRefy58dkWrK5igh9mon6Vr9uo6komARo1j S89RfOG82r4BF8IYz3ccbR5VViWLO8TQfuo= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 gEfiMemoryTypeInformationGuid is used in PeiSaPolicyUpdatePreMem.c but not in the [Guids] section in PeiPolicyUpdateLib.inf. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Rangasai V Chaganty Cc: Deepika Kethi Reddy Cc: Kathappan Esakkithevar Signed-off-by: Michael Kubacki Reviewed-by: Chasel Chiu Reviewed-by: Nate DeSimone --- Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/Pei= PolicyUpdateLib.inf | 1 + 1 file changed, 1 insertion(+) diff --git a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyU= pdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/CometlakeOpenBoardPkg/Poli= cy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf index fd51e2b8c40b..5213253f7313 100644 --- a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLi= b/PeiPolicyUpdateLib.inf +++ b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLi= b/PeiPolicyUpdateLib.inf @@ -270,3 +270,4 @@ [Ppis] [Guids] gTianoLogoGuid ## CONSUMES gSiConfigGuid ## CONSUMES + gEfiMemoryTypeInformationGuid ## PRODUCES --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75312): https://edk2.groups.io/g/devel/message/75312 Mute This Topic: https://groups.io/mt/82929213/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75309+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75309+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396822; cv=none; d=zohomail.com; s=zohoarc; b=EaLiMl3ltmFH4dJON+S0QFvpOXC4V7UH7H+xLkhlnXqB/8fJz89Vp0CsBuVcdrA+BCs6NkWp7CuwpqWlJpxAdOyAeOCtSiirq295faghm1bQOaySZ+E5CILi8ZgpR/3ffNiQlh2ouCvM+ninnjcHDIIr5hW5bf41PARn2xtUZpc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396822; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=hdkFlF1iubrUa6796nJ05ViAXUpapZLsfWX+L4HPv54=; b=ZyVxT2EBYTtSHxH4ZR4ymAOGCJ19KZ4I2R7MHD03iS7wNilMtcHjY+H6V0mHGYhS3DCiKDxNEFaEsKD5QMYAA3GFX0+ICz9LMj6FWJkwSBlphuS0ut5OBfofsbnFXEvptZTxOlUvjqm58MZ4Atd6xuESRExLThimciFYjVdOuaM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75309+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396822903289.4414776750092; Tue, 18 May 2021 21:00:22 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id lBHSYY1788612xa7ottxde37; Tue, 18 May 2021 21:00:22 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web09.6891.1621396817067632634 for ; Tue, 18 May 2021 21:00:17 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id AE9F220B7188; Tue, 18 May 2021 21:00:16 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com AE9F220B7188 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 04/35] IntelSiliconPkg: Add BIOS area base address and size PCDs Date: Tue, 18 May 2021 20:59:16 -0700 Message-Id: <20210519035947.1234-5-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: z5VSeKrGnkqo6myNQdhVO1YMx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396822; bh=NJwO08tfNutjYqNPwbtL1fVG6hNNVoVGQydgTAwO9nA=; h=Cc:Date:From:Reply-To:Subject:To; b=pGrGj95rTL5tB0wAfYo+goLEqtOgi2R3EPTQJQ6a9JBpGspzPyEtNuDSLo+e4fqFqea O5UjFrE+f6RXz7meQQHYPW0DWwZ2+BBXuaAIBMVGdGB12EZvqrt7rHXQzbprnB7rmunrX /bZd+AzMqtHLiVatjUU1Cwet89EjKMV9bnc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Adds the following PCDs to IntelSiliconPkg.dec to consolidate the PCD to a single silicon declaration file. This allows libraries and modules in IntelSiliconPkg to be able to use this PCD. gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dec index 2461ab8e06e7..097c4ca4d795 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec @@ -88,6 +88,10 @@ [PcdsFeatureFlag] # @Prompt Shadow all microcode update patches. gIntelSiliconPkgTokenSpaceGuid.PcdShadowAllMicrocode|FALSE|BOOLEAN|0x000= 00006 =20 +[PcdsFixedAtBuild] + gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF800000|UINT32|= 0x00000007 + gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize|0x00800000|UINT32|0x00000008 + [PcdsFixedAtBuild, PcdsPatchableInModule] ## Error code for VTd error.

# EDKII_ERROR_CODE_VTD_ERROR =3D (EFI_IO_BUS_UNSPECIFIED | (EFI_OEM_SPE= CIFIC | 0x00000000)) =3D 0x02008000
--=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75309): https://edk2.groups.io/g/devel/message/75309 Mute This Topic: https://groups.io/mt/82929208/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75310+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75310+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396824; cv=none; d=zohomail.com; s=zohoarc; b=BGPuB2qcnRuRBa9TIet5rWEMlJO7sxIWNbFmy2c10GaPPcWa+LBpD0iVRv9rAA9mk9xIVc/FwG0q5IDQGIIZRtcyzhgDcfKt4KpwlxrD6dzO0erj/fmbp2V66YycAGVd/Q8XG8cjDddEQO/pe3DeslcO2WLg18XyBkLn+vtwHk0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396824; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=XeHhMBhTq/6O16WAhTmLDuIgHW/ymfNMbXmAoreM9G0=; b=TZA0056YZ2j66CflQ6ZE8vq6rC8jKnD5cKPlnp7iTrTN84OrJYMTKVTUAb9nE/0wDbTsJAadfSHHSGPFOHszdMb99ED2kEbp+j4Z6ULRxn5U5vCMfw+9pbkeOVG8lbX/C2UYFAzXGgKKiWRjU0HR8ZzTVUtL42u3DooWvCidCvA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75310+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396824328424.2658308113305; Tue, 18 May 2021 21:00:24 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id b0FuYY1788612xYa0DXxpMU1; Tue, 18 May 2021 21:00:24 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web12.6904.1621396818566077158 for ; Tue, 18 May 2021 21:00:18 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 528F120B7188; Tue, 18 May 2021 21:00:18 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 528F120B7188 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 05/35] IntelSiliconPkg: Add microcode FV PCDs Date: Tue, 18 May 2021 20:59:17 -0700 Message-Id: <20210519035947.1234-6-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: dVRKMaAmKcrm9Aq4uSzPsFJkx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396824; bh=EQgbApiYDkWTjQhH33vPd11/BFDYvWquOnZYSCwhBwk=; h=Cc:Date:From:Reply-To:Subject:To; b=wMZJ52I8+hxVBS0xrTvOyH5zv59e/+mV9154BeScPlMJDct/r9WHTpGFfGPcWH5vEp6 OJvhXF+8CBoVjOeoAmcXUx8T33YVt6fpGscRi/2vorm2Px10sNObvSGriCTSujnSEHmVt TvvdqEb5dmWqKU/GPC7cdSOsVqrWKBGQtfU= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Adds the following PCDs to IntelSiliconPkg.dec to consolidate the PCD to a single silicon declaration file. This allows libraries modules in IntelSiliconPkg to be able to use this PCD. gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dec index 097c4ca4d795..fb8391000347 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec @@ -91,6 +91,9 @@ [PcdsFeatureFlag] [PcdsFixedAtBuild] gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF800000|UINT32|= 0x00000007 gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize|0x00800000|UINT32|0x00000008 + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32= |0x00000009 + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32= |0x0000000A + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT= 32|0x0000000B =20 [PcdsFixedAtBuild, PcdsPatchableInModule] ## Error code for VTd error.

--=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75310): https://edk2.groups.io/g/devel/message/75310 Mute This Topic: https://groups.io/mt/82929211/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75311+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75311+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396825; cv=none; d=zohomail.com; s=zohoarc; b=eQjOwGwP3aTKuLAcJsABxmi4pZnoB810Fbv1GX9Wy9pCHjuC1T/+ffGvRQ8pmQ1pLivVSNnwzE0SZsWUBDfXbTbJJYr7t7J0CMKEqmjr8oehhqPwDwYTs25tQFjzcnelgjuwitZdgYDarpV93h9AJqcc8jSt25iJF0uUUbP0Vw4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396825; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=XDK7D8yyXwFdg3kJrL0N07U9GqqEo/BaQqCUxCsLEvM=; b=aKUUarvbVVy4+gZgdAfF0L2+vjr4TK1Uy8raY3WbVkHrd4hExXcrQC5qb8bSlJvre5f2xChkaojZeM2j2Qe4VT1PUx704kA7ckFlCAKZBJhoBg0i4h0kEUWpr72+4gkxERvunGmJ9teOo9JjolkYvfj3wa2upx12Iz+rDst4XNQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75311+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396825818655.5392321661282; Tue, 18 May 2021 21:00:25 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id S7yTYY1788612x3THdNr0Ag3; Tue, 18 May 2021 21:00:25 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com []) by mx.groups.io with SMTP id smtpd.web12.6904.1621396818566077158 for ; Tue, 18 May 2021 21:00:20 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id BA52F20B8008; Tue, 18 May 2021 21:00:19 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com BA52F20B8008 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 06/35] IntelSiliconPkg: Add PCH SPI PPI Date: Tue, 18 May 2021 20:59:18 -0700 Message-Id: <20210519035947.1234-7-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: zbrmKIt1rHOdxErHM2UkD9Qbx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396825; bh=6BNf+ihSDsw5pw+2lPoTMBJ2b9CrVN07wSg7zOzrptk=; h=Cc:Date:From:Reply-To:Subject:To; b=ZAv0limGvt84gwf7NtydBMMxoNE8vDpY5bgHPzbu7hpxgJ9zsxm0oJQGxlS54yfTzjb ewH9zCJNJ8kFYLzLddQ81MsR0QyfyXCv4Jqfg6GUjY7GYzlDeTpr3LQTuMVDmYbm4Tgn2 gK9T24uRcT7W9dVsWjFEF9oHpbveAr/+2Ok= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 This SPI PPI definition is intended to serve as the single definition for Intel platform and silicon packages. Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h | 25 ++++++++++++++++++++ Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 3 +++ 2 files changed, 28 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h b/Silicon/Inte= l/IntelSiliconPkg/Include/Ppi/Spi.h new file mode 100644 index 000000000000..b2410bd17300 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h @@ -0,0 +1,25 @@ +/** @file + This file defines the PCH SPI PPI which implements the + Intel(R) PCH SPI Host Controller Compatibility Interface. + + Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent +**/ +#ifndef _PCH_SPI_PPI_H_ +#define _PCH_SPI_PPI_H_ + +#include + +// +// Extern the GUID for PPI users. +// +extern EFI_GUID gPchSpiPpiGuid; + +/** + Reuse the PCH_SPI_PROTOCOL definitions + This is possible becaues the PPI implementation does not rely on a PeiSe= rvice pointer, + as it uses EDKII Glue Lib to do IO accesses +**/ +typedef PCH_SPI_PROTOCOL PCH_SPI_PPI; + +#endif diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dec index fb8391000347..70f030e3a295 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec @@ -71,6 +71,9 @@ [Guids] gEdkiiMicrocodeStorageTypeFlashGuid =3D { 0x2cba01b3, 0xd391, 0x4598, { = 0x8d, 0x89, 0xb7, 0xfc, 0x39, 0x22, 0xfd, 0x71 } } =20 [Ppis] + ## Include/Ppi/Spi.h + gPchSpiPpiGuid =3D {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0, = 0xeb, 0x17, 0x72, 0x2d}} + gEdkiiVTdInfoPpiGuid =3D { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x6= 7, 0xaf, 0x2b, 0x25, 0x68, 0x4a } } gEdkiiVTdNullRootEntryTableGuid =3D { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1= , 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } } =20 --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75311): https://edk2.groups.io/g/devel/message/75311 Mute This Topic: https://groups.io/mt/82929212/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75313+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75313+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396822; cv=none; d=zohomail.com; s=zohoarc; b=EFSzrZ++Q4B/jCi1YgSbDVIq0jVHLqU/Ajppkh91DwH31BJoZoKaGcjzAlawLnx4w4spWniezxXeBx3wdZnuOVYXk1RyAW5Lm8zNfUZJR9m4p6JvikTrT1d/Gl22GTUYFGAtb77jcqSgHv+/m9uHoD4lpwEwBTu3oa7UyAHKmLU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396822; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=z4f0EEfxpbygKGW6X8xJR8IVO5fUubrGClQOolIcW0k=; b=MIk6GclFuSI9zXeeZwy5y1Vi4ZFfBCLSy+g1aD1TBdY3pPrpYEun+p3RFqj39Y3pWTdaq/Ds+9pAoNX7mECb+378bDej8PkP0nNQngS9fbq92qRjguqJrJYRRtvl0qwb0wwDSat5GGwZYl1GETZ0AaBUCakwiw7yB8pRqIpR6A0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75313+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396822480948.8114874620875; Tue, 18 May 2021 21:00:22 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id TVrgYY1788612xyzzSyE2Ahx; Tue, 18 May 2021 21:00:22 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web10.6867.1621396821447723705 for ; Tue, 18 May 2021 21:00:21 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 19C7620B7178; Tue, 18 May 2021 21:00:21 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 19C7620B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 07/35] IntelSiliconPkg: Add PCH SPI Protocol Date: Tue, 18 May 2021 20:59:19 -0700 Message-Id: <20210519035947.1234-8-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: LotkHDkWlTe1ZZ9pRa4vt77ux1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396822; bh=R396ckWMToUsxgw/sI2oEOkFFiNZB+D7ZE0/PQtO9kE=; h=Cc:Date:From:Reply-To:Subject:To; b=jUAksgO7h4KigGN4eXdz2y6kBQrFGq2+CCA+vfwSfHat+7BWDcI9ANR7YBcPP1JFsQF klPVj99kEq207ldQMHyH/nKpCqJ4dXJFgAYBcQ48nLTsWIlUgHFH7GwQFhIfghZYfEmVB 7hYH/UBRltLtb6tnfBQhPCMgcldI3YUeTCE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 These SPI Protocol definitions are intended to serve as the single definitions for Intel platform and silicon packages. 1. gPchSpiProtocolGuid 2. gPchSmmSpiProtocolGuid Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h | 301 +++++++++++++++= +++++ Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 5 + 2 files changed, 306 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h b/Silicon= /Intel/IntelSiliconPkg/Include/Protocol/Spi.h new file mode 100644 index 000000000000..c13dc5a5f5f5 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h @@ -0,0 +1,301 @@ +/** @file + This file defines the PCH SPI Protocol which implements the + Intel(R) PCH SPI Host Controller Compatibility Interface. + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent +**/ +#ifndef _PCH_SPI_PROTOCOL_H_ +#define _PCH_SPI_PROTOCOL_H_ + +// +// Extern the GUID for protocol users. +// +extern EFI_GUID gPchSpiProtocolGuid; +extern EFI_GUID gPchSmmSpiProtocolGuid; + +// +// Forward reference for ANSI C compatibility +// +typedef struct _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL; + +// +// SPI protocol data structures and definitions +// + +/** + Flash Region Type +**/ +typedef enum { + FlashRegionDescriptor, + FlashRegionBios, + FlashRegionMe, + FlashRegionGbE, + FlashRegionPlatformData, + FlashRegionDer, + FlashRegionSecondaryBios, + FlashRegionuCodePatch, + FlashRegionEC, + FlashRegionDeviceExpansion2, + FlashRegionIE, + FlashRegion10Gbe_A, + FlashRegion10Gbe_B, + FlashRegion13, + FlashRegion14, + FlashRegion15, + FlashRegionAll, + FlashRegionMax +} FLASH_REGION_TYPE; +// +// Protocol member functions +// + +/** + Read data from the flash part. + + @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. + @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. + @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. + @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. + @param[out] Buffer The Pointer to caller-allocated buffer c= ontaining the dada received. + It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. + + @retval EFI_SUCCESS Command succeed. + @retval EFI_INVALID_PARAMETER The parameters specified are not valid. + @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. +**/ +typedef +EFI_STATUS +(EFIAPI *PCH_SPI_FLASH_READ) ( + IN PCH_SPI_PROTOCOL *This, + IN FLASH_REGION_TYPE FlashRegionType, + IN UINT32 Address, + IN UINT32 ByteCount, + OUT UINT8 *Buffer + ); + +/** + Write data to the flash part. Remark: Erase may be needed before write t= o the flash part. + + @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. + @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. + @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. + @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. + @param[in] Buffer Pointer to caller-allocated buffer conta= ining the data sent during the SPI cycle. + + @retval EFI_SUCCESS Command succeed. + @retval EFI_INVALID_PARAMETER The parameters specified are not valid. + @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. +**/ +typedef +EFI_STATUS +(EFIAPI *PCH_SPI_FLASH_WRITE) ( + IN PCH_SPI_PROTOCOL *This, + IN FLASH_REGION_TYPE FlashRegionType, + IN UINT32 Address, + IN UINT32 ByteCount, + IN UINT8 *Buffer + ); + +/** + Erase some area on the flash part. + + @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. + @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. + @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. + @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. + + @retval EFI_SUCCESS Command succeed. + @retval EFI_INVALID_PARAMETER The parameters specified are not valid. + @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. +**/ +typedef +EFI_STATUS +(EFIAPI *PCH_SPI_FLASH_ERASE) ( + IN PCH_SPI_PROTOCOL *This, + IN FLASH_REGION_TYPE FlashRegionType, + IN UINT32 Address, + IN UINT32 ByteCount + ); + +/** + Read SFDP data from the flash part. + + @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. + @param[in] ComponentNumber The Componen Number for chip select + @param[in] Address The starting byte address for SFDP data = read. + @param[in] ByteCount Number of bytes in SFDP data portion of = the SPI cycle + @param[out] SfdpData The Pointer to caller-allocated buffer c= ontaining the SFDP data received + It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read + + @retval EFI_SUCCESS Command succeed. + @retval EFI_INVALID_PARAMETER The parameters specified are not valid. + @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. +**/ +typedef +EFI_STATUS +(EFIAPI *PCH_SPI_FLASH_READ_SFDP) ( + IN PCH_SPI_PROTOCOL *This, + IN UINT8 ComponentNumber, + IN UINT32 Address, + IN UINT32 ByteCount, + OUT UINT8 *SfdpData + ); + +/** + Read Jedec Id from the flash part. + + @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. + @param[in] ComponentNumber The Componen Number for chip select + @param[in] ByteCount Number of bytes in JedecId data portion = of the SPI cycle, the data size is 3 typically + @param[out] JedecId The Pointer to caller-allocated buffer c= ontaining JEDEC ID received + It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. + + @retval EFI_SUCCESS Command succeed. + @retval EFI_INVALID_PARAMETER The parameters specified are not valid. + @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. +**/ +typedef +EFI_STATUS +(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) ( + IN PCH_SPI_PROTOCOL *This, + IN UINT8 ComponentNumber, + IN UINT32 ByteCount, + OUT UINT8 *JedecId + ); + +/** + Write the status register in the flash part. + + @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. + @param[in] ByteCount Number of bytes in Status data portion o= f the SPI cycle, the data size is 1 typically + @param[in] StatusValue The Pointer to caller-allocated buffer c= ontaining the value of Status register writing + + @retval EFI_SUCCESS Command succeed. + @retval EFI_INVALID_PARAMETER The parameters specified are not valid. + @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. +**/ +typedef +EFI_STATUS +(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) ( + IN PCH_SPI_PROTOCOL *This, + IN UINT32 ByteCount, + IN UINT8 *StatusValue + ); + +/** + Read status register in the flash part. + + @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. + @param[in] ByteCount Number of bytes in Status data portion o= f the SPI cycle, the data size is 1 typically + @param[out] StatusValue The Pointer to caller-allocated buffer c= ontaining the value of Status register received. + + @retval EFI_SUCCESS Command succeed. + @retval EFI_INVALID_PARAMETER The parameters specified are not valid. + @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. +**/ +typedef +EFI_STATUS +(EFIAPI *PCH_SPI_FLASH_READ_STATUS) ( + IN PCH_SPI_PROTOCOL *This, + IN UINT32 ByteCount, + OUT UINT8 *StatusValue + ); + +/** + Get the SPI region base and size, based on the enum type + + @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. + @param[in] FlashRegionType The Flash Region type for for the base a= ddress which is listed in the Descriptor. + @param[out] BaseAddress The Flash Linear Address for the Region = 'n' Base + @param[out] RegionSize The size for the Region 'n' + + @retval EFI_SUCCESS Read success + @retval EFI_INVALID_PARAMETER Invalid region type given + @retval EFI_DEVICE_ERROR The region is not used +**/ +typedef +EFI_STATUS +(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) ( + IN PCH_SPI_PROTOCOL *This, + IN FLASH_REGION_TYPE FlashRegionType, + OUT UINT32 *BaseAddress, + OUT UINT32 *RegionSize + ); + +/** + Read PCH Soft Strap Values + + @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. + @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA. + @param[in] ByteCount Number of bytes in SoftStrap data portio= n of the SPI cycle + @param[out] SoftStrapValue The Pointer to caller-allocated buffer c= ontaining PCH Soft Strap Value. + If the value of ByteCount is 0, the data= type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Sof= t Strap Length + It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. + + @retval EFI_SUCCESS Command succeed. + @retval EFI_INVALID_PARAMETER The parameters specified are not valid. + @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. +**/ +typedef +EFI_STATUS +(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) ( + IN PCH_SPI_PROTOCOL *This, + IN UINT32 SoftStrapAddr, + IN UINT32 ByteCount, + OUT VOID *SoftStrapValue + ); + +/** + Read CPU Soft Strap Values + + @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. + @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUS= BA. + @param[in] ByteCount Number of bytes in SoftStrap data portio= n of the SPI cycle. + @param[out] SoftStrapValue The Pointer to caller-allocated buffer c= ontaining CPU Soft Strap Value. + If the value of ByteCount is 0, the data= type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Sof= t Strap Length + It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. + + @retval EFI_SUCCESS Command succeed. + @retval EFI_INVALID_PARAMETER The parameters specified are not valid. + @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. +**/ +typedef +EFI_STATUS +(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) ( + IN PCH_SPI_PROTOCOL *This, + IN UINT32 SoftStrapAddr, + IN UINT32 ByteCount, + OUT VOID *SoftStrapValue + ); + +/** + These protocols/PPI allows a platform module to perform SPI operations t= hrough the + Intel PCH SPI Host Controller Interface. +**/ +struct _PCH_SPI_PROTOCOL { + /** + This member specifies the revision of this structure. This field is us= ed to + indicate backwards compatible changes to the protocol. + **/ + UINT8 Revision; + PCH_SPI_FLASH_READ FlashRead; ///< Read data fro= m the flash part. + PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to= the flash part. Remark: Erase may be needed before write to the flash part. + PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some ar= ea on the flash part. + PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP dat= a from the flash part. + PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id= from the flash part. + PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the sta= tus register in the flash part. + PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status r= egister in the flash part. + PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI r= egion base and size + PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft= Strap Values + PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft= Strap Values +}; + +/** + PCH SPI PPI/PROTOCOL revision number + + Revision 1: Initial version +**/ +#define PCH_SPI_SERVICES_REVISION 1 + +#endif diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dec index 70f030e3a295..5c2c9cfbcaab 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec @@ -78,6 +78,11 @@ [Ppis] gEdkiiVTdNullRootEntryTableGuid =3D { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1= , 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } } =20 [Protocols] + ## Protocols that provide services for the Intel(R) PCH SPI Host Control= ler Compatibility Interface + # Include/Protocol/Spi.h + gPchSpiProtocolGuid =3D {0xc7d289, 0x1347, 0x4de0, {0xbf, 0x42, 0xe, 0= x26, 0x9d, 0xe, 0xf3, 0x4a}} + gPchSmmSpiProtocolGuid =3D {0x56521f06, 0xa62, 0x4822, {0x99, 0x63, 0xdf= , 0x1, 0x9d, 0x72, 0xc7, 0xe1}} + gEdkiiPlatformVTdPolicyProtocolGuid =3D { 0x3d17e448, 0x466, 0x4e20, { 0= x99, 0x9f, 0xb2, 0xe1, 0x34, 0x88, 0xee, 0x22 }} =20 ## Protocol for device security policy. --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75313): https://edk2.groups.io/g/devel/message/75313 Mute This Topic: https://groups.io/mt/82929214/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75314+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75314+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396828; cv=none; d=zohomail.com; s=zohoarc; b=R3oaFdOyKcIsL3D+UmPc6gVLqnwFpSzI7kvFaZVao5+xCWdgiSKodZbF9kZemfkIs4GxWawGPzn8Uvz95gAYGpBYTGez0eU7xaOosWSxqdflJkuq6uppoCvufG5Al48F3CIftdjQ1IxNr+Ec362CDwf7NzCXHj428tWIAOkRAmY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396828; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=RiyqXr+6aJXAtCAEfjQuNd718YwSWp3LjoXEHC2Wv5w=; b=CtuW9JOMcFwhrIIoPSp+gUyw4GoZNNDf+0luyppEkwDW3H0y6yo+wDUjEFfxDHds/atLN9A2MAITpbStnmpOVsZZcFHAX+1gc8clC9083rfkK50Sinxd7vt1DqlsSTmIxXhzjQSOCTQ3plKcGLUUBIXpjxcLk0l802fYhvUcaao= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75314+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396828927143.69728156264205; Tue, 18 May 2021 21:00:28 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id vxGfYY1788612xT2OSuyIxCm; Tue, 18 May 2021 21:00:28 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web08.6910.1621396822754254291 for ; Tue, 18 May 2021 21:00:22 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 8371A20B7178; Tue, 18 May 2021 21:00:22 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 8371A20B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 08/35] IntelSiliconPkg: Add SpiFlashCommonLib Date: Tue, 18 May 2021 20:59:20 -0700 Message-Id: <20210519035947.1234-9-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: vKMaXvXsUA1Nfo1JCim5Sl7Mx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396828; bh=W0qoQx31chQtO9lx/DrKgddFpH4cHTQ9Qjrz6R8kRnE=; h=Cc:Date:From:Reply-To:Subject:To; b=h2CzvFH1Wagw6zx2JHgt34DKCJD/hyV3/c+IqTUicVsFZYqtazt/9goHXIfJedqtSyy KKLyY7Q7XTvuqWZggCWhhY6napWFv83ENzNU3wO8eK2ItoUml/GuHtZl7onWSlsZo9krg CNyLTy4L+S7JuJJ7kpcIt2zP5tbRmxk6yKE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Adds the SpiFlashCommonLib interface to IntelSiliconPkg. The initial library instance added in this change is the NULL instance. Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommon= LibNull.c | 101 ++++++++++++++++++++ Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h = | 98 +++++++++++++++++++ Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec = | 4 + Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc = | 1 + Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommon= LibNull.inf | 28 ++++++ 5 files changed, 232 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/Sp= iFlashCommonLibNull.c b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommo= nLibNull/SpiFlashCommonLibNull.c new file mode 100644 index 000000000000..c5f46829869c --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashC= ommonLibNull.c @@ -0,0 +1,101 @@ +/** @file + Null Library instance of SPI Flash Common Library Class + +Copyright (c) 2017, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include + +/** + Enable block protection on the Serial Flash device. + + @retval EFI_SUCCESS Operation is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashLock ( + VOID + ) +{ + return EFI_SUCCESS; +} + +/** + Read NumBytes bytes of data from the address specified by + PAddress into Buffer. + + @param[in] Address The starting physical address of the read. + @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number + of bytes actually read. + @param[out] Buffer The destination data buffer for the read. + + @retval EFI_SUCCESS Operation is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashRead ( + IN UINTN Address, + IN OUT UINT32 *NumBytes, + OUT UINT8 *Buffer + ) +{ + ASSERT(FALSE); + return EFI_SUCCESS; +} + +/** + Write NumBytes bytes of data from Buffer to the address specified by + PAddresss. + + @param[in] Address The starting physical address of the wri= te. + @param[in,out] NumBytes On input, the number of bytes to write. = On output, + the actual number of bytes written. + @param[in] Buffer The source data buffer for the write. + + @retval EFI_SUCCESS Operation is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashWrite ( + IN UINTN Address, + IN OUT UINT32 *NumBytes, + IN UINT8 *Buffer + ) +{ + ASSERT(FALSE); + return EFI_SUCCESS; +} + +/** + Erase the block starting at Address. + + @param[in] Address The starting physical address of the block t= o be erased. + This library assume that caller guarantee th= at the PAddress + is at the starting address of this block. + @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. + On output, the actual number of bytes erased. + + @retval EFI_SUCCESS. Operation is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashBlockErase ( + IN UINTN Address, + IN UINTN *NumBytes + ) +{ + ASSERT(FALSE); + return EFI_SUCCESS; +} diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLi= b.h b/Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h new file mode 100644 index 000000000000..ef62ba238d71 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Include/Library/SpiFlashCommonLib.h @@ -0,0 +1,98 @@ +/** @file + The header file includes the common header files, defines + internal structure and functions used by SpiFlashCommonLib. + + Copyright (c) 2019 Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef __SPI_FLASH_COMMON_LIB_H__ +#define __SPI_FLASH_COMMON_LIB_H__ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size +/** + Enable block protection on the Serial Flash device. + + @retval EFI_SUCCESS Opertion is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashLock ( + VOID + ); + +/** + Read NumBytes bytes of data from the address specified by + PAddress into Buffer. + + @param[in] Address The starting physical address of the read. + @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number + of bytes actually read. + @param[out] Buffer The destination data buffer for the read. + + @retval EFI_SUCCESS Opertion is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashRead ( + IN UINTN Address, + IN OUT UINT32 *NumBytes, + OUT UINT8 *Buffer + ); + +/** + Write NumBytes bytes of data from Buffer to the address specified by + PAddresss. + + @param[in] Address The starting physical address of the wri= te. + @param[in,out] NumBytes On input, the number of bytes to write. = On output, + the actual number of bytes written. + @param[in] Buffer The source data buffer for the write. + + @retval EFI_SUCCESS Opertion is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashWrite ( + IN UINTN Address, + IN OUT UINT32 *NumBytes, + IN UINT8 *Buffer + ); + +/** + Erase the block starting at Address. + + @param[in] Address The starting physical address of the block t= o be erased. + This library assume that caller garantee tha= t the PAddress + is at the starting address of this block. + @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. + On output, the actual number of bytes erased. + + @retval EFI_SUCCESS. Opertion is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashBlockErase ( + IN UINTN Address, + IN UINTN *NumBytes + ); + +#endif diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dec index 5c2c9cfbcaab..1a8290113fc9 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec @@ -46,6 +46,10 @@ [LibraryClasses.IA32, LibraryClasses.X64] # ReportCpuHobLib|Include/Library/ReportCpuHobLib.h =20 + ## @libraryclass Provides services to perform SPI flash actions + # + SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h + [Guids] ## GUID for Package token space # {A9F8D54E-1107-4F0A-ADD0-4587E7A4A735} diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dsc index 1092371d848e..aeed452ed521 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc @@ -94,6 +94,7 @@ [Components] IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirmwareBootMediaLib= .inf IntelSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdateLib.inf IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf + IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf =20 [BuildOptions] *_*_*_CC_FLAGS =3D -D DISABLE_NEW_DEPRECATED_INTERFACES diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/Sp= iFlashCommonLibNull.inf b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCom= monLibNull/SpiFlashCommonLibNull.inf new file mode 100644 index 000000000000..f2d9e4f21d4b --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashC= ommonLibNull.inf @@ -0,0 +1,28 @@ +### @file +# NULL instance of Spi Flash Common Library Class +# +# Copyright (c) 2017, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +### + +[Defines] + INF_VERSION =3D 0x00010017 + BASE_NAME =3D SpiFlashCommonLibNull + FILE_GUID =3D F35BBEE7-A681-443E-BB15-07AF9FABBDED + VERSION_STRING =3D 1.0 + MODULE_TYPE =3D BASE + LIBRARY_CLASS =3D SpiFlashCommonLib +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D IA32 X64 +# + +[Packages] + MdePkg/MdePkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec + +[Sources] + SpiFlashCommonLibNull.c --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75314): https://edk2.groups.io/g/devel/message/75314 Mute This Topic: https://groups.io/mt/82929215/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75315+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75315+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396825; cv=none; d=zohomail.com; s=zohoarc; b=Ln0sA7JJjXHm8sF27y0rvwzLehUHxohw4Oyp9/bEdOOHuF/2WQqMNUx3H2yTqXJfoobjeEh1cb1LGwwBJhSD1McO1u/ZW/h1UHc4vw4P5KvFEygKe9N+BOBNCXuUuyMBhkaky+j/qDH3LtjW+lPj4egctfaHdrwYYhibHAKoFMA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396825; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=3YQbmPGxPKcMdAFgnzVKkySU8e+VKRobKMG7ZnSxr8o=; b=bhdyggH7rzmH7GBMwhFHM9MZoMONiR/6oHXhNAgpfJxhxxk2rs4DYgsXYB0mu/HAp9nIxYgKvgYT8TdgfMWYWNsW/8FmSnVcdix5D+JDgdYWVP0078hKSxPOY46MJ5Ki8N+JQkwsJClFPqKS5jrmoMMAiYB1W0YLOyY3FoYS100= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75315+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 162139682524997.72518573315597; Tue, 18 May 2021 21:00:25 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id j387YY1788612x5SIG4yoYDv; Tue, 18 May 2021 21:00:24 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web12.6907.1621396824215306487 for ; Tue, 18 May 2021 21:00:24 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id E34EE20B7178; Tue, 18 May 2021 21:00:23 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com E34EE20B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 09/35] IntelSiliconPkg: Add SmmSpiFlashCommonLib Date: Tue, 18 May 2021 20:59:21 -0700 Message-Id: <20210519035947.1234-10-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: TBuqmJOywC36S1vLgrDXZkzux1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396824; bh=FjKFanGd/QfiMf8eVnuOg8/fOtBNyhgD42Nbnj7S58M=; h=Cc:Date:From:Reply-To:Subject:To; b=BwrWMSvZROlNINzlTHljiqLifDUGTHuofS3huE3MAmVoeQZv0d1zVbqi86SZxCipj+O hjLY4qOKIfuHCev3wYi8oitz4Hhb7Va0X1ej7zFrX7xslRJt9zuQ3JJuJ4EBZDj8ycv0d 2ur6EKl/Gv3796Ek/kE/54xHwvAvw+ip1LE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Adds the SMM instance of SpiFlashCommonLib. The code is based on refactoring existing library instances into a consolidated version with no functional impact. Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashComm= onLib.c | 58 ++++++ Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.= c | 209 ++++++++++++++++++++ Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc = | 5 + Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashComm= onLib.inf | 48 +++++ 4 files changed, 320 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/Smm= SpiFlashCommonLib.c b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashComm= onLib/SmmSpiFlashCommonLib.c new file mode 100644 index 000000000000..7941b8f8720c --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlas= hCommonLib.c @@ -0,0 +1,58 @@ +/** @file + SMM Library instance of SPI Flash Common Library Class + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include +#include +#include + +extern PCH_SPI_PROTOCOL *mSpiProtocol; + +extern UINTN mBiosAreaBaseAddress; +extern UINTN mBiosSize; +extern UINTN mBiosOffset; + +/** + The library constructuor. + + The function does the necessary initialization work for this library + instance. + + @param[in] ImageHandle The firmware allocated handle for the UEFI= image. + @param[in] SystemTable A pointer to the EFI system table. + + @retval EFI_SUCCESS The function always return EFI_SUCCESS for= now. + It will ASSERT on error for debug version. + @retval EFI_ERROR Please reference LocateProtocol for error = code details. +**/ +EFI_STATUS +EFIAPI +SmmSpiFlashCommonLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + UINT32 BaseAddr; + UINT32 RegionSize; + + mBiosAreaBaseAddress =3D (UINTN)PcdGet32 (PcdBiosAreaBaseAddress); + mBiosSize =3D (UINTN)PcdGet32 (PcdBiosSize); + + // + // Locate the SMM SPI protocol. + // + Status =3D gSmst->SmmLocateProtocol ( + &gPchSmmSpiProtocolGuid, + NULL, + (VOID **) &mSpiProtocol + ); + ASSERT_EFI_ERROR (Status); + + mSpiProtocol->GetRegionAddress (mSpiProtocol, FlashRegionBios, &BaseAddr= , &RegionSize); + mBiosOffset =3D BaseAddr; + return Status; +} diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/Spi= FlashCommon.c b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/= SpiFlashCommon.c new file mode 100644 index 000000000000..daebaf8e5e33 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCo= mmon.c @@ -0,0 +1,209 @@ +/** @file + Wrap PCH_SPI_PROTOCOL to provide some library level interfaces + for module use. + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include +#include +#include + +PCH_SPI_PROTOCOL *mSpiProtocol; + +// +// Variables for boottime and runtime usage. +// +UINTN mBiosAreaBaseAddress =3D 0; +UINTN mBiosSize =3D 0; +UINTN mBiosOffset =3D 0; + +/** + Enable block protection on the Serial Flash device. + + @retval EFI_SUCCESS Opertion is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashLock ( + VOID + ) +{ + return EFI_SUCCESS; +} + +/** + Read NumBytes bytes of data from the address specified by + PAddress into Buffer. + + @param[in] Address The starting physical address of the read. + @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number + of bytes actually read. + @param[out] Buffer The destination data buffer for the read. + + @retval EFI_SUCCESS Operation is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashRead ( + IN UINTN Address, + IN OUT UINT32 *NumBytes, + OUT UINT8 *Buffer + ) +{ + ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); + if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { + return EFI_INVALID_PARAMETER; + } + + // + // This function is implemented specifically for those platforms + // at which the SPI device is memory mapped for read. So this + // function just do a memory copy for Spi Flash Read. + // + CopyMem (Buffer, (VOID *) Address, *NumBytes); + + return EFI_SUCCESS; +} + +/** + Write NumBytes bytes of data from Buffer to the address specified by + PAddresss. + + @param[in] Address The starting physical address of the wri= te. + @param[in,out] NumBytes On input, the number of bytes to write. = On output, + the actual number of bytes written. + @param[in] Buffer The source data buffer for the write. + + @retval EFI_SUCCESS Operation is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + @retval EFI_INVALID_PARAMETER Invalid parameter. + +**/ +EFI_STATUS +EFIAPI +SpiFlashWrite ( + IN UINTN Address, + IN OUT UINT32 *NumBytes, + IN UINT8 *Buffer + ) +{ + EFI_STATUS Status; + UINTN Offset; + UINT32 Length; + UINT32 RemainingBytes; + + ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); + if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { + return EFI_INVALID_PARAMETER; + } + + ASSERT (Address >=3D mBiosAreaBaseAddress); + if (Address < mBiosAreaBaseAddress) { + return EFI_INVALID_PARAMETER; + } + + Offset =3D Address - mBiosAreaBaseAddress; + + ASSERT ((*NumBytes + Offset) <=3D mBiosSize); + if ((*NumBytes + Offset) > mBiosSize) { + return EFI_INVALID_PARAMETER; + } + + Status =3D EFI_SUCCESS; + RemainingBytes =3D *NumBytes; + + + while (RemainingBytes > 0) { + if (RemainingBytes > SECTOR_SIZE_4KB) { + Length =3D SECTOR_SIZE_4KB; + } else { + Length =3D RemainingBytes; + } + Status =3D mSpiProtocol->FlashWrite ( + mSpiProtocol, + FlashRegionBios, + (UINT32) Offset, + Length, + Buffer + ); + if (EFI_ERROR (Status)) { + break; + } + RemainingBytes -=3D Length; + Offset +=3D Length; + Buffer +=3D Length; + } + + // + // Actual number of bytes written + // + *NumBytes -=3D RemainingBytes; + + return Status; +} + +/** + Erase the block starting at Address. + + @param[in] Address The starting physical address of the block t= o be erased. + This library assume that caller garantee tha= t the PAddress + is at the starting address of this block. + @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. + On output, the actual number of bytes erased. + + @retval EFI_SUCCESS. Operation is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + @retval EFI_INVALID_PARAMETER Invalid parameter. + +**/ +EFI_STATUS +EFIAPI +SpiFlashBlockErase ( + IN UINTN Address, + IN UINTN *NumBytes + ) +{ + EFI_STATUS Status; + UINTN Offset; + UINTN RemainingBytes; + + ASSERT (NumBytes !=3D NULL); + if (NumBytes =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + ASSERT (Address >=3D mBiosAreaBaseAddress); + if (Address < mBiosAreaBaseAddress) { + return EFI_INVALID_PARAMETER; + } + + Offset =3D Address - mBiosAreaBaseAddress; + + ASSERT ((*NumBytes % SECTOR_SIZE_4KB) =3D=3D 0); + if ((*NumBytes % SECTOR_SIZE_4KB) !=3D 0) { + return EFI_INVALID_PARAMETER; + } + + ASSERT ((*NumBytes + Offset) <=3D mBiosSize); + if ((*NumBytes + Offset) > mBiosSize) { + return EFI_INVALID_PARAMETER; + } + + Status =3D EFI_SUCCESS; + RemainingBytes =3D *NumBytes; + + + Status =3D mSpiProtocol->FlashErase ( + mSpiProtocol, + FlashRegionBios, + (UINT32) Offset, + (UINT32) RemainingBytes + ); + return Status; +} diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dsc index aeed452ed521..d4e15100bfde 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc @@ -59,6 +59,10 @@ [LibraryClasses.common.DXE_DRIVER] HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf =20 +[LibraryClasses.common.DXE_SMM_DRIVER] + MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAlloc= ationLib.inf + SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableL= ib.inf + ##########################################################################= ######################### # # Components Section - list of the modules and components that will be pro= cessed by compilation @@ -95,6 +99,7 @@ [Components] IntelSiliconPkg/Library/DxeAslUpdateLib/DxeAslUpdateLib.inf IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.inf IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf + IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf =20 [BuildOptions] *_*_*_CC_FLAGS =3D -D DISABLE_NEW_DEPRECATED_INTERFACES diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/Smm= SpiFlashCommonLib.inf b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCo= mmonLib/SmmSpiFlashCommonLib.inf new file mode 100644 index 000000000000..f6a06351ace5 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlas= hCommonLib.inf @@ -0,0 +1,48 @@ +## @file +# SMM Library instance of Spi Flash Common Library Class +# +# Copyright (c) 2021, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010017 + BASE_NAME =3D SmmSpiFlashCommonLib + FILE_GUID =3D 99721728-C39D-4600-BD38-71E8238FEEF2 + VERSION_STRING =3D 1.0 + MODULE_TYPE =3D DXE_SMM_DRIVER + LIBRARY_CLASS =3D SpiFlashCommonLib|DXE_SMM_DRIVER + CONSTRUCTOR =3D SmmSpiFlashCommonLibConstructor +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D IA32 X64 +# + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + IoLib + MemoryAllocationLib + SmmServicesTableLib + UefiLib + +[Packages] + MdePkg/MdePkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec + +[Pcd] + gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES + +[Sources] + SmmSpiFlashCommonLib.c + SpiFlashCommon.c + +[Protocols] + gPchSmmSpiProtocolGuid ## CONSUMES + +[Depex.X64.DXE_SMM_DRIVER] + gPchSmmSpiProtocolGuid --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75315): https://edk2.groups.io/g/devel/message/75315 Mute This Topic: https://groups.io/mt/82929217/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75316+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75316+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396835; cv=none; d=zohomail.com; s=zohoarc; b=iQhjRQx2YMGryiWRVdJbXJp8yAmBuZ93SCWwuHfuR138Xtg+zTlgzD2fc66OKB46SVGoYJjh0aXKnOTZyo5aTugFTmXWd/sMyngtG2D6oPQOC2Y57QVwztAB98gI1qJv5LbDyovibFIdiXtKlYlGRqCej/khSRatwRc5Czi70Qc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396835; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=dF2nlNhIrM6HtB/OteYUWA/xwcg+d2VDvE8V6WmI4I8=; b=AoxBLyUbSEOwVbX5wWg2Evdrg9gmZvD+qJpfSZgelFweUVIqeSq5rPmV7RZQhOXBxAkhyg2OZ4XkKpvo3P+JYvLPCdEHjDSMKSD3vubVi3qgn+JQVpPdDCo8vwtgy1ItfiVZ3dXTwHhmYow3HLmvugpHVE5uj50Ywoc8PaeBn0I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75316+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 162139683573364.59536248314146; Tue, 18 May 2021 21:00:35 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id tIRtYY1788612xx7f9vydiD4; Tue, 18 May 2021 21:00:35 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web11.6940.1621396825651523421 for ; Tue, 18 May 2021 21:00:25 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 3D1BC20B7178; Tue, 18 May 2021 21:00:25 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 3D1BC20B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 10/35] IntelSiliconPkg: Add MM SPI FVB services Date: Tue, 18 May 2021 20:59:22 -0700 Message-Id: <20210519035947.1234-11-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: JJqdAtMBryLV3twtasnauLXfx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396835; bh=3hjmedLfFdYFShBFF+55vrJYU/MERl6JenW/OlINoxM=; h=Cc:Date:From:Reply-To:Subject:To; b=RuYTYweSZ2z4STpsFSns66J25nsftySURbkhIz5lZNF44TyWDjdvF63TolmCKkDCR3Q EyzGXZ8oR93Lal/A47/d/+mmP/DdG8PaazUXCgrVTAa85WFNIKSdxzBToP7JJfdtaacLi qchPbFWYBSiKif1DdFo7juW3ZM7q0av/6z4= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Adds a Traditional MM and Standalone MM SPI FVB Service driver to IntelSiliconPkg. These drivers produce the firmware volume block protocol for SPI flash devices compliant with the Intel Serial Flash Interface Compatibility Specification. Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c = | 94 ++ Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCom= mon.c | 903 ++++++++++++++++++++ Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.= c | 271 ++++++ Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta= ndaloneMm.c | 32 + Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceTra= ditionalMm.c | 32 + Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceCom= mon.h | 158 ++++ Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceMm.= h | 22 + Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm= .inf | 68 ++ Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSta= ndaloneMm.inf | 67 ++ Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc = | 11 + 10 files changed, 1658 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbI= nfo.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c new file mode 100644 index 000000000000..7f2678fa9e5a --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/FvbInfo.c @@ -0,0 +1,94 @@ +/**@file + Defines data structure that is the volume header found. + These data is intent to decouple FVB driver with FV header. + +Copyright (c) 2017, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "SpiFvbServiceCommon.h" + +#define FIRMWARE_BLOCK_SIZE 0x10000 +#define FVB_MEDIA_BLOCK_SIZE FIRMWARE_BLOCK_SIZE + +#define NV_STORAGE_BASE_ADDRESS FixedPcdGet32(PcdFlashNvStorageVariabl= eBase) +#define SYSTEM_NV_BLOCK_NUM ((FixedPcdGet32(PcdFlashNvStorageVaria= bleSize)+ FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32(Pc= dFlashNvStorageFtwSpareSize))/ FVB_MEDIA_BLOCK_SIZE) + +typedef struct { + EFI_PHYSICAL_ADDRESS BaseAddress; + EFI_FIRMWARE_VOLUME_HEADER FvbInfo; + EFI_FV_BLOCK_MAP_ENTRY End[1]; +} EFI_FVB2_MEDIA_INFO; + +// +// This data structure contains a template of all correct FV headers, whic= h is used to restore +// Fv header if it's corrupted. +// +EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] =3D { + // + // Systen NvStorage FVB + // + { + NV_STORAGE_BASE_ADDRESS, + { + {0,}, //ZeroVector[16] + EFI_SYSTEM_NV_DATA_FV_GUID, + FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM, + EFI_FVH_SIGNATURE, + 0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for detail= s on EFI_FVB_ATTRIBUTES_2 + sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY= ), + 0, //CheckSum which will be calucated dynamically. + 0, //ExtHeaderOffset + {0,}, //Reserved[1] + 2, //Revision + { + { + SYSTEM_NV_BLOCK_NUM, + FVB_MEDIA_BLOCK_SIZE, + } + } + }, + { + { + 0, + 0 + } + } + } +}; + +EFI_STATUS +GetFvbInfo ( + IN EFI_PHYSICAL_ADDRESS FvBaseAddress, + OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo + ) +{ + UINTN Index; + EFI_FIRMWARE_VOLUME_HEADER *FvHeader; + + for (Index =3D 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof (EFI_F= VB2_MEDIA_INFO); Index++) { + if (mPlatformFvbMediaInfo[Index].BaseAddress =3D=3D FvBaseAddress) { + FvHeader =3D &mPlatformFvbMediaInfo[Index].FvbInfo; + + // + // Update the checksum value of FV header. + // + FvHeader->Checksum =3D CalculateCheckSum16 ( (UINT16 *) FvHeader, Fv= Header->HeaderLength); + + *FvbInfo =3D FvHeader; + + DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress)); + DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength)); + DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)->HeaderLengt= h)); + DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)->Checksum)= ); + DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n", (*FvbInfo)->= BlockMap[0].NumBlocks)); + DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n", (*FvbInfo)= ->BlockMap[0].Length)); + DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n", (*FvbInfo)->= BlockMap[1].NumBlocks)); + DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n", (*FvbInf= o)->BlockMap[1].Length)); + + return EFI_SUCCESS; + } + } + return EFI_NOT_FOUND; +} diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceCommon.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbServi= ce/SpiFvbServiceCommon.c new file mode 100644 index 000000000000..dab818e98087 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceCommon.c @@ -0,0 +1,903 @@ +/** @file + Common driver source for several Serial Flash devices + which are compliant with the Intel(R) Serial Flash Interface Compatibili= ty Specification. + +Copyright (c) 2017, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "SpiFvbServiceCommon.h" + +// +// Global variable for this FVB driver which contains +// the private data of all firmware volume block instances +// +FVB_GLOBAL mFvbModuleGlobal; + +// +// This platform driver knows there are multiple FVs on FD. +// Now we only provide FVs on Variable region and MicorCode region for per= formance issue. +// +FV_INFO mPlatformFvBaseAddress[] =3D { + {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(= PcdFlashNvStorageVariableSize)}, + {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase), FixedPcdGet32(PcdFla= shMicrocodeFvSize)}, + {0, 0} +}; + +FV_INFO mPlatformDefaultBaseAddress[] =3D { + {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(= PcdFlashNvStorageVariableSize)}, + {0, 0}, // {FixedPcdGet32(PcdFlashMicrocodeFvBase), FixedPcdGet32(PcdFla= shMicrocodeFvSize)}, + {0, 0} +}; + +FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate =3D { + { + { + HARDWARE_DEVICE_PATH, + HW_MEMMAP_DP, + { + (UINT8)(sizeof (MEMMAP_DEVICE_PATH)), + (UINT8)(sizeof (MEMMAP_DEVICE_PATH) >> 8) + } + }, + EfiMemoryMappedIO, + (EFI_PHYSICAL_ADDRESS) 0, + (EFI_PHYSICAL_ADDRESS) 0, + }, + { + END_DEVICE_PATH_TYPE, + END_ENTIRE_DEVICE_PATH_SUBTYPE, + { + END_DEVICE_PATH_LENGTH, + 0 + } + } +}; + +FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate =3D { + { + { + MEDIA_DEVICE_PATH, + MEDIA_PIWG_FW_VOL_DP, + { + (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH)), + (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH) >> 8) + } + }, + { 0 } + }, + { + END_DEVICE_PATH_TYPE, + END_ENTIRE_DEVICE_PATH_SUBTYPE, + { + END_DEVICE_PATH_LENGTH, + 0 + } + } +}; + +// +// Template structure used when installing FVB protocol +// +EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate =3D { + FvbProtocolGetAttributes, + FvbProtocolSetAttributes, + FvbProtocolGetPhysicalAddress, + FvbProtocolGetBlockSize, + FvbProtocolRead, + FvbProtocolWrite, + FvbProtocolEraseBlocks, + NULL +}; + +/** + Get the EFI_FVB_ATTRIBUTES_2 of a FV. + + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE. + + @return Attributes of the FV identified by FvbInstance. + +**/ +EFI_FVB_ATTRIBUTES_2 +FvbGetVolumeAttributes ( + IN EFI_FVB_INSTANCE *FvbInstance + ) +{ + return FvbInstance->FvHeader.Attributes; +} + +/** + Retrieves the starting address of an LBA in an FV. It also + return a few other attribut of the FV. + + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE. + @param[in] Lba The logical block address + @param[out] LbaAddress On output, contains the physical starting ad= dress + of the Lba + @param[out] LbaLength On output, contains the length of the block + @param[out] NumOfBlocks A pointer to a caller allocated UINTN in whi= ch the + number of consecutive blocks starting with L= ba is + returned. All blocks in this range have a si= ze of + BlockSize + + @retval EFI_SUCCESS Successfully returns + @retval EFI_INVALID_PARAMETER Instance not found + +**/ +EFI_STATUS +FvbGetLbaAddress ( + IN EFI_FVB_INSTANCE *FvbInstance, + IN EFI_LBA Lba, + OUT UINTN *LbaAddress, + OUT UINTN *LbaLength, + OUT UINTN *NumOfBlocks + ) +{ + UINT32 NumBlocks; + UINT32 BlockLength; + UINTN Offset; + EFI_LBA StartLba; + EFI_LBA NextLba; + EFI_FV_BLOCK_MAP_ENTRY *BlockMap; + + StartLba =3D 0; + Offset =3D 0; + BlockMap =3D &(FvbInstance->FvHeader.BlockMap[0]); + + // + // Parse the blockmap of the FV to find which map entry the Lba belongs = to + // + while (TRUE) { + NumBlocks =3D BlockMap->NumBlocks; + BlockLength =3D BlockMap->Length; + + if ( NumBlocks =3D=3D 0 || BlockLength =3D=3D 0) { + return EFI_INVALID_PARAMETER; + } + + NextLba =3D StartLba + NumBlocks; + + // + // The map entry found + // + if (Lba >=3D StartLba && Lba < NextLba) { + Offset =3D Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLength); + if (LbaAddress ) { + *LbaAddress =3D FvbInstance->FvBase + Offset; + } + + if (LbaLength ) { + *LbaLength =3D BlockLength; + } + + if (NumOfBlocks ) { + *NumOfBlocks =3D (UINTN)(NextLba - Lba); + } + return EFI_SUCCESS; + } + + StartLba =3D NextLba; + Offset =3D Offset + NumBlocks * BlockLength; + BlockMap++; + } +} + +/** + Reads specified number of bytes into a buffer from the specified block. + + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE + @param[in] Lba The logical block address to be re= ad from + @param[in] BlockOffset Offset into the block at which to = begin reading + @param[in] NumBytes Pointer that on input contains the= total size of + the buffer. On output, it contains= the total number + of bytes read + @param[in] Buffer Pointer to a caller allocated buff= er that will be + used to hold the data read + + + @retval EFI_SUCCESS The firmware volume was read succe= ssfully and + contents are in Buffer + @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA bounda= ry. On output, + NumBytes contains the total number= of bytes returned + in Buffer + @retval EFI_ACCESS_DENIED The firmware volume is in the Read= Disabled state + @retval EFI_DEVICE_ERROR The block device is not functionin= g correctly and + could not be read + @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, B= uffer are NULL + +**/ +EFI_STATUS +FvbReadBlock ( + IN EFI_FVB_INSTANCE *FvbInstance, + IN EFI_LBA Lba, + IN UINTN BlockOffset, + IN OUT UINTN *NumBytes, + IN UINT8 *Buffer + ) +{ + EFI_FVB_ATTRIBUTES_2 Attributes; + UINTN LbaAddress; + UINTN LbaLength; + EFI_STATUS Status; + BOOLEAN BadBufferSize =3D FALSE; + + if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { + return EFI_INVALID_PARAMETER; + } + if (*NumBytes =3D=3D 0) { + return EFI_INVALID_PARAMETER; + } + + Status =3D FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, = NULL); + if (EFI_ERROR(Status)) { + return Status; + } + + Attributes =3D FvbGetVolumeAttributes (FvbInstance); + + if ((Attributes & EFI_FVB2_READ_STATUS) =3D=3D 0) { + return EFI_ACCESS_DENIED; + } + + if (BlockOffset > LbaLength) { + return EFI_INVALID_PARAMETER; + } + + if (LbaLength < (*NumBytes + BlockOffset)) { + DEBUG ((DEBUG_INFO, + "FvReadBlock: Reducing Numbytes from 0x%x to 0x%x\n", + *NumBytes, + (UINT32)(LbaLength - BlockOffset)) + ); + *NumBytes =3D (UINT32) (LbaLength - BlockOffset); + BadBufferSize =3D TRUE; + } + + Status =3D SpiFlashRead (LbaAddress + BlockOffset, (UINT32 *)NumBytes, B= uffer); + + if (!EFI_ERROR (Status) && BadBufferSize) { + return EFI_BAD_BUFFER_SIZE; + } else { + return Status; + } +} + +/** + Writes specified number of bytes from the input buffer to the block. + + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE + @param[in] Lba The starting logical block index to wr= ite to + @param[in] BlockOffset Offset into the block at which to begi= n writing + @param[in] NumBytes Pointer that on input contains the tot= al size of + the buffer. On output, it contains the= total number + of bytes actually written + @param[in] Buffer Pointer to a caller allocated buffer t= hat contains + the source for the write + @retval EFI_SUCCESS The firmware volume was written succes= sfully + @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary.= On output, + NumBytes contains the total number of = bytes + actually written + @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDis= abled state + @retval EFI_DEVICE_ERROR The block device is not functioning co= rrectly and + could not be written + @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buffe= r are NULL + +**/ +EFI_STATUS +FvbWriteBlock ( + IN EFI_FVB_INSTANCE *FvbInstance, + IN EFI_LBA Lba, + IN UINTN BlockOffset, + IN OUT UINTN *NumBytes, + IN UINT8 *Buffer + ) +{ + EFI_FVB_ATTRIBUTES_2 Attributes; + UINTN LbaAddress; + UINTN LbaLength; + EFI_STATUS Status; + BOOLEAN BadBufferSize =3D FALSE; + + if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { + return EFI_INVALID_PARAMETER; + } + if (*NumBytes =3D=3D 0) { + return EFI_INVALID_PARAMETER; + } + + Status =3D FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, = NULL); + if (EFI_ERROR(Status)) { + return Status; + } + + // + // Check if the FV is write enabled + // + Attributes =3D FvbGetVolumeAttributes (FvbInstance); + if ((Attributes & EFI_FVB2_WRITE_STATUS) =3D=3D 0) { + return EFI_ACCESS_DENIED; + } + + // + // Perform boundary checks and adjust NumBytes + // + if (BlockOffset > LbaLength) { + return EFI_INVALID_PARAMETER; + } + + if (LbaLength < (*NumBytes + BlockOffset)) { + DEBUG ((DEBUG_INFO, + "FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n", + *NumBytes, + (UINT32)(LbaLength - BlockOffset)) + ); + *NumBytes =3D (UINT32) (LbaLength - BlockOffset); + BadBufferSize =3D TRUE; + } + + Status =3D SpiFlashWrite (LbaAddress + BlockOffset, (UINT32 *)NumBytes, = Buffer); + if (EFI_ERROR (Status)) { + return Status; + } + + Status =3D SpiFlashLock (); + if (EFI_ERROR (Status)) { + return Status; + } + + WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress + BlockOffset), = *NumBytes); + + if (!EFI_ERROR (Status) && BadBufferSize) { + return EFI_BAD_BUFFER_SIZE; + } else { + return Status; + } +} + + + +/** + Erases and initializes a firmware volume block. + + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE + @param[in] Lba The logical block index to be erased + + @retval EFI_SUCCESS The erase request was successfully compl= eted + @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisab= led state + @retval EFI_DEVICE_ERROR The block device is not functioning corr= ectly and + could not be written. Firmware device ma= y have been + partially erased + @retval EFI_INVALID_PARAMETER Instance not found + +**/ +EFI_STATUS +FvbEraseBlock ( + IN EFI_FVB_INSTANCE *FvbInstance, + IN EFI_LBA Lba + ) +{ + + EFI_FVB_ATTRIBUTES_2 Attributes; + UINTN LbaAddress; + UINTN LbaLength; + EFI_STATUS Status; + + // + // Check if the FV is write enabled + // + Attributes =3D FvbGetVolumeAttributes (FvbInstance); + + if( (Attributes & EFI_FVB2_WRITE_STATUS) =3D=3D 0) { + return EFI_ACCESS_DENIED; + } + + // + // Get the starting address of the block for erase. + // + Status =3D FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, = NULL); + if (EFI_ERROR(Status)) { + return Status; + } + + Status =3D SpiFlashBlockErase (LbaAddress, &LbaLength); + if (EFI_ERROR (Status)) { + return Status; + } + + Status =3D SpiFlashLock (); + if (EFI_ERROR (Status)) { + return Status; + } + + WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength); + + return Status; +} + +/** + Modifies the current settings of the firmware volume according to the + input parameter, and returns the new setting of the volume + + @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE. + @param[in] Attributes On input, it is a pointer to EFI_FVB_A= TTRIBUTES_2 + containing the desired firmware volume= settings. + On successful return, it contains the = new settings + of the firmware volume + + @retval EFI_SUCCESS Successfully returns + @retval EFI_ACCESS_DENIED The volume setting is locked and canno= t be modified + @retval EFI_INVALID_PARAMETER Instance not found, or The attributes = requested are + in conflict with the capabilities as d= eclared in the + firmware volume header + +**/ +EFI_STATUS +FvbSetVolumeAttributes ( + IN EFI_FVB_INSTANCE *FvbInstance, + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ) +{ + EFI_FVB_ATTRIBUTES_2 OldAttributes; + EFI_FVB_ATTRIBUTES_2 *AttribPtr; + EFI_FVB_ATTRIBUTES_2 UnchangedAttributes; + UINT32 Capabilities; + UINT32 OldStatus, NewStatus; + + AttribPtr =3D (EFI_FVB_ATTRIBUTES_2 *) &(FvbInstance->FvHeader.Attri= butes); + OldAttributes =3D *AttribPtr; + Capabilities =3D OldAttributes & EFI_FVB2_CAPABILITIES; + OldStatus =3D OldAttributes & EFI_FVB2_STATUS; + NewStatus =3D *Attributes & EFI_FVB2_STATUS; + + UnchangedAttributes =3D EFI_FVB2_READ_DISABLED_CAP | \ + EFI_FVB2_READ_ENABLED_CAP | \ + EFI_FVB2_WRITE_DISABLED_CAP | \ + EFI_FVB2_WRITE_ENABLED_CAP | \ + EFI_FVB2_LOCK_CAP | \ + EFI_FVB2_STICKY_WRITE | \ + EFI_FVB2_MEMORY_MAPPED | \ + EFI_FVB2_ERASE_POLARITY | \ + EFI_FVB2_READ_LOCK_CAP | \ + EFI_FVB2_WRITE_LOCK_CAP | \ + EFI_FVB2_ALIGNMENT; + + // + // Some attributes of FV is read only can *not* be set + // + if ((OldAttributes & UnchangedAttributes) ^ (*Attributes & UnchangedAttr= ibutes)) { + return EFI_INVALID_PARAMETER; + } + + // + // If firmware volume is locked, no status bit can be updated + // + if ( OldAttributes & EFI_FVB2_LOCK_STATUS ) { + if ( OldStatus ^ NewStatus ) { + return EFI_ACCESS_DENIED; + } + } + + // + // Test read disable + // + if ((Capabilities & EFI_FVB2_READ_DISABLED_CAP) =3D=3D 0) { + if ((NewStatus & EFI_FVB2_READ_STATUS) =3D=3D 0) { + return EFI_INVALID_PARAMETER; + } + } + + // + // Test read enable + // + if ((Capabilities & EFI_FVB2_READ_ENABLED_CAP) =3D=3D 0) { + if (NewStatus & EFI_FVB2_READ_STATUS) { + return EFI_INVALID_PARAMETER; + } + } + + // + // Test write disable + // + if ((Capabilities & EFI_FVB2_WRITE_DISABLED_CAP) =3D=3D 0) { + if ((NewStatus & EFI_FVB2_WRITE_STATUS) =3D=3D 0) { + return EFI_INVALID_PARAMETER; + } + } + + // + // Test write enable + // + if ((Capabilities & EFI_FVB2_WRITE_ENABLED_CAP) =3D=3D 0) { + if (NewStatus & EFI_FVB2_WRITE_STATUS) { + return EFI_INVALID_PARAMETER; + } + } + + // + // Test lock + // + if ((Capabilities & EFI_FVB2_LOCK_CAP) =3D=3D 0) { + if (NewStatus & EFI_FVB2_LOCK_STATUS) { + return EFI_INVALID_PARAMETER; + } + } + + *AttribPtr =3D (*AttribPtr) & (0xFFFFFFFF & (~EFI_FVB2_STATUS)); + *AttribPtr =3D (*AttribPtr) | NewStatus; + *Attributes =3D *AttribPtr; + + return EFI_SUCCESS; +} + +/** + Check the integrity of firmware volume header + + @param[in] FvHeader A pointer to a firmware volume header + + @retval TRUE The firmware volume is consistent + @retval FALSE The firmware volume has corrupted. + +**/ +BOOLEAN +IsFvHeaderValid ( + IN EFI_PHYSICAL_ADDRESS FvBase, + IN CONST EFI_FIRMWARE_VOLUME_HEADER *FvHeader + ) +{ + if (FvBase =3D=3D PcdGet32(PcdFlashNvStorageVariableBase)) { + if (CompareMem (&FvHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid, si= zeof(EFI_GUID)) !=3D 0 ) { + return FALSE; + } + } else { + if (CompareMem (&FvHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Gui= d, sizeof(EFI_GUID)) !=3D 0 ) { + return FALSE; + } + } + if ( (FvHeader->Revision !=3D EFI_FVH_REVISION) || + (FvHeader->Signature !=3D EFI_FVH_SIGNATURE) || + (FvHeader->FvLength =3D=3D ((UINTN) -1)) || + ((FvHeader->HeaderLength & 0x01 ) !=3D0) ) { + return FALSE; + } + + if (CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength) != =3D 0) { + return FALSE; + } + + return TRUE; +} + +// +// FVB protocol APIs +// + +/** + Retrieves the physical address of the device. + + @param[in] This A pointer to EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL. + @param[out] Address Output buffer containing the address. + + retval EFI_SUCCESS The function always return successfully. + +**/ +EFI_STATUS +EFIAPI +FvbProtocolGetPhysicalAddress ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + OUT EFI_PHYSICAL_ADDRESS *Address + ) +{ + EFI_FVB_INSTANCE *FvbInstance; + + FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); + + *Address =3D FvbInstance->FvBase; + + return EFI_SUCCESS; +} + +/** + Retrieve the size of a logical block + + @param[in] This Calling context + @param[in] Lba Indicates which block to return the size for. + @param[out] BlockSize A pointer to a caller allocated UINTN in which + the size of the block is returned + @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which t= he + number of consecutive blocks starting with Lba is + returned. All blocks in this range have a size of + BlockSize + + @retval EFI_SUCCESS The function always return successfully. + +**/ +EFI_STATUS +EFIAPI +FvbProtocolGetBlockSize ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + IN EFI_LBA Lba, + OUT UINTN *BlockSize, + OUT UINTN *NumOfBlocks + ) +{ + EFI_FVB_INSTANCE *FvbInstance; + + FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); + + DEBUG((DEBUG_INFO, + "FvbProtocolGetBlockSize: Lba: 0x%lx BlockSize: 0x%x NumOfBlocks: 0x%x= \n", + Lba, + BlockSize, + NumOfBlocks) + ); + + return FvbGetLbaAddress ( + FvbInstance, + Lba, + NULL, + BlockSize, + NumOfBlocks + ); +} + +/** + Retrieves Volume attributes. No polarity translations are done. + + @param[in] This Calling context + @param[out] Attributes Output buffer which contains attributes + + @retval EFI_SUCCESS The function always return successfully. + +**/ +EFI_STATUS +EFIAPI +FvbProtocolGetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ) +{ + EFI_FVB_INSTANCE *FvbInstance; + + FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); + + *Attributes =3D FvbGetVolumeAttributes (FvbInstance); + + DEBUG ((DEBUG_INFO, + "FvbProtocolGetAttributes: This: 0x%x Attributes: 0x%x\n", + This, + *Attributes) + ); + + return EFI_SUCCESS; +} + +/** + Sets Volume attributes. No polarity translations are done. + + @param[in] This Calling context + @param[out] Attributes Output buffer which contains attributes + + @retval EFI_SUCCESS The function always return successfully. + +**/ +EFI_STATUS +EFIAPI +FvbProtocolSetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ) +{ + EFI_STATUS Status; + EFI_FVB_INSTANCE *FvbInstance; + + DEBUG((DEBUG_INFO, + "FvbProtocolSetAttributes: Before SET - This: 0x%x Attributes: 0x%x\n= ", + This, + *Attributes) + ); + + FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); + + Status =3D FvbSetVolumeAttributes (FvbInstance, Attributes); + + DEBUG((DEBUG_INFO, + "FvbProtocolSetAttributes: After SET - This: 0x%x Attributes: 0x%x\n", + This, + *Attributes) + ); + + return Status; +} + +/** + The EraseBlock() function erases one or more blocks as denoted by the + variable argument list. The entire parameter list of blocks must be veri= fied + prior to erasing any blocks. If a block is requested that does not exist + within the associated firmware volume (it has a larger index than the la= st + block of the firmware volume), the EraseBlock() function must return + EFI_INVALID_PARAMETER without modifying the contents of the firmware vol= ume. + + @param[in] This Calling context + @param[in] ... Starting LBA followed by Number of Lba to erase. + a -1 to terminate the list. + + @retval EFI_SUCCESS The erase request was successfully completed + @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled st= ate + @retval EFI_DEVICE_ERROR The block device is not functioning correctly = and + could not be written. Firmware device may have= been + partially erased + +**/ +EFI_STATUS +EFIAPI +FvbProtocolEraseBlocks ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + ... + ) +{ + EFI_FVB_INSTANCE *FvbInstance; + UINTN NumOfBlocks; + VA_LIST Args; + EFI_LBA StartingLba; + UINTN NumOfLba; + EFI_STATUS Status; + + DEBUG((DEBUG_INFO, "FvbProtocolEraseBlocks: \n")); + + FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); + + NumOfBlocks =3D FvbInstance->NumOfBlocks; + + VA_START (Args, This); + + do { + StartingLba =3D VA_ARG (Args, EFI_LBA); + if ( StartingLba =3D=3D EFI_LBA_LIST_TERMINATOR ) { + break; + } + + NumOfLba =3D VA_ARG (Args, UINT32); + + // + // Check input parameters + // + if (NumOfLba =3D=3D 0) { + VA_END (Args); + return EFI_INVALID_PARAMETER; + } + + if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) { + return EFI_INVALID_PARAMETER; + } + } while ( 1 ); + + VA_END (Args); + + VA_START (Args, This); + do { + StartingLba =3D VA_ARG (Args, EFI_LBA); + if (StartingLba =3D=3D EFI_LBA_LIST_TERMINATOR) { + break; + } + + NumOfLba =3D VA_ARG (Args, UINT32); + + while ( NumOfLba > 0 ) { + Status =3D FvbEraseBlock (FvbInstance, StartingLba); + if ( EFI_ERROR(Status)) { + VA_END (Args); + return Status; + } + StartingLba ++; + NumOfLba --; + } + + } while ( 1 ); + + VA_END (Args); + + return EFI_SUCCESS; +} + +/** + Writes data beginning at Lba:Offset from FV. The write terminates either + when *NumBytes of data have been written, or when a block boundary is + reached. *NumBytes is updated to reflect the actual number of bytes + written. The write opertion does not include erase. This routine will + attempt to write only the specified bytes. If the writes do not stick, + it will return an error. + + @param[in] This Calling context + @param[in] Lba Block in which to begin write + @param[in] Offset Offset in the block at which to begin write + @param[in,out] NumBytes On input, indicates the requested write size. = On + output, indicates the actual number of bytes w= ritten + @param[in] Buffer Buffer containing source data for the write. + + @retval EFI_SUCCESS The firmware volume was written successful= ly + @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. On = output, + NumBytes contains the total number of bytes + actually written + @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisable= d state + @retval EFI_DEVICE_ERROR The block device is not functioning correc= tly and + could not be written + @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL + +**/ +EFI_STATUS +EFIAPI +FvbProtocolWrite ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN *NumBytes, + IN UINT8 *Buffer + ) +{ + EFI_FVB_INSTANCE *FvbInstance; + + FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); + + DEBUG((DEBUG_INFO, + "FvbProtocolWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%= x\n", + Lba, + Offset, + *NumBytes, + Buffer) + ); + + return FvbWriteBlock (FvbInstance, Lba, Offset, NumBytes, Buffer); +} + +/** + Reads data beginning at Lba:Offset from FV. The Read terminates either + when *NumBytes of data have been read, or when a block boundary is + reached. *NumBytes is updated to reflect the actual number of bytes + written. The write opertion does not include erase. This routine will + attempt to write only the specified bytes. If the writes do not stick, + it will return an error. + + @param[in] This Calling context + @param[in] Lba Block in which to begin write + @param[in] Offset Offset in the block at which to begin write + @param[in,out] NumBytes On input, indicates the requested write size. = On + output, indicates the actual number of bytes w= ritten + @param[in] Buffer Buffer containing source data for the write. + + @retval EFI_SUCCESS The firmware volume was read successfully = and + contents are in Buffer + @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On o= utput, + NumBytes contains the total number of byte= s returned + in Buffer + @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled= state + @retval EFI_DEVICE_ERROR The block device is not functioning correc= tly and + could not be read + @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL + +**/ +EFI_STATUS +EFIAPI +FvbProtocolRead ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN *NumBytes, + OUT UINT8 *Buffer + ) +{ + EFI_FVB_INSTANCE *FvbInstance; + EFI_STATUS Status; + + FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); + Status =3D FvbReadBlock (FvbInstance, Lba, Offset, NumBytes, Buffer); + DEBUG((DEBUG_INFO, + "FvbProtocolRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x= \n", + Lba, + Offset, + *NumBytes, + Buffer) + ); + + return Status; +} diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/S= piFvbServiceMm.c new file mode 100644 index 000000000000..42a0828c6fae --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceMm.c @@ -0,0 +1,271 @@ +/** @file + MM driver source for several Serial Flash devices + which are compliant with the Intel(R) Serial Flash Interface Compatibili= ty Specification. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ Copyright (c) Microsoft Corporation.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "SpiFvbServiceCommon.h" +#include +#include +#include + +/** + The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol + for each FV in the system. + + @param[in] FvbInstance The pointer to a FW volume instance structure, + which contains the information about one FV. + + @retval VOID + +**/ +VOID +InstallFvbProtocol ( + IN EFI_FVB_INSTANCE *FvbInstance + ) +{ + EFI_FIRMWARE_VOLUME_HEADER *FvHeader; + EFI_STATUS Status; + EFI_HANDLE FvbHandle; + + ASSERT (FvbInstance !=3D NULL); + if (FvbInstance =3D=3D NULL) { + return; + } + + CopyMem (&FvbInstance->FvbProtocol, &mFvbProtocolTemplate, sizeof (EFI_F= IRMWARE_VOLUME_BLOCK_PROTOCOL)); + + FvHeader =3D &FvbInstance->FvHeader; + if (FvHeader =3D=3D NULL) { + return; + } + + // + // Set up the devicepath + // + DEBUG ((DEBUG_INFO, "FwBlockService.c: Setting up DevicePath for 0x%lx:\= n", FvbInstance->FvBase)); + if (FvHeader->ExtHeaderOffset =3D=3D 0) { + // + // FV does not contains extension header, then produce MEMMAP_DEVICE_P= ATH + // + FvbInstance->DevicePath =3D (EFI_DEVICE_PATH_PROTOCOL *) AllocateRunti= meCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate); + if (FvbInstance->DevicePath =3D=3D NULL) { + DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for MEMMA= P_DEVICE_PATH failed\n")); + return; + } + ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.Sta= rtingAddress =3D FvbInstance->FvBase; + ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.End= ingAddress =3D FvbInstance->FvBase + FvHeader->FvLength - 1; + } else { + FvbInstance->DevicePath =3D (EFI_DEVICE_PATH_PROTOCOL *) AllocateRunti= meCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate); + if (FvbInstance->DevicePath =3D=3D NULL) { + DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for FV_PI= WG_DEVICE_PATH failed\n")); + return; + } + CopyGuid ( + &((FV_PIWG_DEVICE_PATH *)FvbInstance->DevicePath)->FvDevPath.FvName, + (GUID *)(UINTN)(FvbInstance->FvBase + FvHeader->ExtHeaderOffset) + ); + } + + // + // LocateDevicePath fails so install a new interface and device path + // + FvbHandle =3D NULL; + + Status =3D gMmst->MmInstallProtocolInterface ( + &FvbHandle, + &gEfiSmmFirmwareVolumeBlockProtocolGuid, + EFI_NATIVE_INTERFACE, + &(FvbInstance->FvbProtocol) + ); + ASSERT_EFI_ERROR (Status); + + Status =3D gMmst->MmInstallProtocolInterface ( + &FvbHandle, + &gEfiDevicePathProtocolGuid, + EFI_NATIVE_INTERFACE, + &(FvbInstance->DevicePath) + ); + ASSERT_EFI_ERROR (Status); +} + +/** + The function does the necessary initialization work for + Firmware Volume Block Driver. + +**/ +VOID +FvbInitialize ( + VOID + ) +{ + EFI_FVB_INSTANCE *FvbInstance; + EFI_FIRMWARE_VOLUME_HEADER *FvHeader; + EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry; + EFI_PHYSICAL_ADDRESS BaseAddress; + EFI_STATUS Status; + UINTN BufferSize; + UINTN Idx; + UINT32 MaxLbaSize; + UINT32 BytesWritten; + UINTN BytesErased; + + mPlatformFvBaseAddress[0].FvBase =3D PcdGet32(PcdFlashNvStorageVariableB= ase); + mPlatformFvBaseAddress[0].FvSize =3D PcdGet32(PcdFlashNvStorageVariableS= ize); + mPlatformFvBaseAddress[1].FvBase =3D PcdGet32(PcdFlashMicrocodeFvBase); + mPlatformFvBaseAddress[1].FvSize =3D PcdGet32(PcdFlashMicrocodeFvSize); + mPlatformDefaultBaseAddress[0].FvBase =3D PcdGet32(PcdFlashNvStorageVari= ableBase); + mPlatformDefaultBaseAddress[0].FvSize =3D PcdGet32(PcdFlashNvStorageVari= ableSize); + mPlatformDefaultBaseAddress[1].FvBase =3D PcdGet32(PcdFlashMicrocodeFvBa= se); + mPlatformDefaultBaseAddress[1].FvSize =3D PcdGet32(PcdFlashMicrocodeFvSi= ze); + + // + // We will only continue with FVB installation if the + // SPI is the active BIOS state + // + { + // + // Make sure all FVB are valid and/or fix if possible + // + for (Idx =3D 0;; Idx++) { + if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBaseAd= dress[Idx].FvBase =3D=3D 0) { + break; + } + + BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase; + FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress; + + if (!IsFvHeaderValid (BaseAddress, FvHeader)) { + BytesWritten =3D 0; + BytesErased =3D 0; + DEBUG ((DEBUG_ERROR, "ERROR - The FV in 0x%x is invalid!\n", FvHea= der)); + Status =3D GetFvbInfo (BaseAddress, &FvHeader); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, "ERROR - Can't recovery FV header at 0x%x. = GetFvbInfo Status %r\n", BaseAddress, Status)); + continue; + } + DEBUG ((DEBUG_INFO, "Rewriting FV header at 0x%X with static data\= n", BaseAddress)); + // + // Spi erase + // + BytesErased =3D (UINTN) FvHeader->BlockMap->Length; + Status =3D SpiFlashBlockErase( (UINTN) BaseAddress, &BytesErased); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, "ERROR - SpiFlashBlockErase Error %r\n", St= atus)); + continue; + } + if (BytesErased !=3D FvHeader->BlockMap->Length) { + DEBUG ((DEBUG_WARN, "ERROR - BytesErased !=3D FvHeader->BlockMap= ->Length\n")); + DEBUG ((DEBUG_INFO, " BytesErased =3D 0x%X\n Length =3D 0x%X\n",= BytesErased, FvHeader->BlockMap->Length)); + continue; + } + BytesWritten =3D FvHeader->HeaderLength; + Status =3D SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten, (UINT= 8*)FvHeader); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, "ERROR - SpiFlashWrite Error %r\n", Status)= ); + continue; + } + if (BytesWritten !=3D FvHeader->HeaderLength) { + DEBUG ((DEBUG_WARN, "ERROR - BytesWritten !=3D HeaderLength\n")); + DEBUG ((DEBUG_INFO, " BytesWritten =3D 0x%X\n HeaderLength =3D 0= x%X\n", BytesWritten, FvHeader->HeaderLength)); + continue; + } + Status =3D SpiFlashLock (); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, "ERROR - SpiFlashLock Error %r\n", Status)); + continue; + } + DEBUG ((DEBUG_INFO, "FV Header @ 0x%X restored with static data\n"= , BaseAddress)); + // + // Clear cache for this range. + // + WriteBackInvalidateDataCacheRange ( (VOID *) (UINTN) BaseAddress, = FvHeader->BlockMap->Length); + } + } + + // + // Calculate the total size for all firmware volume block instances + // + BufferSize =3D 0; + for (Idx =3D 0; ; Idx++) { + if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBaseAd= dress[Idx].FvBase =3D=3D 0) { + break; + } + BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase; + FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress; + + if (!IsFvHeaderValid (BaseAddress, FvHeader)) { + DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHead= er)); + continue; + } + + BufferSize +=3D (FvHeader->HeaderLength + + sizeof (EFI_FVB_INSTANCE) - + sizeof (EFI_FIRMWARE_VOLUME_HEADER) + ); + } + + mFvbModuleGlobal.FvbInstance =3D (EFI_FVB_INSTANCE *) AllocateRuntime= ZeroPool (BufferSize); + if (mFvbModuleGlobal.FvbInstance =3D=3D NULL) { + ASSERT (FALSE); + return; + } + + MaxLbaSize =3D 0; + FvbInstance =3D mFvbModuleGlobal.FvbInstance; + mFvbModuleGlobal.NumFv =3D 0; + + for (Idx =3D 0; ; Idx++) { + if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBaseAd= dress[Idx].FvBase =3D=3D 0) { + break; + } + BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase; + FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress; + + if (!IsFvHeaderValid (BaseAddress, FvHeader)) { + DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHead= er)); + continue; + } + + FvbInstance->Signature =3D FVB_INSTANCE_SIGNATURE; + CopyMem (&(FvbInstance->FvHeader), FvHeader, FvHeader->HeaderLength); + + FvHeader =3D &(FvbInstance->FvHeader); + FvbInstance->FvBase =3D (UINTN)BaseAddress; + + // + // Process the block map for each FV + // + FvbInstance->NumOfBlocks =3D 0; + for (PtrBlockMapEntry =3D FvHeader->BlockMap; + PtrBlockMapEntry->NumBlocks !=3D 0; + PtrBlockMapEntry++) { + // + // Get the maximum size of a block. + // + if (MaxLbaSize < PtrBlockMapEntry->Length) { + MaxLbaSize =3D PtrBlockMapEntry->Length; + } + FvbInstance->NumOfBlocks +=3D PtrBlockMapEntry->NumBlocks; + } + + // + // Add a FVB Protocol Instance + // + InstallFvbProtocol (FvbInstance); + mFvbModuleGlobal.NumFv++; + + // + // Move on to the next FvbInstance + // + FvbInstance =3D (EFI_FVB_INSTANCE *) ((UINTN)((UINT8 *)FvbInstance) + + FvHeader->HeaderLength + + (sizeof (EFI_FVB_INSTANCE) - s= izeof (EFI_FIRMWARE_VOLUME_HEADER))); + + } + } +} diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceStandaloneMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFv= bService/SpiFvbServiceStandaloneMm.c new file mode 100644 index 000000000000..252c818d6551 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceStandaloneMm.c @@ -0,0 +1,32 @@ +/** @file + MM driver source for several Serial Flash devices + which are compliant with the Intel(R) Serial Flash Interface Compatibili= ty Specification. + + Copyright (c) Microsoft Corporation.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "SpiFvbServiceCommon.h" +#include "SpiFvbServiceMm.h" + +/** + The driver Standalone MM entry point. + + @param[in] ImageHandle Image handle of this driver. + @param[in] MmSystemTable A pointer to the MM system table. + + @retval EFI_SUCCESS This function always returns EFI_SUCCESS. + +**/ +EFI_STATUS +EFIAPI +SpiFvbStandaloneMmInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_MM_SYSTEM_TABLE *MmSystemTable + ) +{ + FvbInitialize (); + + return EFI_SUCCESS; +} diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceTraditionalMm.c b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiF= vbService/SpiFvbServiceTraditionalMm.c new file mode 100644 index 000000000000..1c2dac70e3c6 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceTraditionalMm.c @@ -0,0 +1,32 @@ +/** @file + MM driver source for several Serial Flash devices + which are compliant with the Intel(R) Serial Flash Interface Compatibili= ty Specification. + + Copyright (c) Microsoft Corporation.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "SpiFvbServiceCommon.h" +#include "SpiFvbServiceMm.h" + +/** + The driver Traditional MM entry point. + + @param[in] ImageHandle Image handle of this driver. + @param[in] SystemTable A pointer to the EFI system table. + + @retval EFI_SUCCESS This function always returns EFI_SUCCESS. + +**/ +EFI_STATUS +EFIAPI +SpiFvbTraditionalMmInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + FvbInitialize (); + + return EFI_SUCCESS; +} diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceCommon.h b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbServi= ce/SpiFvbServiceCommon.h new file mode 100644 index 000000000000..e9d69e985814 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceCommon.h @@ -0,0 +1,158 @@ +/** @file + Common source definitions used in serial flash drivers + +Copyright (c) 2017, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef _SPI_FVB_SERVICE_COMMON_H +#define _SPI_FVB_SERVICE_COMMON_H + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +// +// Define two helper macro to extract the Capability field or Status field= in FVB +// bit fields +// +#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \ + EFI_FVB2_READ_ENABLED_CAP | \ + EFI_FVB2_WRITE_DISABLED_CAP | \ + EFI_FVB2_WRITE_ENABLED_CAP | \ + EFI_FVB2_LOCK_CAP \ + ) + +#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | EF= I_FVB2_LOCK_STATUS) + +#define FVB_INSTANCE_SIGNATURE SIGNATURE_32('F','V','B','I') + +typedef struct { + UINT32 Signature; + UINTN FvBase; + UINTN NumOfBlocks; + EFI_DEVICE_PATH_PROTOCOL *DevicePath; + EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FvbProtocol; + EFI_FIRMWARE_VOLUME_HEADER FvHeader; +} EFI_FVB_INSTANCE; + +typedef struct { + EFI_FVB_INSTANCE *FvbInstance; + UINT32 NumFv; +} FVB_GLOBAL; + +// +// Fvb Protocol instance data +// +#define FVB_INSTANCE_FROM_THIS(a) CR(a, EFI_FVB_INSTANCE, FvbProtocol, FVB= _INSTANCE_SIGNATURE) + +typedef struct { + MEDIA_FW_VOL_DEVICE_PATH FvDevPath; + EFI_DEVICE_PATH_PROTOCOL EndDevPath; +} FV_PIWG_DEVICE_PATH; + +typedef struct { + MEMMAP_DEVICE_PATH MemMapDevPath; + EFI_DEVICE_PATH_PROTOCOL EndDevPath; +} FV_MEMMAP_DEVICE_PATH; + +typedef struct { + UINT32 FvBase; + UINT32 FvSize; +} FV_INFO; + +// +// Protocol APIs +// +EFI_STATUS +EFIAPI +FvbProtocolGetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ); + +EFI_STATUS +EFIAPI +FvbProtocolSetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ); + +EFI_STATUS +EFIAPI +FvbProtocolGetPhysicalAddress ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + OUT EFI_PHYSICAL_ADDRESS *Address + ); + +EFI_STATUS +EFIAPI +FvbProtocolGetBlockSize ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + IN EFI_LBA Lba, + OUT UINTN *BlockSize, + OUT UINTN *NumOfBlocks + ); + +EFI_STATUS +EFIAPI +FvbProtocolRead ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN *NumBytes, + OUT UINT8 *Buffer + ); + +EFI_STATUS +EFIAPI +FvbProtocolWrite ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN *NumBytes, + IN UINT8 *Buffer + ); + +EFI_STATUS +EFIAPI +FvbProtocolEraseBlocks ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, + ... + ); + +BOOLEAN +IsFvHeaderValid ( + IN EFI_PHYSICAL_ADDRESS FvBase, + IN CONST EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader + ); + +EFI_STATUS +GetFvbInfo ( + IN EFI_PHYSICAL_ADDRESS FvBaseAddress, + OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo + ); + +extern FVB_GLOBAL mFvbModuleGlobal; +extern FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate; +extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate; +extern EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate; +extern FV_INFO mPlatformFvBaseAddress[]; +extern FV_INFO mPlatformDefaultBaseAddress[]; + +#endif diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceMm.h b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/S= piFvbServiceMm.h new file mode 100644 index 000000000000..36af1130c8ee --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceMm.h @@ -0,0 +1,22 @@ +/** @file + Definitions common to MM implementation in this driver. + + Copyright (c) Microsoft Corporation.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef _SPI_FVB_SERVICE_MM_H_ +#define _SPI_FVB_SERVICE_MM_H_ + +/** + The function does the necessary initialization work for + Firmware Volume Block Driver. + +**/ +VOID +FvbInitialize ( + VOID + ); + +#endif diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceSmm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbServic= e/SpiFvbServiceSmm.inf new file mode 100644 index 000000000000..bf1306f00201 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceSmm.inf @@ -0,0 +1,68 @@ +### @file +# Component description file for the Serial Flash device Runtime driver. +# +# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.
+# Copyright (c) Microsoft Corporation.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +### + +[Defines] + INF_VERSION =3D 0x00010017 + BASE_NAME =3D SpiFvbServiceSmm + FILE_GUID =3D 68A10D85-6858-4402-B070-028B3EA21747 + VERSION_STRING =3D 1.0 + MODULE_TYPE =3D DXE_SMM_DRIVER + PI_SPECIFICATION_VERSION =3D 1.10 + ENTRY_POINT =3D SpiFvbTraditionalMmInitialize + +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D IA32 X64 +# + +[LibraryClasses] + PcdLib + MemoryAllocationLib + CacheMaintenanceLib + BaseMemoryLib + DebugLib + BaseLib + UefiBootServicesTableLib + UefiDriverEntryPoint + SpiFlashCommonLib + MmServicesTableLib + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUM= ES + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUM= ES + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUM= ES + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUM= ES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUM= ES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUM= ES + +[Sources] + FvbInfo.c + SpiFvbServiceCommon.h + SpiFvbServiceCommon.c + SpiFvbServiceMm.h + SpiFvbServiceMm.c + SpiFvbServiceTraditionalMm.c + +[Protocols] + gEfiDevicePathProtocolGuid ## PRODUCES + gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES + +[Guids] + gEfiFirmwareFileSystem2Guid ## CONSUMES + gEfiSystemNvDataFvGuid ## CONSUMES + +[Depex] + TRUE diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiF= vbServiceStandaloneMm.inf b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/Spi= FvbService/SpiFvbServiceStandaloneMm.inf new file mode 100644 index 000000000000..b66233968247 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServi= ceStandaloneMm.inf @@ -0,0 +1,67 @@ +### @file +# Component description file for the Serial Flash device Standalone MM dri= ver. +# +# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.
+# Copyright (c) Microsoft Corporation.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +### + +[Defines] + INF_VERSION =3D 0x0001001B + BASE_NAME =3D SpiFvbServiceStandaloneMm + FILE_GUID =3D E6313655-8BD0-4EAB-B319-AD5E212CE6AB + VERSION_STRING =3D 1.0 + MODULE_TYPE =3D MM_STANDALONE + PI_SPECIFICATION_VERSION =3D 0x00010032 + ENTRY_POINT =3D SpiFvbStandaloneMmInitialize + +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D IA32 X64 +# + +[LibraryClasses] + BaseLib + BaseMemoryLib + CacheMaintenanceLib + DebugLib + MemoryAllocationLib + PcdLib + MmServicesTableLib + SpiFlashCommonLib + StandaloneMmDriverEntryPoint + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUM= ES + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUM= ES + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUM= ES + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUM= ES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSUM= ES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSUM= ES + +[Sources] + FvbInfo.c + SpiFvbServiceCommon.h + SpiFvbServiceCommon.c + SpiFvbServiceMm.h + SpiFvbServiceMm.c + SpiFvbServiceStandaloneMm.c + +[Protocols] + gEfiDevicePathProtocolGuid ## PRODUCES + gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES + +[Guids] + gEfiFirmwareFileSystem2Guid ## CONSUMES + gEfiSystemNvDataFvGuid ## CONSUMES + +[Depex] + TRUE diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dsc index d4e15100bfde..1e826a080f28 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc @@ -40,6 +40,9 @@ [LibraryClasses] PeiGetVtdPmrAlignmentLib|IntelSiliconPkg/Library/PeiGetVtdPmrAlignmentLi= b/PeiGetVtdPmrAlignmentLib.inf TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurem= entLibNull.inf MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf + SpiFlashCommonLib|IntelSiliconPkg/Library/SpiFlashCommonLibNull/SpiFlash= CommonLibNull.inf + UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBoo= tServicesTableLib.inf + UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntry= Point.inf =20 [LibraryClasses.common.PEIM] PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf @@ -61,8 +64,14 @@ [LibraryClasses.common.DXE_DRIVER] =20 [LibraryClasses.common.DXE_SMM_DRIVER] MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAlloc= ationLib.inf + MmServicesTableLib|MdePkg/Library/MmServicesTableLib/MmServicesTableLib.= inf SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableL= ib.inf =20 +[LibraryClasses.common.MM_STANDALONE] + MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAllocation= Lib/StandaloneMmMemoryAllocationLib.inf + MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/Standalon= eMmServicesTableLib.inf + StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint= /StandaloneMmDriverEntryPoint.inf + ##########################################################################= ######################### # # Components Section - list of the modules and components that will be pro= cessed by compilation @@ -86,6 +95,8 @@ [Components] IntelSiliconPkg/Library/DxeSmbiosDataHobLib/DxeSmbiosDataHobLib.inf IntelSiliconPkg/Feature/PcieSecurity/IntelPciDeviceSecurityDxe/IntelPciD= eviceSecurityDxe.inf IntelSiliconPkg/Feature/PcieSecurity/SamplePlatformDevicePolicyDxe/Sampl= ePlatformDevicePolicyDxe.inf + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmarPei.inf IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75316): https://edk2.groups.io/g/devel/message/75316 Mute This Topic: https://groups.io/mt/82929218/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75317+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75317+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396836; cv=none; d=zohomail.com; s=zohoarc; b=g8UgaEY2DykHvMY9a+tXVauJ3T9yFMtGDuUmNSqn4vSludD3RQKficU0Honvmwypse2sWyc0jncrJinW2yOwIWmwKz8vw5TPdXfqz1o+7s2VuT9zoU+dK5UD6c/mhscynJtThbcqxHxCHD1XCntA342RwuFz/8Uf6jsrXdPv1ec= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396836; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=c7TxX72+uRI0Lexqsjeq+WxHp2gN4I6ZyMFKGnsBXkA=; b=VLL3i9FC7ShkOPO7JhiaXd+WVSqD1zCGkIdB63gX/uhisc8IoYiDIdxLZJ3I+rhDzZ8D2ECtZDOWb71OiQe0TQ2Zf5PWymxxZvFHEoRaqzJ0kiRW0oss71B65Nh/U3E+2z/wfi7HyokChV/PCJCP8nCIxPy6ckRNhzwBp15SMnY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75317+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396836203176.56076616575967; Tue, 18 May 2021 21:00:36 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id dl89YY1788612xtiXobOLXw6; Tue, 18 May 2021 21:00:35 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web11.6941.1621396826747902658 for ; Tue, 18 May 2021 21:00:26 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 7BDC120B7178; Tue, 18 May 2021 21:00:26 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 7BDC120B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Rangasai V Chaganty , Deepika Kethi Reddy , Kathappan Esakkithevar Subject: [edk2-devel] [edk2-platforms][PATCH v2 11/35] CometlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Date: Tue, 18 May 2021 20:59:23 -0700 Message-Id: <20210519035947.1234-12-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: ZFYun5HmiikUw0CvvQGw22Tfx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396835; bh=4681iFtVJjZeFYNjMEGMwFURx5rr5MZaBoWwSRmwbxQ=; h=Cc:Date:From:Reply-To:Subject:To; b=HTH4mNncvLm/lOSuANlw7jmzvbwWnjZhsumo5SjzjT4iaroo4y0r0a1T9rw6Olbtm/e xgj66DsbOHw7zPaY8j6bveHZuDIE7/s0ZPTYFtwz7s9hBJFEEkg/uKA6fFJig7izpbLVe 1ELw9dN0+uubew3TGa4XlP4ze8RC+5lO4d4= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are declared in IntelSiliconPkg.dec. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Rangasai V Chaganty Cc: Deepika Kethi Reddy Cc: Kathappan Esakkithevar Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf = | 4 +-- Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashMapInc= lude.fdf | 4 +-- Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf = | 36 ++++++++++---------- Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.in= f | 4 +-- 4 files changed, 24 insertions(+), 24 deletions(-) diff --git a/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/P= latform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf index 9208aeda5d2a..6ca0ada751f6 100644 --- a/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf +++ b/Platform/Intel/CometlakeOpenBoardPkg/BiosInfo/BiosInfo.inf @@ -36,8 +36,8 @@ [Packages] MinPlatformPkg/MinPlatformPkg.dec =20 [Pcd] - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSU= MES - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSU= MES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSU= MES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSU= MES =20 [Sources] BiosInfo.c diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf= /FlashMapInclude.fdf b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/I= nclude/Fdf/FlashMapInclude.fdf index d9959a79d0bb..7d2f4b2c0cb2 100644 --- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashM= apInclude.fdf +++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/Include/Fdf/FlashM= apInclude.fdf @@ -34,8 +34,8 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =3D 0x= 00190000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D 0x= 00320000 # Flash addr (0xFFB20000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D 0x= 00170000 # -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 00490000 # Flash addr (0xFFC90000) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x= 000B0000 # +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 00490000 # Flash addr (0xFFC90000) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x= 000B0000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D 0x= 00540000 # Flash addr (0xFFD40000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D 0x= 00070000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D 0x= 005B0000 # Flash addr (0xFFDB0000) diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPk= g.fdf b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf index 795cc0da75d8..6397d80d3895 100644 --- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf +++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf @@ -31,8 +31,8 @@ [FD.CometlakeURvp] # assigned with PCD values. Instead, it uses the definitions for its varie= ty, which # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS. # -BaseAddress =3D $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddr= ess #The base address of the FLASH Device. -Size =3D $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize = #The size in bytes of the FLASH Device +BaseAddress =3D $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAr= eaBaseAddress #The base address of the FLASH Device. +Size =3D $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSi= ze #The size in bytes of the FLASH Device ErasePolarity =3D 1 BlockSize =3D $(FLASH_BLOCK_SIZE) NumBlocks =3D $(FLASH_NUM_BLOCKS) @@ -43,21 +43,21 @@ [FD.CometlakeURvp] # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macr= o expression is not supported. # So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to = get the real CodeCache base address. SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =3D $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvPreMemoryOffset) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceGui= d.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffse= t) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceGui= d.PcdFlashMicrocodeFvSize) -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgToke= nSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60 +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpac= eGuid.PcdFlashMicrocodeFvOffset) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gIntelSili= conPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60 SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D 0x60 -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvBase -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvOffset -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgTok= enSpaceGuid.PcdBiosAreaBaseAddress -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgTok= enSpaceGuid.PcdBiosSize -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pcd= FlashFvFspTOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pcd= FlashFvFspMOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pcd= FlashFvFspSOffset) -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgTok= enSpaceGuid.PcdBiosAreaBaseAddress -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgTok= enSpaceGuid.PcdBiosSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosSize +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspTOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspMOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspSOffset) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosSize ##########################################################################= ###### # # Following are lists of FD Region layout which correspond to the location= s of different @@ -153,8 +153,8 @@ [FD.CometlakeURvp] gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgToke= nSpaceGuid.PcdFlashFvPostMemorySize FV =3D FvPostMemory =20 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFla= shMicrocodeFvSize -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlash= MicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize #Microcode FV =3D FvMicrocode =20 diff --git a/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/Poli= cyInitDxe.inf b/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/P= olicyInitDxe.inf index 1d09b990b163..abb79c111e0b 100644 --- a/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitD= xe.inf +++ b/Platform/Intel/CometlakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitD= xe.inf @@ -47,8 +47,8 @@ [Packages] =20 [Pcd] gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ##= CONSUMES - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ##= CONSUMES - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ##= CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ##= CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ##= CONSUMES gCometlakeOpenBoardPkgTokenSpaceGuid.PcdIntelGopEnable gCometlakeOpenBoardPkgTokenSpaceGuid.PcdPlatformFlavor gCometlakeOpenBoardPkgTokenSpaceGuid.PcdPlatformType --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75317): https://edk2.groups.io/g/devel/message/75317 Mute This Topic: https://groups.io/mt/82929219/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75318+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75318+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396837; cv=none; d=zohomail.com; s=zohoarc; b=ndGrluHVPj8qd+hmqKcLDtnlNN1gN9p1nwkdrNzLWf67R66idSDIiI1BnbM3SPEXx3IafaHh4FTxKFjX4GtLtvhw1zTV6KQ8W5uvnNOSQQMWqkaKD63G0/n1k0vzCDg0W+/qvSkAJ92DWrIKDXVR1hwxlmURRuz0qdM1As+SPJU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396837; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Dbdj6HgTGguF5IplV4C0Q1rVsN0q+sTc1ru5TAbjOSw=; b=e7Zd2yY8CjMN7sfLGn3S2WAgCfvaDNXOSGIAAtqAvKUxuXageGTujxmLpJpwbQTHINZivZrUtJ7uml+BY59yIWpk8WRtXERmZWvd3w+V37/3e9n609fJYgtontLK2DVM81Tnem2DAmOfUa0jjrWTMd0bNWq8cMTE1FiVCu2uXiI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75318+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396837090199.89033899286494; Tue, 18 May 2021 21:00:37 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id pwwXYY1788612xzAMPAbYa7X; Tue, 18 May 2021 21:00:36 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web11.6942.1621396828111152027 for ; Tue, 18 May 2021 21:00:28 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id D778620B7178; Tue, 18 May 2021 21:00:27 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com D778620B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Jeremy Soller Subject: [edk2-devel] [edk2-platforms][PATCH v2 12/35] KabylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Date: Tue, 18 May 2021 20:59:24 -0700 Message-Id: <20210519035947.1234-13-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: 1MHvIDe3tAp3kst9x3FAsQExx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396836; bh=oFh7/n7W6SuXZ4f0kiwrUPsNnqHXjFDPqfCtZnUXeWk=; h=Cc:Date:From:Reply-To:Subject:To; b=QMm188R98OlZhXrrCBesr4YecD1t14eVqGz8cQ/HZAo4vsydoOKbchqk9NKfGqng8C3 AWaxGnYN9Ua29kU23LeInE/w6k0zMIXYcBOYQDR/YnNX8NM6kDqeG8Wweligqh/OxgsD2 Vril8De46SAMIAjKf76voTYZkG22ukYW8CA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are declared in IntelSiliconPkg.dec. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Jeremy Soller Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf = | 4 +-- Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapInclude= .fdf | 4 +-- Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf = | 38 ++++++++++---------- Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMapInclu= de.fdf | 4 +-- Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf = | 38 ++++++++++---------- Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSilicon= PolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf | 4 +-- 6 files changed, 46 insertions(+), 46 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/Pl= atform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf index e5e40144a68a..6607ea6edfc3 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf @@ -36,8 +36,8 @@ [Packages] MinPlatformPkg/MinPlatformPkg.dec =20 [Pcd] - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSU= MES - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSU= MES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = ## CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = ## CONSUMES =20 [Sources] BiosInfo.c diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/Fla= shMapInclude.fdf b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/F= df/FlashMapInclude.fdf index 6cb6d54f558f..ce809a277b6e 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapIn= clude.fdf +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapIn= clude.fdf @@ -36,8 +36,8 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =3D 0x= 00140000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D 0x= 002E0000 # Flash addr (0xFFD00000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D 0x= 000B0000 # -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 00390000 # Flash addr (0xFFDB0000) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x= 000A0000 # +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 00390000 # Flash addr (0xFFDB0000) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x= 000A0000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D 0x= 00430000 # Flash addr (0xFFE50000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D 0x= 00060000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D 0x= 00490000 # Flash addr (0xFFEB0000) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fd= f b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf index bcd1ade72ba5..39432d21b8b5 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf @@ -29,8 +29,8 @@ [FD.GalagoPro3] # assigned with PCD values. Instead, it uses the definitions for its varie= ty, which # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS. # -BaseAddress =3D $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAdd= ress #The base address of the FLASH Device. -Size =3D $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdFlashAreaSize = #The size in bytes of the FLASH Device +BaseAddress =3D $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAr= eaBaseAddress #The base address of the FLASH Device. +Size =3D $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSi= ze #The size in bytes of the FLASH Device ErasePolarity =3D 1 BlockSize =3D $(FLASH_BLOCK_SIZE) NumBlocks =3D $(FLASH_NUM_BLOCKS) @@ -39,23 +39,23 @@ [FD.GalagoPro3] DEFINE SIPKG_PEI_BIN =3D INF =20 # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macr= o expression is not supported. -# So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase to= get the real CodeCache base address. +# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to = get the real CodeCache base address. SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =3D $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvPreMemoryOffset) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceGui= d.PcdFlashAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffs= et) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceGui= d.PcdFlashMicrocodeFvSize) -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgToke= nSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60 +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpac= eGuid.PcdFlashMicrocodeFvOffset) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gIntelSili= conPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60 SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D 0x60 -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvBase -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvOffset -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaBaseAddress -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaSize -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspTOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspMOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspSOffset) -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaBaseAddress -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosSize +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspTOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspMOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspSOffset) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosSize ##########################################################################= ###### # # Following are lists of FD Region layout which correspond to the location= s of different @@ -155,8 +155,8 @@ [FD.GalagoPro3] gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgToke= nSpaceGuid.PcdFlashFvPostMemorySize FV =3D FvPostMemory =20 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFla= shMicrocodeFvSize -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlash= MicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize #Microcode FV =3D FvMicrocode =20 diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/F= lashMapInclude.fdf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Inclu= de/Fdf/FlashMapInclude.fdf index b5e3f66ceafc..67649e867616 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMap= Include.fdf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Include/Fdf/FlashMap= Include.fdf @@ -34,8 +34,8 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =3D 0x= 001E0000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D 0x= 00370000 # Flash addr (0xFFB70000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D 0x= 00180000 # -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 004F0000 # Flash addr (0xFFCF0000) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x= 000A0000 # +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 004F0000 # Flash addr (0xFFCF0000) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x= 000A0000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D 0x= 00590000 # Flash addr (0xFFD90000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D 0x= 00060000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D 0x= 005F0000 # Flash addr (0xFFDF0000) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.= fdf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf index 6cdf4e2f9f1f..f003dda0ddfc 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf @@ -29,8 +29,8 @@ [FD.KabylakeRvp3] # assigned with PCD values. Instead, it uses the definitions for its varie= ty, which # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS. # -BaseAddress =3D $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAdd= ress #The base address of the FLASH Device. -Size =3D $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdFlashAreaSize = #The size in bytes of the FLASH Device +BaseAddress =3D $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAr= eaBaseAddress #The base address of the FLASH Device. +Size =3D $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSi= ze #The size in bytes of the FLASH Device ErasePolarity =3D 1 BlockSize =3D $(FLASH_BLOCK_SIZE) NumBlocks =3D $(FLASH_NUM_BLOCKS) @@ -39,23 +39,23 @@ [FD.KabylakeRvp3] DEFINE SIPKG_PEI_BIN =3D INF =20 # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macr= o expression is not supported. -# So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase to= get the real CodeCache base address. +# So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to = get the real CodeCache base address. SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =3D $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvPreMemoryOffset) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceGui= d.PcdFlashAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffs= et) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceGui= d.PcdFlashMicrocodeFvSize) -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgToke= nSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60 +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpac= eGuid.PcdFlashMicrocodeFvOffset) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gIntelSili= conPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60 SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D 0x60 -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvBase -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvOffset -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaBaseAddress -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaSize -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspTOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspMOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspSOffset) -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaBaseAddress -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgTok= enSpaceGuid.PcdFlashAreaSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosSize +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspTOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspMOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspSOffset) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosSize ##########################################################################= ###### # # Following are lists of FD Region layout which correspond to the location= s of different @@ -151,8 +151,8 @@ [FD.KabylakeRvp3] gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgToke= nSpaceGuid.PcdFlashFvPostMemorySize FV =3D FvPostMemory =20 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFla= shMicrocodeFvSize -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlash= MicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize #Microcode FV =3D FvMicrocode =20 diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Librar= y/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf b/Platform/Intel/= KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/= PeiSiliconPolicyUpdateLib.inf index 97ec70f611b1..8a99f7c59a49 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSi= liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSi= liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf @@ -52,8 +52,8 @@ [Guids] =20 [Pcd] gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize gKabylakeOpenBoardPkgTokenSpaceGuid.PcdGraphicsVbtGuid gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMrcRcompResistor ## CONSUMES gKabylakeOpenBoardPkgTokenSpaceGuid.PcdMrcRcompTarget ## CONSUMES --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75318): https://edk2.groups.io/g/devel/message/75318 Mute This Topic: https://groups.io/mt/82929220/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75319+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75319+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396835; cv=none; d=zohomail.com; s=zohoarc; b=mJWZoYbjGCLJb9CE1SbGZJi1PeOTlkTHLZpz3O4vQowfL+A6SUqKB3viUOgYN+DncsiKjuNueoowNaS4q3QRHqDLUsvX9LsOkXYRFZmJGUI6eY3A5QuBmH4NWPSkmWar/Qsxx7NnWBRMSQCeIgnhbrBwm0oOiG+6D/lQHI7vhos= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396835; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=CBSrdc02H0JxSbGS0gLTyYSnKGlsONgmLeUgTChejQ0=; b=jiNKtg3GdeVaT+SQAVO1q8OSyaiP9MwDP4N7otrmw3NGM+LsxJcBzZ3RMaoNzLCTVCziaIRnsKBEiOBK4dnLx9bGOjOo/tBaIyMMKit8w+u8ftcOyBxldoPw6mW3El9rRxOV7ptzWPZD1Tb3dVxsNQDT1fUJj+DM32H13f2zMms= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75319+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396835250858.5479266314695; Tue, 18 May 2021 21:00:35 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 7ieSYY1788612xmUwI4Wf4xk; Tue, 18 May 2021 21:00:29 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web10.6868.1621396829411388643 for ; Tue, 18 May 2021 21:00:29 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 2FBF020B8008; Tue, 18 May 2021 21:00:29 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 2FBF020B8008 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Agyeman Prince Subject: [edk2-devel] [edk2-platforms][PATCH v2 13/35] SimicsOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Date: Tue, 18 May 2021 20:59:25 -0700 Message-Id: <20210519035947.1234-14-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: 3Th4oWkE1D9LgOyXoXVKFsEYx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396829; bh=CBSrdc02H0JxSbGS0gLTyYSnKGlsONgmLeUgTChejQ0=; h=Cc:Date:From:Reply-To:Subject:To; b=HjmUuStEsvaDDAkYjzULj2U+qKtt6uP5wEfMvf+ed4NwOMx14/sGrUpuFgd3JMkfw8d W7y5k4fFurSVHbKFrtnoyO2lFuUkxYqMQI3uRrvdgJ5lOCNU3pzfldvLcVgu/6fzKYTxT fo5q1BXlf/fWUXaEQYbdFBr0nvcMly6US5I= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are declared in IntelSiliconPkg.dec. Cc: Agyeman Prince Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc | 8 += +++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.f= df.inc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.i= nc index 9c2436c3ad38..69a566307551 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc +++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc @@ -45,10 +45,10 @@ SET gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBase = =3D gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkingBase= + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize =3D 0x100= 00 =20 -SET gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress =3D 0xFFE00000 -SET gEfiPchTokenSpaceGuid.PcdFlashAreaSize =3D 0x00200000 +SET gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress =3D $(FW_BASE_AD= DRESS) +SET gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize =3D $(FW_SIZE) =20 -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gEfiPchToken= SpaceGuid.PcdFlashAreaBaseAddress -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gEfiPchTokenSpaceGu= id.PcdFlashAreaSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelSilico= nPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelSiliconPkgTok= enSpaceGuid.PcdBiosSize =20 DEFINE MEMFD_BASE_ADDRESS =3D 0x800000 --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75319): https://edk2.groups.io/g/devel/message/75319 Mute This Topic: https://groups.io/mt/82929221/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75320+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75320+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396837; cv=none; d=zohomail.com; s=zohoarc; b=l9KyN4DB99439VrHHPmKEUx26z336Eh5t6AEqDkj+hLDLmSwkQ54p6/b8zh4ST50vqwXC2WwQs30qlulatKBD+8g9Wdw1B2XVVMXxCvtv6N3ND1hUdEbMVxBb00vAAbMIl07tuL9LuSFKvG2M0+LnzUh8fZPHOYhUBnx2UpJ3mk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396837; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=oTx9pwIlGSoO39kQF2wj6TQEGckFweVOUKH2CLQ4zW8=; b=kXW51z5ooJZ9ZBt6h8TRHKwpjED0a2YiTY2bRcGIEP41KTVwU+HX8RR7sgaZfLJY+Vg+UwO8K1HiTPCeeab/3v5wr1++sB12WvEOZdhUdVpozGd3pfvhVASZlQRL+kGKCA0ySRTZn94ObCaAdeGUjUlv1mpCVw6ZMF5xoOgk/ZU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75320+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396837957952.9350540682509; Tue, 18 May 2021 21:00:37 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id JCNjYY1788612x0MWP0GaDM8; Tue, 18 May 2021 21:00:37 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web12.6909.1621396830666424428 for ; Tue, 18 May 2021 21:00:30 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 6BC6420B8008; Tue, 18 May 2021 21:00:30 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 6BC6420B8008 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Sai Chaganty , Nate DeSimone , Heng Luo Subject: [edk2-devel] [edk2-platforms][PATCH v2 14/35] TigerlakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Date: Tue, 18 May 2021 20:59:26 -0700 Message-Id: <20210519035947.1234-15-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: bYN41Ut10j7Y7OFTSJIHLmCwx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396837; bh=pI0S54sdxIy5K6yOUKAcXYv9q/g7DrXowSoHY7ZzL8U=; h=Cc:Date:From:Reply-To:Subject:To; b=NiDLYIp2Jg8mzID1ac1ea51ipfzbHCuXAf15FgzrOtgViVy5uq2ATc0UWTXEfYx043j pGCPgT378ZcRSorkxQjuTLQaYfEO8970m2TfI7u20Y2DS/O655H3Mq0smfGDZeCpNFRKn hIcO44oDqMmIkkovqcf3SS0XkZqoF6CKSq0= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are declared in IntelSiliconPkg.dec. Cc: Sai Chaganty Cc: Nate DeSimone Cc: Heng Luo Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf = | 8 ++--- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInc= lude.fdf | 4 +-- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf = | 38 ++++++++++---------- 3 files changed, 25 insertions(+), 25 deletions(-) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/P= latform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf index 66c8814c97bb..56da991ab544 100644 --- a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf +++ b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf @@ -39,8 +39,8 @@ [Packages] BoardModulePkg/BoardModulePkg.dec =20 [Pcd] - gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSU= MES - gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSU= MES + gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSU= MES + gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSU= MES gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSU= MES gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSU= MES gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase ## CONSU= MES @@ -61,8 +61,8 @@ [Pcd] gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize ## CONSU= MES gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase ## CONSU= MES gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize ## CONSU= MES - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSU= MES - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSU= MES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSU= MES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSU= MES gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase ## CONSU= MES gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize ## CONSU= MES gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase ## CONSU= MES diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf= /FlashMapInclude.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/I= nclude/Fdf/FlashMapInclude.fdf index b21ae6401f12..24e2a963ba64 100644 --- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashM= apInclude.fdf +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashM= apInclude.fdf @@ -37,8 +37,8 @@ ## Build script checks the requirement. SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset =3D = 0x00800000 # Flash addr (0xFFC00000) SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize =3D = 0x00080000 # Keep 0x80000 or larger -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D = 0x00880000 # Flash addr (0xFFC80000) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D = 0x00070000 # Keep 0x70000 or larger, change MicrocodeFv.fdf in case that t= his value change +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D = 0x00880000 # Flash addr (0xFFC80000) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D = 0x00070000 # Keep 0x70000 or larger, change MicrocodeFv.fdf in case that t= his value change SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D = 0x008F0000 # Flash addr (0xFFC00000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D = 0x00080000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D = 0x00970000 # Flash addr (0xFFD70000) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPk= g.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf index c1fd2be6af54..e3b2f048524c 100644 --- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf @@ -29,8 +29,8 @@ [FD.TigerlakeURvp] # assigned with PCD values. Instead, it uses the definitions for its varie= ty, which # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS. # -BaseAddress =3D $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddr= ess #The base address of the FLASH Device. -Size =3D $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize = #The size in bytes of the FLASH Device +BaseAddress =3D $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAr= eaBaseAddress #The base address of the FLASH Device. +Size =3D $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSi= ze #The size in bytes of the FLASH Device ErasePolarity =3D 1 BlockSize =3D $(FLASH_BLOCK_SIZE) NumBlocks =3D $(FLASH_NUM_BLOCKS) @@ -41,23 +41,23 @@ [FD.TigerlakeURvp] # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macr= o expression is not supported. # So, PlatformSecLib uses PcdFlashAreaBaseAddress + PcdNemCodeCacheBase to= get the real CodeCache base address. SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =3D $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvPreMemoryOffset) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceGui= d.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffse= t) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpac= eGuid.PcdFlashMicrocodeFvOffset) SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset =3D 0x1000 -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceGui= d.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffse= t) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceGui= d.PcdFlashMicrocodeFvSize) -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgToke= nSpaceGuid.PcdFlashMicrocodeFvBase) + $(gSiPkgTokenSpaceGuid.PcdFlashMicroc= odeOffset) -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize) - $(gSiPkgTokenSpaceGuid.PcdFlashMic= rocodeOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgTok= enSpaceGuid.PcdBiosAreaBaseAddress -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgTok= enSpaceGuid.PcdBiosSize -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPkgTokenSp= aceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashF= vFspTOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPkgTokenSp= aceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashF= vFspMOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPkgTokenSp= aceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashF= vFspSOffset) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpac= eGuid.PcdFlashMicrocodeFvOffset) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gIntelSili= conPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + $(gSiPkgTokenSpaceGuid.PcdF= lashMicrocodeOffset) +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - $(gSiPkgTokenSpaceGuid.P= cdFlashMicrocodeOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosSize +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gIntelSilicon= PkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid= .PcdFlashFvFspTOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gIntelSilicon= PkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid= .PcdFlashFvFspMOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gIntelSilicon= PkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid= .PcdFlashFvFspSOffset) SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeOffset -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvBase -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvOffset -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgTok= enSpaceGuid.PcdBiosAreaBaseAddress -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgTok= enSpaceGuid.PcdBiosSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosSize ##########################################################################= ###### # # Following are lists of FD Region layout which correspond to the location= s of different @@ -153,8 +153,8 @@ [FD.TigerlakeURvp] gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesBase|gBoardModuleToke= nSpaceGuid.PcdFlashFvFirmwareBinariesSize FV =3D FvFwBinaries =20 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFla= shMicrocodeFvSize -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlash= MicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize #Microcode FV =3D FvMicrocode =20 --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75320): https://edk2.groups.io/g/devel/message/75320 Mute This Topic: https://groups.io/mt/82929222/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75321+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75321+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396836; cv=none; d=zohomail.com; s=zohoarc; b=bjKNnV/Sfjh07mFzs0/30JPbadKm5ILKgPSC08I9CDpkNZhR6VKSmktQOWsnM09ySms1nY0lPLm3SwXGYFjZPQMIw5yk3s4Wkv7B4f7Kf+/RFxWuHTaXLRtdLJsFgk2i38qQx5JX9KZ5ZNp6mIKK4VdsdbD5ybYzWu8lGp2hKlE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396836; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=fM7nyNPIADc8mrxrhzd0RwYpejdx28AWgvE1/rMMPy0=; b=d8HaI+qj+VlNWtlImr2JQYOu0zMoZsIa2cZq4ECiXOHyG8V22Vy/5Orq2e6hCYNvmLq1LsLa5SGJ2HWhpdMweZCzEZ/5kF8wZsLsFGwLqkGyxLOG1Lt1rX7LHIE0JWWOFGdgL2NPQg4x2WWMp1ZVnxWkeNO8Ai54yZXMD5ATX38= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75321+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396836146716.2403055776618; Tue, 18 May 2021 21:00:36 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id SGezYY1788612xVrgc439els; Tue, 18 May 2021 21:00:35 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web08.6918.1621396832052356848 for ; Tue, 18 May 2021 21:00:32 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id B5FEA20B8008; Tue, 18 May 2021 21:00:31 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com B5FEA20B8008 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone Subject: [edk2-devel] [edk2-platforms][PATCH v2 15/35] WhiskeylakeOpenBoardPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Date: Tue, 18 May 2021 20:59:27 -0700 Message-Id: <20210519035947.1234-16-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: q42PbdsULh2iFlsed1KsAQhzx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396835; bh=IRkIj76Gu4iLxXnGfsMM1TwQ5bBycD7OP9U3NRGIH4E=; h=Cc:Date:From:Reply-To:Subject:To; b=WijVXsFw2VTEYv0BWb03x/9FP+EIchegCIOBaSXhASVwHV5N8qyaQx3KleHJe/M/8hH 80/SzEULaiM2Z+6QuXhtkgQwP+J+MhJG8TSzpAHEaC8L/3B/KCY/fiksbZwT66XSyEo6k sFcJUd0K5g2PR8vsGQp0PJ04gf7XmG246rA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are declared in IntelSiliconPkg.dec. Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf = | 4 +-- Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyInitDxe.= inf | 4 +-- Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclud= e.fdf | 4 +-- Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/PeiMu= ltiBoardInitPreMemLib.inf | 2 +- Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf = | 36 ++++++++++---------- Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/FlashMa= pInclude.fdf | 4 +-- Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf = | 36 ++++++++++---------- 7 files changed, 45 insertions(+), 45 deletions(-) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf b= /Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf index a9687d93dee1..0a807ad84f4d 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf @@ -36,8 +36,8 @@ [Packages] MinPlatformPkg/MinPlatformPkg.dec =20 [Pcd] - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ## CONSU= MES - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ## CONSU= MES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase = ## CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = ## CONSUMES =20 [Sources] BiosInfo.c diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/Po= licyInitDxe.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitD= xe/PolicyInitDxe.inf index 3233375d6568..537d507ed7d6 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyIni= tDxe.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/PolicyInitDxe/PolicyIni= tDxe.inf @@ -47,8 +47,8 @@ [Packages] =20 [Pcd] gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ##= CONSUMES - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ##= CONSUMES - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ##= CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase ##= CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize ##= CONSUMES gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdIntelGopEnable gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPlatformFlavor gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPlatformType diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/Fl= ashMapInclude.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include= /Fdf/FlashMapInclude.fdf index f7aa730ae7d2..5895eebc5a79 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapI= nclude.fdf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapI= nclude.fdf @@ -38,8 +38,8 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D 0x= 00170000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D 0x= 00490000 # Flash addr (0xFFDE0000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D 0x= 00070000 # -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 00500000 # Flash addr (0xFFE50000) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x= 00050000 # +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 00500000 # Flash addr (0xFFE50000) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x= 00050000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D 0x= 00550000 # Flash addr (0xFFEA0000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize =3D 0x= 000EA000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset =3D 0x= 0063A000 # Flash addr (0xFFF8A000) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardI= nitLib/PeiMultiBoardInitPreMemLib.inf b/Platform/Intel/WhiskeylakeOpenBoard= Pkg/UpXtreme/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf index 2903bdacaebd..091d2118c7b3 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/= PeiMultiBoardInitPreMemLib.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Library/BoardInitLib/= PeiMultiBoardInitPreMemLib.inf @@ -293,7 +293,7 @@ [Pcd] gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize - gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize + gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =20 [FixedPcd] gSiPkgTokenSpaceGuid.PcdMchBaseAddress ## CONSUMES diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.f= df b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf index 22fbfc99f0f0..8aea5aa475a0 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf @@ -31,8 +31,8 @@ [FD.UpXtreme] # assigned with PCD values. Instead, it uses the definitions for its varie= ty, which # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS. # -BaseAddress =3D $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddr= ess #The base address of the FLASH Device. -Size =3D $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize = #The size in bytes of the FLASH Device +BaseAddress =3D $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAr= eaBaseAddress #The base address of the FLASH Device. +Size =3D $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSi= ze #The size in bytes of the FLASH Device ErasePolarity =3D 1 BlockSize =3D $(FLASH_BLOCK_SIZE) NumBlocks =3D $(FLASH_NUM_BLOCKS) @@ -43,21 +43,21 @@ [FD.UpXtreme] # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macr= o expression is not supported. # So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to = get the real CodeCache base address. SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =3D $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvPreMemoryOffset) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceGui= d.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffse= t) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceGui= d.PcdFlashMicrocodeFvSize) -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgToke= nSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60 +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpac= eGuid.PcdFlashMicrocodeFvOffset) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gIntelSili= conPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60 SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D 0x60 -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvBase -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvOffset -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgTok= enSpaceGuid.PcdBiosAreaBaseAddress -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgTok= enSpaceGuid.PcdBiosSize -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pcd= FlashFvFspTOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pcd= FlashFvFspMOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pcd= FlashFvFspSOffset) -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgTok= enSpaceGuid.PcdBiosAreaBaseAddress -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgTok= enSpaceGuid.PcdBiosSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosSize +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspTOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspMOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspSOffset) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosSize ##########################################################################= ###### # # Following are lists of FD Region layout which correspond to the location= s of different @@ -158,8 +158,8 @@ [FD.UpXtreme] # FSP_S Section FILE =3D $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_S.fd =20 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFla= shMicrocodeFvSize -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlash= MicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize #Microcode FV =3D FvMicrocode =20 diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include= /Fdf/FlashMapInclude.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/Whiskeyla= keURvp/Include/Fdf/FlashMapInclude.fdf index e0db38194211..586e3488c2a7 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/Fl= ashMapInclude.fdf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Include/Fdf/Fl= ashMapInclude.fdf @@ -34,8 +34,8 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =3D 0x= 00190000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D 0x= 00320000 # Flash addr (0xFFB20000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D 0x= 00170000 # -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 00490000 # Flash addr (0xFFC90000) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x= 000B0000 # +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 00490000 # Flash addr (0xFFC90000) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x= 000B0000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D 0x= 00540000 # Flash addr (0xFFD40000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D 0x= 00070000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D 0x= 005B0000 # Flash addr (0xFFDB0000) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoa= rdPkg.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoar= dPkg.fdf index 1ab8c137924e..f0601984338c 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.f= df +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.f= df @@ -31,8 +31,8 @@ [FD.WhiskeylakeURvp] # assigned with PCD values. Instead, it uses the definitions for its varie= ty, which # are FLASH_BASE, FLASH_SIZE, FLASH_BLOCK_SIZE and FLASH_NUM_BLOCKS. # -BaseAddress =3D $(FLASH_BASE) | gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddr= ess #The base address of the FLASH Device. -Size =3D $(FLASH_SIZE) | gSiPkgTokenSpaceGuid.PcdBiosSize = #The size in bytes of the FLASH Device +BaseAddress =3D $(FLASH_BASE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosAr= eaBaseAddress #The base address of the FLASH Device. +Size =3D $(FLASH_SIZE) | gIntelSiliconPkgTokenSpaceGuid.PcdBiosSi= ze #The size in bytes of the FLASH Device ErasePolarity =3D 1 BlockSize =3D $(FLASH_BLOCK_SIZE) NumBlocks =3D $(FLASH_NUM_BLOCKS) @@ -43,21 +43,21 @@ [FD.WhiskeylakeURvp] # Set FLASH_REGION_FV_RECOVERY_OFFSET to PcdNemCodeCacheBase, because macr= o expression is not supported. # So, PlatformSecLib uses PcdBiosAreaBaseAddress + PcdNemCodeCacheBase to = get the real CodeCache base address. SET gSiPkgTokenSpaceGuid.PcdNemCodeCacheBase =3D $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvPreMemoryOffset) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gSiPkgTokenSpaceGui= d.PcdBiosAreaBaseAddress) + $(gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffse= t) -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gSiPkgTokenSpaceGui= d.PcdFlashMicrocodeFvSize) -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gSiPkgToke= nSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 -SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gSiPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60 +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gIntelSiliconPkgTokenSpac= eGuid.PcdFlashMicrocodeFvOffset) +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D $(gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress =3D $(gIntelSili= conPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase) + 0x60 +SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize) - 0x60 SET gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv =3D 0x60 -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvBase -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgTok= enSpaceGuid.PcdFlashMicrocodeFvOffset -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgTok= enSpaceGuid.PcdBiosAreaBaseAddress -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgTok= enSpaceGuid.PcdBiosSize -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pcd= FlashFvFspTOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pcd= FlashFvFspMOffset) -SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPkgT= okenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pcd= FlashFvFspSOffset) -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgTok= enSpaceGuid.PcdBiosAreaBaseAddress -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgTok= enSpaceGuid.PcdBiosSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gIntelSil= iconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosSize +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspTOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspMOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gIntelS= iliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpa= ceGuid.PcdFlashFvFspSOffset) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gIntelSil= iconPkgTokenSpaceGuid.PcdBiosSize ##########################################################################= ###### # # Following are lists of FD Region layout which correspond to the location= s of different @@ -153,8 +153,8 @@ [FD.WhiskeylakeURvp] gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|gMinPlatformPkgToke= nSpaceGuid.PcdFlashFvPostMemorySize FV =3D FvPostMemory =20 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gSiPkgTokenSpaceGuid.PcdFla= shMicrocodeFvSize -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gSiPkgTokenSpaceGuid.PcdFlash= MicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|gIntelSiliconPkgT= okenSpaceGuid.PcdFlashMicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|gIntelSiliconPkgTok= enSpaceGuid.PcdFlashMicrocodeFvSize #Microcode FV =3D FvMicrocode =20 --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75321): https://edk2.groups.io/g/devel/message/75321 Mute This Topic: https://groups.io/mt/82929224/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75322+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75322+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396836; cv=none; d=zohomail.com; s=zohoarc; b=N1wnB2PykwZ80IaGadn7/YEhDc7+iMR7qjXWcF+OSWubhf1bf4LZH8+vxBQYMBb+O+GFN/iIdSBddO82pNppFxNDOUIvtCgzcPO+JKzD+8e31KxyGkkkbvtTgur2rmwr9xIbH97sk5ZVSQBAnwYWfvjZ7iuTnC/dCXmfopPpJ0k= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396836; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Cs4SkkWh3/PzLE5UDLzm1CUR74PIHK0Ky8dHw6IXBxQ=; b=d7IKdg4t3DVwxJpcfmo/5PfGlOmNvsRx5V74GdEVIzKapDOJL0wDSYU9IduvQv2wwuDMFeeL7+rNCjFDoe0jI7ak1s71quHznsIK2CgJriwjr3hIXgxuOIneR++A6neGfMhJAKPfGgGsrTNbKQ/D2DBpXwrPZa2jOWNUxDMHrHw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75322+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396836618490.9654030845371; Tue, 18 May 2021 21:00:36 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id zii1YY1788612xxBEBeJkRPx; Tue, 18 May 2021 21:00:36 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web08.6919.1621396833308477565 for ; Tue, 18 May 2021 21:00:33 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 15E2E20B7178; Tue, 18 May 2021 21:00:33 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 15E2E20B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Sai Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 16/35] CoffeelakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Date: Tue, 18 May 2021 20:59:28 -0700 Message-Id: <20210519035947.1234-17-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: eqnl7AVUjLiKP6Y10ARZZZJWx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396836; bh=CJ5sZb4Fz6ATl7ldbV/h7Xxvkdo6RiK+KGw8IH1Y/D4=; h=Cc:Date:From:Reply-To:Subject:To; b=oJc5jDZYeB9+KPu1q6z9XwGNU+QCs5K9QPuub+2jdlkKr/ObKI92kOPJFBbZaZHW209 VSBWRXsmDN72kxGadctnFZ35Dcnc9Srd9+6pABO7D0LYzriyJwsgH6uraCTvekRlr6mxi EuRQgeVt7ntSy5cqFX65UAN89/l6JMYMbQA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are declared in IntelSiliconPkg.dec. The previous PCDs are removed from CoffeelakeSiliconPkg.dec. Cc: Chasel Chiu Cc: Sai Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolic= yLib.inf | 4 ++-- Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec = | 5 ----- 2 files changed, 2 insertions(+), 7 deletions(-) diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib= /PeiCpuPolicyLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCp= uPolicyLib/PeiCpuPolicyLib.inf index f793432bf049..ca57b5b31e0a 100644 --- a/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpu= PolicyLib.inf +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpu= PolicyLib.inf @@ -48,8 +48,8 @@ [Ppis] gSiPreMemPolicyPpiGuid ## CONSUMES =20 [FixedPcd] -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =20 [Pcd] gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode ## Produces diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec b/Silicon/Intel/C= offeelakeSiliconPkg/SiPkg.dec index 6cf894498d6b..5ea6fbb28411 100644 --- a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec +++ b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec @@ -474,13 +474,8 @@ [PcdsFixedAtBuild] ## NOTE: The size restriction may be changed in next generation processor. ## Please refer to Processor BWG for detail. ## -gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF800000|UINT32|0x10000001 -gSiPkgTokenSpaceGuid.PcdBiosSize|0x00800000|UINT32|0x10000002 gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef00000|UINT32|0x00010028 gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x30000004 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x30000005 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x30000006 =20 ## ## PcdEfiGcdAllocateType is using for EFI_GCD_ALLOCATE_TYPE selection --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75322): https://edk2.groups.io/g/devel/message/75322 Mute This Topic: https://groups.io/mt/82929225/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75323+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75323+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396837; cv=none; d=zohomail.com; s=zohoarc; b=H+vwOF8teYRQarm5yXSoHu0uQklVtuQdbwiIfjyEXvC08xlkct+xwepMg8RcLK2kTyfUnzV7xgEwVo77TnWgTwdEx0O+lw1wtiXaimZuXY8eOHEGeVImV4RoHudV29JWZF/tYmHzg2a6mV495KI3KCO0XPomsTNWIIUpOFpKOwA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396837; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=OIiV8q07SPH6omFp+EiNiEQ22ZzlPGRM2nTQgUwzpXc=; b=A/t2MKoIZYg/Hmy+YWYM54YYr9I0AQ0+8SP3qBCiNC+qiawnzlRxWEKnqo9VxEkEXftaBJK/O8eMeGsugEbDpc8iDp+8ciApjzcupbjqAY3sHZrl5lODdMuCrvKyvPF39ANobcrxeU6FNbpY5du2QwcDO4SYTRKQYYAwZcKoWT4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75323+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396837495387.67668519736173; Tue, 18 May 2021 21:00:37 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id NU7CYY1788612xssdYZSAfKS; Tue, 18 May 2021 21:00:37 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web09.6896.1621396834537420892 for ; Tue, 18 May 2021 21:00:34 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 4C9D520B7178; Tue, 18 May 2021 21:00:34 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 4C9D520B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Sai Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 17/35] KabylakeSiliconPkg: Use IntelSiliconPkg BIOS area and ucode PCDs Date: Tue, 18 May 2021 20:59:29 -0700 Message-Id: <20210519035947.1234-18-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: hxwr8OdPBNxU9nVGw9rvPH0px1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396837; bh=zB6lBE4W+LeQlxjZmytNfBIXESfFsTC6tFuv5ZXe7RU=; h=Cc:Date:From:Reply-To:Subject:To; b=X/oFM5Un3Udbew98Y+gq6xLwU9m0iF7VYA2IC3oxsDjBqJR81lejpcZzAAJOZMRth9u DODVapxxKtLf9m8Q4ZmuwEiwW5cK7P6MYPtyY7fDe77AFFji/GBB884hA0mUcxXFIpyhc xJ3X05Z8aRTRhgBvISiTGhhR8VlqTDf0FO4= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are declared in IntelSiliconPkg.dec. Cc: Chasel Chiu Cc: Sai Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPolicyL= ib.inf | 4 ++-- Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec = | 10 +++------- 2 files changed, 5 insertions(+), 9 deletions(-) diff --git a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/P= eiCpuPolicyLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPol= icyLib/PeiCpuPolicyLib.inf index d3b4d9e318b8..3ca373a23c0a 100644 --- a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPo= licyLib.inf +++ b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiCpuPolicyLib/PeiCpuPo= licyLib.inf @@ -45,8 +45,8 @@ [Ppis] gSiPolicyPpiGuid ## CONSUMES =20 [FixedPcd] -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase +gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =20 [Pcd] gSiPkgTokenSpaceGuid.PcdSmmbaseSwSmi diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec b/Silicon/Intel/Kab= ylakeSiliconPkg/SiPkg.dec index 3881671757a3..5ff7b39ca60e 100644 --- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec +++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec @@ -63,7 +63,7 @@ [Guids] gEfiCapsuleVendorGuid =3D {0x711c703f, 0xc285, 0x4b10, {0xa3, 0x= b0, 0x36, 0xec, 0xbd, 0x3c, 0x8b, 0xe2}} gEfiConsoleOutDeviceGuid =3D {0xd3b36f2c, 0xd551, 0x11d4, {0x9a, 0x= 46, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}} ## -##=20 +## ## gSmbiosProcessorInfoHobGuid =3D {0xe6d73d92, 0xff56, 0x4146, {0xaf, 0xac,= 0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71}} gSmbiosCacheInfoHobGuid =3D {0xd805b74e, 0x1460, 0x4755, {0xbb, 0x36,= 0x1e, 0x8c, 0x8a, 0xd6, 0x78, 0xd7}} @@ -264,7 +264,7 @@ [Protocols] ## gEfiSmmVariableProtocolGuid =3D {0xed32d533, 0x99e6, 0x4209, {0x9c, 0xc0= , 0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7}} ## -##=20 +## ## gSmbiosProcessorInfoHobGuid =3D {0xe6d73d92, 0xff56, 0x4146, {0xaf= , 0xac, 0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71}} =20 @@ -453,13 +453,9 @@ [PcdsFixedAtBuild] ## NOTE: The size restriction may be changed in next generation processor. ## Please refer to Processor BWG for detail. ## -gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001 -gSiPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002 gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef00000|UINT32|0x00010028 gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x30000004 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x30000005 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x30000006 + ## ## PcdEfiGcdAllocateType is using for EFI_GCD_ALLOCATE_TYPE selection ## value of the struct --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75323): https://edk2.groups.io/g/devel/message/75323 Mute This Topic: https://groups.io/mt/82929226/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75324+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75324+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396841; cv=none; d=zohomail.com; s=zohoarc; b=ZU30R0f9MC9wZUFEOAEzwUdZw1c4lKZCn0qnb2JfMPvsKN51Y/Su6yOF/kLULe+hhSmSd7DeM+sxQ+yFpBA/Ho+HGa0okfeysW3DKDmSny8N+Uv6Iq2F86/1VwBj054odldW/DNFWPq8dhgRXVnBmb6Ei6RT5htuYUzL1fvEe8I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396841; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=jEl/0Ar01LMK6SQKtcPeIaIDUqxvbVnf/ONyuFG4MJs=; b=URyjwmRQo2LQDZS+ftjUfcuix5wV8QzV9nYHkpO2dbHt7Fbtotln5B4IwXfErXqVP13zqA5NLISKYM9pmyTzHVRBNHNNN1gM/r6LPe0bRDV1ZAwEsE6+x36dUs9C3XiBkJvClSwFtiqq88GF97clb+FRWFOMjbUJ4az3+CV/ThU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75324+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396841533778.6675289924463; Tue, 18 May 2021 21:00:41 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 9c8tYY1788612xjHchHdHhZI; Tue, 18 May 2021 21:00:41 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web08.6921.1621396835735610198 for ; Tue, 18 May 2021 21:00:35 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 7DB1D20B7178; Tue, 18 May 2021 21:00:35 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 7DB1D20B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Agyeman Prince Subject: [edk2-devel] [edk2-platforms][PATCH v2 18/35] SimicsIch10Pkg: Use IntelSiliconPkg BIOS area and ucode PCDs Date: Tue, 18 May 2021 20:59:30 -0700 Message-Id: <20210519035947.1234-19-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: EtFwTYGS6y1JMQwNpQMHZO4gx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396841; bh=9UU1zlPziNHM7UR7E6EjafyQrqB6os56/6GZGGtgwAU=; h=Cc:Date:From:Reply-To:Subject:To; b=eK0UCD43kUzILAXrAOWjDqte9G1lQezkgXiaCm+lkprQTBT0UyDmL0BN9qF4H/xSbns 15yAwQ4GUJRhm/IcYqjo2JzojUzpahsnuZedEOwRGyqqelERgq3vaS/r/SItp1GG6ZzI/ K18N/ZxsJSnMGb+I4Bq1lWWahocps2TsBmU= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates PCDs to use the IntelSiliconPkg PCD tokenspace now that the PCDs are declared in IntelSiliconPkg.dec. The previous PCDs are removed from Ich10Pkg.dec. Cc: Agyeman Prince Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.= c | 2 +- Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec = | 6 ------ Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpi= CommonLib.inf | 5 +++-- 3 files changed, 4 insertions(+), 9 deletions(-) diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLi= b/SpiCommon.c b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommo= nLib/SpiCommon.c index 3e7dffedfbe9..f2907ef53bfc 100644 --- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCo= mmon.c +++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCo= mmon.c @@ -69,7 +69,7 @@ SpiProtocolConstructor ( SpiInstance->WritePermissi= on)); =20 // - SpiInstance->TotalFlashSize =3D PcdGet32(PcdFlashAreaSize); + SpiInstance->TotalFlashSize =3D PcdGet32 (PcdBiosSize); DEBUG ((DEBUG_INFO, "Total Flash Size : %0x\n", SpiInstance->TotalFlashS= ize)); return EFI_SUCCESS; } diff --git a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec b/Silicon/Intel/Simi= csIch10Pkg/Ich10Pkg.dec index 0eb2e5530c3a..8d395a8b4370 100644 --- a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec +++ b/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec @@ -16,11 +16,5 @@ [Includes] =20 [Ppis] =20 -[Guids] - gEfiPchTokenSpaceGuid =3D { 0x89a1b278, 0xa1a1, 0x4df7, { 0xb1, 0x37, 0x= de, 0x5a, 0xd7, 0xc4, 0x79, 0x13 } } [Protocols] gEfiSmmSpiProtocolGuid =3D {0xbd75fe35, 0xfdce, 0x49d7, {0xa9, 0xdd, 0xb= 2, 0x6f, 0x1f, 0xc6, 0xb4, 0x37}} - -[PcdsFixedAtBuild] - gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFFE00000|UINT32|0x100000= 01 - gEfiPchTokenSpaceGuid.PcdFlashAreaSize|0x00200000|UINT32|0x10000002 \ No newline at end of file diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLi= b/BasePchSpiCommonLib.inf b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/Bas= ePchSpiCommonLib/BasePchSpiCommonLib.inf index df1da274a642..b5aa13c1c56d 100644 --- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BaseP= chSpiCommonLib.inf +++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BaseP= chSpiCommonLib.inf @@ -20,6 +20,7 @@ [Sources] =20 [Packages] MdePkg/MdePkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec SimicsIch10Pkg/Ich10Pkg.dec =20 [LibraryClasses] @@ -27,5 +28,5 @@ [LibraryClasses] DebugLib =20 [Pcd] - gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES - gEfiPchTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES + gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75324): https://edk2.groups.io/g/devel/message/75324 Mute This Topic: https://groups.io/mt/82929227/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75325+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75325+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396842; cv=none; d=zohomail.com; s=zohoarc; b=UzBb1eipTfH8AKc91YVZ6ccJWC4bHv91AxyEX0iqsATKI/z6inW1YDT3zsYt096uvtMuGaFuTa0XQ7SG6NglPn5nozlatFPIrb6NubQ2Sl7BfvP+yRpccQDEbCskpb5x8DqMszuskb3nlwUgpr1Gi7Kbqb687RFMo+tYl6fsGCY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396842; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=cYAUH0Ut4CcOH9vcDDtd6Bo4FVa0X1wbq0v7/FNJfWk=; b=YJvGOf3tXz//OtgrBGmH0L7+QUvZgiCZ0WCNCZq1BUDpkr9N/wkAAglR5BiJIZNVJ75BqAQJhIR+Qbtv47JmXtYmpMbUx/bW0wHCsLOd+UnxmqKZ+e9u8n+pqVFiAtcua62PbZQI0E20Pt/ZbK2tfWfuNPfzTtT7aI3a9ssrxwc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75325+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396842863718.1748152852854; Tue, 18 May 2021 21:00:42 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 5w99YY1788612xYwQSwGEXYW; Tue, 18 May 2021 21:00:42 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web10.6871.1621396836995089647 for ; Tue, 18 May 2021 21:00:37 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id B9EB520B7178; Tue, 18 May 2021 21:00:36 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com B9EB520B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Sai Chaganty , Nate DeSimone , Heng Luo Subject: [edk2-devel] [edk2-platforms][PATCH v2 19/35] TigerlakeSiliconPkg: Use IntelSiliconPkg BIOS are and ucode PCDs Date: Tue, 18 May 2021 20:59:31 -0700 Message-Id: <20210519035947.1234-20-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: vPrIXQYBTFBpkG1f3zY3C4eFx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396842; bh=cYAUH0Ut4CcOH9vcDDtd6Bo4FVa0X1wbq0v7/FNJfWk=; h=Cc:Date:From:Reply-To:Subject:To; b=DqH0XpDtvR+iIvXpkCfRMEl922/e484dK/KmbmMY2RSNVfG2GTODrdAdNEamjTJLk8f hm88B83rXW7Kwz/inG40J6+nmxjhzBOIm/qxAje0rNudJ5Ijbyy9WvWg3WEM/M0mHNdt5 xOkPaKHGb2gQRWjXf1+zp1aCEhVam3cUakU= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Removes the PCDs from SiPkg.dec since they are defined in IntelSiliconPkg.dec. Cc: Sai Chaganty Cc: Nate DeSimone Cc: Heng Luo Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec | 5 ----- 1 file changed, 5 deletions(-) diff --git a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec b/Silicon/Intel/Ti= gerlakeSiliconPkg/SiPkg.dec index 0c0f2db1048d..37f61cc5ee18 100644 --- a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec +++ b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec @@ -837,15 +837,10 @@ [PcdsFixedAtBuild] ## NOTE: The size restriction may be changed in next generation processor. ## Please refer to Processor BWG for detail. ## -gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress|0xFF800000|UINT32|0x10000001 -gSiPkgTokenSpaceGuid.PcdBiosSize|0x00800000|UINT32|0x10000002 gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xfef00000|UINT32|0x00010028 gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x00010029 gSiPkgTokenSpaceGuid.PcdTopMemoryCacheSize|0x0|UINT32|0x0001002A -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase|0xFFE60000|UINT32|0x30000004 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize|0x000A0000|UINT32|0x30000005 gSiPkgTokenSpaceGuid.PcdFlashMicrocodeOffset|0x00000060|UINT32|0x30000013 -gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset|0x00660000|UINT32|0x30000006 ## ## The CPU Trace Hub's BARs base and size ## --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75325): https://edk2.groups.io/g/devel/message/75325 Mute This Topic: https://groups.io/mt/82929228/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75326+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75326+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396844; cv=none; d=zohomail.com; s=zohoarc; b=DG0+CAxTcxCIS+UuWd+2zzTjiY34HKrsvrkH6cZ4LkefqDcNxkx0NurR/3jctA34gPYMYdpAnsEyG4B06fhA/SQzCANPZKLv0HwpN/Go/IiaYilqWrgCvod2cOr3JDU/qclHDnQT/sMyg4idoAmzQW60Es8rM+ZAIDOYcv/p/Fw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396844; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=qI2osCWp7wYalSTpuUc8K2Lis8V96U/DMrCRGvUH6hQ=; b=FlGCUX6IXkKHpdh5NXpRo7Ri+1xnDkW9CjJMQqtr0kA0iJtgV6rY/tIO5TFGZBOJbi1NIZLQt79QvWigOrPXiqMDHtc+RLuQtTe0icjp0HuU/O7vYvWnh5X20vOidrMgRiu/NVey/hfmk367F8oYd7FGzFc5NSJ89XPiVmF/FRs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75326+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396844100211.27803386981032; Tue, 18 May 2021 21:00:44 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id riwDYY1788612xDSIFCARp5c; Tue, 18 May 2021 21:00:43 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web12.6911.1621396838204019506 for ; Tue, 18 May 2021 21:00:38 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id EB02D20B7178; Tue, 18 May 2021 21:00:37 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com EB02D20B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Rangasai V Chaganty , Deepika Kethi Reddy , Kathappan Esakkithevar Subject: [edk2-devel] [edk2-platforms][PATCH v2 20/35] CometlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Date: Tue, 18 May 2021 20:59:32 -0700 Message-Id: <20210519035947.1234-21-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: r1fKIkzdTGSkI0dRUUXXEABgx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396843; bh=Q6t/wfoTreI3WFU87p43/18LotPXV76eKnPVBqDk8eo=; h=Cc:Date:From:Reply-To:Subject:To; b=BD9gavf6qG+NcAU6dpDj+k+cbiUp7MwZcaAFPqtHGRgxsb/6UBLkDq1UIyBNsvPatmR z1Gwwv+e49xGT0m05PO564gB2R62avfZVX1D+C18Gr5WDJPMrSeTycJVEZOiS6SELYXaW pqZcyQymuJmfjqFm4cBAwc/S6QfjfkyzfRo= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates CometlakeOpenBoardPkg to use the SmmSpiFlashCommonLib instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in IntelSiliconPkg. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Rangasai V Chaganty Cc: Deepika Kethi Reddy Cc: Kathappan Esakkithevar Signed-off-by: Michael Kubacki Reviewed-by: Chasel Chiu Reviewed-by: Nate DeSimone --- Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc | 7 ++= +++-- Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf | 2 +- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPk= g.dsc b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc index 44a1bd54d6e9..316100e9a599 100644 --- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc +++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.dsc @@ -254,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER] ####################################### # Silicon Initialization Package ####################################### - SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLi= b/SmmSpiFlashCommonLib.inf + SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFla= shCommonLib.inf =20 ####################################### # Platform Package @@ -401,6 +401,10 @@ [Components.X64] $(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf =20 +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf +!endif + ####################################### # Platform Package ####################################### @@ -421,7 +425,6 @@ [Components.X64] =20 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE =20 - $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf =20 $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf { diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPk= g.fdf b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf index 6397d80d3895..e341285f4b1a 100644 --- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf +++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkg.fdf @@ -407,7 +407,7 @@ [FV.FvOsBootUncompact] !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf -INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf +INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf =20 INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75326): https://edk2.groups.io/g/devel/message/75326 Mute This Topic: https://groups.io/mt/82929229/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75327+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75327+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396840; cv=none; d=zohomail.com; s=zohoarc; b=O3xyVHqMjntiA/6k90jW+thrh3OPv8omXh/Lk3/6PPccqtfMN56LSqh2c/M1cXwt/RxN655lHI0cm/H5C/CfuOkmay/Sm8LBKaPnNC3jb+P7oPWapfyT8RAWgziWVUgHoGGPXQrt6GI3LAxLRvlc8yBiwgMUmy5oUXbuBfHCF7M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396840; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=IZURxP8lWdRSGsqmePbDCCQj+uk+Sn3lm53o0E7S0Ac=; b=CP+eggjoep6PNiGFVgv7ukq88QsQKZv9+ri8Ku7ta2yL7SRBRJhrToeFZs+zci4qfN8WMMy8f+Q0ubLFgxTwJWMB+ovh4N3K2ywe0pEQ0XUL8D6cBDoS6nhWouRUxJEq7cVBcTOobuojjDzVPF1sFnalyNmA18C0tGaWb2Pea5s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75327+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396840621439.2799601130944; Tue, 18 May 2021 21:00:40 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id KjPzYY1788612xEgqjlABoyy; Tue, 18 May 2021 21:00:40 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web09.6897.1621396839462816185 for ; Tue, 18 May 2021 21:00:39 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 3AE6620B7188; Tue, 18 May 2021 21:00:39 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 3AE6620B7188 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Jeremy Soller Subject: [edk2-devel] [edk2-platforms][PATCH v2 21/35] KabylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Date: Tue, 18 May 2021 20:59:33 -0700 Message-Id: <20210519035947.1234-22-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: hqSNfep7gEMBMX8Tm3KvXyMhx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396840; bh=1jsxLI3w2aeUF102aKj7R9xzgS3Tntt3JPiPAgE3pkk=; h=Cc:Date:From:Reply-To:Subject:To; b=gyi3sV4PRxAJjR0EGJ/aO4mllrieT4/sFi7JpvLcbbRvZMvNLQkAAj0NbXHznxjA/2Y cqRGzBa0eYgkn75meH1x2iTn8Qg3TkmKpzZZB8pFUMS262s+7KtT3/pxPJCCp9TJMu/7I AVMAoJnxA2UBmsmVCNaQXbqM3+cKXkyoptI= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates KabylakeOpenBoardPkg to use the SmmSpiFlashCommonLib instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in IntelSiliconPkg. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Jeremy Soller Signed-off-by: Michael Kubacki Reviewed-by: Chasel Chiu Reviewed-by: Nate DeSimone --- Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 7 ++++= +-- Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf | 2 +- Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 7 ++++= +-- Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf | 2 +- 4 files changed, 12 insertions(+), 6 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.ds= c b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc index 302cb679b5eb..89be744a9038 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc @@ -228,7 +228,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER] ####################################### # Silicon Initialization Package ####################################### - SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLi= b/SmmSpiFlashCommonLib.inf + SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFla= shCommonLib.inf =20 ####################################### # Platform Package @@ -377,6 +377,10 @@ [Components.X64] IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf =20 +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf +!endif + ####################################### # Platform Package ####################################### @@ -393,7 +397,6 @@ [Components.X64] =20 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE =20 - $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf =20 $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf { diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fd= f b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf index 39432d21b8b5..239b6b720a6a 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf @@ -401,7 +401,7 @@ [FV.FvOsBootUncompact] !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE INF $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf -INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf +INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf =20 INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.= dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc index 8523ab3f4fc1..f29393579c06 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc @@ -268,7 +268,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER] ####################################### # Silicon Initialization Package ####################################### - SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLi= b/SmmSpiFlashCommonLib.inf + SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFla= shCommonLib.inf =20 ####################################### # Platform Package @@ -456,6 +456,10 @@ [Components.X64] IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf =20 +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf +!endif + ####################################### # Platform Package ####################################### @@ -472,7 +476,6 @@ [Components.X64] =20 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE =20 - $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf =20 $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf { diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.= fdf b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf index f003dda0ddfc..23f9be5cf2a2 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf @@ -408,7 +408,7 @@ [FV.FvOsBootUncompact] !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE INF $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf -INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf +INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf =20 INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75327): https://edk2.groups.io/g/devel/message/75327 Mute This Topic: https://groups.io/mt/82929230/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75328+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75328+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396841; cv=none; d=zohomail.com; s=zohoarc; b=IXGRVWitolU3FyR3wxK99l32wjjY4QO4gQk4dWUF8GjboL32aMuLSQDhPecTuPe3GOnMEjW3Kr1DW0z2pLHSoVFxROJt9fs6ChDwr0k3vMHVTiOCvURbspRxeXzv0eZOeOPSRTWmF13O7AixcIofp9RHxGnlsVTMbkquUmL4w3U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396841; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=2TGU1B6NQgkCgyihraPw35dRshlc2pOIfDo1IpAVIkM=; b=foRrGSHUkdK8wb8eT2Z+E+Nd1+XZ1gD8PIdFqZE0Ynn5FXmDZm5kHKtM2LrCjWdlO7QuVvri/hAn0EhZeGjTUEa6Cff+wZPOkRTJzNDhY3fLxxgkEW6Off5n/D04TgMiQUHzWBbbURbGjlklG2KQ43P6zKlOyX3NIJu+0CNNdhE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75328+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396841759638.6354147689412; Tue, 18 May 2021 21:00:41 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id JbKtYY1788612xdpGljevGoj; Tue, 18 May 2021 21:00:41 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web09.6898.1621396840811570372 for ; Tue, 18 May 2021 21:00:40 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 92F5420B7178; Tue, 18 May 2021 21:00:40 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 92F5420B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Agyeman Prince Subject: [edk2-devel] [edk2-platforms][PATCH v2 22/35] SimicsOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Date: Tue, 18 May 2021 20:59:34 -0700 Message-Id: <20210519035947.1234-23-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: Wlumg2mQiGbonRRZC9v0KP7Rx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396841; bh=IdamSYNT4TGI4o1YijEEj51PDeB2FOw1AvQv9HbB4/A=; h=Cc:Date:From:Reply-To:Subject:To; b=ImA6PzdWSWzfzUcivIDjYOo1G4xF4s7gZmz7mqtEq7HLnphhe4MTBsojghQEnH7ATd0 86ZsMfeW5WtiUwWamA7Au6WgDGpfmcWI6dlhMIXmNAvIF8CGVfJS7vxdEBlAOe6kMvdRp LHIcb7g4XRNMCLuYONsaoGmiOrNi/ycBVSU= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates SimicsOpenBoardPkg to use the SmmSpiFlashCommonLib instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in IntelSiliconPkg. Cc: Agyeman Prince Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 6 ++---- Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf | 2 +- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.d= sc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc index 93a7d1df55ae..a3c54a19739c 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc +++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc @@ -169,7 +169,7 @@ [LibraryClasses.common.DXE_SMM_DRIVER] ####################################### # Silicon Initialization Package ####################################### - SpiFlashCommonLib|$(PCH_PKG)/Library/SmmSpiFlashCommonLib/SmmSpiFlashCom= monLib.inf + SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFla= shCommonLib.inf =20 ####################################### # PEI Components @@ -288,6 +288,7 @@ [Components.X64] $(PCH_PKG)/SmmControl/RuntimeDxe/SmmControl2Dxe.inf $(PCH_PKG)/Spi/Smm/PchSpiSmm.inf $(SKT_PKG)/Smm/Access/SmmAccess2Dxe.inf + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf !endif =20 ##################################### @@ -295,9 +296,6 @@ [Components.X64] ##################################### $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf -!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE - $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf -!endif =20 ####################################### # Board Package diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.f= df b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf index 99bf60777553..1719513d3ac2 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf +++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf @@ -210,7 +210,7 @@ [FV.DXEFV] =20 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf -INF MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf +INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf INF BoardModulePkg/LegacySioDxe/LegacySioDxe.inf INF BoardModulePkg/BoardBdsHookDxe/BoardBdsHookDxe.inf --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75328): https://edk2.groups.io/g/devel/message/75328 Mute This Topic: https://groups.io/mt/82929231/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75329+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75329+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396848; cv=none; d=zohomail.com; s=zohoarc; b=RqWzTiKyr2usC6JeSDDovDstOl375vVMr4+2jkIIfNH5zmUgBaOHkxz4nkG7Dmmoi1+tByXhzxb8m4lEhaGpSVmRCqDDV+ia0TPUG4NXW1bF9kfXiM2YOIJe6APd0dR3imq+uXPK9hlKuSsWOOb8yClm2qRvzGBlQF72MeuIyyU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396848; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=fwXkr1BeDACcmsaO4w/UfEH6oEzuau6kfJME6JGnvyE=; b=X2V1xtLXYanSyNN3ZpiGau4OLwkDiQ7/rGYuXmFSgZVtheSBkKFIZMUxh3pNcwUveIXlcx8WWpy3qYhk4pC275gieQVhjBQ2uWxErei12QPuFzJZ845aanCcBIhjzBumzbmh7yl5/PM9GL6MsYE/Fb6XL5Yl+ugqY3g212lbtsk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75329+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396848488653.3228647349047; Tue, 18 May 2021 21:00:48 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id XB7BYY1788612xZLKCCgAitw; Tue, 18 May 2021 21:00:48 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web09.6901.1621396842462866871 for ; Tue, 18 May 2021 21:00:42 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 2C4CF20B7188; Tue, 18 May 2021 21:00:42 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 2C4CF20B7188 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Sai Chaganty , Nate DeSimone , Heng Luo Subject: [edk2-devel] [edk2-platforms][PATCH v2 23/35] TigerlakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Date: Tue, 18 May 2021 20:59:35 -0700 Message-Id: <20210519035947.1234-24-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: hAHkPaAxR4QAvJxN9NAb4ZCsx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396848; bh=206194XBNYpcRXlqu6F+GaoTCZEz+ZifsdMkNNNpvB8=; h=Cc:Date:From:Reply-To:Subject:To; b=QGHUKgN/Vld3xMHTVWkiNtxdAtv+BECvBa9Z28lklrdVmprBlMH9cmffapzGCwdYfNp LmLPLVPlRZNZ3duNPakxV/JvekOM9OoEJrUeGd9WdP/m4CpKHjcIxU1QoV4sRZzLNy3HY vKJSq2PFyFbG/Ssoq/hvjwoU6G2BXuNyuig= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates TigerlakeOpenBoardPkg to use the SmmSpiFlashCommonLib instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in IntelSiliconPkg. Cc: Sai Chaganty Cc: Nate DeSimone Cc: Heng Luo Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 7 ++= +++-- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 2 +- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPk= g.dsc b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc index 1adf63403450..758b966fee81 100644 --- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc @@ -173,7 +173,7 @@ [LibraryClasses.X64] !include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc =20 [LibraryClasses.X64.DXE_SMM_DRIVER] - SpiFlashCommonLib|$(PLATFORM_BOARD_PACKAGE)/Library/SmmSpiFlashCommonLib= /SmmSpiFlashCommonLib.inf + SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFla= shCommonLib.inf !if $(TARGET) =3D=3D DEBUG TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Smm= TestPointCheckLib.inf !endif @@ -297,6 +297,10 @@ [Components.X64] !include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf =20 +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf +!endif + # # SmmAccess # @@ -326,7 +330,6 @@ [Components.X64] NULL|$(PROJECT)/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf } =20 - $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf =20 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPk= g.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf index e3b2f048524c..b802c2167d06 100644 --- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf @@ -434,7 +434,7 @@ [FV.FvOsBootUncompact] !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE INF $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf -INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf +INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf =20 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75329): https://edk2.groups.io/g/devel/message/75329 Mute This Topic: https://groups.io/mt/82929232/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75330+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75330+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396844; cv=none; d=zohomail.com; s=zohoarc; b=URSG4n47u99XqyaS3jLLYu3cvy4kUNX4Vn7DrcduEQeHnYk0nO8PhbgGarmXz0E5v7kj8rL38puAGOrdqoawF6XUgI4q8mT9dtJU156WtOiugzhpb+fik0OCIWBzce067Ov4wUWlmIZuLdOYAEJFleuDQYWYBU0bG0/T/RRZvm4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396844; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=injZyte65kz827QeO2FpyJrdS7tY2JLJ8Br5sl/QUik=; b=frYu8tvNsxRnio2t7BP1wNYY3pMQUvwLpUuJTX4dnCtaG+/hfuMEM7RRgRbNU0SkImHLsjVA8LaYfW1UswFBAekEMRD0bEz7zUmzQBKSq7/7IwD75PnlykEu1CLtCTig3G1ylnlHSBFkV0dAdDMwKcTj6SpBpOfy659For0Q4aY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75330+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396844713321.28223696526004; Tue, 18 May 2021 21:00:44 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 9MerYY1788612xLhU8HVmkrR; Tue, 18 May 2021 21:00:44 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web09.6903.1621396843680606714 for ; Tue, 18 May 2021 21:00:43 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 6FDE920B7178; Tue, 18 May 2021 21:00:43 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 6FDE920B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone Subject: [edk2-devel] [edk2-platforms][PATCH v2 24/35] WhiskeylakeOpenBoardPkg: Update SpiFvbService & SpiFlashCommonLib Date: Tue, 18 May 2021 20:59:36 -0700 Message-Id: <20210519035947.1234-25-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: gJkoNP1jlGgvfnCww0ftcEvtx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396844; bh=REp3TiogbfJ6XnJ7/XUH8N0J7kInf+Xk8tLgz12tLNA=; h=Cc:Date:From:Reply-To:Subject:To; b=Wfo8s+kGxQpQBFYBALKWXse8cEc0lduoLh7j25NxoS1OJsFkLwsy8YBqFEcm0nZDEwk 2BkoW4kDPLV8iX9yMLFNmbHXBeBoprGsjJWX8r2P8Dmde/zFW90iUrja5OEBGk+0h8kFH U8UjUweYk96OLa3rEFg2EsS9ptZibsxEn1U= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 Updates WhiskeylakeOpenBoardPkg to use the SmmSpiFlashCommonLib instance in IntelSiliconPkg and the SpiFvbServiceSmm driver in IntelSiliconPkg. Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Michael Kubacki Reviewed-by: Chasel Chiu Reviewed-by: Nate DeSimone --- Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc | = 7 +++++-- Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf | = 2 +- Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc | = 7 +++++-- Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf | = 2 +- 4 files changed, 12 insertions(+), 6 deletions(-) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.d= sc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc index ee2aedd978e0..e9c1751df9ba 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc @@ -254,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER] ####################################### # Silicon Initialization Package ####################################### - SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLi= b/SmmSpiFlashCommonLib.inf + SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFla= shCommonLib.inf =20 ####################################### # Platform Package @@ -395,6 +395,10 @@ [Components.X64] $(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf =20 +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf +!endif + ####################################### # Platform Package ####################################### @@ -415,7 +419,6 @@ [Components.X64] =20 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE =20 - $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf =20 $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf { diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.f= df b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf index 8aea5aa475a0..ae0ba27c1f34 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf @@ -413,7 +413,7 @@ [FV.FvOsBootUncompact] !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf -INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf +INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf =20 INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoa= rdPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoar= dPkg.dsc index b69cc8deb0a0..e3cf99639620 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.d= sc +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.d= sc @@ -254,7 +254,7 @@ [LibraryClasses.X64.DXE_SMM_DRIVER] ####################################### # Silicon Initialization Package ####################################### - SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLi= b/SmmSpiFlashCommonLib.inf + SpiFlashCommonLib|IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFla= shCommonLib.inf =20 ####################################### # Platform Package @@ -401,6 +401,10 @@ [Components.X64] $(PLATFORM_SI_PACKAGE)/SystemAgent/SaInit/Dxe/SaInitDxe.inf $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf =20 +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE + IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf +!endif + ####################################### # Platform Package ####################################### @@ -421,7 +425,6 @@ [Components.X64] =20 !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE =20 - $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf =20 $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf { diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoa= rdPkg.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoar= dPkg.fdf index f0601984338c..414780eb05f1 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.f= df +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.f= df @@ -407,7 +407,7 @@ [FV.FvOsBootUncompact] !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf INF $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf -INF $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf +INF IntelSiliconPkg/Feature/Flash/SpiFvbService/SpiFvbServiceSmm.inf =20 INF $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf INF $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75330): https://edk2.groups.io/g/devel/message/75330 Mute This Topic: https://groups.io/mt/82929233/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75331+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75331+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396846; cv=none; d=zohomail.com; s=zohoarc; b=Mq9YzOCt7kuuESRzECFeJOulTGSdd5utDF/dk3arcIiBFMCc84ZV7OFlK10n3CNI0LEg1M/8yDnnig9Q/TkzC5iQx+d1L0tChUqCF0KL7BvyIQr1bHpYUoO3WRgrFa/EZq4VSsNP/jl14RGUHI3mzdYIe0N5tjKhVd4/VItzXn4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396846; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=N/ieW3vWHwf1bzb1orWvDelI/jWTc6MPDTMzBeJ/nEA=; b=nXPn4TJuwqXEApdC5zrgCDdKXAzrn6o1q0cz6YAXRWvbaQgly5TnSPNdCHtSLx+u/e46ZOR1Zqv//JKVHf7My2Ojr+6Wsn6EXpS1Fnclfjbqqkfj+5cVmyUTFly8B5EECEV54gBVejnIFaSpxxXb9Dpq2khAyH0WIMGxpRfVPgg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75331+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396846438996.4833914205901; Tue, 18 May 2021 21:00:46 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 8zZCYY1788612xsZh0OwZAiU; Tue, 18 May 2021 21:00:46 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web11.6950.1621396845186352355 for ; Tue, 18 May 2021 21:00:45 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id C7A3120B7178; Tue, 18 May 2021 21:00:44 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com C7A3120B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Liming Gao , Eric Dong Subject: [edk2-devel] [edk2-platforms][PATCH v2 25/35] MinPlatformPkg: Remove SpiFvbService modules Date: Tue, 18 May 2021 20:59:37 -0700 Message-Id: <20210519035947.1234-26-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: htsT2TVfQ2u0kzZMHkd2XKNgx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396846; bh=j5aIqwfA7fGBiCQIEVoWPEgnuZfvIXBKlswrgKrIj+8=; h=Cc:Date:From:Reply-To:Subject:To; b=m/Prv4nKSataiyqj3iIOID354/CBe8yGmUCZNEqUWJ3hyu35MMWNKcYk6yAuXnU09Ms y3rhzHegVpsgVQyZqpXUcjHuT2xU3rheeHKQmDYg39dKv7ym0rw0fX8LWUwe8amIkBreP Cd2knS6g73Nof/75nEzfYxHlUAsuXAPumCE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 SpiFvbServiceSmm and SpiFvbServiceStandaloneMm have moved to IntelSiliconPkg. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Liming Gao Cc: Eric Dong Signed-off-by: Michael Kubacki Reviewed-by: Chasel Chiu Reviewed-by: Nate DeSimone --- Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c = | 94 -- Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.c = | 903 -------------------- Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c = | 271 ------ Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneM= m.c | 32 - Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTraditional= Mm.c | 32 - Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon.h = | 158 ---- Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h = | 22 - Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf = | 68 -- Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneM= m.inf | 67 -- Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc = | 2 - 10 files changed, 1649 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c b/= Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c deleted file mode 100644 index 7f2678fa9e5a..000000000000 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/FvbInfo.c +++ /dev/null @@ -1,94 +0,0 @@ -/**@file - Defines data structure that is the volume header found. - These data is intent to decouple FVB driver with FV header. - -Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include "SpiFvbServiceCommon.h" - -#define FIRMWARE_BLOCK_SIZE 0x10000 -#define FVB_MEDIA_BLOCK_SIZE FIRMWARE_BLOCK_SIZE - -#define NV_STORAGE_BASE_ADDRESS FixedPcdGet32(PcdFlashNvStorageVariabl= eBase) -#define SYSTEM_NV_BLOCK_NUM ((FixedPcdGet32(PcdFlashNvStorageVaria= bleSize)+ FixedPcdGet32(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32(Pc= dFlashNvStorageFtwSpareSize))/ FVB_MEDIA_BLOCK_SIZE) - -typedef struct { - EFI_PHYSICAL_ADDRESS BaseAddress; - EFI_FIRMWARE_VOLUME_HEADER FvbInfo; - EFI_FV_BLOCK_MAP_ENTRY End[1]; -} EFI_FVB2_MEDIA_INFO; - -// -// This data structure contains a template of all correct FV headers, whic= h is used to restore -// Fv header if it's corrupted. -// -EFI_FVB2_MEDIA_INFO mPlatformFvbMediaInfo[] =3D { - // - // Systen NvStorage FVB - // - { - NV_STORAGE_BASE_ADDRESS, - { - {0,}, //ZeroVector[16] - EFI_SYSTEM_NV_DATA_FV_GUID, - FVB_MEDIA_BLOCK_SIZE * SYSTEM_NV_BLOCK_NUM, - EFI_FVH_SIGNATURE, - 0x0004feff, // check MdePkg/Include/Pi/PiFirmwareVolume.h for detail= s on EFI_FVB_ATTRIBUTES_2 - sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY= ), - 0, //CheckSum which will be calucated dynamically. - 0, //ExtHeaderOffset - {0,}, //Reserved[1] - 2, //Revision - { - { - SYSTEM_NV_BLOCK_NUM, - FVB_MEDIA_BLOCK_SIZE, - } - } - }, - { - { - 0, - 0 - } - } - } -}; - -EFI_STATUS -GetFvbInfo ( - IN EFI_PHYSICAL_ADDRESS FvBaseAddress, - OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo - ) -{ - UINTN Index; - EFI_FIRMWARE_VOLUME_HEADER *FvHeader; - - for (Index =3D 0; Index < sizeof (mPlatformFvbMediaInfo) / sizeof (EFI_F= VB2_MEDIA_INFO); Index++) { - if (mPlatformFvbMediaInfo[Index].BaseAddress =3D=3D FvBaseAddress) { - FvHeader =3D &mPlatformFvbMediaInfo[Index].FvbInfo; - - // - // Update the checksum value of FV header. - // - FvHeader->Checksum =3D CalculateCheckSum16 ( (UINT16 *) FvHeader, Fv= Header->HeaderLength); - - *FvbInfo =3D FvHeader; - - DEBUG ((DEBUG_INFO, "BaseAddr: 0x%lx \n", FvBaseAddress)); - DEBUG ((DEBUG_INFO, "FvLength: 0x%lx \n", (*FvbInfo)->FvLength)); - DEBUG ((DEBUG_INFO, "HeaderLength: 0x%x \n", (*FvbInfo)->HeaderLengt= h)); - DEBUG ((DEBUG_INFO, "Header Checksum: 0x%X\n", (*FvbInfo)->Checksum)= ); - DEBUG ((DEBUG_INFO, "FvBlockMap[0].NumBlocks: 0x%x \n", (*FvbInfo)->= BlockMap[0].NumBlocks)); - DEBUG ((DEBUG_INFO, "FvBlockMap[0].BlockLength: 0x%x \n", (*FvbInfo)= ->BlockMap[0].Length)); - DEBUG ((DEBUG_INFO, "FvBlockMap[1].NumBlocks: 0x%x \n", (*FvbInfo)->= BlockMap[1].NumBlocks)); - DEBUG ((DEBUG_INFO, "FvBlockMap[1].BlockLength: 0x%x \n\n", (*FvbInf= o)->BlockMap[1].Length)); - - return EFI_SUCCESS; - } - } - return EFI_NOT_FOUND; -} diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServic= eCommon.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbService= Common.c deleted file mode 100644 index 113c749d04ff..000000000000 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon= .c +++ /dev/null @@ -1,903 +0,0 @@ -/** @file - Common driver source for several Serial Flash devices - which are compliant with the Intel(R) Serial Flash Interface Compatibili= ty Specification. - -Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include "SpiFvbServiceCommon.h" - -// -// Global variable for this FVB driver which contains -// the private data of all firmware volume block instances -// -FVB_GLOBAL mFvbModuleGlobal; - -// -// This platform driver knows there are multiple FVs on FD. -// Now we only provide FVs on Variable region and MicorCode region for per= formance issue. -// -FV_INFO mPlatformFvBaseAddress[] =3D { - {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(= PcdFlashNvStorageVariableSize)}, - {0, 0}, // {FixedPcdGet32(PcdFlashFvMicrocodeBase), FixedPcdGet32(PcdFla= shFvMicrocodeSize)}, - {0, 0} -}; - -FV_INFO mPlatformDefaultBaseAddress[] =3D { - {0, 0}, // {FixedPcdGet32(PcdFlashNvStorageVariableBase), FixedPcdGet32(= PcdFlashNvStorageVariableSize)}, - {0, 0}, // {FixedPcdGet32(PcdFlashFvMicrocodeBase), FixedPcdGet32(PcdFla= shFvMicrocodeSize)}, - {0, 0} -}; - -FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate =3D { - { - { - HARDWARE_DEVICE_PATH, - HW_MEMMAP_DP, - { - (UINT8)(sizeof (MEMMAP_DEVICE_PATH)), - (UINT8)(sizeof (MEMMAP_DEVICE_PATH) >> 8) - } - }, - EfiMemoryMappedIO, - (EFI_PHYSICAL_ADDRESS) 0, - (EFI_PHYSICAL_ADDRESS) 0, - }, - { - END_DEVICE_PATH_TYPE, - END_ENTIRE_DEVICE_PATH_SUBTYPE, - { - END_DEVICE_PATH_LENGTH, - 0 - } - } -}; - -FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate =3D { - { - { - MEDIA_DEVICE_PATH, - MEDIA_PIWG_FW_VOL_DP, - { - (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH)), - (UINT8)(sizeof (MEDIA_FW_VOL_DEVICE_PATH) >> 8) - } - }, - { 0 } - }, - { - END_DEVICE_PATH_TYPE, - END_ENTIRE_DEVICE_PATH_SUBTYPE, - { - END_DEVICE_PATH_LENGTH, - 0 - } - } -}; - -// -// Template structure used when installing FVB protocol -// -EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate =3D { - FvbProtocolGetAttributes, - FvbProtocolSetAttributes, - FvbProtocolGetPhysicalAddress, - FvbProtocolGetBlockSize, - FvbProtocolRead, - FvbProtocolWrite, - FvbProtocolEraseBlocks, - NULL -}; - -/** - Get the EFI_FVB_ATTRIBUTES_2 of a FV. - - @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE. - - @return Attributes of the FV identified by FvbInstance. - -**/ -EFI_FVB_ATTRIBUTES_2 -FvbGetVolumeAttributes ( - IN EFI_FVB_INSTANCE *FvbInstance - ) -{ - return FvbInstance->FvHeader.Attributes; -} - -/** - Retrieves the starting address of an LBA in an FV. It also - return a few other attribut of the FV. - - @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE. - @param[in] Lba The logical block address - @param[out] LbaAddress On output, contains the physical starting ad= dress - of the Lba - @param[out] LbaLength On output, contains the length of the block - @param[out] NumOfBlocks A pointer to a caller allocated UINTN in whi= ch the - number of consecutive blocks starting with L= ba is - returned. All blocks in this range have a si= ze of - BlockSize - - @retval EFI_SUCCESS Successfully returns - @retval EFI_INVALID_PARAMETER Instance not found - -**/ -EFI_STATUS -FvbGetLbaAddress ( - IN EFI_FVB_INSTANCE *FvbInstance, - IN EFI_LBA Lba, - OUT UINTN *LbaAddress, - OUT UINTN *LbaLength, - OUT UINTN *NumOfBlocks - ) -{ - UINT32 NumBlocks; - UINT32 BlockLength; - UINTN Offset; - EFI_LBA StartLba; - EFI_LBA NextLba; - EFI_FV_BLOCK_MAP_ENTRY *BlockMap; - - StartLba =3D 0; - Offset =3D 0; - BlockMap =3D &(FvbInstance->FvHeader.BlockMap[0]); - - // - // Parse the blockmap of the FV to find which map entry the Lba belongs = to - // - while (TRUE) { - NumBlocks =3D BlockMap->NumBlocks; - BlockLength =3D BlockMap->Length; - - if ( NumBlocks =3D=3D 0 || BlockLength =3D=3D 0) { - return EFI_INVALID_PARAMETER; - } - - NextLba =3D StartLba + NumBlocks; - - // - // The map entry found - // - if (Lba >=3D StartLba && Lba < NextLba) { - Offset =3D Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLength); - if (LbaAddress ) { - *LbaAddress =3D FvbInstance->FvBase + Offset; - } - - if (LbaLength ) { - *LbaLength =3D BlockLength; - } - - if (NumOfBlocks ) { - *NumOfBlocks =3D (UINTN)(NextLba - Lba); - } - return EFI_SUCCESS; - } - - StartLba =3D NextLba; - Offset =3D Offset + NumBlocks * BlockLength; - BlockMap++; - } -} - -/** - Reads specified number of bytes into a buffer from the specified block. - - @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE - @param[in] Lba The logical block address to be re= ad from - @param[in] BlockOffset Offset into the block at which to = begin reading - @param[in] NumBytes Pointer that on input contains the= total size of - the buffer. On output, it contains= the total number - of bytes read - @param[in] Buffer Pointer to a caller allocated buff= er that will be - used to hold the data read - - - @retval EFI_SUCCESS The firmware volume was read succe= ssfully and - contents are in Buffer - @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA bounda= ry. On output, - NumBytes contains the total number= of bytes returned - in Buffer - @retval EFI_ACCESS_DENIED The firmware volume is in the Read= Disabled state - @retval EFI_DEVICE_ERROR The block device is not functionin= g correctly and - could not be read - @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, B= uffer are NULL - -**/ -EFI_STATUS -FvbReadBlock ( - IN EFI_FVB_INSTANCE *FvbInstance, - IN EFI_LBA Lba, - IN UINTN BlockOffset, - IN OUT UINTN *NumBytes, - IN UINT8 *Buffer - ) -{ - EFI_FVB_ATTRIBUTES_2 Attributes; - UINTN LbaAddress; - UINTN LbaLength; - EFI_STATUS Status; - BOOLEAN BadBufferSize =3D FALSE; - - if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { - return EFI_INVALID_PARAMETER; - } - if (*NumBytes =3D=3D 0) { - return EFI_INVALID_PARAMETER; - } - - Status =3D FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, = NULL); - if (EFI_ERROR(Status)) { - return Status; - } - - Attributes =3D FvbGetVolumeAttributes (FvbInstance); - - if ((Attributes & EFI_FVB2_READ_STATUS) =3D=3D 0) { - return EFI_ACCESS_DENIED; - } - - if (BlockOffset > LbaLength) { - return EFI_INVALID_PARAMETER; - } - - if (LbaLength < (*NumBytes + BlockOffset)) { - DEBUG ((DEBUG_INFO, - "FvReadBlock: Reducing Numbytes from 0x%x to 0x%x\n", - *NumBytes, - (UINT32)(LbaLength - BlockOffset)) - ); - *NumBytes =3D (UINT32) (LbaLength - BlockOffset); - BadBufferSize =3D TRUE; - } - - Status =3D SpiFlashRead (LbaAddress + BlockOffset, (UINT32 *)NumBytes, B= uffer); - - if (!EFI_ERROR (Status) && BadBufferSize) { - return EFI_BAD_BUFFER_SIZE; - } else { - return Status; - } -} - -/** - Writes specified number of bytes from the input buffer to the block. - - @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE - @param[in] Lba The starting logical block index to wr= ite to - @param[in] BlockOffset Offset into the block at which to begi= n writing - @param[in] NumBytes Pointer that on input contains the tot= al size of - the buffer. On output, it contains the= total number - of bytes actually written - @param[in] Buffer Pointer to a caller allocated buffer t= hat contains - the source for the write - @retval EFI_SUCCESS The firmware volume was written succes= sfully - @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary.= On output, - NumBytes contains the total number of = bytes - actually written - @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDis= abled state - @retval EFI_DEVICE_ERROR The block device is not functioning co= rrectly and - could not be written - @retval EFI_INVALID_PARAMETER Instance not found, or NumBytes, Buffe= r are NULL - -**/ -EFI_STATUS -FvbWriteBlock ( - IN EFI_FVB_INSTANCE *FvbInstance, - IN EFI_LBA Lba, - IN UINTN BlockOffset, - IN OUT UINTN *NumBytes, - IN UINT8 *Buffer - ) -{ - EFI_FVB_ATTRIBUTES_2 Attributes; - UINTN LbaAddress; - UINTN LbaLength; - EFI_STATUS Status; - BOOLEAN BadBufferSize =3D FALSE; - - if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { - return EFI_INVALID_PARAMETER; - } - if (*NumBytes =3D=3D 0) { - return EFI_INVALID_PARAMETER; - } - - Status =3D FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, = NULL); - if (EFI_ERROR(Status)) { - return Status; - } - - // - // Check if the FV is write enabled - // - Attributes =3D FvbGetVolumeAttributes (FvbInstance); - if ((Attributes & EFI_FVB2_WRITE_STATUS) =3D=3D 0) { - return EFI_ACCESS_DENIED; - } - - // - // Perform boundary checks and adjust NumBytes - // - if (BlockOffset > LbaLength) { - return EFI_INVALID_PARAMETER; - } - - if (LbaLength < (*NumBytes + BlockOffset)) { - DEBUG ((DEBUG_INFO, - "FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n", - *NumBytes, - (UINT32)(LbaLength - BlockOffset)) - ); - *NumBytes =3D (UINT32) (LbaLength - BlockOffset); - BadBufferSize =3D TRUE; - } - - Status =3D SpiFlashWrite (LbaAddress + BlockOffset, (UINT32 *)NumBytes, = Buffer); - if (EFI_ERROR (Status)) { - return Status; - } - - Status =3D SpiFlashLock (); - if (EFI_ERROR (Status)) { - return Status; - } - - WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress + BlockOffset), = *NumBytes); - - if (!EFI_ERROR (Status) && BadBufferSize) { - return EFI_BAD_BUFFER_SIZE; - } else { - return Status; - } -} - - - -/** - Erases and initializes a firmware volume block. - - @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE - @param[in] Lba The logical block index to be erased - - @retval EFI_SUCCESS The erase request was successfully compl= eted - @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisab= led state - @retval EFI_DEVICE_ERROR The block device is not functioning corr= ectly and - could not be written. Firmware device ma= y have been - partially erased - @retval EFI_INVALID_PARAMETER Instance not found - -**/ -EFI_STATUS -FvbEraseBlock ( - IN EFI_FVB_INSTANCE *FvbInstance, - IN EFI_LBA Lba - ) -{ - - EFI_FVB_ATTRIBUTES_2 Attributes; - UINTN LbaAddress; - UINTN LbaLength; - EFI_STATUS Status; - - // - // Check if the FV is write enabled - // - Attributes =3D FvbGetVolumeAttributes (FvbInstance); - - if( (Attributes & EFI_FVB2_WRITE_STATUS) =3D=3D 0) { - return EFI_ACCESS_DENIED; - } - - // - // Get the starting address of the block for erase. - // - Status =3D FvbGetLbaAddress (FvbInstance, Lba, &LbaAddress, &LbaLength, = NULL); - if (EFI_ERROR(Status)) { - return Status; - } - - Status =3D SpiFlashBlockErase (LbaAddress, &LbaLength); - if (EFI_ERROR (Status)) { - return Status; - } - - Status =3D SpiFlashLock (); - if (EFI_ERROR (Status)) { - return Status; - } - - WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength); - - return Status; -} - -/** - Modifies the current settings of the firmware volume according to the - input parameter, and returns the new setting of the volume - - @param[in] FvbInstance The pointer to the EFI_FVB_INSTANCE. - @param[in] Attributes On input, it is a pointer to EFI_FVB_A= TTRIBUTES_2 - containing the desired firmware volume= settings. - On successful return, it contains the = new settings - of the firmware volume - - @retval EFI_SUCCESS Successfully returns - @retval EFI_ACCESS_DENIED The volume setting is locked and canno= t be modified - @retval EFI_INVALID_PARAMETER Instance not found, or The attributes = requested are - in conflict with the capabilities as d= eclared in the - firmware volume header - -**/ -EFI_STATUS -FvbSetVolumeAttributes ( - IN EFI_FVB_INSTANCE *FvbInstance, - IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes - ) -{ - EFI_FVB_ATTRIBUTES_2 OldAttributes; - EFI_FVB_ATTRIBUTES_2 *AttribPtr; - EFI_FVB_ATTRIBUTES_2 UnchangedAttributes; - UINT32 Capabilities; - UINT32 OldStatus, NewStatus; - - AttribPtr =3D (EFI_FVB_ATTRIBUTES_2 *) &(FvbInstance->FvHeader.Attri= butes); - OldAttributes =3D *AttribPtr; - Capabilities =3D OldAttributes & EFI_FVB2_CAPABILITIES; - OldStatus =3D OldAttributes & EFI_FVB2_STATUS; - NewStatus =3D *Attributes & EFI_FVB2_STATUS; - - UnchangedAttributes =3D EFI_FVB2_READ_DISABLED_CAP | \ - EFI_FVB2_READ_ENABLED_CAP | \ - EFI_FVB2_WRITE_DISABLED_CAP | \ - EFI_FVB2_WRITE_ENABLED_CAP | \ - EFI_FVB2_LOCK_CAP | \ - EFI_FVB2_STICKY_WRITE | \ - EFI_FVB2_MEMORY_MAPPED | \ - EFI_FVB2_ERASE_POLARITY | \ - EFI_FVB2_READ_LOCK_CAP | \ - EFI_FVB2_WRITE_LOCK_CAP | \ - EFI_FVB2_ALIGNMENT; - - // - // Some attributes of FV is read only can *not* be set - // - if ((OldAttributes & UnchangedAttributes) ^ (*Attributes & UnchangedAttr= ibutes)) { - return EFI_INVALID_PARAMETER; - } - - // - // If firmware volume is locked, no status bit can be updated - // - if ( OldAttributes & EFI_FVB2_LOCK_STATUS ) { - if ( OldStatus ^ NewStatus ) { - return EFI_ACCESS_DENIED; - } - } - - // - // Test read disable - // - if ((Capabilities & EFI_FVB2_READ_DISABLED_CAP) =3D=3D 0) { - if ((NewStatus & EFI_FVB2_READ_STATUS) =3D=3D 0) { - return EFI_INVALID_PARAMETER; - } - } - - // - // Test read enable - // - if ((Capabilities & EFI_FVB2_READ_ENABLED_CAP) =3D=3D 0) { - if (NewStatus & EFI_FVB2_READ_STATUS) { - return EFI_INVALID_PARAMETER; - } - } - - // - // Test write disable - // - if ((Capabilities & EFI_FVB2_WRITE_DISABLED_CAP) =3D=3D 0) { - if ((NewStatus & EFI_FVB2_WRITE_STATUS) =3D=3D 0) { - return EFI_INVALID_PARAMETER; - } - } - - // - // Test write enable - // - if ((Capabilities & EFI_FVB2_WRITE_ENABLED_CAP) =3D=3D 0) { - if (NewStatus & EFI_FVB2_WRITE_STATUS) { - return EFI_INVALID_PARAMETER; - } - } - - // - // Test lock - // - if ((Capabilities & EFI_FVB2_LOCK_CAP) =3D=3D 0) { - if (NewStatus & EFI_FVB2_LOCK_STATUS) { - return EFI_INVALID_PARAMETER; - } - } - - *AttribPtr =3D (*AttribPtr) & (0xFFFFFFFF & (~EFI_FVB2_STATUS)); - *AttribPtr =3D (*AttribPtr) | NewStatus; - *Attributes =3D *AttribPtr; - - return EFI_SUCCESS; -} - -/** - Check the integrity of firmware volume header - - @param[in] FvHeader A pointer to a firmware volume header - - @retval TRUE The firmware volume is consistent - @retval FALSE The firmware volume has corrupted. - -**/ -BOOLEAN -IsFvHeaderValid ( - IN EFI_PHYSICAL_ADDRESS FvBase, - IN CONST EFI_FIRMWARE_VOLUME_HEADER *FvHeader - ) -{ - if (FvBase =3D=3D PcdGet32(PcdFlashNvStorageVariableBase)) { - if (CompareMem (&FvHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid, si= zeof(EFI_GUID)) !=3D 0 ) { - return FALSE; - } - } else { - if (CompareMem (&FvHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Gui= d, sizeof(EFI_GUID)) !=3D 0 ) { - return FALSE; - } - } - if ( (FvHeader->Revision !=3D EFI_FVH_REVISION) || - (FvHeader->Signature !=3D EFI_FVH_SIGNATURE) || - (FvHeader->FvLength =3D=3D ((UINTN) -1)) || - ((FvHeader->HeaderLength & 0x01 ) !=3D0) ) { - return FALSE; - } - - if (CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength) != =3D 0) { - return FALSE; - } - - return TRUE; -} - -// -// FVB protocol APIs -// - -/** - Retrieves the physical address of the device. - - @param[in] This A pointer to EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL. - @param[out] Address Output buffer containing the address. - - retval EFI_SUCCESS The function always return successfully. - -**/ -EFI_STATUS -EFIAPI -FvbProtocolGetPhysicalAddress ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - OUT EFI_PHYSICAL_ADDRESS *Address - ) -{ - EFI_FVB_INSTANCE *FvbInstance; - - FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); - - *Address =3D FvbInstance->FvBase; - - return EFI_SUCCESS; -} - -/** - Retrieve the size of a logical block - - @param[in] This Calling context - @param[in] Lba Indicates which block to return the size for. - @param[out] BlockSize A pointer to a caller allocated UINTN in which - the size of the block is returned - @param[out] NumOfBlocks A pointer to a caller allocated UINTN in which t= he - number of consecutive blocks starting with Lba is - returned. All blocks in this range have a size of - BlockSize - - @retval EFI_SUCCESS The function always return successfully. - -**/ -EFI_STATUS -EFIAPI -FvbProtocolGetBlockSize ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - IN EFI_LBA Lba, - OUT UINTN *BlockSize, - OUT UINTN *NumOfBlocks - ) -{ - EFI_FVB_INSTANCE *FvbInstance; - - FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); - - DEBUG((DEBUG_INFO, - "FvbProtocolGetBlockSize: Lba: 0x%lx BlockSize: 0x%x NumOfBlocks: 0x%x= \n", - Lba, - BlockSize, - NumOfBlocks) - ); - - return FvbGetLbaAddress ( - FvbInstance, - Lba, - NULL, - BlockSize, - NumOfBlocks - ); -} - -/** - Retrieves Volume attributes. No polarity translations are done. - - @param[in] This Calling context - @param[out] Attributes Output buffer which contains attributes - - @retval EFI_SUCCESS The function always return successfully. - -**/ -EFI_STATUS -EFIAPI -FvbProtocolGetAttributes ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - OUT EFI_FVB_ATTRIBUTES_2 *Attributes - ) -{ - EFI_FVB_INSTANCE *FvbInstance; - - FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); - - *Attributes =3D FvbGetVolumeAttributes (FvbInstance); - - DEBUG ((DEBUG_INFO, - "FvbProtocolGetAttributes: This: 0x%x Attributes: 0x%x\n", - This, - *Attributes) - ); - - return EFI_SUCCESS; -} - -/** - Sets Volume attributes. No polarity translations are done. - - @param[in] This Calling context - @param[out] Attributes Output buffer which contains attributes - - @retval EFI_SUCCESS The function always return successfully. - -**/ -EFI_STATUS -EFIAPI -FvbProtocolSetAttributes ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes - ) -{ - EFI_STATUS Status; - EFI_FVB_INSTANCE *FvbInstance; - - DEBUG((DEBUG_INFO, - "FvbProtocolSetAttributes: Before SET - This: 0x%x Attributes: 0x%x\n= ", - This, - *Attributes) - ); - - FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); - - Status =3D FvbSetVolumeAttributes (FvbInstance, Attributes); - - DEBUG((DEBUG_INFO, - "FvbProtocolSetAttributes: After SET - This: 0x%x Attributes: 0x%x\n", - This, - *Attributes) - ); - - return Status; -} - -/** - The EraseBlock() function erases one or more blocks as denoted by the - variable argument list. The entire parameter list of blocks must be veri= fied - prior to erasing any blocks. If a block is requested that does not exist - within the associated firmware volume (it has a larger index than the la= st - block of the firmware volume), the EraseBlock() function must return - EFI_INVALID_PARAMETER without modifying the contents of the firmware vol= ume. - - @param[in] This Calling context - @param[in] ... Starting LBA followed by Number of Lba to erase. - a -1 to terminate the list. - - @retval EFI_SUCCESS The erase request was successfully completed - @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled st= ate - @retval EFI_DEVICE_ERROR The block device is not functioning correctly = and - could not be written. Firmware device may have= been - partially erased - -**/ -EFI_STATUS -EFIAPI -FvbProtocolEraseBlocks ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - ... - ) -{ - EFI_FVB_INSTANCE *FvbInstance; - UINTN NumOfBlocks; - VA_LIST Args; - EFI_LBA StartingLba; - UINTN NumOfLba; - EFI_STATUS Status; - - DEBUG((DEBUG_INFO, "FvbProtocolEraseBlocks: \n")); - - FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); - - NumOfBlocks =3D FvbInstance->NumOfBlocks; - - VA_START (Args, This); - - do { - StartingLba =3D VA_ARG (Args, EFI_LBA); - if ( StartingLba =3D=3D EFI_LBA_LIST_TERMINATOR ) { - break; - } - - NumOfLba =3D VA_ARG (Args, UINT32); - - // - // Check input parameters - // - if (NumOfLba =3D=3D 0) { - VA_END (Args); - return EFI_INVALID_PARAMETER; - } - - if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) { - return EFI_INVALID_PARAMETER; - } - } while ( 1 ); - - VA_END (Args); - - VA_START (Args, This); - do { - StartingLba =3D VA_ARG (Args, EFI_LBA); - if (StartingLba =3D=3D EFI_LBA_LIST_TERMINATOR) { - break; - } - - NumOfLba =3D VA_ARG (Args, UINT32); - - while ( NumOfLba > 0 ) { - Status =3D FvbEraseBlock (FvbInstance, StartingLba); - if ( EFI_ERROR(Status)) { - VA_END (Args); - return Status; - } - StartingLba ++; - NumOfLba --; - } - - } while ( 1 ); - - VA_END (Args); - - return EFI_SUCCESS; -} - -/** - Writes data beginning at Lba:Offset from FV. The write terminates either - when *NumBytes of data have been written, or when a block boundary is - reached. *NumBytes is updated to reflect the actual number of bytes - written. The write opertion does not include erase. This routine will - attempt to write only the specified bytes. If the writes do not stick, - it will return an error. - - @param[in] This Calling context - @param[in] Lba Block in which to begin write - @param[in] Offset Offset in the block at which to begin write - @param[in,out] NumBytes On input, indicates the requested write size. = On - output, indicates the actual number of bytes w= ritten - @param[in] Buffer Buffer containing source data for the write. - - @retval EFI_SUCCESS The firmware volume was written successful= ly - @retval EFI_BAD_BUFFER_SIZE Write attempted across a LBA boundary. On = output, - NumBytes contains the total number of bytes - actually written - @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisable= d state - @retval EFI_DEVICE_ERROR The block device is not functioning correc= tly and - could not be written - @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL - -**/ -EFI_STATUS -EFIAPI -FvbProtocolWrite ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - IN EFI_LBA Lba, - IN UINTN Offset, - IN OUT UINTN *NumBytes, - IN UINT8 *Buffer - ) -{ - EFI_FVB_INSTANCE *FvbInstance; - - FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); - - DEBUG((DEBUG_INFO, - "FvbProtocolWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%= x\n", - Lba, - Offset, - *NumBytes, - Buffer) - ); - - return FvbWriteBlock (FvbInstance, Lba, Offset, NumBytes, Buffer); -} - -/** - Reads data beginning at Lba:Offset from FV. The Read terminates either - when *NumBytes of data have been read, or when a block boundary is - reached. *NumBytes is updated to reflect the actual number of bytes - written. The write opertion does not include erase. This routine will - attempt to write only the specified bytes. If the writes do not stick, - it will return an error. - - @param[in] This Calling context - @param[in] Lba Block in which to begin write - @param[in] Offset Offset in the block at which to begin write - @param[in,out] NumBytes On input, indicates the requested write size. = On - output, indicates the actual number of bytes w= ritten - @param[in] Buffer Buffer containing source data for the write. - - @retval EFI_SUCCESS The firmware volume was read successfully = and - contents are in Buffer - @retval EFI_BAD_BUFFER_SIZE Read attempted across a LBA boundary. On o= utput, - NumBytes contains the total number of byte= s returned - in Buffer - @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled= state - @retval EFI_DEVICE_ERROR The block device is not functioning correc= tly and - could not be read - @retval EFI_INVALID_PARAMETER NumBytes or Buffer are NULL - -**/ -EFI_STATUS -EFIAPI -FvbProtocolRead ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - IN EFI_LBA Lba, - IN UINTN Offset, - IN OUT UINTN *NumBytes, - OUT UINT8 *Buffer - ) -{ - EFI_FVB_INSTANCE *FvbInstance; - EFI_STATUS Status; - - FvbInstance =3D FVB_INSTANCE_FROM_THIS (This); - Status =3D FvbReadBlock (FvbInstance, Lba, Offset, NumBytes, Buffer); - DEBUG((DEBUG_INFO, - "FvbProtocolRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x= \n", - Lba, - Offset, - *NumBytes, - Buffer) - ); - - return Status; -} diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServic= eMm.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c deleted file mode 100644 index 016f19587c91..000000000000 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.c +++ /dev/null @@ -1,271 +0,0 @@ -/** @file - MM driver source for several Serial Flash devices - which are compliant with the Intel(R) Serial Flash Interface Compatibili= ty Specification. - - Copyright (c) 2017, Intel Corporation. All rights reserved.
- Copyright (c) Microsoft Corporation.
- SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include "SpiFvbServiceCommon.h" -#include -#include -#include - -/** - The function installs EFI_FIRMWARE_VOLUME_BLOCK protocol - for each FV in the system. - - @param[in] FvbInstance The pointer to a FW volume instance structure, - which contains the information about one FV. - - @retval VOID - -**/ -VOID -InstallFvbProtocol ( - IN EFI_FVB_INSTANCE *FvbInstance - ) -{ - EFI_FIRMWARE_VOLUME_HEADER *FvHeader; - EFI_STATUS Status; - EFI_HANDLE FvbHandle; - - ASSERT (FvbInstance !=3D NULL); - if (FvbInstance =3D=3D NULL) { - return; - } - - CopyMem (&FvbInstance->FvbProtocol, &mFvbProtocolTemplate, sizeof (EFI_F= IRMWARE_VOLUME_BLOCK_PROTOCOL)); - - FvHeader =3D &FvbInstance->FvHeader; - if (FvHeader =3D=3D NULL) { - return; - } - - // - // Set up the devicepath - // - DEBUG ((DEBUG_INFO, "FwBlockService.c: Setting up DevicePath for 0x%lx:\= n", FvbInstance->FvBase)); - if (FvHeader->ExtHeaderOffset =3D=3D 0) { - // - // FV does not contains extension header, then produce MEMMAP_DEVICE_P= ATH - // - FvbInstance->DevicePath =3D (EFI_DEVICE_PATH_PROTOCOL *) AllocateRunti= meCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate); - if (FvbInstance->DevicePath =3D=3D NULL) { - DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for MEMMA= P_DEVICE_PATH failed\n")); - return; - } - ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.Sta= rtingAddress =3D FvbInstance->FvBase; - ((FV_MEMMAP_DEVICE_PATH *) FvbInstance->DevicePath)->MemMapDevPath.End= ingAddress =3D FvbInstance->FvBase + FvHeader->FvLength - 1; - } else { - FvbInstance->DevicePath =3D (EFI_DEVICE_PATH_PROTOCOL *) AllocateRunti= meCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate); - if (FvbInstance->DevicePath =3D=3D NULL) { - DEBUG ((DEBUG_INFO, "SpiFvbServiceSmm.c: Memory allocation for FV_PI= WG_DEVICE_PATH failed\n")); - return; - } - CopyGuid ( - &((FV_PIWG_DEVICE_PATH *)FvbInstance->DevicePath)->FvDevPath.FvName, - (GUID *)(UINTN)(FvbInstance->FvBase + FvHeader->ExtHeaderOffset) - ); - } - - // - // LocateDevicePath fails so install a new interface and device path - // - FvbHandle =3D NULL; - - Status =3D gMmst->MmInstallProtocolInterface ( - &FvbHandle, - &gEfiSmmFirmwareVolumeBlockProtocolGuid, - EFI_NATIVE_INTERFACE, - &(FvbInstance->FvbProtocol) - ); - ASSERT_EFI_ERROR (Status); - - Status =3D gMmst->MmInstallProtocolInterface ( - &FvbHandle, - &gEfiDevicePathProtocolGuid, - EFI_NATIVE_INTERFACE, - &(FvbInstance->DevicePath) - ); - ASSERT_EFI_ERROR (Status); -} - -/** - The function does the necessary initialization work for - Firmware Volume Block Driver. - -**/ -VOID -FvbInitialize ( - VOID - ) -{ - EFI_FVB_INSTANCE *FvbInstance; - EFI_FIRMWARE_VOLUME_HEADER *FvHeader; - EFI_FV_BLOCK_MAP_ENTRY *PtrBlockMapEntry; - EFI_PHYSICAL_ADDRESS BaseAddress; - EFI_STATUS Status; - UINTN BufferSize; - UINTN Idx; - UINT32 MaxLbaSize; - UINT32 BytesWritten; - UINTN BytesErased; - - mPlatformFvBaseAddress[0].FvBase =3D PcdGet32(PcdFlashNvStorageVariableB= ase); - mPlatformFvBaseAddress[0].FvSize =3D PcdGet32(PcdFlashNvStorageVariableS= ize); - mPlatformFvBaseAddress[1].FvBase =3D PcdGet32(PcdFlashFvMicrocodeBase); - mPlatformFvBaseAddress[1].FvSize =3D PcdGet32(PcdFlashFvMicrocodeSize); - mPlatformDefaultBaseAddress[0].FvBase =3D PcdGet32(PcdFlashNvStorageVari= ableBase); - mPlatformDefaultBaseAddress[0].FvSize =3D PcdGet32(PcdFlashNvStorageVari= ableSize); - mPlatformDefaultBaseAddress[1].FvBase =3D PcdGet32(PcdFlashFvMicrocodeBa= se); - mPlatformDefaultBaseAddress[1].FvSize =3D PcdGet32(PcdFlashFvMicrocodeSi= ze); - - // - // We will only continue with FVB installation if the - // SPI is the active BIOS state - // - { - // - // Make sure all FVB are valid and/or fix if possible - // - for (Idx =3D 0;; Idx++) { - if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBaseAd= dress[Idx].FvBase =3D=3D 0) { - break; - } - - BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase; - FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress; - - if (!IsFvHeaderValid (BaseAddress, FvHeader)) { - BytesWritten =3D 0; - BytesErased =3D 0; - DEBUG ((DEBUG_ERROR, "ERROR - The FV in 0x%x is invalid!\n", FvHea= der)); - Status =3D GetFvbInfo (BaseAddress, &FvHeader); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "ERROR - Can't recovery FV header at 0x%x. = GetFvbInfo Status %r\n", BaseAddress, Status)); - continue; - } - DEBUG ((DEBUG_INFO, "Rewriting FV header at 0x%X with static data\= n", BaseAddress)); - // - // Spi erase - // - BytesErased =3D (UINTN) FvHeader->BlockMap->Length; - Status =3D SpiFlashBlockErase( (UINTN) BaseAddress, &BytesErased); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "ERROR - SpiFlashBlockErase Error %r\n", St= atus)); - continue; - } - if (BytesErased !=3D FvHeader->BlockMap->Length) { - DEBUG ((DEBUG_WARN, "ERROR - BytesErased !=3D FvHeader->BlockMap= ->Length\n")); - DEBUG ((DEBUG_INFO, " BytesErased =3D 0x%X\n Length =3D 0x%X\n",= BytesErased, FvHeader->BlockMap->Length)); - continue; - } - BytesWritten =3D FvHeader->HeaderLength; - Status =3D SpiFlashWrite ((UINTN)BaseAddress, &BytesWritten, (UINT= 8*)FvHeader); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "ERROR - SpiFlashWrite Error %r\n", Status)= ); - continue; - } - if (BytesWritten !=3D FvHeader->HeaderLength) { - DEBUG ((DEBUG_WARN, "ERROR - BytesWritten !=3D HeaderLength\n")); - DEBUG ((DEBUG_INFO, " BytesWritten =3D 0x%X\n HeaderLength =3D 0= x%X\n", BytesWritten, FvHeader->HeaderLength)); - continue; - } - Status =3D SpiFlashLock (); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "ERROR - SpiFlashLock Error %r\n", Status)); - continue; - } - DEBUG ((DEBUG_INFO, "FV Header @ 0x%X restored with static data\n"= , BaseAddress)); - // - // Clear cache for this range. - // - WriteBackInvalidateDataCacheRange ( (VOID *) (UINTN) BaseAddress, = FvHeader->BlockMap->Length); - } - } - - // - // Calculate the total size for all firmware volume block instances - // - BufferSize =3D 0; - for (Idx =3D 0; ; Idx++) { - if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBaseAd= dress[Idx].FvBase =3D=3D 0) { - break; - } - BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase; - FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress; - - if (!IsFvHeaderValid (BaseAddress, FvHeader)) { - DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHead= er)); - continue; - } - - BufferSize +=3D (FvHeader->HeaderLength + - sizeof (EFI_FVB_INSTANCE) - - sizeof (EFI_FIRMWARE_VOLUME_HEADER) - ); - } - - mFvbModuleGlobal.FvbInstance =3D (EFI_FVB_INSTANCE *) AllocateRuntime= ZeroPool (BufferSize); - if (mFvbModuleGlobal.FvbInstance =3D=3D NULL) { - ASSERT (FALSE); - return; - } - - MaxLbaSize =3D 0; - FvbInstance =3D mFvbModuleGlobal.FvbInstance; - mFvbModuleGlobal.NumFv =3D 0; - - for (Idx =3D 0; ; Idx++) { - if (mPlatformFvBaseAddress[Idx].FvSize =3D=3D 0 && mPlatformFvBaseAd= dress[Idx].FvBase =3D=3D 0) { - break; - } - BaseAddress =3D mPlatformFvBaseAddress[Idx].FvBase; - FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress; - - if (!IsFvHeaderValid (BaseAddress, FvHeader)) { - DEBUG ((DEBUG_WARN, "ERROR - The FV in 0x%x is invalid!\n", FvHead= er)); - continue; - } - - FvbInstance->Signature =3D FVB_INSTANCE_SIGNATURE; - CopyMem (&(FvbInstance->FvHeader), FvHeader, FvHeader->HeaderLength); - - FvHeader =3D &(FvbInstance->FvHeader); - FvbInstance->FvBase =3D (UINTN)BaseAddress; - - // - // Process the block map for each FV - // - FvbInstance->NumOfBlocks =3D 0; - for (PtrBlockMapEntry =3D FvHeader->BlockMap; - PtrBlockMapEntry->NumBlocks !=3D 0; - PtrBlockMapEntry++) { - // - // Get the maximum size of a block. - // - if (MaxLbaSize < PtrBlockMapEntry->Length) { - MaxLbaSize =3D PtrBlockMapEntry->Length; - } - FvbInstance->NumOfBlocks +=3D PtrBlockMapEntry->NumBlocks; - } - - // - // Add a FVB Protocol Instance - // - InstallFvbProtocol (FvbInstance); - mFvbModuleGlobal.NumFv++; - - // - // Move on to the next FvbInstance - // - FvbInstance =3D (EFI_FVB_INSTANCE *) ((UINTN)((UINT8 *)FvbInstance) + - FvHeader->HeaderLength + - (sizeof (EFI_FVB_INSTANCE) - s= izeof (EFI_FIRMWARE_VOLUME_HEADER))); - - } - } -} diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServic= eStandaloneMm.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbS= erviceStandaloneMm.c deleted file mode 100644 index 252c818d6551..000000000000 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStanda= loneMm.c +++ /dev/null @@ -1,32 +0,0 @@ -/** @file - MM driver source for several Serial Flash devices - which are compliant with the Intel(R) Serial Flash Interface Compatibili= ty Specification. - - Copyright (c) Microsoft Corporation.
- SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include "SpiFvbServiceCommon.h" -#include "SpiFvbServiceMm.h" - -/** - The driver Standalone MM entry point. - - @param[in] ImageHandle Image handle of this driver. - @param[in] MmSystemTable A pointer to the MM system table. - - @retval EFI_SUCCESS This function always returns EFI_SUCCESS. - -**/ -EFI_STATUS -EFIAPI -SpiFvbStandaloneMmInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_MM_SYSTEM_TABLE *MmSystemTable - ) -{ - FvbInitialize (); - - return EFI_SUCCESS; -} diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServic= eTraditionalMm.c b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvb= ServiceTraditionalMm.c deleted file mode 100644 index 1c2dac70e3c6..000000000000 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceTradit= ionalMm.c +++ /dev/null @@ -1,32 +0,0 @@ -/** @file - MM driver source for several Serial Flash devices - which are compliant with the Intel(R) Serial Flash Interface Compatibili= ty Specification. - - Copyright (c) Microsoft Corporation.
- SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include "SpiFvbServiceCommon.h" -#include "SpiFvbServiceMm.h" - -/** - The driver Traditional MM entry point. - - @param[in] ImageHandle Image handle of this driver. - @param[in] SystemTable A pointer to the EFI system table. - - @retval EFI_SUCCESS This function always returns EFI_SUCCESS. - -**/ -EFI_STATUS -EFIAPI -SpiFvbTraditionalMmInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - FvbInitialize (); - - return EFI_SUCCESS; -} diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServic= eCommon.h b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbService= Common.h deleted file mode 100644 index e9d69e985814..000000000000 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceCommon= .h +++ /dev/null @@ -1,158 +0,0 @@ -/** @file - Common source definitions used in serial flash drivers - -Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#ifndef _SPI_FVB_SERVICE_COMMON_H -#define _SPI_FVB_SERVICE_COMMON_H - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -// -// Define two helper macro to extract the Capability field or Status field= in FVB -// bit fields -// -#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \ - EFI_FVB2_READ_ENABLED_CAP | \ - EFI_FVB2_WRITE_DISABLED_CAP | \ - EFI_FVB2_WRITE_ENABLED_CAP | \ - EFI_FVB2_LOCK_CAP \ - ) - -#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | EF= I_FVB2_LOCK_STATUS) - -#define FVB_INSTANCE_SIGNATURE SIGNATURE_32('F','V','B','I') - -typedef struct { - UINT32 Signature; - UINTN FvBase; - UINTN NumOfBlocks; - EFI_DEVICE_PATH_PROTOCOL *DevicePath; - EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL FvbProtocol; - EFI_FIRMWARE_VOLUME_HEADER FvHeader; -} EFI_FVB_INSTANCE; - -typedef struct { - EFI_FVB_INSTANCE *FvbInstance; - UINT32 NumFv; -} FVB_GLOBAL; - -// -// Fvb Protocol instance data -// -#define FVB_INSTANCE_FROM_THIS(a) CR(a, EFI_FVB_INSTANCE, FvbProtocol, FVB= _INSTANCE_SIGNATURE) - -typedef struct { - MEDIA_FW_VOL_DEVICE_PATH FvDevPath; - EFI_DEVICE_PATH_PROTOCOL EndDevPath; -} FV_PIWG_DEVICE_PATH; - -typedef struct { - MEMMAP_DEVICE_PATH MemMapDevPath; - EFI_DEVICE_PATH_PROTOCOL EndDevPath; -} FV_MEMMAP_DEVICE_PATH; - -typedef struct { - UINT32 FvBase; - UINT32 FvSize; -} FV_INFO; - -// -// Protocol APIs -// -EFI_STATUS -EFIAPI -FvbProtocolGetAttributes ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - OUT EFI_FVB_ATTRIBUTES_2 *Attributes - ); - -EFI_STATUS -EFIAPI -FvbProtocolSetAttributes ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes - ); - -EFI_STATUS -EFIAPI -FvbProtocolGetPhysicalAddress ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - OUT EFI_PHYSICAL_ADDRESS *Address - ); - -EFI_STATUS -EFIAPI -FvbProtocolGetBlockSize ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - IN EFI_LBA Lba, - OUT UINTN *BlockSize, - OUT UINTN *NumOfBlocks - ); - -EFI_STATUS -EFIAPI -FvbProtocolRead ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - IN EFI_LBA Lba, - IN UINTN Offset, - IN OUT UINTN *NumBytes, - OUT UINT8 *Buffer - ); - -EFI_STATUS -EFIAPI -FvbProtocolWrite ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - IN EFI_LBA Lba, - IN UINTN Offset, - IN OUT UINTN *NumBytes, - IN UINT8 *Buffer - ); - -EFI_STATUS -EFIAPI -FvbProtocolEraseBlocks ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This, - ... - ); - -BOOLEAN -IsFvHeaderValid ( - IN EFI_PHYSICAL_ADDRESS FvBase, - IN CONST EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader - ); - -EFI_STATUS -GetFvbInfo ( - IN EFI_PHYSICAL_ADDRESS FvBaseAddress, - OUT EFI_FIRMWARE_VOLUME_HEADER **FvbInfo - ); - -extern FVB_GLOBAL mFvbModuleGlobal; -extern FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate; -extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate; -extern EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL mFvbProtocolTemplate; -extern FV_INFO mPlatformFvBaseAddress[]; -extern FV_INFO mPlatformDefaultBaseAddress[]; - -#endif diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServic= eMm.h b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h deleted file mode 100644 index 36af1130c8ee..000000000000 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceMm.h +++ /dev/null @@ -1,22 +0,0 @@ -/** @file - Definitions common to MM implementation in this driver. - - Copyright (c) Microsoft Corporation.
- SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#ifndef _SPI_FVB_SERVICE_MM_H_ -#define _SPI_FVB_SERVICE_MM_H_ - -/** - The function does the necessary initialization work for - Firmware Volume Block Driver. - -**/ -VOID -FvbInitialize ( - VOID - ); - -#endif diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServic= eSmm.inf b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceS= mm.inf deleted file mode 100644 index 10e51e11756f..000000000000 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf +++ /dev/null @@ -1,68 +0,0 @@ -### @file -# Component description file for the Serial Flash device Runtime driver. -# -# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.
-# Copyright (c) Microsoft Corporation.
-# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -### - -[Defines] - INF_VERSION =3D 0x00010017 - BASE_NAME =3D SpiFvbServiceSmm - FILE_GUID =3D 68A10D85-6858-4402-B070-028B3EA21747 - VERSION_STRING =3D 1.0 - MODULE_TYPE =3D DXE_SMM_DRIVER - PI_SPECIFICATION_VERSION =3D 1.10 - ENTRY_POINT =3D SpiFvbTraditionalMmInitialize - -# -# The following information is for reference only and not required by the = build tools. -# -# VALID_ARCHITECTURES =3D IA32 X64 -# - -[LibraryClasses] - PcdLib - MemoryAllocationLib - CacheMaintenanceLib - BaseMemoryLib - DebugLib - BaseLib - UefiBootServicesTableLib - UefiDriverEntryPoint - SpiFlashCommonLib - MmServicesTableLib - -[Packages] - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - MinPlatformPkg/MinPlatformPkg.dec - -[Pcd] - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUM= ES - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUM= ES - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUM= ES - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUM= ES - gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase ## CONSUM= ES - gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize ## CONSUM= ES - -[Sources] - FvbInfo.c - SpiFvbServiceCommon.h - SpiFvbServiceCommon.c - SpiFvbServiceMm.h - SpiFvbServiceMm.c - SpiFvbServiceTraditionalMm.c - -[Protocols] - gEfiDevicePathProtocolGuid ## PRODUCES - gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES - -[Guids] - gEfiFirmwareFileSystem2Guid ## CONSUMES - gEfiSystemNvDataFvGuid ## CONSUMES - -[Depex] - TRUE diff --git a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServic= eStandaloneMm.inf b/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFv= bServiceStandaloneMm.inf deleted file mode 100644 index 9f08d3673f41..000000000000 --- a/Platform/Intel/MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStanda= loneMm.inf +++ /dev/null @@ -1,67 +0,0 @@ -### @file -# Component description file for the Serial Flash device Standalone MM dri= ver. -# -# Copyright (c) 2017-2019, Intel Corporation. All rights reserved.
-# Copyright (c) Microsoft Corporation.
-# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -### - -[Defines] - INF_VERSION =3D 0x0001001B - BASE_NAME =3D SpiFvbServiceStandaloneMm - FILE_GUID =3D E6313655-8BD0-4EAB-B319-AD5E212CE6AB - VERSION_STRING =3D 1.0 - MODULE_TYPE =3D MM_STANDALONE - PI_SPECIFICATION_VERSION =3D 0x00010032 - ENTRY_POINT =3D SpiFvbStandaloneMmInitialize - -# -# The following information is for reference only and not required by the = build tools. -# -# VALID_ARCHITECTURES =3D IA32 X64 -# - -[LibraryClasses] - BaseLib - BaseMemoryLib - CacheMaintenanceLib - DebugLib - MemoryAllocationLib - PcdLib - MmServicesTableLib - SpiFlashCommonLib - StandaloneMmDriverEntryPoint - -[Packages] - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - MinPlatformPkg/MinPlatformPkg.dec - -[Pcd] - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase ## CONSUM= ES - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize ## CONSUM= ES - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize ## CONSUM= ES - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUM= ES - gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase ## CONSUM= ES - gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize ## CONSUM= ES - -[Sources] - FvbInfo.c - SpiFvbServiceCommon.h - SpiFvbServiceCommon.c - SpiFvbServiceMm.h - SpiFvbServiceMm.c - SpiFvbServiceStandaloneMm.c - -[Protocols] - gEfiDevicePathProtocolGuid ## PRODUCES - gEfiSmmFirmwareVolumeBlockProtocolGuid ## PRODUCES - -[Guids] - gEfiFirmwareFileSystem2Guid ## CONSUMES - gEfiSystemNvDataFvGuid ## CONSUMES - -[Depex] - TRUE diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc b/Platform/In= tel/MinPlatformPkg/MinPlatformPkg.dsc index 35cbd40abb05..15867eee4e61 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc @@ -159,8 +159,6 @@ [Components] =20 MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootMana= gerLib.inf =20 - MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf - MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceStandaloneMm.inf MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull= .inf =20 MinPlatformPkg/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75331): https://edk2.groups.io/g/devel/message/75331 Mute This Topic: https://groups.io/mt/82929234/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75332+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75332+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396849; cv=none; d=zohomail.com; s=zohoarc; b=kyni+8S2aloHtMd3iC615exBApEVT+BJCoYIy1cC+rUXp4oeogCHBH3pbNMDTw/4XsBFDjHB8E9jOuVfwx/jpTnXltPLlZDhSnRtZI4yu4vE5H90w2BEhyvJ9JQ9cy51vO3LxgMvpvCLJbhUlB/Cz/+A9Y+bGX7F0e2v9WWsNjM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396849; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=k/FjK64RCsOxsaE4FsekOvEempIrmTw8hdvBR7zilFA=; b=fgBJeQ/MxOmFh0cilYzjZeolNiVOg+ZEY2eiK/gs5vq1Tr2ullMLZAhRClUWG6q2PwlpBtiPOFRa7bttaqwvr8eGpbHCdKZYkx7uIa8FCxoNM6Bfq1rHSo0KSGQoHWjspBFMLHxc7vr/fIHpsRBlR5JYrUrqL60/+tx8GFYBs3o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75332+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396849743464.0359527936564; Tue, 18 May 2021 21:00:49 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id HzySYY1788612xTD2lJzQwkv; Tue, 18 May 2021 21:00:49 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web12.6913.1621396846454947462 for ; Tue, 18 May 2021 21:00:46 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 34D9820B7188; Tue, 18 May 2021 21:00:46 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 34D9820B7188 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Sai Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 26/35] CoffeelakeSiliconPkg: Remove SmmSpiFlashCommonLib Date: Tue, 18 May 2021 20:59:38 -0700 Message-Id: <20210519035947.1234-27-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: 8aqodKGaZCc1GriUBaBAQ8olx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396849; bh=dnLNFDaeWshwolWzwKaIylpq9DyAGUoIUi5Pxt0wJF4=; h=Cc:Date:From:Reply-To:Subject:To; b=rnDdorRK65x3kyd1drA239EnjvfOrKqbbpLL70TBuHQab5u7vHDgEWBDwmnIbx9UcP+ tQNTvi1HJM9rTb2RGLXc54Xk9e39b+S9pC0D30FiqgkVcyslpk5KOvNYZtIG+SjAhOdAR CRhSKbbkpJ6r3AtRbTaPszboWvajSDmUVIk= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 The library has been consolidated with instances in other Intel silicon packages as a single instance in IntelSiliconPkg. Cc: Chasel Chiu Cc: Sai Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Chasel Chiu Reviewed-by: Nate DeSimone --- Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFla= shCommon.c | 196 -------------------- Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFla= shCommonSmmLib.c | 54 ------ Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h= | 98 ---------- Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpi= FlashCommonLib.inf | 51 ----- 4 files changed, 399 deletions(-) diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashComm= onLib/SpiFlashCommon.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Smm= SpiFlashCommonLib/SpiFlashCommon.c deleted file mode 100644 index 53711db6325f..000000000000 --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S= piFlashCommon.c +++ /dev/null @@ -1,196 +0,0 @@ -/** @file - Wrap EFI_SPI_PROTOCOL to provide some library level interfaces - for module use. - - Copyright (c) 2019 Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#include -#include -#include -#include -#include -#include - - -PCH_SPI_PROTOCOL *mSpiProtocol; - -// -// FlashAreaBaseAddress and Size for boottime and runtime usage. -// -UINTN mFlashAreaBaseAddress =3D 0; -UINTN mFlashAreaSize =3D 0; - -/** - Enable block protection on the Serial Flash device. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashLock ( - VOID - ) -{ - return EFI_SUCCESS; -} - -/** - Read NumBytes bytes of data from the address specified by - PAddress into Buffer. - - @param[in] Address The starting physical address of the read. - @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number - of bytes actually read. - @param[out] Buffer The destination data buffer for the read. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashRead ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - OUT UINT8 *Buffer - ) -{ - ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); - if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { - return EFI_INVALID_PARAMETER; - } - - // - // This function is implemented specifically for those platforms - // at which the SPI device is memory mapped for read. So this - // function just do a memory copy for Spi Flash Read. - // - CopyMem (Buffer, (VOID *) Address, *NumBytes); - - return EFI_SUCCESS; -} - -/** - Write NumBytes bytes of data from Buffer to the address specified by - PAddresss. - - @param[in] Address The starting physical address of the wri= te. - @param[in,out] NumBytes On input, the number of bytes to write. = On output, - the actual number of bytes written. - @param[in] Buffer The source data buffer for the write. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashWrite ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - IN UINT8 *Buffer - ) -{ - EFI_STATUS Status; - UINTN Offset; - UINT32 Length; - UINT32 RemainingBytes; - - ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); - if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { - return EFI_INVALID_PARAMETER; - } - - ASSERT (Address >=3D mFlashAreaBaseAddress); - - Offset =3D Address - mFlashAreaBaseAddress; - - ASSERT ((*NumBytes + Offset) <=3D mFlashAreaSize); - - Status =3D EFI_SUCCESS; - RemainingBytes =3D *NumBytes; - - - while (RemainingBytes > 0) { - if (RemainingBytes > SECTOR_SIZE_4KB) { - Length =3D SECTOR_SIZE_4KB; - } else { - Length =3D RemainingBytes; - } - Status =3D mSpiProtocol->FlashWrite ( - mSpiProtocol, - FlashRegionBios, - (UINT32) Offset, - Length, - Buffer - ); - if (EFI_ERROR (Status)) { - break; - } - RemainingBytes -=3D Length; - Offset +=3D Length; - Buffer +=3D Length; - } - - // - // Actual number of bytes written - // - *NumBytes -=3D RemainingBytes; - - return Status; -} - -/** - Erase the block starting at Address. - - @param[in] Address The starting physical address of the block t= o be erased. - This library assume that caller garantee tha= t the PAddress - is at the starting address of this block. - @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. - On output, the actual number of bytes erased. - - @retval EFI_SUCCESS. Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashBlockErase ( - IN UINTN Address, - IN UINTN *NumBytes - ) -{ - EFI_STATUS Status; - UINTN Offset; - UINTN RemainingBytes; - - ASSERT (NumBytes !=3D NULL); - if (NumBytes =3D=3D NULL) { - return EFI_INVALID_PARAMETER; - } - - ASSERT (Address >=3D mFlashAreaBaseAddress); - - Offset =3D Address - mFlashAreaBaseAddress; - - ASSERT ((*NumBytes % SECTOR_SIZE_4KB) =3D=3D 0); - ASSERT ((*NumBytes + Offset) <=3D mFlashAreaSize); - - Status =3D EFI_SUCCESS; - RemainingBytes =3D *NumBytes; - - - Status =3D mSpiProtocol->FlashErase ( - mSpiProtocol, - FlashRegionBios, - (UINT32) Offset, - (UINT32) RemainingBytes - ); - return Status; -} - diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashComm= onLib/SpiFlashCommonSmmLib.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Libra= ry/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c deleted file mode 100644 index 43c0218d85df..000000000000 --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S= piFlashCommonSmmLib.c +++ /dev/null @@ -1,54 +0,0 @@ -/** @file - SMM Library instance of SPI Flash Common Library Class - - Copyright (c) 2019 Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#include -#include -#include - -extern PCH_SPI_PROTOCOL *mSpiProtocol; - -extern UINTN mFlashAreaBaseAddress; -extern UINTN mFlashAreaSize; - -/** - The library constructuor. - - The function does the necessary initialization work for this library - instance. - - @param[in] ImageHandle The firmware allocated handle for the UEFI= image. - @param[in] SystemTable A pointer to the EFI system table. - - @retval EFI_SUCCESS The function always return EFI_SUCCESS for= now. - It will ASSERT on error for debug version. - @retval EFI_ERROR Please reference LocateProtocol for error = code details. -**/ -EFI_STATUS -EFIAPI -SmmSpiFlashCommonLibConstructor ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - - mFlashAreaBaseAddress =3D (UINTN)PcdGet32 (PcdBiosAreaBaseAddress); - mFlashAreaSize =3D (UINTN)PcdGet32 (PcdBiosSize); - - // - // Locate the SMM SPI protocol. - // - Status =3D gSmst->SmmLocateProtocol ( - &gPchSmmSpiProtocolGuid, - NULL, - (VOID **) &mSpiProtocol - ); - ASSERT_EFI_ERROR (Status); - - return Status; -} diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiFlas= hCommonLib.h b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiFl= ashCommonLib.h deleted file mode 100644 index 53c11bb59ac6..000000000000 --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/SpiFlashCommon= Lib.h +++ /dev/null @@ -1,98 +0,0 @@ -/** @file - The header file includes the common header files, defines - internal structure and functions used by SpiFlashCommonLib. - - Copyright (c) 2019 Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#ifndef __SPI_FLASH_COMMON_LIB_H__ -#define __SPI_FLASH_COMMON_LIB_H__ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size -/** - Enable block protection on the Serial Flash device. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashLock ( - VOID - ); - -/** - Read NumBytes bytes of data from the address specified by - PAddress into Buffer. - - @param[in] Address The starting physical address of the read. - @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number - of bytes actually read. - @param[out] Buffer The destination data buffer for the read. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashRead ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - OUT UINT8 *Buffer - ); - -/** - Write NumBytes bytes of data from Buffer to the address specified by - PAddresss. - - @param[in] Address The starting physical address of the wri= te. - @param[in,out] NumBytes On input, the number of bytes to write. = On output, - the actual number of bytes written. - @param[in] Buffer The source data buffer for the write. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashWrite ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - IN UINT8 *Buffer - ); - -/** - Erase the block starting at Address. - - @param[in] Address The starting physical address of the block t= o be erased. - This library assume that caller garantee tha= t the PAddress - is at the starting address of this block. - @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. - On output, the actual number of bytes erased. - - @retval EFI_SUCCESS. Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashBlockErase ( - IN UINTN Address, - IN UINTN *NumBytes - ); - -#endif diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashComm= onLib/SmmSpiFlashCommonLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Lib= rary/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf deleted file mode 100644 index abc919867ca2..000000000000 --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S= mmSpiFlashCommonLib.inf +++ /dev/null @@ -1,51 +0,0 @@ -## @file -# SMM Library instance of Spi Flash Common Library Class -# -# Copyright (c) 2019 Intel Corporation. All rights reserved.
-# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION =3D 0x00010017 - BASE_NAME =3D SmmSpiFlashCommonLib - FILE_GUID =3D 9632D96E-E849-4217-9217-DC500B8AAE47 - VERSION_STRING =3D 1.0 - MODULE_TYPE =3D DXE_SMM_DRIVER - LIBRARY_CLASS =3D SpiFlashCommonLib|DXE_SMM_DRIVER - CONSTRUCTOR =3D SmmSpiFlashCommonLibConstructor -# -# The following information is for reference only and not required by the = build tools. -# -# VALID_ARCHITECTURES =3D IA32 X64 -# - -[LibraryClasses] - PciLib - IoLib - MemoryAllocationLib - BaseLib - UefiLib - SmmServicesTableLib - BaseMemoryLib - DebugLib - MmPciLib - -[Packages] - MdePkg/MdePkg.dec - CoffeelakeSiliconPkg/SiPkg.dec - -[Pcd] - gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES - gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES - -[Sources] - SpiFlashCommonSmmLib.c - SpiFlashCommon.c - -[Protocols] - gPchSmmSpiProtocolGuid ## CONSUMES - -[Depex.X64.DXE_SMM_DRIVER] - gPchSmmSpiProtocolGuid --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75332): https://edk2.groups.io/g/devel/message/75332 Mute This Topic: https://groups.io/mt/82929236/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75333+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75333+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396849; cv=none; d=zohomail.com; s=zohoarc; b=jRM7BPFA6ExPiiJY9e0QL4bctBYw6V1nZXUDVNavni0T82PHqZkxcvIwhKRIjgNOLkzFc+RofCmZ+eDAZD/gDCuo9khvukU9MLRqsFM34y1gx2SjNlqBPifmJTpp8y/vxHtSIJltDISqsxkiPTOanq2nudeauqWMJhJBoE3Mjeg= ARC-Message-Signature: i=1; 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Tue, 18 May 2021 21:00:48 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id AEC8E20B7178; Tue, 18 May 2021 21:00:47 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com AEC8E20B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Sai Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 27/35] KabylakeSiliconPkg: Remove SmmSpiFlashCommonLib Date: Tue, 18 May 2021 20:59:39 -0700 Message-Id: <20210519035947.1234-28-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: Cs1IysS4tKPGfnlONhcfuY1Qx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396848; bh=LI5UuZoyDjeZVMnLDg5TlPtTvQiU122xQuTPBRP30OU=; h=Cc:Date:From:Reply-To:Subject:To; b=e82RPxUqPrVsVol5NXopqHQtQ8tN9HJXbw+bgC1dEgaxKeEoFekttH5pR5rt7vSo1nO 2BOmt5dg4/cmNN/Kwoh6TWRgmfPesEU9niSu/HzF0lyikMs1yTW5J1492T//Ea/6kDShV PIBxhEOFDGGLy0KbvbKTLRGON5XY4dVZGpE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 The library has been consolidated with instances in other Intel silicon packages as a single instance in IntelSiliconPkg Cc: Chasel Chiu Cc: Sai Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlash= Common.c | 196 -------------------- Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFlash= CommonSmmLib.c | 54 ------ Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLib.h = | 98 ---------- Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpiFl= ashCommonLib.inf | 53 ------ 4 files changed, 401 deletions(-) diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommon= Lib/SpiFlashCommon.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiF= lashCommonLib/SpiFlashCommon.c deleted file mode 100644 index 7ee7ffab5001..000000000000 --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/Spi= FlashCommon.c +++ /dev/null @@ -1,196 +0,0 @@ -/** @file - Wrap EFI_SPI_PROTOCOL to provide some library level interfaces - for module use. - -Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include -#include -#include -#include -#include - - -PCH_SPI_PROTOCOL *mSpiProtocol; - -// -// FlashAreaBaseAddress and Size for boottime and runtime usage. -// -UINTN mFlashAreaBaseAddress =3D 0; -UINTN mFlashAreaSize =3D 0; - -/** - Enable block protection on the Serial Flash device. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashLock ( - VOID - ) -{ - return EFI_SUCCESS; -} - -/** - Read NumBytes bytes of data from the address specified by - PAddress into Buffer. - - @param[in] Address The starting physical address of the read. - @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number - of bytes actually read. - @param[out] Buffer The destination data buffer for the read. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashRead ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - OUT UINT8 *Buffer - ) -{ - ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); - if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { - return EFI_INVALID_PARAMETER; - } - - // - // This function is implemented specifically for those platforms - // at which the SPI device is memory mapped for read. So this - // function just do a memory copy for Spi Flash Read. - // - CopyMem (Buffer, (VOID *) Address, *NumBytes); - - return EFI_SUCCESS; -} - -/** - Write NumBytes bytes of data from Buffer to the address specified by - PAddresss. - - @param[in] Address The starting physical address of the wri= te. - @param[in,out] NumBytes On input, the number of bytes to write. = On output, - the actual number of bytes written. - @param[in] Buffer The source data buffer for the write. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashWrite ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - IN UINT8 *Buffer - ) -{ - EFI_STATUS Status; - UINTN Offset; - UINT32 Length; - UINT32 RemainingBytes; - - ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); - if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { - return EFI_INVALID_PARAMETER; - } - - ASSERT (Address >=3D mFlashAreaBaseAddress); - - Offset =3D Address - mFlashAreaBaseAddress; - - ASSERT ((*NumBytes + Offset) <=3D mFlashAreaSize); - - Status =3D EFI_SUCCESS; - RemainingBytes =3D *NumBytes; - - - while (RemainingBytes > 0) { - if (RemainingBytes > SECTOR_SIZE_4KB) { - Length =3D SECTOR_SIZE_4KB; - } else { - Length =3D RemainingBytes; - } - Status =3D mSpiProtocol->FlashWrite ( - mSpiProtocol, - FlashRegionBios, - (UINT32) Offset, - Length, - Buffer - ); - if (EFI_ERROR (Status)) { - break; - } - RemainingBytes -=3D Length; - Offset +=3D Length; - Buffer +=3D Length; - } - - // - // Actual number of bytes written - // - *NumBytes -=3D RemainingBytes; - - return Status; -} - -/** - Erase the block starting at Address. - - @param[in] Address The starting physical address of the block t= o be erased. - This library assume that caller garantee tha= t the PAddress - is at the starting address of this block. - @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. - On output, the actual number of bytes erased. - - @retval EFI_SUCCESS. Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashBlockErase ( - IN UINTN Address, - IN UINTN *NumBytes - ) -{ - EFI_STATUS Status; - UINTN Offset; - UINTN RemainingBytes; - - ASSERT (NumBytes !=3D NULL); - if (NumBytes =3D=3D NULL) { - return EFI_INVALID_PARAMETER; - } - - ASSERT (Address >=3D mFlashAreaBaseAddress); - - Offset =3D Address - mFlashAreaBaseAddress; - - ASSERT ((*NumBytes % SECTOR_SIZE_4KB) =3D=3D 0); - ASSERT ((*NumBytes + Offset) <=3D mFlashAreaSize); - - Status =3D EFI_SUCCESS; - RemainingBytes =3D *NumBytes; - - - Status =3D mSpiProtocol->FlashErase ( - mSpiProtocol, - FlashRegionBios, - (UINT32) Offset, - (UINT32) RemainingBytes - ); - return Status; -} - diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommon= Lib/SpiFlashCommonSmmLib.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/S= mmSpiFlashCommonLib/SpiFlashCommonSmmLib.c deleted file mode 100644 index 11133163d2d4..000000000000 --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/Spi= FlashCommonSmmLib.c +++ /dev/null @@ -1,54 +0,0 @@ -/** @file - SMM Library instance of SPI Flash Common Library Class - -Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include -#include - -extern PCH_SPI_PROTOCOL *mSpiProtocol; - -extern UINTN mFlashAreaBaseAddress; -extern UINTN mFlashAreaSize; - -/** - The library constructuor. - - The function does the necessary initialization work for this library - instance. - - @param[in] ImageHandle The firmware allocated handle for the UEFI= image. - @param[in] SystemTable A pointer to the EFI system table. - - @retval EFI_SUCCESS The function always return EFI_SUCCESS for= now. - It will ASSERT on error for debug version. - @retval EFI_ERROR Please reference LocateProtocol for error = code details. -**/ -EFI_STATUS -EFIAPI -SmmSpiFlashCommonLibConstructor ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - - mFlashAreaBaseAddress =3D (UINTN)PcdGet32 (PcdFlashAreaBaseAddress); - mFlashAreaSize =3D (UINTN)PcdGet32 (PcdFlashAreaSize); - - // - // Locate the SMM SPI protocol. - // - Status =3D gSmst->SmmLocateProtocol ( - &gPchSmmSpiProtocolGuid, - NULL, - (VOID **) &mSpiProtocol - ); - ASSERT_EFI_ERROR (Status); - - return Status; -} diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashC= ommonLib.h b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashC= ommonLib.h deleted file mode 100644 index 0c5e72258c2d..000000000000 --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiFlashCommonLi= b.h +++ /dev/null @@ -1,98 +0,0 @@ -/** @file - The header file includes the common header files, defines - internal structure and functions used by SpiFlashCommonLib. - -Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#ifndef __SPI_FLASH_COMMON_LIB_H__ -#define __SPI_FLASH_COMMON_LIB_H__ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size -/** - Enable block protection on the Serial Flash device. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashLock ( - VOID - ); - -/** - Read NumBytes bytes of data from the address specified by - PAddress into Buffer. - - @param[in] Address The starting physical address of the read. - @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number - of bytes actually read. - @param[out] Buffer The destination data buffer for the read. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashRead ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - OUT UINT8 *Buffer - ); - -/** - Write NumBytes bytes of data from Buffer to the address specified by - PAddresss. - - @param[in] Address The starting physical address of the wri= te. - @param[in,out] NumBytes On input, the number of bytes to write. = On output, - the actual number of bytes written. - @param[in] Buffer The source data buffer for the write. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashWrite ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - IN UINT8 *Buffer - ); - -/** - Erase the block starting at Address. - - @param[in] Address The starting physical address of the block t= o be erased. - This library assume that caller garantee tha= t the PAddress - is at the starting address of this block. - @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. - On output, the actual number of bytes erased. - - @retval EFI_SUCCESS. Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashBlockErase ( - IN UINTN Address, - IN UINTN *NumBytes - ); - -#endif diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommon= Lib/SmmSpiFlashCommonLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library= /SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf deleted file mode 100644 index d712b9e5f769..000000000000 --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/Smm= SpiFlashCommonLib.inf +++ /dev/null @@ -1,53 +0,0 @@ -### @file -# SMM Library instance of Spi Flash Common Library Class -# -# Copyright (c) 2017, Intel Corporation. All rights reserved.
-# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -### - -[Defines] - INF_VERSION =3D 0x00010017 - BASE_NAME =3D SmmSpiFlashCommonLib - FILE_GUID =3D 9632D96E-E849-4217-9217-DC500B8AAE47 - VERSION_STRING =3D 1.0 - MODULE_TYPE =3D DXE_SMM_DRIVER - LIBRARY_CLASS =3D SpiFlashCommonLib|DXE_SMM_DRIVER - CONSTRUCTOR =3D SmmSpiFlashCommonLibConstructor -# -# The following information is for reference only and not required by the = build tools. -# -# VALID_ARCHITECTURES =3D IA32 X64 -# - -[LibraryClasses] - PciLib - IoLib - MemoryAllocationLib - BaseLib - UefiLib - SmmServicesTableLib - BaseMemoryLib - DebugLib - MmPciLib - -[Packages] - MdePkg/MdePkg.dec - KabylakeSiliconPkg/SiPkg.dec - -[Pcd] - gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES - gSiPkgTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES - gSiPkgTokenSpaceGuid.PcdBiosGuardEnable ## CONSUMES - -[Sources] - SpiFlashCommonSmmLib.c - SpiFlashCommon.c - -[Protocols] - gPchSmmSpiProtocolGuid ## CONSUMES - gSmmBiosGuardProtocolGuid ## CONSUMES - -[Depex.X64.DXE_SMM_DRIVER] - gPchSmmSpiProtocolGuid --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75333): https://edk2.groups.io/g/devel/message/75333 Mute This Topic: https://groups.io/mt/82929237/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75334+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75334+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396856; cv=none; d=zohomail.com; s=zohoarc; b=Udhtq8lJSfuz2u9ZMohKzXuv3PlFAqzuE6Mv5bQOl6aZdKTt2BnY1KO71+S4bYzBXFHVGphsDea7v6Ob6yXf7KapByO15YAn97AtGUwvTw6ACLFxnf09yQC822fg9aRig9u7p7kOAs/iHkJhT8oKKL4YAVY7x8u9y6gRq13MpvI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396856; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=19XHKtZM3HXcPt7wzSc3phV/80SKbr2FK58y45XK/XM=; b=IxmMCYT9JWZaV+Rjuhgoife9Ndg+vA5/QJzcoWn2379w+Em+uzwuMPHCiFxQt4w7JybnLhsHPJxR7suYg/bdeKqxaCq1E7oLjo7KDSbiRXvpsOqOWNJpehHSwo5LT7PDBOC0hr8x0ZFXsOj60OFBEBdDaZOBo6sG1QicuwkWfGI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75334+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396856488426.305317363638; Tue, 18 May 2021 21:00:56 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id A2xZYY1788612xUrWPhGNNOO; Tue, 18 May 2021 21:00:55 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web11.6952.1621396849584062233 for ; Tue, 18 May 2021 21:00:49 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 582C720B7178; Tue, 18 May 2021 21:00:49 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 582C720B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Agyeman Prince Subject: [edk2-devel] [edk2-platforms][PATCH v2 28/35] SimicsIch10Pkg: Remove SmmSpiFlashCommonLib Date: Tue, 18 May 2021 20:59:40 -0700 Message-Id: <20210519035947.1234-29-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: 5siLnZLDecX5gBAyUv9ZYiFrx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396855; bh=/7zLFp3n3m0kgQu5fm5G6mlr4HoKRbSBA+A6vB+25uo=; h=Cc:Date:From:Reply-To:Subject:To; b=coq/OI5x37bsIKUA6xaxbuwLxjPhxnHGRLVEt7IfKp5mpEdUfpSarplLg+k38qLH66F Fc7vuyBdTvmuUQ90hEJwjyIe6U4ekTZkZfrw4HefubRowk7CPzvq+LIICEEHGPjs7djjr sEJk/d/LWdbccySM9Vmna+C2JBfWtLf7hrk= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 The library has been consolidated with instances in other Intel silicon packages as a single instance in IntelSiliconPkg Cc: Agyeman Prince Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c= | 194 -------------------- Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCommonSm= mLib.c | 54 ------ Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib.h = | 98 ---------- Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommo= nLib.inf | 50 ----- 4 files changed, 396 deletions(-) diff --git a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiF= lashCommon.c b/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/Sp= iFlashCommon.c deleted file mode 100644 index 9e3461cbd600..000000000000 --- a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCom= mon.c +++ /dev/null @@ -1,194 +0,0 @@ -/** @file - Wrap EFI_SPI_PROTOCOL to provide some library level interfaces - for module use. - - Copyright (c) 2019 Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#include -#include -#include -#include - - -EFI_SPI_PROTOCOL *mSpiProtocol; - -// -// FlashAreaBaseAddress and Size for boottime and runtime usage. -// -UINTN mFlashAreaBaseAddress =3D 0; -UINTN mFlashAreaSize =3D 0; - -/** - Enable block protection on the Serial Flash device. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashLock ( - VOID - ) -{ - return EFI_SUCCESS; -} - -/** - Read NumBytes bytes of data from the address specified by - PAddress into Buffer. - - @param[in] Address The starting physical address of the read. - @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number - of bytes actually read. - @param[out] Buffer The destination data buffer for the read. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashRead ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - OUT UINT8 *Buffer - ) -{ - ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); - if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { - return EFI_INVALID_PARAMETER; - } - - // - // This function is implemented specifically for those platforms - // at which the SPI device is memory mapped for read. So this - // function just do a memory copy for Spi Flash Read. - // - CopyMem (Buffer, (VOID *) Address, *NumBytes); - - return EFI_SUCCESS; -} - -/** - Write NumBytes bytes of data from Buffer to the address specified by - PAddresss. - - @param[in] Address The starting physical address of the wri= te. - @param[in,out] NumBytes On input, the number of bytes to write. = On output, - the actual number of bytes written. - @param[in] Buffer The source data buffer for the write. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashWrite ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - IN UINT8 *Buffer - ) -{ - EFI_STATUS Status; - UINTN Offset; - UINT32 Length; - UINT32 RemainingBytes; - - ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); - if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { - return EFI_INVALID_PARAMETER; - } - - ASSERT (Address >=3D mFlashAreaBaseAddress); - - Offset =3D Address - mFlashAreaBaseAddress; - - ASSERT ((*NumBytes + Offset) <=3D mFlashAreaSize); - - Status =3D EFI_SUCCESS; - RemainingBytes =3D *NumBytes; - - - while (RemainingBytes > 0) { - if (RemainingBytes > SECTOR_SIZE_4KB) { - Length =3D SECTOR_SIZE_4KB; - } else { - Length =3D RemainingBytes; - } - Status =3D mSpiProtocol->FlashWrite ( - mSpiProtocol, - FlashRegionBios, - (UINT32) Offset, - Length, - Buffer - ); - if (EFI_ERROR (Status)) { - break; - } - RemainingBytes -=3D Length; - Offset +=3D Length; - Buffer +=3D Length; - } - - // - // Actual number of bytes written - // - *NumBytes -=3D RemainingBytes; - - return Status; -} - -/** - Erase the block starting at Address. - - @param[in] Address The starting physical address of the block t= o be erased. - This library assume that caller garantee tha= t the PAddress - is at the starting address of this block. - @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. - On output, the actual number of bytes erased. - - @retval EFI_SUCCESS. Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashBlockErase ( - IN UINTN Address, - IN UINTN *NumBytes - ) -{ - EFI_STATUS Status; - UINTN Offset; - UINTN RemainingBytes; - - ASSERT (NumBytes !=3D NULL); - if (NumBytes =3D=3D NULL) { - return EFI_INVALID_PARAMETER; - } - - ASSERT (Address >=3D mFlashAreaBaseAddress); - - Offset =3D Address - mFlashAreaBaseAddress; - - ASSERT ((*NumBytes % SECTOR_SIZE_4KB) =3D=3D 0); - ASSERT ((*NumBytes + Offset) <=3D mFlashAreaSize); - - Status =3D EFI_SUCCESS; - RemainingBytes =3D *NumBytes; - - - Status =3D mSpiProtocol->FlashErase ( - mSpiProtocol, - FlashRegionBios, - (UINT32) Offset, - (UINT32) RemainingBytes - ); - return Status; -} - diff --git a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiF= lashCommonSmmLib.c b/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommon= Lib/SpiFlashCommonSmmLib.c deleted file mode 100644 index 984b7733c6b9..000000000000 --- a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SpiFlashCom= monSmmLib.c +++ /dev/null @@ -1,54 +0,0 @@ -/** @file - SMM Library instance of SPI Flash Common Library Class - - Copyright (c) 2019 Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#include -#include -#include - -extern EFI_SPI_PROTOCOL *mSpiProtocol; - -extern UINTN mFlashAreaBaseAddress; -extern UINTN mFlashAreaSize; - -/** - The library constructuor. - - The function does the necessary initialization work for this library - instance. - - @param[in] ImageHandle The firmware allocated handle for the UEFI= image. - @param[in] SystemTable A pointer to the EFI system table. - - @retval EFI_SUCCESS The function always return EFI_SUCCESS for= now. - It will ASSERT on error for debug version. - @retval EFI_ERROR Please reference LocateProtocol for error = code details. -**/ -EFI_STATUS -EFIAPI -SmmSpiFlashCommonLibConstructor ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - - mFlashAreaBaseAddress =3D (UINTN)PcdGet32 (PcdFlashAreaBaseAddress); - mFlashAreaSize =3D (UINTN)PcdGet32 (PcdFlashAreaSize); - - // - // Locate the SMM SPI protocol. - // - Status =3D gSmst->SmmLocateProtocol ( - &gEfiSmmSpiProtocolGuid, - NULL, - (VOID **) &mSpiProtocol - ); - ASSERT_EFI_ERROR (Status); - - return Status; -} diff --git a/Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib= .h b/Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib.h deleted file mode 100644 index 53c11bb59ac6..000000000000 --- a/Silicon/Intel/SimicsIch10Pkg/Include/Library/SpiFlashCommonLib.h +++ /dev/null @@ -1,98 +0,0 @@ -/** @file - The header file includes the common header files, defines - internal structure and functions used by SpiFlashCommonLib. - - Copyright (c) 2019 Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#ifndef __SPI_FLASH_COMMON_LIB_H__ -#define __SPI_FLASH_COMMON_LIB_H__ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size -/** - Enable block protection on the Serial Flash device. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashLock ( - VOID - ); - -/** - Read NumBytes bytes of data from the address specified by - PAddress into Buffer. - - @param[in] Address The starting physical address of the read. - @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number - of bytes actually read. - @param[out] Buffer The destination data buffer for the read. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashRead ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - OUT UINT8 *Buffer - ); - -/** - Write NumBytes bytes of data from Buffer to the address specified by - PAddresss. - - @param[in] Address The starting physical address of the wri= te. - @param[in,out] NumBytes On input, the number of bytes to write. = On output, - the actual number of bytes written. - @param[in] Buffer The source data buffer for the write. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashWrite ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - IN UINT8 *Buffer - ); - -/** - Erase the block starting at Address. - - @param[in] Address The starting physical address of the block t= o be erased. - This library assume that caller garantee tha= t the PAddress - is at the starting address of this block. - @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. - On output, the actual number of bytes erased. - - @retval EFI_SUCCESS. Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashBlockErase ( - IN UINTN Address, - IN UINTN *NumBytes - ); - -#endif diff --git a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmS= piFlashCommonLib.inf b/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashComm= onLib/SmmSpiFlashCommonLib.inf deleted file mode 100644 index 23b334a080e7..000000000000 --- a/Silicon/Intel/SimicsIch10Pkg/Library/SmmSpiFlashCommonLib/SmmSpiFlash= CommonLib.inf +++ /dev/null @@ -1,50 +0,0 @@ -## @file -# SMM Library instance of Spi Flash Common Library Class -# -# Copyright (c) 2019 Intel Corporation. All rights reserved.
-# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION =3D 0x00010017 - BASE_NAME =3D SmmSpiFlashCommonLib - FILE_GUID =3D 9632D96E-E849-4217-9217-DC500B8AAE47 - VERSION_STRING =3D 1.0 - MODULE_TYPE =3D DXE_SMM_DRIVER - LIBRARY_CLASS =3D SpiFlashCommonLib|DXE_SMM_DRIVER - CONSTRUCTOR =3D SmmSpiFlashCommonLibConstructor -# -# The following information is for reference only and not required by the = build tools. -# -# VALID_ARCHITECTURES =3D IA32 X64 -# - -[LibraryClasses] - PciLib - IoLib - MemoryAllocationLib - BaseLib - UefiLib - SmmServicesTableLib - BaseMemoryLib - DebugLib - -[Packages] - MdePkg/MdePkg.dec - SimicsIch10Pkg/Ich10Pkg.dec - -[Pcd] - gEfiPchTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSUMES - gEfiPchTokenSpaceGuid.PcdFlashAreaSize ## CONSUMES - -[Sources] - SpiFlashCommonSmmLib.c - SpiFlashCommon.c - -[Protocols] - gEfiSmmSpiProtocolGuid ## CONSUMES - -[Depex.X64.DXE_SMM_DRIVER] - gEfiSmmSpiProtocolGuid --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75334): https://edk2.groups.io/g/devel/message/75334 Mute This Topic: https://groups.io/mt/82929238/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75335+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75335+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396851; cv=none; d=zohomail.com; s=zohoarc; b=TgVJsEduMrbiYQdOfpNys2GV1TeLl3ZJKxNTxGg6Dz/iVP8+c9paMb2A3qHgEcrPQMd1UlSl+w36jwbS53uKS5A+mqd64E88hzRSWtSbGw0I2obLrI2o9Mn8cPEFCBpckVSqNY71oFMlEK7bO+3tL+5MruIKZtdH5Jq4/SPldVc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396851; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=AAlQyCEC8gnmJTPPZ8hFKqU1QNJl2iXd6DyNr8Ci7Z8=; b=fAF/r2Qn9unujbHTVWIkeQWdghwmpLvCBZsHlxRN8OEk35zuuJ00bIL39K2XWN86JPJ4gJlraZa8LWvzd8xkttyX9dItk2XEim7rzxIeikhAO0mcyVc/meFWUu8jy8364ojhRHIZrQ6K41CJhkAGvqXkxaCusoj+xaLyAb4zNRw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75335+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396851883286.0736690487564; Tue, 18 May 2021 21:00:51 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id L1vDYY1788612x3jTW12Kwh1; Tue, 18 May 2021 21:00:51 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web12.6916.1621396851102884511 for ; Tue, 18 May 2021 21:00:51 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id D529720B7188; Tue, 18 May 2021 21:00:50 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com D529720B7188 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Sai Chaganty , Nate DeSimone , Heng Luo Subject: [edk2-devel] [edk2-platforms][PATCH v2 29/35] TigerlakeOpenBoardPkg: Remove SmmSpiFlashCommonLib Date: Tue, 18 May 2021 20:59:41 -0700 Message-Id: <20210519035947.1234-30-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: BFTQb6GnyKHZjk5bXnDWIcaNx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396851; bh=Pryk33FuaHFE98AURKMuyfsM5s/oMcDeyAxYj+aIS3g=; h=Cc:Date:From:Reply-To:Subject:To; b=X9J9xc49jHkcjJGO5EQivoTKrw2gGzegZB1A1bkDJqWK06QpYYReBp5n/F4Nf7rFpM8 6yt/n0d5/0s5i6HGvmc2NQTKrJLdobn7c4wgy5Wm02zclwavpx0kZXCc0MIcUHOzJm3cy Fp9lT/YSeJrzX6PGrpBo4xnNn5WqkW3w9g4= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 The library has been consolidated with instances in other Intel silicon packages as a single instance in IntelSiliconPkg Cc: Sai Chaganty Cc: Nate DeSimone Cc: Heng Luo Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlash= Common.c | 210 -------------------- Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlash= CommonSmmLib.c | 58 ------ Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFl= ashCommonLib.inf | 49 ----- 3 files changed, 317 deletions(-) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommon= Lib/SpiFlashCommon.c b/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiF= lashCommonLib/SpiFlashCommon.c deleted file mode 100644 index f86896dd1ff5..000000000000 --- a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/Spi= FlashCommon.c +++ /dev/null @@ -1,210 +0,0 @@ -/** @file - Wrap EFI_SPI_PROTOCOL to provide some library level interfaces - for module use. - - Copyright (c) 2021, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#include -#include -#include - -PCH_SPI_PROTOCOL *mSpiProtocol; - -// -// Variables for boottime and runtime usage. -// -UINTN mBiosAreaBaseAddress =3D 0; -UINTN mBiosSize =3D 0; -UINTN mBiosOffset =3D 0; - -/** - Enable block protection on the Serial Flash device. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashLock ( - VOID - ) -{ - return EFI_SUCCESS; -} - -/** - Read NumBytes bytes of data from the address specified by - PAddress into Buffer. - - @param[in] Address The starting physical address of the read. - @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number - of bytes actually read. - @param[out] Buffer The destination data buffer for the read. - - @retval EFI_SUCCESS Operation is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashRead ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - OUT UINT8 *Buffer - ) -{ - ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); - if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { - return EFI_INVALID_PARAMETER; - } - - // - // This function is implemented specifically for those platforms - // at which the SPI device is memory mapped for read. So this - // function just do a memory copy for Spi Flash Read. - // - CopyMem (Buffer, (VOID *) Address, *NumBytes); - - return EFI_SUCCESS; -} - -/** - Write NumBytes bytes of data from Buffer to the address specified by - PAddresss. - - @param[in] Address The starting physical address of the wri= te. - @param[in,out] NumBytes On input, the number of bytes to write. = On output, - the actual number of bytes written. - @param[in] Buffer The source data buffer for the write. - - @retval EFI_SUCCESS Operation is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - @retval EFI_INVALID_PARAMETER Invalid parameter. - -**/ -EFI_STATUS -EFIAPI -SpiFlashWrite ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - IN UINT8 *Buffer - ) -{ - EFI_STATUS Status; - UINTN Offset; - UINT32 Length; - UINT32 RemainingBytes; - - ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); - if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { - return EFI_INVALID_PARAMETER; - } - - ASSERT (Address >=3D mBiosAreaBaseAddress); - if (Address < mBiosAreaBaseAddress) { - return EFI_INVALID_PARAMETER; - } - - Offset =3D Address - mBiosAreaBaseAddress; - - ASSERT ((*NumBytes + Offset) <=3D mBiosSize); - if ((*NumBytes + Offset) > mBiosSize) { - return EFI_INVALID_PARAMETER; - } - - Status =3D EFI_SUCCESS; - RemainingBytes =3D *NumBytes; - - - while (RemainingBytes > 0) { - if (RemainingBytes > SECTOR_SIZE_4KB) { - Length =3D SECTOR_SIZE_4KB; - } else { - Length =3D RemainingBytes; - } - Status =3D mSpiProtocol->FlashWrite ( - mSpiProtocol, - FlashRegionBios, - (UINT32) Offset, - Length, - Buffer - ); - if (EFI_ERROR (Status)) { - break; - } - RemainingBytes -=3D Length; - Offset +=3D Length; - Buffer +=3D Length; - } - - // - // Actual number of bytes written - // - *NumBytes -=3D RemainingBytes; - - return Status; -} - -/** - Erase the block starting at Address. - - @param[in] Address The starting physical address of the block t= o be erased. - This library assume that caller garantee tha= t the PAddress - is at the starting address of this block. - @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. - On output, the actual number of bytes erased. - - @retval EFI_SUCCESS. Operation is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - @retval EFI_INVALID_PARAMETER Invalid parameter. - -**/ -EFI_STATUS -EFIAPI -SpiFlashBlockErase ( - IN UINTN Address, - IN UINTN *NumBytes - ) -{ - EFI_STATUS Status; - UINTN Offset; - UINTN RemainingBytes; - - ASSERT (NumBytes !=3D NULL); - if (NumBytes =3D=3D NULL) { - return EFI_INVALID_PARAMETER; - } - - ASSERT (Address >=3D mBiosAreaBaseAddress); - if (Address < mBiosAreaBaseAddress) { - return EFI_INVALID_PARAMETER; - } - - Offset =3D Address - mBiosAreaBaseAddress; - - ASSERT ((*NumBytes % SECTOR_SIZE_4KB) =3D=3D 0); - if ((*NumBytes % SECTOR_SIZE_4KB) !=3D 0) { - return EFI_INVALID_PARAMETER; - } - - ASSERT ((*NumBytes + Offset) <=3D mBiosSize); - if ((*NumBytes + Offset) > mBiosSize) { - return EFI_INVALID_PARAMETER; - } - - Status =3D EFI_SUCCESS; - RemainingBytes =3D *NumBytes; - - - Status =3D mSpiProtocol->FlashErase ( - mSpiProtocol, - FlashRegionBios, - (UINT32) Offset, - (UINT32) RemainingBytes - ); - return Status; -} - diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommon= Lib/SpiFlashCommonSmmLib.c b/Platform/Intel/TigerlakeOpenBoardPkg/Library/S= mmSpiFlashCommonLib/SpiFlashCommonSmmLib.c deleted file mode 100644 index 7941b8f8720c..000000000000 --- a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/Spi= FlashCommonSmmLib.c +++ /dev/null @@ -1,58 +0,0 @@ -/** @file - SMM Library instance of SPI Flash Common Library Class - - Copyright (c) 2021, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#include -#include -#include - -extern PCH_SPI_PROTOCOL *mSpiProtocol; - -extern UINTN mBiosAreaBaseAddress; -extern UINTN mBiosSize; -extern UINTN mBiosOffset; - -/** - The library constructuor. - - The function does the necessary initialization work for this library - instance. - - @param[in] ImageHandle The firmware allocated handle for the UEFI= image. - @param[in] SystemTable A pointer to the EFI system table. - - @retval EFI_SUCCESS The function always return EFI_SUCCESS for= now. - It will ASSERT on error for debug version. - @retval EFI_ERROR Please reference LocateProtocol for error = code details. -**/ -EFI_STATUS -EFIAPI -SmmSpiFlashCommonLibConstructor ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - UINT32 BaseAddr; - UINT32 RegionSize; - - mBiosAreaBaseAddress =3D (UINTN)PcdGet32 (PcdBiosAreaBaseAddress); - mBiosSize =3D (UINTN)PcdGet32 (PcdBiosSize); - - // - // Locate the SMM SPI protocol. - // - Status =3D gSmst->SmmLocateProtocol ( - &gPchSmmSpiProtocolGuid, - NULL, - (VOID **) &mSpiProtocol - ); - ASSERT_EFI_ERROR (Status); - - mSpiProtocol->GetRegionAddress (mSpiProtocol, FlashRegionBios, &BaseAddr= , &RegionSize); - mBiosOffset =3D BaseAddr; - return Status; -} diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommon= Lib/SmmSpiFlashCommonLib.inf b/Platform/Intel/TigerlakeOpenBoardPkg/Library= /SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf deleted file mode 100644 index 374f5ea52b98..000000000000 --- a/Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/Smm= SpiFlashCommonLib.inf +++ /dev/null @@ -1,49 +0,0 @@ -## @file -# SMM Library instance of Spi Flash Common Library Class -# -# Copyright (c) 2021, Intel Corporation. All rights reserved.
-# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION =3D 0x00010017 - BASE_NAME =3D SmmSpiFlashCommonLib - FILE_GUID =3D 9632D96E-E849-4217-9217-DC500B8AAE47 - VERSION_STRING =3D 1.0 - MODULE_TYPE =3D DXE_SMM_DRIVER - LIBRARY_CLASS =3D SpiFlashCommonLib|DXE_SMM_DRIVER - CONSTRUCTOR =3D SmmSpiFlashCommonLibConstructor -# -# The following information is for reference only and not required by the = build tools. -# -# VALID_ARCHITECTURES =3D IA32 X64 -# - -[LibraryClasses] - IoLib - MemoryAllocationLib - BaseLib - UefiLib - SmmServicesTableLib - BaseMemoryLib - DebugLib - -[Packages] - MdePkg/MdePkg.dec - MinPlatformPkg/MinPlatformPkg.dec - TigerlakeSiliconPkg/SiPkg.dec - -[Pcd] - gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES - gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES - -[Sources] - SpiFlashCommonSmmLib.c - SpiFlashCommon.c - -[Protocols] - gPchSmmSpiProtocolGuid ## CONSUMES - -[Depex.X64.DXE_SMM_DRIVER] - gPchSmmSpiProtocolGuid --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75335): https://edk2.groups.io/g/devel/message/75335 Mute This Topic: https://groups.io/mt/82929239/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75336+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75336+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396860; cv=none; d=zohomail.com; s=zohoarc; b=ioXOOAyytTpYYDWf2yRj+Xr9JrEPInQluEZiJcGbWuky6j1DU5RpTLnM27NT/etNR/JoFd4a7aFQvDLy1n0E6/iGm6+t7lnm3QGni16UZstZwNLWJO6Kk+YI9rALao6e3t/zVUmTTbjpcjJc+yQoi7UrS/ZuJIWMg4mNrCL3bvI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396860; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=oeRz85K5gVAzu0TVkQnn/OJlqezUQRRWjheia7KA5BY=; b=GefhlknCT4I/c1rQGlTUXZHX649J/1VWkyjOBT4FhF+0UsqQ4+XXbwpz3IrkUHDQbHO2Y0YfW90L2lVynGn84gjb7m0lOMYDVTYgLdd1PQKV67CfLD+bb9uqFhsmN/bWgIsPuFyFT8xyjxMaN73HthCFvM6pVmpDgdz/qFvFiSY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75336+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396860240299.6359204788439; Tue, 18 May 2021 21:01:00 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id vJBwYY1788612xJXGd0T685P; Tue, 18 May 2021 21:00:59 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web12.6917.1621396852778524018 for ; Tue, 18 May 2021 21:00:52 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 7383C20B7178; Tue, 18 May 2021 21:00:52 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 7383C20B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Liming Gao , Eric Dong Subject: [edk2-devel] [edk2-platforms][PATCH v2 30/35] MinPlatformPkg: Remove SpiFlashCommonLibNull Date: Tue, 18 May 2021 20:59:42 -0700 Message-Id: <20210519035947.1234-31-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: bZ9hCOn7l616S0crKg46YevXx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396859; bh=o8Ml43SxOzD9k8JCSxoYkGf7F+Fhv73CHAA9l1KbNXs=; h=Cc:Date:From:Reply-To:Subject:To; b=HeHUu+DOPZy01TbVs9pgfukWqxxte+YmLtcDNdXOEURpfr3V5gltLtwxz5N754AIsCs q8yNsLwaVQg/0aPAf8fJ8/5ZofY2cVANOx/lePY70/9nfvnTcSabWVVq/9GiDIulmH428 4sg3qbaPvKehnuthXuGaeOeNbwFC+OvDZnE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 The library instance has moved to IntelSiliconPkg. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Liming Gao Cc: Eric Dong Signed-off-by: Michael Kubacki Reviewed-by: Chasel Chiu Reviewed-by: Nate DeSimone --- Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlash= CommonLibNull.c | 101 -------------------- Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlash= CommonLibNull.inf | 29 ------ Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h = | 98 ------------------- Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec = | 2 - Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc = | 4 - 5 files changed, 234 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibN= ull/SpiFlashCommonLibNull.c b/Platform/Intel/MinPlatformPkg/Flash/Library/S= piFlashCommonLibNull/SpiFlashCommonLibNull.c deleted file mode 100644 index 403b16a1b421..000000000000 --- a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/Spi= FlashCommonLibNull.c +++ /dev/null @@ -1,101 +0,0 @@ -/** @file - Null Library instance of SPI Flash Common Library Class - -Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include - -/** - Enable block protection on the Serial Flash device. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashLock ( - VOID - ) -{ - return EFI_SUCCESS; -} - -/** - Read NumBytes bytes of data from the address specified by - PAddress into Buffer. - - @param[in] Address The starting physical address of the read. - @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number - of bytes actually read. - @param[out] Buffer The destination data buffer for the read. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashRead ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - OUT UINT8 *Buffer - ) -{ - ASSERT(FALSE); - return EFI_SUCCESS; -} - -/** - Write NumBytes bytes of data from Buffer to the address specified by - PAddresss. - - @param[in] Address The starting physical address of the wri= te. - @param[in,out] NumBytes On input, the number of bytes to write. = On output, - the actual number of bytes written. - @param[in] Buffer The source data buffer for the write. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashWrite ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - IN UINT8 *Buffer - ) -{ - ASSERT(FALSE); - return EFI_SUCCESS; -} - -/** - Erase the block starting at Address. - - @param[in] Address The starting physical address of the block t= o be erased. - This library assume that caller garantee tha= t the PAddress - is at the starting address of this block. - @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. - On output, the actual number of bytes erased. - - @retval EFI_SUCCESS. Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashBlockErase ( - IN UINTN Address, - IN UINTN *NumBytes - ) -{ - ASSERT(FALSE); - return EFI_SUCCESS; -} - diff --git a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibN= ull/SpiFlashCommonLibNull.inf b/Platform/Intel/MinPlatformPkg/Flash/Library= /SpiFlashCommonLibNull/SpiFlashCommonLibNull.inf deleted file mode 100644 index 75ef1cb921df..000000000000 --- a/Platform/Intel/MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/Spi= FlashCommonLibNull.inf +++ /dev/null @@ -1,29 +0,0 @@ -### @file -# NULL instance of Spi Flash Common Library Class -# -# Copyright (c) 2017, Intel Corporation. All rights reserved.
-# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -### - -[Defines] - INF_VERSION =3D 0x00010017 - BASE_NAME =3D SpiFlashCommonLibNull - FILE_GUID =3D F35BBEE7-A681-443E-BB15-07AF9FABBDED - VERSION_STRING =3D 1.0 - MODULE_TYPE =3D BASE - LIBRARY_CLASS =3D SpiFlashCommonLib -# -# The following information is for reference only and not required by the = build tools. -# -# VALID_ARCHITECTURES =3D IA32 X64 -# - -[LibraryClasses] - -[Packages] - MdePkg/MdePkg.dec - -[Sources] - SpiFlashCommonLibNull.c diff --git a/Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLi= b.h b/Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h deleted file mode 100644 index 0c5e72258c2d..000000000000 --- a/Platform/Intel/MinPlatformPkg/Include/Library/SpiFlashCommonLib.h +++ /dev/null @@ -1,98 +0,0 @@ -/** @file - The header file includes the common header files, defines - internal structure and functions used by SpiFlashCommonLib. - -Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#ifndef __SPI_FLASH_COMMON_LIB_H__ -#define __SPI_FLASH_COMMON_LIB_H__ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size -/** - Enable block protection on the Serial Flash device. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashLock ( - VOID - ); - -/** - Read NumBytes bytes of data from the address specified by - PAddress into Buffer. - - @param[in] Address The starting physical address of the read. - @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number - of bytes actually read. - @param[out] Buffer The destination data buffer for the read. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashRead ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - OUT UINT8 *Buffer - ); - -/** - Write NumBytes bytes of data from Buffer to the address specified by - PAddresss. - - @param[in] Address The starting physical address of the wri= te. - @param[in,out] NumBytes On input, the number of bytes to write. = On output, - the actual number of bytes written. - @param[in] Buffer The source data buffer for the write. - - @retval EFI_SUCCESS Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashWrite ( - IN UINTN Address, - IN OUT UINT32 *NumBytes, - IN UINT8 *Buffer - ); - -/** - Erase the block starting at Address. - - @param[in] Address The starting physical address of the block t= o be erased. - This library assume that caller garantee tha= t the PAddress - is at the starting address of this block. - @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. - On output, the actual number of bytes erased. - - @retval EFI_SUCCESS. Opertion is successful. - @retval EFI_DEVICE_ERROR If there is any device errors. - -**/ -EFI_STATUS -EFIAPI -SpiFlashBlockErase ( - IN UINTN Address, - IN UINTN *NumBytes - ); - -#endif diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/In= tel/MinPlatformPkg/MinPlatformPkg.dec index 947431470a1f..8c6154099bf7 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -62,8 +62,6 @@ [LibraryClasses] SiliconPolicyInitLib|Include/Library/SiliconPolicyInitLib.h SiliconPolicyUpdateLib|Include/Library/SiliconPolicyUpdateLib.h =20 - SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h - BoardInitLib|Include/Library/BoardInitLib.h MultiBoardInitSupportLib|Include/Library/MultiBoardInitSupportLib.h SecBoardInitLib|Include/Library/SecBoardInitLib.h diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc b/Platform/In= tel/MinPlatformPkg/MinPlatformPkg.dsc index 15867eee4e61..d58ed0ee7eae 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dsc @@ -109,7 +109,6 @@ [LibraryClasses.common.DXE_DRIVER] TpmPlatformHierarchyLib|MinPlatformPkg/Tcg/Library/TpmPlatformHierarchyL= ib/TpmPlatformHierarchyLib.inf =20 [LibraryClasses.common.DXE_SMM_DRIVER] - SpiFlashCommonLib|MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/Spi= FlashCommonLibNull.inf TestPointCheckLib|MinPlatformPkg/Test/Library/TestPointCheckLib/SmmTestP= ointCheckLib.inf TestPointLib|MinPlatformPkg/Test/Library/TestPointLib/SmmTestPointLib.inf =20 @@ -118,7 +117,6 @@ [LibraryClasses.common.MM_STANDALONE] MemoryAllocationLib|StandaloneMmPkg/Library/StandaloneMmMemoryAllocation= Lib/StandaloneMmMemoryAllocationLib.inf MmServicesTableLib|MdePkg/Library/StandaloneMmServicesTableLib/Standalon= eMmServicesTableLib.inf PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - SpiFlashCommonLib|MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/Spi= FlashCommonLibNull.inf StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint= /StandaloneMmDriverEntryPoint.inf VariableReadLib|MinPlatformPkg/Library/SmmVariableReadLib/StandaloneMmVa= riableReadLib.inf VariableWriteLib|MinPlatformPkg/Library/SmmVariableWriteLib/StandaloneMm= VariableWriteLib.inf @@ -159,8 +157,6 @@ [Components] =20 MinPlatformPkg/Bds/Library/DxePlatformBootManagerLib/DxePlatformBootMana= gerLib.inf =20 - MinPlatformPkg/Flash/Library/SpiFlashCommonLibNull/SpiFlashCommonLibNull= .inf - MinPlatformPkg/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapp= erHobProcessLib.inf MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrap= perPlatformSecLib.inf --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75336): https://edk2.groups.io/g/devel/message/75336 Mute This Topic: https://groups.io/mt/82929240/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75337+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75337+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396861; cv=none; d=zohomail.com; s=zohoarc; b=ZtLpDt4snE5V1SAC8XD9CBfvyNZl6tWkpCmTcZW+qAkqI4C8TaGZL4QjFxRm6f/9+ypzy5yK76MCp0v4BrCgmP1/0y4oV7RVYYDLbZveqWgRHS3423NEHk0AClb6WAvI4anHIeWbvRXcCFTXpBPbqq55Vz4c+Z/ncMw8O6ElCAs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396861; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=NwShJDcWGhCXDwXmO7Y0+7iveSB2redSYkkJjweZCaM=; b=XJByjft2M8Q4/Jx2WfiW1YldJDy5MF3YUQGSkt7fm4bR6QSgjL0lLRW7+zF5kQJ6+7yzEkawqRDbhcl9ofCYe7sguJZIPnbZeAqI2iE5bjPsXne/mrQ1ArodUV2kPGiCXBDUXfadLpAV1y4I/iizL0bjuBwpWbAsoKtrnj5DuMg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75337+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396861248203.7218572776943; Tue, 18 May 2021 21:01:01 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id fPpJYY1788612xUActlzCAS2; Tue, 18 May 2021 21:01:00 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web10.6877.1621396854306236152 for ; Tue, 18 May 2021 21:00:54 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 13CAC20B7188; Tue, 18 May 2021 21:00:54 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 13CAC20B7188 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone Subject: [edk2-devel] [edk2-platforms][PATCH v2 31/35] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Add IntelSiliconPkg.dec Date: Tue, 18 May 2021 20:59:43 -0700 Message-Id: <20210519035947.1234-32-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: 1UEvq3web91zH4ViZ93MSekAx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396860; bh=ISUs9c4tZKIPii0Lfc8A+eraZ++xRIr5e7/Zh+QaV0s=; h=Cc:Date:From:Reply-To:Subject:To; b=cB5dcm0YrLwG8kWOcFCDZjIa+Q1cqF+hV0enfvbkSi+rXIqsTPOQkUC5QDuK7/6X9iz SDDtp9WwUsp3fRKIK6b6bwTpOegJOFF4t8m9WBKyEX1KM5KJElcktztgeHTfnBB8awwoJ dM0inoVSMf2GCc6GYRk7N4i3bJtZCA4DwfU= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 This library now uses gPchSpiPpiGuid from IntelSiliconPkg. Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Michael Kubacki Reviewed-by: Chasel Chiu Reviewed-by: Nate DeSimone --- Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSe= rialPortLibSpiFlash.inf | 1 + 1 file changed, 1 insertion(+) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSp= iFlash/PeiSerialPortLibSpiFlash.inf b/Platform/Intel/KabylakeOpenBoardPkg/L= ibrary/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf index 31518fb40ba7..b959cd1f4612 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/= PeiSerialPortLibSpiFlash.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/= PeiSerialPortLibSpiFlash.inf @@ -32,6 +32,7 @@ [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec MinPlatformPkg/MinPlatformPkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec KabylakeSiliconPkg/SiPkg.dec KabylakeOpenBoardPkg/OpenBoardPkg.dec =20 --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75337): https://edk2.groups.io/g/devel/message/75337 Mute This Topic: https://groups.io/mt/82929241/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75338+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75338+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396857; cv=none; d=zohomail.com; s=zohoarc; b=ja+zWtk5Ou6l/VnOSRpz5odXFyLmJ6M2Qks0dmEmet1vVPUnh1fHYICFZUniH0c1EgnSm9p+A3NnuqPiASD++pq+f03yOQ8icCCFqWOb972lZ8ADWfH1LrXgL2whi6qD+pBcy1wK839xi4fQmG44bICwk5R/meupM1jHJWNf7Qs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396857; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=sJjQ6JvtbIUf3LYxe7aN/RvhnBcyQkkfrF8qW5p4TlA=; b=mRuN/Hio8RJ0WSW6vSQrlkpAbX/K91Oh0U3GtvQCxqZx2RwWMaq5l/UrrxIh0CV8zrqTfnWOv5JTCsJ154wASvBpToK1jAOaGbU8ZrzD0E9cYW9oGz8Sbq8DYZ4JZLOqnuULFDgMuGHog6vVhLsvrfEpo+JyvZu8OwiRond57GQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75338+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396857671232.27028319702902; Tue, 18 May 2021 21:00:57 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id OgzWYY1788612xb21z1H3GZp; Tue, 18 May 2021 21:00:57 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web09.6907.1621396855833642739 for ; Tue, 18 May 2021 21:00:55 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 94E1920B7178; Tue, 18 May 2021 21:00:55 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 94E1920B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Sai Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 32/35] CoffeelakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Date: Tue, 18 May 2021 20:59:44 -0700 Message-Id: <20210519035947.1234-33-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: sZHxPFakYDBzQzRyvhcoy0etx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396857; bh=ym+OVXmjuMTX0G4v8I3rcU6P2si3zZ+kABtEyLTGYjA=; h=Cc:Date:From:Reply-To:Subject:To; b=CQCaxs0FEFJ+Xux+ZwDbP6n7vOcBZSo6l8X/C/aGChSFnDkreQM0gQz0sbW7uS17zeK 8Woen+wCLnzCR/TTzB9vAzWaB/ocD9P2xEiJMc7+/OvG/xwrY2bkZj08WixhszmTB8btg Fjp0OtfMWgnvwIliXZShIKzh73AA/Oy/tQ0= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 The following PPI and Protocols have moved to IntelSiliconPkg. The remaining definitions in CoffeelakeSiliconPkg are removed and libs/ modules that need to reference IntelSiliconPkg are updated. 1. gPchSpiProtocolGuid 2. gPchSmmSpiProtocolGuid 3. gPchSpiPpiGuid Cc: Chasel Chiu Cc: Sai Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h = | 27 -- Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h = | 295 -------------------- Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf = | 1 + Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib= /BasePchSpiCommonLib.inf | 1 + Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf = | 1 + Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec = | 3 - 6 files changed, 3 insertions(+), 325 deletions(-) diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h b/Sil= icon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h deleted file mode 100644 index d3ff152742cf..000000000000 --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h +++ /dev/null @@ -1,27 +0,0 @@ -/** @file - This file defines the PCH SPI PPI which implements the - Intel(R) PCH SPI Host Controller Compatibility Interface. - - Copyright (c) 2019 Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#ifndef _PCH_SPI_PPI_H_ -#define _PCH_SPI_PPI_H_ - -#include - -// -// Extern the GUID for PPI users. -// -extern EFI_GUID gPchSpiPpiGuid; - -/** - Reuse the PCH_SPI_PROTOCOL definitions - This is possible becaues the PPI implementation does not rely on a PeiSe= rvice pointer, - as it uses EDKII Glue Lib to do IO accesses -**/ -typedef PCH_SPI_PROTOCOL PCH_SPI_PPI; - -#endif diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h = b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h deleted file mode 100644 index 22df7fe35147..000000000000 --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h +++ /dev/null @@ -1,295 +0,0 @@ -/** @file - This file defines the PCH SPI Protocol which implements the - Intel(R) PCH SPI Host Controller Compatibility Interface. - - Copyright (c) 2019 Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#ifndef _PCH_SPI_PROTOCOL_H_ -#define _PCH_SPI_PROTOCOL_H_ - -// -// Extern the GUID for protocol users. -// -extern EFI_GUID gPchSpiProtocolGuid; -extern EFI_GUID gPchSmmSpiProtocolGuid; - -// -// Forward reference for ANSI C compatibility -// -typedef struct _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL; - -// -// SPI protocol data structures and definitions -// - -/** - Flash Region Type -**/ -typedef enum { - FlashRegionDescriptor, - FlashRegionBios, - FlashRegionMe, - FlashRegionGbE, - FlashRegionPlatformData, - FlashRegionDer, - FlashRegionEC =3D 8, - FlashRegionAll, - FlashRegionMax -} FLASH_REGION_TYPE; - -// -// Protocol member functions -// - -/** - Read data from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. - @param[out] Buffer The Pointer to caller-allocated buffer c= ontaining the dada received. - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount, - OUT UINT8 *Buffer - ); - -/** - Write data to the flash part. Remark: Erase may be needed before write t= o the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. - @param[in] Buffer Pointer to caller-allocated buffer conta= ining the data sent during the SPI cycle. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_WRITE) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount, - IN UINT8 *Buffer - ); - -/** - Erase some area on the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_ERASE) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount - ); - -/** - Read SFDP data from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ComponentNumber The Componen Number for chip select - @param[in] Address The starting byte address for SFDP data = read. - @param[in] ByteCount Number of bytes in SFDP data portion of = the SPI cycle - @param[out] SfdpData The Pointer to caller-allocated buffer c= ontaining the SFDP data received - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_SFDP) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT8 ComponentNumber, - IN UINT32 Address, - IN UINT32 ByteCount, - OUT UINT8 *SfdpData - ); - -/** - Read Jedec Id from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ComponentNumber The Componen Number for chip select - @param[in] ByteCount Number of bytes in JedecId data portion = of the SPI cycle, the data size is 3 typically - @param[out] JedecId The Pointer to caller-allocated buffer c= ontaining JEDEC ID received - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT8 ComponentNumber, - IN UINT32 ByteCount, - OUT UINT8 *JedecId - ); - -/** - Write the status register in the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ByteCount Number of bytes in Status data portion o= f the SPI cycle, the data size is 1 typically - @param[in] StatusValue The Pointer to caller-allocated buffer c= ontaining the value of Status register writing - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 ByteCount, - IN UINT8 *StatusValue - ); - -/** - Read status register in the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ByteCount Number of bytes in Status data portion o= f the SPI cycle, the data size is 1 typically - @param[out] StatusValue The Pointer to caller-allocated buffer c= ontaining the value of Status register received. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_STATUS) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 ByteCount, - OUT UINT8 *StatusValue - ); - -/** - Get the SPI region base and size, based on the enum type - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for for the base a= ddress which is listed in the Descriptor. - @param[out] BaseAddress The Flash Linear Address for the Region = 'n' Base - @param[out] RegionSize The size for the Region 'n' - - @retval EFI_SUCCESS Read success - @retval EFI_INVALID_PARAMETER Invalid region type given - @retval EFI_DEVICE_ERROR The region is not used -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - OUT UINT32 *BaseAddress, - OUT UINT32 *RegionSize - ); - -/** - Read PCH Soft Strap Values - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA. - @param[in] ByteCount Number of bytes in SoftStrap data portio= n of the SPI cycle - @param[out] SoftStrapValue The Pointer to caller-allocated buffer c= ontaining PCH Soft Strap Value. - If the value of ByteCount is 0, the data= type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Sof= t Strap Length - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 SoftStrapAddr, - IN UINT32 ByteCount, - OUT VOID *SoftStrapValue - ); - -/** - Read CPU Soft Strap Values - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUS= BA. - @param[in] ByteCount Number of bytes in SoftStrap data portio= n of the SPI cycle. - @param[out] SoftStrapValue The Pointer to caller-allocated buffer c= ontaining CPU Soft Strap Value. - If the value of ByteCount is 0, the data= type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Sof= t Strap Length - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 SoftStrapAddr, - IN UINT32 ByteCount, - OUT VOID *SoftStrapValue - ); - -/** - These protocols/PPI allows a platform module to perform SPI operations t= hrough the - Intel PCH SPI Host Controller Interface. -**/ -struct _PCH_SPI_PROTOCOL { - /** - This member specifies the revision of this structure. This field is us= ed to - indicate backwards compatible changes to the protocol. - **/ - UINT8 Revision; - PCH_SPI_FLASH_READ FlashRead; ///< Read data fro= m the flash part. - PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to= the flash part. Remark: Erase may be needed before write to the flash part. - PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some ar= ea on the flash part. - PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP dat= a from the flash part. - PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id= from the flash part. - PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the sta= tus register in the flash part. - PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status r= egister in the flash part. - PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI r= egion base and size - PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft= Strap Values - PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft= Strap Values -}; - -/** - PCH SPI PPI/PROTOCOL revision number - - Revision 1: Initial version -**/ -#define PCH_SPI_SERVICES_REVISION 1 - -#endif diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSp= iLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiL= ib.inf index fb2fad78d39e..4e4b456574f0 100644 --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf @@ -30,6 +30,7 @@ [LibraryClasses] =20 [Packages] MdePkg/MdePkg.dec +IntelSiliconPkg/IntelSiliconPkg.dec CoffeelakeSiliconPkg/SiPkg.dec =20 =20 diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePch= SpiCommonLib/BasePchSpiCommonLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/P= ch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf index ea23e628c80e..f5dc4ee0bfef 100644 --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiComm= onLib/BasePchSpiCommonLib.inf +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiComm= onLib/BasePchSpiCommonLib.inf @@ -20,6 +20,7 @@ [Sources] =20 [Packages] MdePkg/MdePkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec CoffeelakeSiliconPkg/SiPkg.dec =20 [LibraryClasses] diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf b= /Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf index 77bd3ad72bff..231929151222 100644 --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf @@ -29,6 +29,7 @@ [LibraryClasses] =20 [Packages] MdePkg/MdePkg.dec +IntelSiliconPkg/IntelSiliconPkg.dec CoffeelakeSiliconPkg/SiPkg.dec =20 =20 diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec b/Silicon/Intel/C= offeelakeSiliconPkg/SiPkg.dec index 5ea6fbb28411..efc2d8788168 100644 --- a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec +++ b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec @@ -303,11 +303,9 @@ [Protocols] ## ## PCH ## -gPchSpiProtocolGuid =3D {0xc7d289, 0x1347, 0x4de0, {0xbf, 0x42, 0xe, 0x2= 6, 0x9d, 0xe, 0xf3, 0x4a}} gWdtProtocolGuid =3D {0xb42b8d12, 0x2acb, 0x499a, {0xa9, 0x20, 0xdd, 0x5= b, 0xe6, 0xcf, 0x09, 0xb1}} gPchSerialIoUartDebugInfoProtocolGuid =3D {0x2fd2b1bd, 0x0387, 0x4ec6, {= 0x94, 0x1f, 0xf1, 0x4b, 0x7f, 0x1c, 0x94, 0xb6}} gEfiSmmSmbusProtocolGuid =3D {0x72e40094, 0x2ee1, 0x497a, {0x8f, 0x33, 0= x4c, 0x93, 0x4a, 0x9e, 0x9c, 0x0c}} -gPchSmmSpiProtocolGuid =3D {0x56521f06, 0xa62, 0x4822, {0x99, 0x63, 0xdf= , 0x1, 0x9d, 0x72, 0xc7, 0xe1}} gPchSmmIoTrapControlGuid =3D {0x514d2afd, 0x2096, 0x4283, {0x9d, 0xa6, 0= x70, 0x0c, 0xd2, 0x7d, 0xc7, 0xa5}} gPchTcoSmiDispatchProtocolGuid =3D {0x9e71d609, 0x6d24, 0x47fd, {0xb5, 0= x72, 0x61, 0x40, 0xf8, 0xd9, 0xc2, 0xa4}} gPchPcieSmiDispatchProtocolGuid =3D {0x3e7d2b56, 0x3f47, 0x42aa, {0x8f, = 0x6b, 0x22, 0xf5, 0x19, 0x81, 0x8d, 0xab}} @@ -382,7 +380,6 @@ [Ppis] ## PCH ## gWdtPpiGuid =3D {0xf38d1338, 0xaf7a, 0x4fb6, {0x91, 0xdb, 0x1a, 0x9c, 0x= 21, 0x83, 0x57, 0x0d}} -gPchSpiPpiGuid =3D {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0, = 0xeb, 0x17, 0x72, 0x2d}} gPeiSmbusPolicyPpiGuid =3D {0x63b6e435, 0x32bc, 0x49c6, {0x81, 0xbd, 0xb= 7, 0xa1, 0xa0, 0xfe, 0x1a, 0x6c}} gPchResetCallbackPpiGuid =3D {0x17865dc0, 0x0b8b, 0x4da8, {0x8b, 0x42, 0= x7c, 0x46, 0xb8, 0x5c, 0xca, 0x4d}} =20 --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75338): https://edk2.groups.io/g/devel/message/75338 Mute This Topic: https://groups.io/mt/82929242/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75339+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75339+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396863; cv=none; d=zohomail.com; s=zohoarc; b=GKQPWOyHSvEfU5eTShZ19utxX/EWsW60AcUzJEtcD8Of4Sb9SLKmEtLzWD2d2M2M9jOlgWMovlkFZ2h1dUKaFRYeAjBc1H3JiJn3sbAsotOwkn2HR5kPpASGSKfOXC3vzGuHvBu4QKHPNdsNvic9vaLTbhAleDAX9U+nm19IIyI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396863; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=jvn1UDDP8HHSXNFT50gw8ane1NOjKn5/h7izowHAix8=; b=JXZRjmYKHXBY3AMGERR6KJJ7BpDf2Z2a3BuDnl4ODhvpPe/Tc05ZcQbViWH45YZpVBKdX8cEBL5hNyp5DiB2UaZZwWMmhnW2xfvtu3ucKTAthtRe3fyKJrO7ee5XhEfaBQ5IkOgZ3Sjnq3cqR6Cd+6Wfb+yncc866nHsouCxHVA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75339+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396863689724.3576299796717; Tue, 18 May 2021 21:01:03 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id jnveYY1788612x7nGTykGTMx; Tue, 18 May 2021 21:01:03 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web11.6953.1621396857382176338 for ; Tue, 18 May 2021 21:00:57 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 2754E20B7178; Tue, 18 May 2021 21:00:57 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 2754E20B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Chasel Chiu , Sai Chaganty Subject: [edk2-devel] [edk2-platforms][PATCH v2 33/35] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Date: Tue, 18 May 2021 20:59:45 -0700 Message-Id: <20210519035947.1234-34-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: pmh9LpFCDDd60zZg7wh5ECRQx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396863; bh=7X6Xe3OY5X7xCJLkj1fuzTYR63SXiLCpWC73pBdPhG0=; h=Cc:Date:From:Reply-To:Subject:To; b=hFtX0CHN9Sv5h1QYC/Pks1aRDT+GVsxlqreSZ8SkKAccWzldE0PYKW3NUumdlaYmve3 jNK0O4Cr5+Ah0Fd4Qim0pea5qc1PdL1Ol3se/Cym0RCygetA3CGEesVcHR7Yd5fZCaL2q FBaFmubAkc3WOVqfuFRtrPh0+RhHxucwzhc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 The following PPI and Protocols have moved to IntelSiliconPkg. The remaining definitions in KabylakeSiliconPkg are removed and libs modules that need to reference IntelSiliconPkg are updated. 1. gPchSpiProtocolGuid 2. gPchSmmSpiProtocolGuid 3. gPchSpiPpiGuid Cc: Chasel Chiu Cc: Sai Chaganty Signed-off-by: Michael Kubacki Reviewed-by: Chasel Chiu Reviewed-by: Nate DeSimone --- Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf | 3= +- Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h | 26= -- Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h | 293= -------------------- Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 1= + Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 1= + Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec | 3= - 6 files changed, 4 insertions(+), 323 deletions(-) diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf b= /Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf index 52e3b6ceba3e..bd12fa691d40 100644 --- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf +++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf @@ -46,6 +46,7 @@ [Sources] [Packages] MdePkg/MdePkg.dec UefiCpuPkg/UefiCpuPkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec KabylakeSiliconPkg/SiPkg.dec SecurityPkg/SecurityPkg.dec =20 @@ -92,7 +93,7 @@ [Protocols] gEfiMpServiceProtocolGuid ## CONSUMES gDxeSiPolicyProtocolGuid ## CONSUMES gHstiPublishCompleteProtocolGuid ## PRODUCES - =20 + [FixedPcd] gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1 gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2 diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h b/Silic= on/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h deleted file mode 100644 index e11f82edcaea..000000000000 --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Ppi/Spi.h +++ /dev/null @@ -1,26 +0,0 @@ -/** @file - This file defines the PCH SPI PPI which implements the - Intel(R) PCH SPI Host Controller Compatibility Interface. - -Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ -#ifndef _PCH_SPI_PPI_H_ -#define _PCH_SPI_PPI_H_ - -#include - -// -// Extern the GUID for PPI users. -// -extern EFI_GUID gPchSpiPpiGuid; - -/** - Reuse the PCH_SPI_PROTOCOL definitions - This is possible becaues the PPI implementation does not rely on a PeiSe= rvice pointer, - as it uses EDKII Glue Lib to do IO accesses -**/ -typedef PCH_SPI_PROTOCOL PCH_SPI_PPI; - -#endif diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h b/= Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h deleted file mode 100644 index 8c66e5063fa9..000000000000 --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Protocol/Spi.h +++ /dev/null @@ -1,293 +0,0 @@ -/** @file - This file defines the PCH SPI Protocol which implements the - Intel(R) PCH SPI Host Controller Compatibility Interface. - -Copyright (c) 2017, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ -#ifndef _PCH_SPI_PROTOCOL_H_ -#define _PCH_SPI_PROTOCOL_H_ - -// -// Extern the GUID for protocol users. -// -extern EFI_GUID gPchSpiProtocolGuid; -extern EFI_GUID gPchSmmSpiProtocolGuid; - -// -// Forward reference for ANSI C compatibility -// -typedef struct _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL; - -// -// SPI protocol data structures and definitions -// - -/** - Flash Region Type -**/ -typedef enum { - FlashRegionDescriptor, - FlashRegionBios, - FlashRegionMe, - FlashRegionGbE, - FlashRegionPlatformData, - FlashRegionDer, - FlashRegionAll, - FlashRegionMax -} FLASH_REGION_TYPE; - -// -// Protocol member functions -// - -/** - Read data from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. - @param[out] Buffer The Pointer to caller-allocated buffer c= ontaining the dada received. - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount, - OUT UINT8 *Buffer - ); - -/** - Write data to the flash part. Remark: Erase may be needed before write t= o the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. - @param[in] Buffer Pointer to caller-allocated buffer conta= ining the data sent during the SPI cycle. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_WRITE) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount, - IN UINT8 *Buffer - ); - -/** - Erase some area on the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_ERASE) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount - ); - -/** - Read SFDP data from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ComponentNumber The Componen Number for chip select - @param[in] Address The starting byte address for SFDP data = read. - @param[in] ByteCount Number of bytes in SFDP data portion of = the SPI cycle - @param[out] SfdpData The Pointer to caller-allocated buffer c= ontaining the SFDP data received - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_SFDP) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT8 ComponentNumber, - IN UINT32 Address, - IN UINT32 ByteCount, - OUT UINT8 *SfdpData - ); - -/** - Read Jedec Id from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ComponentNumber The Componen Number for chip select - @param[in] ByteCount Number of bytes in JedecId data portion = of the SPI cycle, the data size is 3 typically - @param[out] JedecId The Pointer to caller-allocated buffer c= ontaining JEDEC ID received - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT8 ComponentNumber, - IN UINT32 ByteCount, - OUT UINT8 *JedecId - ); - -/** - Write the status register in the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ByteCount Number of bytes in Status data portion o= f the SPI cycle, the data size is 1 typically - @param[in] StatusValue The Pointer to caller-allocated buffer c= ontaining the value of Status register writing - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 ByteCount, - IN UINT8 *StatusValue - ); - -/** - Read status register in the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ByteCount Number of bytes in Status data portion o= f the SPI cycle, the data size is 1 typically - @param[out] StatusValue The Pointer to caller-allocated buffer c= ontaining the value of Status register received. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_STATUS) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 ByteCount, - OUT UINT8 *StatusValue - ); - -/** - Get the SPI region base and size, based on the enum type - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for for the base a= ddress which is listed in the Descriptor. - @param[out] BaseAddress The Flash Linear Address for the Region = 'n' Base - @param[out] RegionSize The size for the Region 'n' - - @retval EFI_SUCCESS Read success - @retval EFI_INVALID_PARAMETER Invalid region type given - @retval EFI_DEVICE_ERROR The region is not used -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - OUT UINT32 *BaseAddress, - OUT UINT32 *RegionSize - ); - -/** - Read PCH Soft Strap Values - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA. - @param[in] ByteCount Number of bytes in SoftStrap data portio= n of the SPI cycle - @param[out] SoftStrapValue The Pointer to caller-allocated buffer c= ontaining PCH Soft Strap Value. - If the value of ByteCount is 0, the data= type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Sof= t Strap Length - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 SoftStrapAddr, - IN UINT32 ByteCount, - OUT VOID *SoftStrapValue - ); - -/** - Read CPU Soft Strap Values - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUS= BA. - @param[in] ByteCount Number of bytes in SoftStrap data portio= n of the SPI cycle. - @param[out] SoftStrapValue The Pointer to caller-allocated buffer c= ontaining CPU Soft Strap Value. - If the value of ByteCount is 0, the data= type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Sof= t Strap Length - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 SoftStrapAddr, - IN UINT32 ByteCount, - OUT VOID *SoftStrapValue - ); - -/** - These protocols/PPI allows a platform module to perform SPI operations t= hrough the - Intel PCH SPI Host Controller Interface. -**/ -struct _PCH_SPI_PROTOCOL { - /** - This member specifies the revision of this structure. This field is us= ed to - indicate backwards compatible changes to the protocol. - **/ - UINT8 Revision; - PCH_SPI_FLASH_READ FlashRead; ///< Read data fro= m the flash part. - PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to= the flash part. Remark: Erase may be needed before write to the flash part. - PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some ar= ea on the flash part. - PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP dat= a from the flash part. - PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id= from the flash part. - PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the sta= tus register in the flash part. - PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status r= egister in the flash part. - PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI r= egion base and size - PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft= Strap Values - PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft= Strap Values -}; - -/** - PCH SPI PPI/PROTOCOL revision number - - Revision 1: Initial version -**/ -#define PCH_SPI_SERVICES_REVISION 1 - -#endif diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiL= ib.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.i= nf index 31f4ffe43a23..c6bc1ad406c8 100644 --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf @@ -32,6 +32,7 @@ [LibraryClasses] =20 [Packages] MdePkg/MdePkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec KabylakeSiliconPkg/SiPkg.dec =20 [Sources] diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf b/S= ilicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf index 964489064a74..819dc2439f30 100644 --- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf @@ -30,6 +30,7 @@ [LibraryClasses] =20 [Packages] MdePkg/MdePkg.dec +IntelSiliconPkg/IntelSiliconPkg.dec KabylakeSiliconPkg/SiPkg.dec KabylakeSiliconPkg/KabylakeSiliconPrivate.dec =20 diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec b/Silicon/Intel/Kab= ylakeSiliconPkg/SiPkg.dec index 5ff7b39ca60e..d9ae9f6dfd91 100644 --- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec +++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec @@ -294,13 +294,11 @@ [Protocols] ## ## PCH ## -gPchSpiProtocolGuid =3D {0xc7d289, 0x1347, 0x4de0, {0xbf, 0x42, 0xe, 0x2= 6, 0x9d, 0xe, 0xf3, 0x4a}} gPchSerialGpioProtocolGuid =3D {0xf52c3858, 0x5ef8, 0x4d41, {0x83, 0x4e,= 0xc3, 0x9e, 0xef, 0x8a, 0x45, 0xa3}} gWdtProtocolGuid =3D {0xb42b8d12, 0x2acb, 0x499a, {0xa9, 0x20, 0xdd, 0x5= b, 0xe6, 0xcf, 0x09, 0xb1}} gPchInfoProtocolGuid =3D {0x984eb4e9, 0x5a95, 0x41de, {0xaa, 0xd0, 0x53,= 0x66, 0x8c, 0xa5, 0x13, 0xc0}} gPchSerialIoUartDebugInfoProtocolGuid =3D {0x2fd2b1bd, 0x0387, 0x4ec6, {= 0x94, 0x1f, 0xf1, 0x4b, 0x7f, 0x1c, 0x94, 0xb6}} gEfiSmmSmbusProtocolGuid =3D {0x72e40094, 0x2ee1, 0x497a, {0x8f, 0x33, 0= x4c, 0x93, 0x4a, 0x9e, 0x9c, 0x0c}} -gPchSmmSpiProtocolGuid =3D {0x56521f06, 0xa62, 0x4822, {0x99, 0x63, 0xdf= , 0x1, 0x9d, 0x72, 0xc7, 0xe1}} gPchSmmIoTrapControlGuid =3D {0x514d2afd, 0x2096, 0x4283, {0x9d, 0xa6, 0= x70, 0x0c, 0xd2, 0x7d, 0xc7, 0xa5}} gPchTcoSmiDispatchProtocolGuid =3D {0x9e71d609, 0x6d24, 0x47fd, {0xb5, 0= x72, 0x61, 0x40, 0xf8, 0xd9, 0xc2, 0xa4}} gPchPcieSmiDispatchProtocolGuid =3D {0x3e7d2b56, 0x3f47, 0x42aa, {0x8f, = 0x6b, 0x22, 0xf5, 0x19, 0x81, 0x8d, 0xab}} @@ -361,7 +359,6 @@ [Ppis] ## PCH ## gWdtPpiGuid =3D {0xf38d1338, 0xaf7a, 0x4fb6, {0x91, 0xdb, 0x1a, 0x9c, 0x= 21, 0x83, 0x57, 0x0d}} -gPchSpiPpiGuid =3D {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0, = 0xeb, 0x17, 0x72, 0x2d}} gPeiSmbusPolicyPpiGuid =3D {0x63b6e435, 0x32bc, 0x49c6, {0x81, 0xbd, 0xb= 7, 0xa1, 0xa0, 0xfe, 0x1a, 0x6c}} gPchResetCallbackPpiGuid =3D {0x17865dc0, 0x0b8b, 0x4da8, {0x8b, 0x42, 0= x7c, 0x46, 0xb8, 0x5c, 0xca, 0x4d}} gPchResetPpiGuid =3D {0x433e0f9f, 0x05ae, 0x410a, {0xa0, 0xc3, 0xbf, 0x2= 9, 0x8e, 0xcb, 0x25, 0xac}} --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75339): https://edk2.groups.io/g/devel/message/75339 Mute This Topic: https://groups.io/mt/82929243/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75340+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75340+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396861; cv=none; d=zohomail.com; s=zohoarc; b=P2mlGnID9HNBoWycLChiD/RooiYCzXxjGPr3l03sx+b0At/AXR6ZauT3hVm/s/OjoudpmKuQvzGoswiQLNesaObd61/oTgd3fS2Hl7nroqqW8hHEWZYKjAz8lJXoJCDlMoxI+XsZVyib+7RiOeFrfWVNrgoXOES78FM26wWjxNo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396861; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=K2Al8NZAFXk7pvSFZbF/a+UGnVIErzp2xigLBUHr0hw=; b=BgZaYPvMp7faBaC2Wni5UBDtHAJtULbtcpl/Q3vNJP/XZl7QgSXXePJ3vp2yDOVCyKUTw8OKUJ8jsLAsAomp46GY9JltldqUPG6wbVVA7Ohxqwh6bW+PJFKWc1Gc7aohG8Ib+DDqb0UZOft8IRtZvg6AxmvTHljnk7FqlmWwmFQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75340+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1621396861169752.0598183063125; Tue, 18 May 2021 21:01:01 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id W1JMYY1788612xDauDvEmeR5; Tue, 18 May 2021 21:01:00 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web10.6878.1621396858942333390 for ; Tue, 18 May 2021 21:00:59 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id AA1C720B7178; Tue, 18 May 2021 21:00:58 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com AA1C720B7178 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Agyeman Prince Subject: [edk2-devel] [edk2-platforms][PATCH v2 34/35] SimicsIch10Pkg: Remove PCH SPI SMM Protocol from package Date: Tue, 18 May 2021 20:59:46 -0700 Message-Id: <20210519035947.1234-35-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: ccfNj4hSt8V7V4Sm9RL4v74Kx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396860; bh=ymptTTJtK+6R0FkzKUyc500FcpJaSk8oDtAigJkBVss=; h=Cc:Date:From:Reply-To:Subject:To; b=K/4a1dshLIFcOlwOWMJe31TcXs5fkzTBTiE/j2wRh4yPJbo0h3XavH4xVnTB1ykL3u0 e7nN406QwKTpOWUodRp4YdKiNyXwLcKkGyFCIcEj7VKDJUrmd1qeAWzHUjS+AfubpmT8I bnqmY0nRTPKWPTkFiLdeoOc/j4YUvjUH+t8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 gEfiSmmSpiProtocolGuid is now declared in IntelSiliconPkg.dec. This change updates Ich10Pkg to remove the protocol declaration in the package and update libraries and modules to use the protocol from IntelSiliconPkg. Cc: Agyeman Prince Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.= c | 24 +- Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c = | 4 +- Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec = | 5 - Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h = | 295 -------------------- Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h = | 26 +- Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf = | 3 +- 6 files changed, 29 insertions(+), 328 deletions(-) diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLi= b/SpiCommon.c b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommo= nLib/SpiCommon.c index f2907ef53bfc..fc2a8be76b6a 100644 --- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCo= mmon.c +++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCo= mmon.c @@ -158,7 +158,7 @@ PchPmTimerStallRuntimeSafe ( EFI_STATUS EFIAPI SpiProtocolFlashRead ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN FLASH_REGION_TYPE FlashRegionType, IN UINT32 Address, IN UINT32 ByteCount, @@ -197,7 +197,7 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN FLASH_REGION_TYPE FlashRegionType, IN UINT32 Address, IN UINT32 ByteCount, @@ -235,7 +235,7 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN FLASH_REGION_TYPE FlashRegionType, IN UINT32 Address, IN UINT32 ByteCount @@ -274,7 +274,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINT8 ComponentNumber, IN UINT32 Address, IN UINT32 ByteCount, @@ -328,7 +328,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINT8 ComponentNumber, IN UINT32 ByteCount, OUT UINT8 *JedecId @@ -379,7 +379,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINT32 ByteCount, IN UINT8 *StatusValue ) @@ -414,7 +414,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINT32 ByteCount, OUT UINT8 *StatusValue ) @@ -450,7 +450,7 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN FLASH_REGION_TYPE FlashRegionType, OUT UINT32 *BaseAddress, OUT UINT32 *RegionSize @@ -510,7 +510,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINT32 SoftStrapAddr, IN UINT32 ByteCount, OUT VOID *SoftStrapValue @@ -568,7 +568,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINT32 SoftStrapAddr, IN UINT32 ByteCount, OUT VOID *SoftStrapValue @@ -626,7 +626,7 @@ SpiProtocolReadCpuSoftStrap ( **/ EFI_STATUS SendSpiCmd ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN FLASH_REGION_TYPE FlashRegionType, IN FLASH_CYCLE_TYPE FlashCycleType, IN UINT32 Address, @@ -897,7 +897,7 @@ SendSpiCmd ( **/ BOOLEAN WaitForSpiCycleComplete ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINTN PchSpiBar0, IN BOOLEAN ErrorCheck ) diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c b/Silicon/Intel/= SimicsIch10Pkg/Spi/Smm/PchSpi.c index 0baf730a4823..e4a81f91316c 100644 --- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c +++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c @@ -92,11 +92,11 @@ InstallPchSpi ( return Status; } // - // Install the SMM EFI_SPI_PROTOCOL interface + // Install the SMM PCH_SPI_PROTOCOL interface // Status =3D gSmst->SmmInstallProtocolInterface ( &(mSpiInstance->Handle), - &gEfiSmmSpiProtocolGuid, + &gPchSmmSpiProtocolGuid, EFI_NATIVE_INTERFACE, &(mSpiInstance->SpiProtocol) ); diff --git a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec b/Silicon/Intel/Simi= csIch10Pkg/Ich10Pkg.dec index 8d395a8b4370..58850f54e95c 100644 --- a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec +++ b/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec @@ -13,8 +13,3 @@ [Defines] =20 [Includes] Include - -[Ppis] - -[Protocols] - gEfiSmmSpiProtocolGuid =3D {0xbd75fe35, 0xfdce, 0x49d7, {0xa9, 0xdd, 0xb= 2, 0x6f, 0x1f, 0xc6, 0xb4, 0x37}} diff --git a/Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h b/Silicon/= Intel/SimicsIch10Pkg/Include/Protocol/Spi.h deleted file mode 100644 index b0c5b3d0e624..000000000000 --- a/Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h +++ /dev/null @@ -1,295 +0,0 @@ -/** @file - This file defines the PCH SPI Protocol which implements the - Intel(R) PCH SPI Host Controller Compatibility Interface. - - Copyright (c) 2019 Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#ifndef _PCH_SPI_PROTOCOL_H_ -#define _PCH_SPI_PROTOCOL_H_ - -// -// Extern the GUID for protocol users. -// -extern EFI_GUID gEfiSpiProtocolGuid; -extern EFI_GUID gEfiSmmSpiProtocolGuid; - -// -// Forward reference for ANSI C compatibility -// -typedef struct _PCH_SPI_PROTOCOL EFI_SPI_PROTOCOL; - -// -// SPI protocol data structures and definitions -// - -/** - Flash Region Type -**/ -typedef enum { - FlashRegionDescriptor, - FlashRegionBios, - FlashRegionMe, - FlashRegionGbE, - FlashRegionPlatformData, - FlashRegionDer, - FlashRegionAll, - FlashRegionMax -} FLASH_REGION_TYPE; - - -// -// Protocol member functions -// - -/** - Read data from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. - @param[out] Buffer The Pointer to caller-allocated buffer c= ontaining the dada received. - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ) ( - IN EFI_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount, - OUT UINT8 *Buffer - ); - -/** - Write data to the flash part. Remark: Erase may be needed before write t= o the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. - @param[in] Buffer Pointer to caller-allocated buffer conta= ining the data sent during the SPI cycle. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_WRITE) ( - IN EFI_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount, - IN UINT8 *Buffer - ); - -/** - Erase some area on the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_ERASE) ( - IN EFI_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount - ); - -/** - Read SFDP data from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ComponentNumber The Componen Number for chip select - @param[in] Address The starting byte address for SFDP data = read. - @param[in] ByteCount Number of bytes in SFDP data portion of = the SPI cycle - @param[out] SfdpData The Pointer to caller-allocated buffer c= ontaining the SFDP data received - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_SFDP) ( - IN EFI_SPI_PROTOCOL *This, - IN UINT8 ComponentNumber, - IN UINT32 Address, - IN UINT32 ByteCount, - OUT UINT8 *SfdpData - ); - -/** - Read Jedec Id from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ComponentNumber The Componen Number for chip select - @param[in] ByteCount Number of bytes in JedecId data portion = of the SPI cycle, the data size is 3 typically - @param[out] JedecId The Pointer to caller-allocated buffer c= ontaining JEDEC ID received - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) ( - IN EFI_SPI_PROTOCOL *This, - IN UINT8 ComponentNumber, - IN UINT32 ByteCount, - OUT UINT8 *JedecId - ); - -/** - Write the status register in the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ByteCount Number of bytes in Status data portion o= f the SPI cycle, the data size is 1 typically - @param[in] StatusValue The Pointer to caller-allocated buffer c= ontaining the value of Status register writing - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) ( - IN EFI_SPI_PROTOCOL *This, - IN UINT32 ByteCount, - IN UINT8 *StatusValue - ); - -/** - Read status register in the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ByteCount Number of bytes in Status data portion o= f the SPI cycle, the data size is 1 typically - @param[out] StatusValue The Pointer to caller-allocated buffer c= ontaining the value of Status register received. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_STATUS) ( - IN EFI_SPI_PROTOCOL *This, - IN UINT32 ByteCount, - OUT UINT8 *StatusValue - ); - -/** - Get the SPI region base and size, based on the enum type - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for for the base a= ddress which is listed in the Descriptor. - @param[out] BaseAddress The Flash Linear Address for the Region = 'n' Base - @param[out] RegionSize The size for the Region 'n' - - @retval EFI_SUCCESS Read success - @retval EFI_INVALID_PARAMETER Invalid region type given - @retval EFI_DEVICE_ERROR The region is not used -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) ( - IN EFI_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - OUT UINT32 *BaseAddress, - OUT UINT32 *RegionSize - ); - -/** - Read PCH Soft Strap Values - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA. - @param[in] ByteCount Number of bytes in SoftStrap data portio= n of the SPI cycle - @param[out] SoftStrapValue The Pointer to caller-allocated buffer c= ontaining PCH Soft Strap Value. - If the value of ByteCount is 0, the data= type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Sof= t Strap Length - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) ( - IN EFI_SPI_PROTOCOL *This, - IN UINT32 SoftStrapAddr, - IN UINT32 ByteCount, - OUT VOID *SoftStrapValue - ); - -/** - Read CPU Soft Strap Values - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUS= BA. - @param[in] ByteCount Number of bytes in SoftStrap data portio= n of the SPI cycle. - @param[out] SoftStrapValue The Pointer to caller-allocated buffer c= ontaining CPU Soft Strap Value. - If the value of ByteCount is 0, the data= type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Sof= t Strap Length - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) ( - IN EFI_SPI_PROTOCOL *This, - IN UINT32 SoftStrapAddr, - IN UINT32 ByteCount, - OUT VOID *SoftStrapValue - ); - -/** - These protocols/PPI allows a platform module to perform SPI operations t= hrough the - Intel PCH SPI Host Controller Interface. -**/ -struct _PCH_SPI_PROTOCOL { - /** - This member specifies the revision of this structure. This field is us= ed to - indicate backwards compatible changes to the protocol. - **/ - UINT8 Revision; - PCH_SPI_FLASH_READ FlashRead; ///< Read data fro= m the flash part. - PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to= the flash part. Remark: Erase may be needed before write to the flash part. - PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some ar= ea on the flash part. - PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP dat= a from the flash part. - PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id= from the flash part. - PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the sta= tus register in the flash part. - PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status r= egister in the flash part. - PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI r= egion base and size - PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft= Strap Values - PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft= Strap Values -}; - -/** - PCH SPI PPI/PROTOCOL revision number - - Revision 1: Initial version -**/ -#define PCH_SPI_SERVICES_REVISION 1 - -#endif diff --git a/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiComm= onLib.h b/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonL= ib.h index cf60f1fd5881..2c8162ac8170 100644 --- a/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h +++ b/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h @@ -48,7 +48,7 @@ typedef enum { typedef struct { UINT32 Signature; EFI_HANDLE Handle; - EFI_SPI_PROTOCOL SpiProtocol; + PCH_SPI_PROTOCOL SpiProtocol; UINT16 PchAcpiBase; UINTN PchSpiBase; UINT16 ReadPermission; @@ -148,7 +148,7 @@ ReleaseSpiBar0 ( EFI_STATUS EFIAPI SpiProtocolFlashRead ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN FLASH_REGION_TYPE FlashRegionType, IN UINT32 Address, IN UINT32 ByteCount, @@ -171,7 +171,7 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN FLASH_REGION_TYPE FlashRegionType, IN UINT32 Address, IN UINT32 ByteCount, @@ -193,7 +193,7 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN FLASH_REGION_TYPE FlashRegionType, IN UINT32 Address, IN UINT32 ByteCount @@ -216,7 +216,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINT8 ComponentNumber, IN UINT32 Address, IN UINT32 ByteCount, @@ -239,7 +239,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINT8 ComponentNumber, IN UINT32 ByteCount, OUT UINT8 *JedecId @@ -259,7 +259,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINT32 ByteCount, IN UINT8 *StatusValue ); @@ -278,7 +278,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINT32 ByteCount, OUT UINT8 *StatusValue ); @@ -298,7 +298,7 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN FLASH_REGION_TYPE FlashRegionType, OUT UINT32 *BaseAddress, OUT UINT32 *RegionSize @@ -321,7 +321,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINT32 SoftStrapAddr, IN UINT32 ByteCount, OUT VOID *SoftStrapValue @@ -344,7 +344,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINT32 SoftStrapAddr, IN UINT32 ByteCount, OUT VOID *SoftStrapValue @@ -367,7 +367,7 @@ SpiProtocolReadCpuSoftStrap ( **/ EFI_STATUS SendSpiCmd ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN FLASH_REGION_TYPE FlashRegionType, IN FLASH_CYCLE_TYPE FlashCycleType, IN UINT32 Address, @@ -388,7 +388,7 @@ SendSpiCmd ( **/ BOOLEAN WaitForSpiCycleComplete ( - IN EFI_SPI_PROTOCOL *This, + IN PCH_SPI_PROTOCOL *This, IN UINTN PchSpiBar0, IN BOOLEAN ErrorCheck ); diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf b/Silicon/I= ntel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf index 7b60d36c5b9c..35655ed5b5aa 100644 --- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf +++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf @@ -28,6 +28,7 @@ [Defines] =20 [Packages] MdePkg/MdePkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec SimicsIch10Pkg/Ich10Pkg.dec =20 [Sources] @@ -36,7 +37,7 @@ [Sources] =20 =20 [Protocols] - gEfiSmmSpiProtocolGuid # PRODUCES #SERVER_BIOS + gPchSmmSpiProtocolGuid # PRODUCES =20 =20 [Depex] --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#75340): https://edk2.groups.io/g/devel/message/75340 Mute This Topic: https://groups.io/mt/82929244/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 09:08:38 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+75341+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75341+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linux.microsoft.com ARC-Seal: i=1; a=rsa-sha256; t=1621396866; cv=none; d=zohomail.com; s=zohoarc; b=djmr3SH0dK1dUffbtx1VfKj27iVllIYfdKhDfBYaKwzY4Mp74vq7TIMmmeiQwX67Frq6aR/OSdgSnnRrEw3BSur+C6Vq9EEwz4pHJMSaKOrf+3bDl3w5dRBEMsBknOhEez0unIes1EWpRkk9DW5p4SaMULLayInEFFZ5CVVqLtg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1621396866; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=NB+bpR5dHyiwiL2kZ5Pj9OID+XIleEdx1ppcGeWW+Xg=; b=Ee8rohRopiXnNoeA2Ue+5bHtbXqt/iBe+VkG/FzFKtW4dwi5kNdiE7OSJTRTlF3s5SvkTABFtS0iAVcTr3RsmzABUmfGC5X1EvjtBaa7Dp7DCZR9hx30B3hdKn/D1vdVU2uq38pM0ZwVq4lIh1jC6Zai5Y4b6icYP5oDJkl2M2s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+75341+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 162139686629777.67354276295987; Tue, 18 May 2021 21:01:06 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id HZGGYY1788612xbyHCG7kpyb; Tue, 18 May 2021 21:01:05 -0700 X-Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mx.groups.io with SMTP id smtpd.web10.6880.1621396860409116701 for ; Tue, 18 May 2021 21:01:00 -0700 X-Received: from localhost.localdomain (unknown [167.220.2.74]) by linux.microsoft.com (Postfix) with ESMTPSA id 2B31820B7188; Tue, 18 May 2021 21:01:00 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 2B31820B7188 From: "Michael Kubacki" To: devel@edk2.groups.io Cc: Sai Chaganty , Nate DeSimone , Heng Luo Subject: [edk2-devel] [edk2-platforms][PATCH v2 35/35] TigerlakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Date: Tue, 18 May 2021 20:59:47 -0700 Message-Id: <20210519035947.1234-36-mikuback@linux.microsoft.com> In-Reply-To: <20210519035947.1234-1-mikuback@linux.microsoft.com> References: <20210519035947.1234-1-mikuback@linux.microsoft.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mikuback@linux.microsoft.com X-Gm-Message-State: 5yeyIAc6xergPaUBXuaI0hqOx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1621396865; bh=b2mK6JZULC7fLT0IrdW8jnfcHTTzKnK7O1BLKFUY30c=; h=Cc:Date:From:Reply-To:Subject:To; b=BbaTyAkQ3p4z0++C0xx8Zzwh6yWY5/1YBmVB4VYaZTes6cb6yF9g2GSB372Du6wXPle t3rMCmBaoXi7KMyg7N1zC0OAGJrXYGvaAkXjGFyFETNHMsPmWoa5E5jptAd/9I3v25wnT yR1JtUQCXduj0YHabAUFy3+PKvL3btS3bFs= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307 The following PPI and Protocols have moved to IntelSiliconPkg. The remaining definitions in TigerlakeSiliconPkg are removed and libs/ modules that need to reference IntelSiliconPkg are updated. 1. gPchSpiProtocolGuid 2. gPchSmmSpiProtocolGuid 3. gPchSpiPpiGuid Cc: Sai Chaganty Cc: Nate DeSimone Cc: Heng Luo Signed-off-by: Michael Kubacki Reviewed-by: Nate DeSimone --- Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h = | 301 -------------------- Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommon= Lib/BaseSpiCommonLib.inf | 1 + Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf = | 1 + Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf = | 1 + Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec = | 3 - 5 files changed, 3 insertions(+), 304 deletions(-) diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h b/Sil= icon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h deleted file mode 100644 index c13dc5a5f5f5..000000000000 --- a/Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h +++ /dev/null @@ -1,301 +0,0 @@ -/** @file - This file defines the PCH SPI Protocol which implements the - Intel(R) PCH SPI Host Controller Compatibility Interface. - - Copyright (c) 2021, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent -**/ -#ifndef _PCH_SPI_PROTOCOL_H_ -#define _PCH_SPI_PROTOCOL_H_ - -// -// Extern the GUID for protocol users. -// -extern EFI_GUID gPchSpiProtocolGuid; -extern EFI_GUID gPchSmmSpiProtocolGuid; - -// -// Forward reference for ANSI C compatibility -// -typedef struct _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL; - -// -// SPI protocol data structures and definitions -// - -/** - Flash Region Type -**/ -typedef enum { - FlashRegionDescriptor, - FlashRegionBios, - FlashRegionMe, - FlashRegionGbE, - FlashRegionPlatformData, - FlashRegionDer, - FlashRegionSecondaryBios, - FlashRegionuCodePatch, - FlashRegionEC, - FlashRegionDeviceExpansion2, - FlashRegionIE, - FlashRegion10Gbe_A, - FlashRegion10Gbe_B, - FlashRegion13, - FlashRegion14, - FlashRegion15, - FlashRegionAll, - FlashRegionMax -} FLASH_REGION_TYPE; -// -// Protocol member functions -// - -/** - Read data from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. - @param[out] Buffer The Pointer to caller-allocated buffer c= ontaining the dada received. - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount, - OUT UINT8 *Buffer - ); - -/** - Write data to the flash part. Remark: Erase may be needed before write t= o the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. - @param[in] Buffer Pointer to caller-allocated buffer conta= ining the data sent during the SPI cycle. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_WRITE) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount, - IN UINT8 *Buffer - ); - -/** - Erase some area on the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle wh= ich is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall withi= n a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of t= he SPI cycle. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_ERASE) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount - ); - -/** - Read SFDP data from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ComponentNumber The Componen Number for chip select - @param[in] Address The starting byte address for SFDP data = read. - @param[in] ByteCount Number of bytes in SFDP data portion of = the SPI cycle - @param[out] SfdpData The Pointer to caller-allocated buffer c= ontaining the SFDP data received - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_SFDP) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT8 ComponentNumber, - IN UINT32 Address, - IN UINT32 ByteCount, - OUT UINT8 *SfdpData - ); - -/** - Read Jedec Id from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ComponentNumber The Componen Number for chip select - @param[in] ByteCount Number of bytes in JedecId data portion = of the SPI cycle, the data size is 3 typically - @param[out] JedecId The Pointer to caller-allocated buffer c= ontaining JEDEC ID received - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT8 ComponentNumber, - IN UINT32 ByteCount, - OUT UINT8 *JedecId - ); - -/** - Write the status register in the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ByteCount Number of bytes in Status data portion o= f the SPI cycle, the data size is 1 typically - @param[in] StatusValue The Pointer to caller-allocated buffer c= ontaining the value of Status register writing - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 ByteCount, - IN UINT8 *StatusValue - ); - -/** - Read status register in the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ByteCount Number of bytes in Status data portion o= f the SPI cycle, the data size is 1 typically - @param[out] StatusValue The Pointer to caller-allocated buffer c= ontaining the value of Status register received. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_STATUS) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 ByteCount, - OUT UINT8 *StatusValue - ); - -/** - Get the SPI region base and size, based on the enum type - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for for the base a= ddress which is listed in the Descriptor. - @param[out] BaseAddress The Flash Linear Address for the Region = 'n' Base - @param[out] RegionSize The size for the Region 'n' - - @retval EFI_SUCCESS Read success - @retval EFI_INVALID_PARAMETER Invalid region type given - @retval EFI_DEVICE_ERROR The region is not used -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - OUT UINT32 *BaseAddress, - OUT UINT32 *RegionSize - ); - -/** - Read PCH Soft Strap Values - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA. - @param[in] ByteCount Number of bytes in SoftStrap data portio= n of the SPI cycle - @param[out] SoftStrapValue The Pointer to caller-allocated buffer c= ontaining PCH Soft Strap Value. - If the value of ByteCount is 0, the data= type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Sof= t Strap Length - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 SoftStrapAddr, - IN UINT32 ByteCount, - OUT VOID *SoftStrapValue - ); - -/** - Read CPU Soft Strap Values - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUS= BA. - @param[in] ByteCount Number of bytes in SoftStrap data portio= n of the SPI cycle. - @param[out] SoftStrapValue The Pointer to caller-allocated buffer c= ontaining CPU Soft Strap Value. - If the value of ByteCount is 0, the data= type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Sof= t Strap Length - It is the caller's responsibility to mak= e sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 SoftStrapAddr, - IN UINT32 ByteCount, - OUT VOID *SoftStrapValue - ); - -/** - These protocols/PPI allows a platform module to perform SPI operations t= hrough the - Intel PCH SPI Host Controller Interface. -**/ -struct _PCH_SPI_PROTOCOL { - /** - This member specifies the revision of this structure. This field is us= ed to - indicate backwards compatible changes to the protocol. - **/ - UINT8 Revision; - PCH_SPI_FLASH_READ FlashRead; ///< Read data fro= m the flash part. - PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to= the flash part. Remark: Erase may be needed before write to the flash part. - PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some ar= ea on the flash part. - PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP dat= a from the flash part. - PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id= from the flash part. - PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the sta= tus register in the flash part. - PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status r= egister in the flash part. - PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI r= egion base and size - PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft= Strap Values - PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft= Strap Values -}; - -/** - PCH SPI PPI/PROTOCOL revision number - - Revision 1: Initial version -**/ -#define PCH_SPI_SERVICES_REVISION 1 - -#endif diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/B= aseSpiCommonLib/BaseSpiCommonLib.inf b/Silicon/Intel/TigerlakeSiliconPkg/Ip= Block/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf index a1a54677457e..2686dff41e25 100644 --- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiC= ommonLib/BaseSpiCommonLib.inf +++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiC= ommonLib/BaseSpiCommonLib.inf @@ -19,6 +19,7 @@ [Sources] =20 [Packages] MdePkg/MdePkg.dec + IntelSiliconPkg/IntelSiliconPkg.dec TigerlakeSiliconPkg/SiPkg.dec =20 [LibraryClasses] diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf b= /Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf index 033134cea171..f64b84880b31 100644 --- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf +++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf @@ -30,6 +30,7 @@ [LibraryClasses] =20 [Packages] MdePkg/MdePkg.dec +IntelSiliconPkg/IntelSiliconPkg.dec TigerlakeSiliconPkg/SiPkg.dec =20 =20 diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTg= l.inf b/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf index 4941ff0f498d..95182e50651e 100644 --- a/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf +++ b/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf @@ -49,6 +49,7 @@ [LibraryClasses] =20 [Packages] MdePkg/MdePkg.dec +IntelSiliconPkg/IntelSiliconPkg.dec TigerlakeSiliconPkg/SiPkg.dec =20 =20 diff --git a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec b/Silicon/Intel/Ti= gerlakeSiliconPkg/SiPkg.dec index 37f61cc5ee18..7cdbb3748155 100644 --- a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec +++ b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec @@ -624,11 +624,9 @@ [Protocols] ## PCH ## gThcProtocolGuid =3D {0x00860921, 0x7B9B, 0x4EA8, {0xAD, 0x23, 0x3C, 0xCA= , 0x33, 0x9E, 0x7D, 0xFE}} -gPchSpiProtocolGuid =3D {0xc7d289, 0x1347, 0x4de0, {0xbf, 0x42, 0xe, 0x2= 6, 0x9d, 0xe, 0xf3, 0x4a}} gWdtProtocolGuid =3D {0xb42b8d12, 0x2acb, 0x499a, {0xa9, 0x20, 0xdd, 0x5= b, 0xe6, 0xcf, 0x09, 0xb1}} gPchSerialIoUartDebugInfoProtocolGuid =3D {0x2fd2b1bd, 0x0387, 0x4ec6, {= 0x94, 0x1f, 0xf1, 0x4b, 0x7f, 0x1c, 0x94, 0xb6}} gEfiSmmSmbusProtocolGuid =3D {0x72e40094, 0x2ee1, 0x497a, {0x8f, 0x33, 0= x4c, 0x93, 0x4a, 0x9e, 0x9c, 0x0c}} -gPchSmmSpiProtocolGuid =3D {0x56521f06, 0xa62, 0x4822, {0x99, 0x63, 0xdf= , 0x1, 0x9d, 0x72, 0xc7, 0xe1}} gPchSmmIoTrapControlGuid =3D {0x514d2afd, 0x2096, 0x4283, {0x9d, 0xa6, 0= x70, 0x0c, 0xd2, 0x7d, 0xc7, 0xa5}} gPchTcoSmiDispatchProtocolGuid =3D {0x9e71d609, 0x6d24, 0x47fd, {0xb5, 0= x72, 0x61, 0x40, 0xf8, 0xd9, 0xc2, 0xa4}} gPchPcieSmiDispatchProtocolGuid =3D {0x3e7d2b56, 0x3f47, 0x42aa, {0x8f, = 0x6b, 0x22, 0xf5, 0x19, 0x81, 0x8d, 0xab}} @@ -751,7 +749,6 @@ [Ppis] ## PCH ## gWdtPpiGuid =3D {0xf38d1338, 0xaf7a, 0x4fb6, {0x91, 0xdb, 0x1a, 0x9c, 0x= 21, 0x83, 0x57, 0x0d}} -gPchSpiPpiGuid =3D {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0, = 0xeb, 0x17, 0x72, 0x2d}} gPeiSmbusPolicyPpiGuid =3D {0x63b6e435, 0x32bc, 0x49c6, {0x81, 0xbd, 0xb= 7, 0xa1, 0xa0, 0xfe, 0x1a, 0x6c}} =20 ## --=20 2.28.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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