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[174.52.16.57]) by smtp.gmail.com with ESMTPSA id s6sm6707320iob.45.2021.05.10.14.53.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 May 2021 14:53:15 -0700 (PDT) From: "Rebecca Cran" To: devel@edk2.groups.io, Jiewen Yao , Jian J Wang , Michael D Kinney , Liming Gao , Zhiguang Liu , Ard Biesheuvel , Sami Mujawar Cc: Rebecca Cran Subject: [edk2-devel] [PATCH v3 1/2] MdePkg/BaseRngLib: Add support for ARMv8.5 RNG instructions Date: Mon, 10 May 2021 15:53:07 -0600 Message-Id: <20210510215308.28745-2-rebecca@nuviainc.com> In-Reply-To: <20210510215308.28745-1-rebecca@nuviainc.com> References: <20210510215308.28745-1-rebecca@nuviainc.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,rebecca@nuviainc.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620683597; bh=dDbl+Iv49gi4oIBIN/WqTmPgeYJrIgc2z4jE1pgAEcc=; h=Cc:Date:From:Reply-To:Subject:To; b=fv8kP85xe+glRe1q9orWdkc1bC4Q5nhkY5VKtv+LLnWN9aLQmCcR5Zas1CrwgaezcCu YlvJxMI/FIQnyfzyyy4+GjlVXzf25mDXpSiGSQXptCGMkb3g4EL1J/rg6Vx0HcC76e1aE JtKcnpT8DnxeVfywuidLXa65Abzh0lr00+Q= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Make BaseRngLib more generic by moving x86-specific functionality into 'Rand' and adding files under 'AArch64' to support the optional ARMv8.5 RNG instruction RNDR that is a part of FEAT_RNG. Signed-off-by: Rebecca Cran Reviewed-by: Sami Mujawar --- MdePkg/MdePkg.dec | 9 +- MdePkg/MdePkg.dsc | 4 +- MdePkg/Library/BaseRngLib/BaseRngLib.inf | 23 +++- MdePkg/Library/BaseRngLib/AArch64/ArmRng.h | 43 ++++++ MdePkg/Library/BaseRngLib/BaseRngLibInternals.h | 78 +++++++++++ MdePkg/Library/BaseRngLib/AArch64/Rndr.c | 139 +++++++++++++++= +++++ MdePkg/Library/BaseRngLib/BaseRng.c | 87 ++++++------ MdePkg/Library/BaseRngLib/Rand/RdRand.c | 131 +++++++++++++++= +++ MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.S | 31 +++++ MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.asm | 30 +++++ MdePkg/Library/BaseRngLib/AArch64/ArmRng.S | 37 ++++++ MdePkg/Library/BaseRngLib/AArch64/ArmRng.asm | 39 ++++++ MdePkg/Library/BaseRngLib/BaseRngLib.uni | 6 +- 13 files changed, 603 insertions(+), 54 deletions(-) diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index 8965e903e093..b49f88d8e18f 100644 --- a/MdePkg/MdePkg.dec +++ b/MdePkg/MdePkg.dec @@ -267,6 +267,11 @@ [LibraryClasses] # RegisterFilterLib|Include/Library/RegisterFilterLib.h =20 +[LibraryClasses.IA32, LibraryClasses.X64, LibraryClasses.AARCH64] + ## @libraryclass Provides services to generate random number. + # + RngLib|Include/Library/RngLib.h + [LibraryClasses.IA32, LibraryClasses.X64] ## @libraryclass Abstracts both S/W SMI generation and detection. ## @@ -288,10 +293,6 @@ [LibraryClasses.IA32, LibraryClasses.X64] # SmmPeriodicSmiLib|Include/Library/SmmPeriodicSmiLib.h =20 - ## @libraryclass Provides services to generate random number. - # - RngLib|Include/Library/RngLib.h - ## @libraryclass Provides services to log the SMI handler registration. SmiHandlerProfileLib|Include/Library/SmiHandlerProfileLib.h =20 diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc index d363419006ea..a94959169b2f 100644 --- a/MdePkg/MdePkg.dsc +++ b/MdePkg/MdePkg.dsc @@ -145,6 +145,9 @@ [Components.IA32, Components.X64, Components.ARM, Compo= nents.AARCH64] MdePkg/Test/UnitTest/Library/BaseSafeIntLib/TestBaseSafeIntLibSmm.inf MdePkg/Test/UnitTest/Library/BaseSafeIntLib/TestBaseSafeIntLibUefiShell.= inf =20 +[Components.IA32, Components.X64, Components.AARCH64] + MdePkg/Library/BaseRngLib/BaseRngLib.inf + [Components.IA32, Components.X64] MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf @@ -168,7 +171,6 @@ [Components.IA32, Components.X64] MdePkg/Library/BaseS3StallLib/BaseS3StallLib.inf MdePkg/Library/SmmMemLib/SmmMemLib.inf MdePkg/Library/SmmIoLib/SmmIoLib.inf - MdePkg/Library/BaseRngLib/BaseRngLib.inf MdePkg/Library/SmmPciExpressLib/SmmPciExpressLib.inf MdePkg/Library/SmiHandlerProfileLibNull/SmiHandlerProfileLibNull.inf MdePkg/Library/MmServicesTableLib/MmServicesTableLib.inf diff --git a/MdePkg/Library/BaseRngLib/BaseRngLib.inf b/MdePkg/Library/Base= RngLib/BaseRngLib.inf index 31740751c69c..1fcceb941495 100644 --- a/MdePkg/Library/BaseRngLib/BaseRngLib.inf +++ b/MdePkg/Library/BaseRngLib/BaseRngLib.inf @@ -1,9 +1,10 @@ ## @file # Instance of RNG (Random Number Generator) Library. # -# BaseRng Library that uses CPU RdRand instruction access to provide -# high-quality random numbers. +# BaseRng Library that uses CPU RNG instructions (e.g. RdRand) to +# provide random numbers. # +# Copyright (c) 2021, NUVIA Inc. All rights reserved.
# Copyright (c) 2015, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent @@ -22,11 +23,25 @@ [Defines] CONSTRUCTOR =3D BaseRngLibConstructor =20 # -# VALID_ARCHITECTURES =3D IA32 X64 +# VALID_ARCHITECTURES =3D IA32 X64 AARCH64 # =20 -[Sources.Ia32, Sources.X64] +[Sources] BaseRng.c + BaseRngLibInternals.h + +[Sources.Ia32, Sources.X64] + Rand/RdRand.c + +[Sources.AARCH64] + AArch64/Rndr.c + AArch64/ArmRng.h + + AArch64/ArmReadIdIsar0.S | GCC + AArch64/ArmRng.S | GCC + + AArch64/ArmReadIdIsar0.asm | MSFT + AArch64/ArmRng.asm | MSFT =20 [Packages] MdePkg/MdePkg.dec diff --git a/MdePkg/Library/BaseRngLib/AArch64/ArmRng.h b/MdePkg/Library/Ba= seRngLib/AArch64/ArmRng.h new file mode 100644 index 000000000000..a597e98bf0d5 --- /dev/null +++ b/MdePkg/Library/BaseRngLib/AArch64/ArmRng.h @@ -0,0 +1,43 @@ +/** @file + Random number generator service that uses the RNDR instruction + to provide pseudorandom numbers. + + Copyright (c) 2021, NUVIA Inc. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef ARM_RNG_H_ +#define ARM_RNG_H_ + +/** + Generates a random number using RNDR. + Returns TRUE on success; FALSE on failure. + + @param[out] Rand Buffer pointer to store the 64-bit random value. + + @retval TRUE Random number generated successfully. + @retval FALSE Failed to generate the random number. + +**/ +BOOLEAN +EFIAPI +ArmRndr ( + OUT UINT64 *Rand + ); + +/** + Reads the ID_AA64ISAR0 Register. + + @return The contents of the ID_AA64ISAR0 register. + +**/ +UINT64 +EFIAPI +ArmReadIdIsar0 ( + VOID + ); + +#endif /* ARM_RNG_H_ */ + diff --git a/MdePkg/Library/BaseRngLib/BaseRngLibInternals.h b/MdePkg/Libra= ry/BaseRngLib/BaseRngLibInternals.h new file mode 100644 index 000000000000..b6b4e9eef227 --- /dev/null +++ b/MdePkg/Library/BaseRngLib/BaseRngLibInternals.h @@ -0,0 +1,78 @@ +/** @file + + Architecture specific interface to RNG functionality. + +Copyright (c) 2021, NUVIA Inc. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef BASE_RNGLIB_INTERNALS_H_ + +/** + Generates a 16-bit random number. + + @param[out] Rand Buffer pointer to store the 16-bit random value. + + @retval TRUE Random number generated successfully. + @retval FALSE Failed to generate the random number. + +**/ +BOOLEAN +EFIAPI +ArchGetRandomNumber16 ( + OUT UINT16 *Rand + ); + +/** + Generates a 32-bit random number. + + @param[out] Rand Buffer pointer to store the 32-bit random value. + + @retval TRUE Random number generated successfully. + @retval FALSE Failed to generate the random number. + +**/ +BOOLEAN +EFIAPI +ArchGetRandomNumber32 ( + OUT UINT32 *Rand + ); + +/** + Generates a 64-bit random number. + + @param[out] Rand Buffer pointer to store the 64-bit random value. + + @retval TRUE Random number generated successfully. + @retval FALSE Failed to generate the random number. + +**/ +BOOLEAN +EFIAPI +ArchGetRandomNumber64 ( + OUT UINT64 *Rand + ); + +/** + Checks whether the RNG instruction is supported. + + @retval TRUE RNG instruction is supported. + @retval FALSE RNG instruction is not supported. + +**/ +BOOLEAN +EFIAPI +ArchIsRngSupported ( + VOID + ); + +#if defined (MDE_CPU_AARCH64) + +// RNDR, Random Number +#define RNDR S3_3_C2_C4_0 + +#endif + +#endif // BASE_RNGLIB_INTERNALS_H_ diff --git a/MdePkg/Library/BaseRngLib/AArch64/Rndr.c b/MdePkg/Library/Base= RngLib/AArch64/Rndr.c new file mode 100644 index 000000000000..c9f8c813ed35 --- /dev/null +++ b/MdePkg/Library/BaseRngLib/AArch64/Rndr.c @@ -0,0 +1,139 @@ +/** @file + Random number generator service that uses the RNDR instruction + to provide pseudorandom numbers. + + Copyright (c) 2021, NUVIA Inc. All rights reserved.
+ Copyright (c) 2015, Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include + +#include "ArmRng.h" +#include "BaseRngLibInternals.h" + +STATIC BOOLEAN mRndrSupported; + +// +// Bit mask used to determine if RNDR instruction is supported. +// +#define RNDR_MASK ((UINT64)MAX_UINT16 << 60U) + +/** + The constructor function checks whether or not RNDR instruction is suppo= rted + by the host hardware. + + The constructor function checks whether or not RNDR instruction is suppo= rted. + It will ASSERT() if RNDR instruction is not supported. + It will always return EFI_SUCCESS. + + @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS. + +**/ +EFI_STATUS +EFIAPI +BaseRngLibConstructor ( + VOID + ) +{ + UINT64 Isar0; + // + // Determine RNDR support by examining bits 63:60 of the ISAR0 register = returned by + // MSR. A non-zero value indicates that the processor supports the RNDR = instruction. + // + Isar0 =3D ArmReadIdIsar0 (); + ASSERT ((Isar0 & RNDR_MASK) !=3D 0); + + mRndrSupported =3D ((Isar0 & RNDR_MASK) !=3D 0); + + return EFI_SUCCESS; +} + +/** + Generates a 16-bit random number. + + @param[out] Rand Buffer pointer to store the 16-bit random value. + + @retval TRUE Random number generated successfully. + @retval FALSE Failed to generate the random number. + +**/ +BOOLEAN +EFIAPI +ArchGetRandomNumber16 ( + OUT UINT16 *Rand + ) +{ + UINT64 Rand64; + + if (ArchGetRandomNumber64 (&Rand64)) { + *Rand =3D Rand64 & MAX_UINT16; + return TRUE; + } + + return FALSE; +} + +/** + Generates a 32-bit random number. + + @param[out] Rand Buffer pointer to store the 32-bit random value. + + @retval TRUE Random number generated successfully. + @retval FALSE Failed to generate the random number. + +**/ +BOOLEAN +EFIAPI +ArchGetRandomNumber32 ( + OUT UINT32 *Rand + ) +{ + UINT64 Rand64; + + if (ArchGetRandomNumber64 (&Rand64)) { + *Rand =3D Rand64 & MAX_UINT32; + return TRUE; + } + + return FALSE; +} + +/** + Generates a 64-bit random number. + + @param[out] Rand Buffer pointer to store the 64-bit random value. + + @retval TRUE Random number generated successfully. + @retval FALSE Failed to generate the random number. + +**/ +BOOLEAN +EFIAPI +ArchGetRandomNumber64 ( + OUT UINT64 *Rand + ) +{ + return ArmRndr (Rand); +} + +/** + Checks whether RNDR is supported. + + @retval TRUE RNDR is supported. + @retval FALSE RNDR is not supported. + +**/ +BOOLEAN +EFIAPI +ArchIsRngSupported ( + VOID + ) +{ + return mRndrSupported; +} diff --git a/MdePkg/Library/BaseRngLib/BaseRng.c b/MdePkg/Library/BaseRngLi= b/BaseRng.c index 7ad7aec9d38f..5b63d8f7146b 100644 --- a/MdePkg/Library/BaseRngLib/BaseRng.c +++ b/MdePkg/Library/BaseRngLib/BaseRng.c @@ -1,8 +1,10 @@ /** @file - Random number generator services that uses RdRand instruction access - to provide high-quality random numbers. + Random number generator services that uses CPU RNG instructions to + provide random numbers. =20 +Copyright (c) 2021, NUVIA Inc. All rights reserved.
Copyright (c) 2015, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -10,46 +12,15 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include =20 -// -// Bit mask used to determine if RdRand instruction is supported. -// -#define RDRAND_MASK BIT30 +#include "BaseRngLibInternals.h" =20 // // Limited retry number when valid random data is returned. // Uses the recommended value defined in Section 7.3.17 of "Intel 64 and I= A-32 -// Architectures Software Developer's Mannual". +// Architectures Software Developer's Manual". // -#define RDRAND_RETRY_LIMIT 10 +#define GETRANDOM_RETRY_LIMIT 10 =20 -/** - The constructor function checks whether or not RDRAND instruction is sup= ported - by the host hardware. - - The constructor function checks whether or not RDRAND instruction is sup= ported. - It will ASSERT() if RDRAND instruction is not supported. - It will always return RETURN_SUCCESS. - - @retval RETURN_SUCCESS The constructor always returns EFI_SUCCESS. - -**/ -RETURN_STATUS -EFIAPI -BaseRngLibConstructor ( - VOID - ) -{ - UINT32 RegEcx; - - // - // Determine RDRAND support by examining bit 30 of the ECX register retu= rned by - // CPUID. A value of 1 indicates that processor support RDRAND instructi= on. - // - AsmCpuid (1, 0, 0, &RegEcx, 0); - ASSERT ((RegEcx & RDRAND_MASK) =3D=3D RDRAND_MASK); - - return RETURN_SUCCESS; -} =20 /** Generates a 16-bit random number. @@ -72,11 +43,19 @@ GetRandomNumber16 ( =20 ASSERT (Rand !=3D NULL); =20 + if (Rand =3D=3D NULL) { + return FALSE; + } + + if (!ArchIsRngSupported ()) { + return FALSE; + } + // // A loop to fetch a 16 bit random value with a retry count limit. // - for (Index =3D 0; Index < RDRAND_RETRY_LIMIT; Index++) { - if (AsmRdRand16 (Rand)) { + for (Index =3D 0; Index < GETRANDOM_RETRY_LIMIT; Index++) { + if (ArchGetRandomNumber16 (Rand)) { return TRUE; } } @@ -105,11 +84,19 @@ GetRandomNumber32 ( =20 ASSERT (Rand !=3D NULL); =20 + if (Rand =3D=3D NULL) { + return FALSE; + } + + if (!ArchIsRngSupported ()) { + return FALSE; + } + // // A loop to fetch a 32 bit random value with a retry count limit. // - for (Index =3D 0; Index < RDRAND_RETRY_LIMIT; Index++) { - if (AsmRdRand32 (Rand)) { + for (Index =3D 0; Index < GETRANDOM_RETRY_LIMIT; Index++) { + if (ArchGetRandomNumber32 (Rand)) { return TRUE; } } @@ -138,11 +125,19 @@ GetRandomNumber64 ( =20 ASSERT (Rand !=3D NULL); =20 + if (Rand =3D=3D NULL) { + return FALSE; + } + + if (!ArchIsRngSupported ()) { + return FALSE; + } + // // A loop to fetch a 64 bit random value with a retry count limit. // - for (Index =3D 0; Index < RDRAND_RETRY_LIMIT; Index++) { - if (AsmRdRand64 (Rand)) { + for (Index =3D 0; Index < GETRANDOM_RETRY_LIMIT; Index++) { + if (ArchGetRandomNumber64 (Rand)) { return TRUE; } } @@ -169,6 +164,14 @@ GetRandomNumber128 ( { ASSERT (Rand !=3D NULL); =20 + if (Rand =3D=3D NULL) { + return FALSE; + } + + if (!ArchIsRngSupported ()) { + return FALSE; + } + // // Read first 64 bits // diff --git a/MdePkg/Library/BaseRngLib/Rand/RdRand.c b/MdePkg/Library/BaseR= ngLib/Rand/RdRand.c new file mode 100644 index 000000000000..09fb875ac3f9 --- /dev/null +++ b/MdePkg/Library/BaseRngLib/Rand/RdRand.c @@ -0,0 +1,131 @@ +/** @file + Random number generator services that uses RdRand instruction access + to provide high-quality random numbers. + +Copyright (c) 2021, NUVIA Inc. All rights reserved.
+Copyright (c) 2015, Intel Corporation. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include + +#include "BaseRngLibInternals.h" + +// +// Bit mask used to determine if RdRand instruction is supported. +// +#define RDRAND_MASK BIT30 + + +STATIC BOOLEAN mRdRandSupported; + +/** + The constructor function checks whether or not RDRAND instruction is sup= ported + by the host hardware. + + The constructor function checks whether or not RDRAND instruction is sup= ported. + It will ASSERT() if RDRAND instruction is not supported. + It will always return EFI_SUCCESS. + + @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS. + +**/ +EFI_STATUS +EFIAPI +BaseRngLibConstructor ( + VOID + ) +{ + UINT32 RegEcx; + + // + // Determine RDRAND support by examining bit 30 of the ECX register retu= rned by + // CPUID. A value of 1 indicates that processor support RDRAND instructi= on. + // + AsmCpuid (1, 0, 0, &RegEcx, 0); + ASSERT ((RegEcx & RDRAND_MASK) =3D=3D RDRAND_MASK); + + mRdRandSupported =3D ((RegEcx & RDRAND_MASK) =3D=3D RDRAND_MASK); + + return EFI_SUCCESS; +} + +/** + Generates a 16-bit random number. + + @param[out] Rand Buffer pointer to store the 16-bit random value. + + @retval TRUE Random number generated successfully. + @retval FALSE Failed to generate the random number. + +**/ +BOOLEAN +EFIAPI +ArchGetRandomNumber16 ( + OUT UINT16 *Rand + ) +{ + return AsmRdRand16 (Rand); +} + +/** + Generates a 32-bit random number. + + @param[out] Rand Buffer pointer to store the 32-bit random value. + + @retval TRUE Random number generated successfully. + @retval FALSE Failed to generate the random number. + +**/ +BOOLEAN +EFIAPI +ArchGetRandomNumber32 ( + OUT UINT32 *Rand + ) +{ + return AsmRdRand32 (Rand); +} + +/** + Generates a 64-bit random number. + + @param[out] Rand Buffer pointer to store the 64-bit random value. + + @retval TRUE Random number generated successfully. + @retval FALSE Failed to generate the random number. + +**/ +BOOLEAN +EFIAPI +ArchGetRandomNumber64 ( + OUT UINT64 *Rand + ) +{ + return AsmRdRand64 (Rand); +} + +/** + Checks whether RDRAND is supported. + + @retval TRUE RDRAND is supported. + @retval FALSE RDRAND is not supported. + +**/ +BOOLEAN +EFIAPI +ArchIsRngSupported ( + VOID + ) +{ + /* + Existing software depends on this always returning TRUE, so for + now hard-code it. + + return mRdRandSupported; + */ + return TRUE; +} diff --git a/MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.S b/MdePkg/Li= brary/BaseRngLib/AArch64/ArmReadIdIsar0.S new file mode 100644 index 000000000000..82a00d362212 --- /dev/null +++ b/MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.S @@ -0,0 +1,31 @@ +#-------------------------------------------------------------------------= ----- +# +# ArmReadIdIsar0() for AArch64 +# +# Copyright (c) 2021, NUVIA Inc. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#-------------------------------------------------------------------------= ----- + +.text +.p2align 2 +GCC_ASM_EXPORT(ArmReadIdIsar0) + +#/** +# Reads the ID_AA64ISAR0 Register. +# +# @return The contents of the ID_AA64ISAR0 register. +# +#**/ +#UINT64 +#EFIAPI +#ArmReadIdIsar0 ( +# VOID +# ); +# +ASM_PFX(ArmReadIdIsar0): + mrs x0, id_aa64isar0_el1 // Read ID_AA64ISAR0 Register + ret + + diff --git a/MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.asm b/MdePkg/= Library/BaseRngLib/AArch64/ArmReadIdIsar0.asm new file mode 100644 index 000000000000..1d9f9a808c0c --- /dev/null +++ b/MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.asm @@ -0,0 +1,30 @@ +;-------------------------------------------------------------------------= ----- +; +; ArmReadIdIsar0() for AArch64 +; +; Copyright (c) 2021, NUVIA Inc. All rights reserved.
+; +; SPDX-License-Identifier: BSD-2-Clause-Patent +; +;-------------------------------------------------------------------------= ----- + + EXPORT ArmReadIdIsar0 + AREA BaseLib_LowLevel, CODE, READONLY + +;/** +; Reads the ID_AA64ISAR0 Register. +; +; @return The contents of the ID_AA64ISAR0 register. +; +;**/ +;UINT64 +;EFIAPI +;ArmReadIdIsar0 ( +; VOID +; ); +; +ArmReadIdIsar0 + mrs x0, id_aa64isar0_el1 // Read ID_AA64ISAR0 Register + ret + + END diff --git a/MdePkg/Library/BaseRngLib/AArch64/ArmRng.S b/MdePkg/Library/Ba= seRngLib/AArch64/ArmRng.S new file mode 100644 index 000000000000..5159f467e3a6 --- /dev/null +++ b/MdePkg/Library/BaseRngLib/AArch64/ArmRng.S @@ -0,0 +1,37 @@ +#-------------------------------------------------------------------------= ----- +# +# ArmRndr() for AArch64 +# +# Copyright (c) 2021, NUVIA Inc. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#-------------------------------------------------------------------------= ----- + +#include "BaseRngLibInternals.h" + +.text +.p2align 2 +GCC_ASM_EXPORT(ArmRndr) + +#/** +# Generates a random number using RNDR. +# Returns TRUE on success; FALSE on failure. +# +# @param[out] Rand Buffer pointer to store the 64-bit random value. +# +# @retval TRUE Random number generated successfully. +# @retval FALSE Failed to generate the random number. +# +#**/ +#BOOLEAN +#EFIAPI +#ArmRndr ( +# OUT UINT64 *Rand +# ); +# +ASM_PFX(ArmRndr): + mrs x1, RNDR + str x1, [x0] + cset x0, ne // RNDR sets NZCV to 0b0100 on failure + ret diff --git a/MdePkg/Library/BaseRngLib/AArch64/ArmRng.asm b/MdePkg/Library/= BaseRngLib/AArch64/ArmRng.asm new file mode 100644 index 000000000000..33144196cb54 --- /dev/null +++ b/MdePkg/Library/BaseRngLib/AArch64/ArmRng.asm @@ -0,0 +1,39 @@ +;-------------------------------------------------------------------------= ----- +; +; ArmRndr() for AArch64 +; +; Copyright (c) 2021, NUVIA Inc. All rights reserved.
+; +; SPDX-License-Identifier: BSD-2-Clause-Patent +; +;-------------------------------------------------------------------------= ----- + +#include "BaseRngLibInternals.h" + + EXPORT ArmRndr + AREA BaseLib_LowLevel, CODE, READONLY + + +;/** +; Generates a random number using RNDR. +; Returns TRUE on success; FALSE on failure. +; +; @param[out] Rand Buffer pointer to store the 64-bit random value. +; +; @retval TRUE Random number generated successfully. +; @retval FALSE Failed to generate the random number. +; +;**/ +;BOOLEAN +;EFIAPI +;ArmRndr ( +; OUT UINT64 *Rand +; ); +; +ArmRndr + mrs x1, RNDR + str x1, [x0] + cset x0, ne // RNDR sets NZCV to 0b0100 on failure + ret + + END diff --git a/MdePkg/Library/BaseRngLib/BaseRngLib.uni b/MdePkg/Library/Base= RngLib/BaseRngLib.uni index f3ed954c5209..de5d4f9dd869 100644 --- a/MdePkg/Library/BaseRngLib/BaseRngLib.uni +++ b/MdePkg/Library/BaseRngLib/BaseRngLib.uni @@ -1,8 +1,8 @@ // /** @file // Instance of RNG (Random Number Generator) Library. // -// BaseRng Library that uses CPU RdRand instruction access to provide -// high-quality random numbers. +// BaseRng Library that uses CPU RNG instructions to provide +// random numbers. // // Copyright (c) 2015, Intel Corporation. All rights reserved.
// @@ -13,5 +13,5 @@ =20 #string STR_MODULE_ABSTRACT #language en-US "Instance of RNG L= ibrary" =20 -#string STR_MODULE_DESCRIPTION #language en-US "BaseRng Library t= hat uses CPU RdRand instruction access to provide high-quality random numbe= rs" +#string STR_MODULE_DESCRIPTION #language en-US "BaseRng Library t= hat uses CPU RNG instructions to provide random numbers" =20 --=20 2.26.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74926): https://edk2.groups.io/g/devel/message/74926 Mute This Topic: https://groups.io/mt/82732211/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-