From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74911+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74911+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677193; cv=none; d=zohomail.com; s=zohoarc; b=dOxK9ydmvkwWOVbO67268mJttFtB8UuRrO9j12qc/TYXa0uYwAp8bFaIimbSVZluiKeiMSYknEtbvkEWE9dcik1QsoAuv8PFQZsbe6L01pNkKREeYReAQGEH+tQR4f7fcPu4nqMFYmTtNPiERPNl5t9JfxFlkTgqp/d+xeBeFsg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677193; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=zc1l+HKb72cop9sqzBngDZA9JZycI5aV0TaVabOJvkQ=; b=mbYr3eTJgN7qyq3z1pSEoMS3vWJI1koeWhLjnK8l6pkT9ydEbTLNv45yo4cfIfapPFvhfpkXX+71w08vb0VltrdSRXrUaG5pwLTZXPYLtSY6A1uCgn0sA5uZmvKFpP77vFQmF7Tt6JmHCEQFtqmNFRJI+1SXtwDVEEW0/JgwAwo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74911+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620677193878552.5388283581765; Mon, 10 May 2021 13:06:33 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id XEMuYY1788612xuQpefFvA24; Mon, 10 May 2021 13:06:33 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.2810.1620677187763283621 for ; Mon, 10 May 2021 13:06:27 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5670F1691; Mon, 10 May 2021 13:06:27 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E75003F719; Mon, 10 May 2021 13:06:25 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 01/14] Platform/Sgi: Helper macros for PPTT Table Date: Tue, 11 May 2021 01:36:02 +0530 Message-Id: <20210510200615.26879-2-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: zXR086JtL2BU0YeUJTE7abSYx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677193; bh=csN9NpWApsQ5Ul+HPfOcsKzal6y1yz2/tPPaFNVqIAw=; h=Cc:Date:From:Reply-To:Subject:To; b=oCJWdnfzc8BaNXYRNMhbZpAK7Ehp1TZOzscsVfz0MhvYfmjev/vukbbb71bla2K2G+K 0YMlOzD5qPoDrV/DDwOH6B7c++S6cea0Oy9GTVk5UfmHdk2jwrvZeyCLXbNmFrNHIyXL9 ALBn8qc6u9ljOPwU8lCqlHujcS2gV0iNtIw= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Add helper macros for the creation for PPTT table. These macros help with initializing processor hierarchy node structure, cache type structure and ID structure. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 170 ++++++++++++++++++++ 1 file changed, 170 insertions(+) diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/Sgi= Pkg/Include/SgiAcpiHeader.h index dcb4e6c77a74..23e6ee14a761 100644 --- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h @@ -20,6 +20,141 @@ #define EFI_ACPI_ARM_CREATOR_ID SIGNATURE_32('A','R','M',' ') #define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099 =20 +#define CORE_COUNT FixedPcdGet32 (PcdCoreCount) +#define CLUSTER_COUNT FixedPcdGet32 (PcdClusterCount) + +#pragma pack(1) +// PPTT processor core structure +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core; + UINT32 ResourceOffset[2]; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE DCache; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE ICache; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L2Cache; +} RD_PPTT_CORE; + +// PPTT processor cluster structure +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster; + UINT32 ResourceOffset; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L3Cache; + RD_PPTT_CORE Core[CORE_COUNT]; +} RD_PPTT_CLUSTER; + +// PPTT processor cluster structure without cache +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster; + RD_PPTT_CORE Core[CORE_COUNT]; +} RD_PPTT_MINIMAL_CLUSTER; + +// PPTT processor package structure +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package; + UINT32 ResourceOffset; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE Slc; + RD_PPTT_MINIMAL_CLUSTER Cluster[CLUSTER_COUNT]; +} RD_PPTT_SLC_PACKAGE; +#pragma pack () + +// +// PPTT processor structure flags for different SoC components as defined = in +// ACPI 6.3 specification +// + +// Processor structure flags for SoC package +#define PPTT_PROCESSOR_PACKAGE_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ + } + +// Processor structure flags for cluster +#define PPTT_PROCESSOR_CLUSTER_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ + } + +// Processor structure flags for cluster with multi-thread core +#define PPTT_PROCESSOR_CLUSTER_THREADED_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ + } + +// Processor structure flags for single-thread core +#define PPTT_PROCESSOR_CORE_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_3_PPTT_NODE_IS_LEAF = \ + } + +// Processor structure flags for multi-thread core +#define PPTT_PROCESSOR_CORE_THREADED_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_INVALID, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_NOT_THREAD, = \ + EFI_ACPI_6_3_PPTT_NODE_IS_NOT_LEAF, = \ + EFI_ACPI_6_3_PPTT_IMPLEMENTATION_IDENTICAL = \ + } + +// Processor structure flags for CPU thread +#define PPTT_PROCESSOR_THREAD_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_PACKAGE_NOT_PHYSICAL, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_ID_VALID, = \ + EFI_ACPI_6_3_PPTT_PROCESSOR_IS_THREAD, = \ + EFI_ACPI_6_3_PPTT_NODE_IS_LEAF = \ + } + +// PPTT cache structure flags as defined in ACPI 6.3 Specification +#define PPTT_CACHE_STRUCTURE_FLAGS = \ + { = \ + EFI_ACPI_6_3_PPTT_CACHE_SIZE_VALID, = \ + EFI_ACPI_6_3_PPTT_NUMBER_OF_SETS_VALID, = \ + EFI_ACPI_6_3_PPTT_ASSOCIATIVITY_VALID, = \ + EFI_ACPI_6_3_PPTT_ALLOCATION_TYPE_VALID, = \ + EFI_ACPI_6_3_PPTT_CACHE_TYPE_VALID, = \ + EFI_ACPI_6_3_PPTT_WRITE_POLICY_VALID, = \ + EFI_ACPI_6_3_PPTT_LINE_SIZE_VALID = \ + } + +// PPTT cache attributes for data cache +#define PPTT_DATA_CACHE_ATTR = \ + { = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ + } + +// PPTT cache attributes for instruction cache +#define PPTT_INST_CACHE_ATTR = \ + { = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ, = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ + } + +// PPTT cache attributes for unified cache +#define PPTT_UNIFIED_CACHE_ATTR = \ + { = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, = \ + EFI_ACPI_6_3_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK = \ + } + // A macro to initialise the common header part of EFI ACPI tables as defi= ned by // EFI_ACPI_DESCRIPTION_HEADER structure. #define ARM_ACPI_HEADER(Signature, Type, Revision) { \ @@ -246,4 +381,39 @@ TotalCacheLevels, CacheLevel, CacheAssociativity, WritePolicy, CacheLine= Size \ } =20 +// EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR +#define EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT(Length, Flag, Parent, = \ + ACPIProcessorID, NumberOfPrivateResource) = \ + { = \ + EFI_ACPI_6_3_PPTT_TYPE_PROCESSOR, /* Type 0 */ = \ + Length, /* Length */ = \ + { = \ + EFI_ACPI_RESERVED_BYTE, = \ + EFI_ACPI_RESERVED_BYTE, = \ + }, = \ + Flag, /* Processor flags *= / \ + Parent, /* Ref to parent nod= e */ \ + ACPIProcessorID, /* UID, as per MADT = */ \ + NumberOfPrivateResource /* Resource count */= \ + } + +// EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE +#define EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT(Flag, NextLevelCache, Size,= \ + NoOfSets, Associativity, Attributes, LineSize) = \ + { = \ + EFI_ACPI_6_3_PPTT_TYPE_CACHE, /* Type 1 */ = \ + sizeof (EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE), /* Length */ = \ + { = \ + EFI_ACPI_RESERVED_BYTE, = \ + EFI_ACPI_RESERVED_BYTE, = \ + }, = \ + Flag, /* Cache flags */ = \ + NextLevelCache, /* Ref to next level= */ \ + Size, /* Size in bytes */ = \ + NoOfSets, /* Num of sets */ = \ + Associativity, /* Num of ways */ = \ + Attributes, /* Cache attributes = */ \ + LineSize /* Line size in byte= s */ \ + } + #endif /* __SGI_ACPI_HEADER__ */ --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74911): https://edk2.groups.io/g/devel/message/74911 Mute This Topic: https://groups.io/mt/82729693/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74912+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74912+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677190; cv=none; d=zohomail.com; s=zohoarc; b=Vc7r3P5WEEOSpECih08+QWETLSqESx4pJRLSxnIQvoBq3r1cJ4qpj0U4CBx0pFhMboWeFL8fEr6kl5y79vjdOf+t7yMPBIOh+9AHieZDfGVnPF3M5cHq3NW4r3uOM3sr9kiZwBDeBJgE/f2M87Tu6xdmta7TydiU6LX9as+8bBU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677190; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=aghj4JqlKZfPZXSx8QXjR1UGhI/ZuvwXtKLAWciWOTw=; b=DY+Jw3sug8KAmiJC1KfQO3ratjBrfI/Vd2Tf3poLEHfvzIdTV3ZfnWnXqWRStz+tiDzGc7bAs/J3J4t6DL7Jr2C+jeA4hoFb4Xx/C9BAsmBbj6SZomu6OK6ByjQ8TapwC/Ylatt+jKiSYh6koctJ2uD5MainHLEZvEixNlYWkdM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74912+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620677190725513.602619599584; Mon, 10 May 2021 13:06:30 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 7huIYY1788612xWwpkBBDPrH; Mon, 10 May 2021 13:06:30 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web09.2924.1620677189560799479 for ; Mon, 10 May 2021 13:06:29 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 33FDF168F; Mon, 10 May 2021 13:06:29 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C36833F719; Mon, 10 May 2021 13:06:27 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 02/14] Platform/Sgi: Add CPU container for SGI-575 Date: Tue, 11 May 2021 01:36:03 +0530 Message-Id: <20210510200615.26879-3-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: VFdFss9L3T2DKxg4mkc0EOajx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677190; bh=WAYEdUiqxE8zc58dG4QNSpnVl4isxryG0yRAKRqGVwM=; h=Cc:Date:From:Reply-To:Subject:To; b=EQViDXePqemwchLkphzVN08dQ9ZzUiktNP4SD0jFrX+G0jWPv48XCmzvFpRDdB3MN4w E+yg+GXAlQ/RCOdcwpDhwq69tf0Pgc7JluyQ4HNZUqaMmGhHUn5Qds4HJBIWFPV3TiRpO 44oKuHzhOpOsXvaLJ4b4hWlwe7sENS3yVcc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The SGI-575 platform includes two clusters with four single-thread CPUs. Add processor container devices for the two clusters on the SGI-575 platform and move the existing processor devices into respective processor containers. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl | 99 +++++++++++--------- 1 file changed, 54 insertions(+), 45 deletions(-) diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl b/Platform/ARM/= SgiPkg/AcpiTables/Sgi575/Dsdt.asl index fe0b92137bde..7390849e6231 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl @@ -12,53 +12,62 @@ =20 DefinitionBlock("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI", EFI_ACPI_A= RM_OEM_REVISION) { Scope(_SB) { - - Device(CP00) { // A75-0: Cluster 0, Cpu 0 - Name(_HID, "ACPI0007") - Name(_UID, 0) - Name(_STA, 0xF) - } - - Device(CP01) { // A75-0: Cluster 0, Cpu 1 - Name(_HID, "ACPI0007") - Name(_UID, 1) - Name(_STA, 0xF) - } - - Device(CP02) { // A75-0: Cluster 0, Cpu 2 - Name(_HID, "ACPI0007") - Name(_UID, 2) - Name(_STA, 0xF) - } - - Device(CP03) { // A75-0: Cluster 0, Cpu 3 - Name(_HID, "ACPI0007") - Name(_UID, 3) - Name(_STA, 0xF) - } - - Device(CP04) { // A75-0: Cluster 1, Cpu 0 - Name(_HID, "ACPI0007") - Name(_UID, 4) - Name(_STA, 0xF) - } - - Device(CP05) { // A75-0: Cluster 1, Cpu 1 - Name(_HID, "ACPI0007") - Name(_UID, 5) - Name(_STA, 0xF) - } - - Device(CP06) { // A75-0: Cluster 1, Cpu 2 - Name(_HID, "ACPI0007") - Name(_UID, 6) - Name(_STA, 0xF) + Device (CLU0) { // Cluster 0 + Name (_HID, "ACPI0010") + Name (_UID, 0) + + Device (CP00) { // A75-0: Cluster 0, Cpu 0 + Name (_HID, "ACPI0007") + Name (_UID, 0) + Name (_STA, 0xF) + } + + Device (CP01) { // A75-0: Cluster 0, Cpu 1 + Name (_HID, "ACPI0007") + Name (_UID, 1) + Name (_STA, 0xF) + } + + Device (CP02) { // A75-0: Cluster 0, Cpu 2 + Name (_HID, "ACPI0007") + Name (_UID, 2) + Name (_STA, 0xF) + } + + Device (CP03) { // A75-0: Cluster 0, Cpu 3 + Name (_HID, "ACPI0007") + Name (_UID, 3) + Name (_STA, 0xF) + } } =20 - Device(CP07) { // A75-0: Cluster 1, Cpu 3 - Name(_HID, "ACPI0007") - Name(_UID, 7) - Name(_STA, 0xF) + Device (CLU1) { // Cluster 1 + Name (_HID, "ACPI0010") + Name (_UID, 1) + + Device (CP04) { // A75-0: Cluster 1, Cpu 0 + Name (_HID, "ACPI0007") + Name (_UID, 4) + Name (_STA, 0xF) + } + + Device (CP05) { // A75-0: Cluster 1, Cpu 1 + Name (_HID, "ACPI0007") + Name (_UID, 5) + Name (_STA, 0xF) + } + + Device (CP06) { // A75-0: Cluster 1, Cpu 2 + Name (_HID, "ACPI0007") + Name (_UID, 6) + Name (_STA, 0xF) + } + + Device (CP07) { // A75-0: Cluster 1, Cpu 3 + Name (_HID, "ACPI0007") + Name (_UID, 7) + Name (_STA, 0xF) + } } =20 // UART PL011 --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74912): https://edk2.groups.io/g/devel/message/74912 Mute This Topic: https://groups.io/mt/82729695/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74913+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74913+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677198; cv=none; d=zohomail.com; s=zohoarc; b=O8yVlS0siEKH3PMudDIq1CHRJ+gFfpHd8ZpYrbiXi9h+N3Xa3yV9iX0FylwVOpwrtkWs2mgwbVT0/XKsJw2bP8ITvJpzKMUTGk8Ghg+r9mXNansGVU2t08wNo+Y91uYOv4+pIfcDaR9Mlv3u/oCyt5o0nV25klaN1UfxNLqsJY0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677198; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=TYDlxA/vWcTCa11/nD8+ZciZVMYFmj/c3ZBkvEOxbYU=; b=cOFKYMlAKOc1km+vWaz+0FmXJp2EffTGNG9I/NTl/Lb44kR0A3KPWbFyYoFUIqyr3H0tbj605nBEWJowDmPoorrz6NGZhfndF2RKcJusLXmqM+5z/athVN+8ZO+YQpyZuFTrsHUeysU+vNOKCGxRqGwc/ysJFhlKVDBAeoFXehM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74913+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620677198030509.8754824094418; Mon, 10 May 2021 13:06:38 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id FYGxYY1788612xxUO1Ks0Ipd; Mon, 10 May 2021 13:06:37 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.2768.1620677191495107846 for ; Mon, 10 May 2021 13:06:31 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0F60A1691; Mon, 10 May 2021 13:06:31 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A0A2A3F719; Mon, 10 May 2021 13:06:29 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 03/14] Platform/Sgi: ACPI PPTT table for SGI-575 platform Date: Tue, 11 May 2021 01:36:04 +0530 Message-Id: <20210510200615.26879-4-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: VkYjjE2AFPjBCQWg9A6QRCkvx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677197; bh=jQSiLcigHY79aj0Lq9+vXSnF1n6ESpIph+c+cSYWeEE=; h=Cc:Date:From:Reply-To:Subject:To; b=YVSHe1Es8XETHBDIOlcHUL3v1rv5QkMSY3cyUImJST/MaILBxpQOKC9Hnr+Z1R6ODyN eXjosoSSm6soNeVtBtB/tS2i61CK0jWlAffTgCdgLgliN/gtvuixyYLhmgYVwLW1AOA1b dViG/65XfLgcgZWwHxQg/81pIYp8/Nj8uF4= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The SGI-575 platform includes two clusters with four single-thread CPUs. Each of the CPUs include 64KB L1 Data cache, 64KB L1 Instruction cache and 512KB L2 cache. Each cluster includes a 2MB L3 cache. Add PPTT table for SGI-575 platform with this information. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf | 3 +- Platform/ARM/SgiPkg/AcpiTables/Sgi575/Pptt.aslc | 172 ++++++++++++++++= ++++ 2 files changed, 174 insertions(+), 1 deletion(-) diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf b/Platform= /ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf index 2121fd39f2f0..b1ee16e98ea3 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf @@ -1,7 +1,7 @@ ## @file # ACPI table data and ASL sources required to boot the platform. # -# Copyright (c) 2018, ARM Ltd. All rights reserved. +# Copyright (c) 2018 - 2021, ARM Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,7 @@ Mcfg.aslc Sgi575/Dsdt.asl Sgi575/Madt.aslc + Sgi575/Pptt.aslc Spcr.aslc Ssdt.asl =20 diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Pptt.aslc b/Platform/ARM= /SgiPkg/AcpiTables/Sgi575/Pptt.aslc new file mode 100644 index 000000000000..f3032b7e4cdc --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Pptt.aslc @@ -0,0 +1,172 @@ +/** @file +* Processor Properties Topology Table (PPTT) for SGI-575 platform +* +* This file describes the topological structure of the processor block on = the +* SGI-575 platform in the form as defined by ACPI PPTT table. The SGI-575 +* platform includes two clusters with four single-thread CPUS. Each of the= CPUs +* include 64KB L1 Data cache, 64KB L1 Instruction cache and 512KB L2 cache. +* Each cluster includes a 2MB L3 cache. +* +* Copyright (c) 2021, ARM Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +* @par Specification Reference: +* - ACPI 6.3, Chapter 5, Section 5.2.29, Processor Properties Topology T= able +**/ + +#include +#include +#include +#include + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" + +/*! + \brief Define helper macro for populating processor core information. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. + \param CpuId CPU instance number. +*/ +#define PPTT_CORE_INIT(PackageId, ClusterId, CpuId) = \ + { = \ + /* Parameters for CPU Core */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_CORE, DCache), /* Length */ = \ + PPTT_PROCESSOR_CORE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId]), /* Parent */ = \ + ((PackageId << 3) | (ClusterId << 2) | CpuId), /* ACPI Id */ = \ + 2 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + { = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].DCache), = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].ICache) = \ + }, = \ + = \ + /* L1 data cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 64, /* Num of sets */ = \ + 16, /* Associativity */ = \ + PPTT_DATA_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L1 instruction cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 256, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_INST_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L2 cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_512KB, /* Size */ = \ + 1024, /* Num of sets */ = \ + 8, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + } + +/*! + \brief Define helper macro for populating processor container informati= on. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. +*/ +#define PPTT_CLUSTER_INIT(PackageId, ClusterId) = \ + { = \ + /* Parameters for Cluster */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_CLUSTER, L3Cache), = \ + /* Length */ = \ + PPTT_PROCESSOR_CLUSTER_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package), /* Parent */ = \ + ((PackageId << 1) | ClusterId), /* ACPI Id */ = \ + 1 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].L3Cache), = \ + = \ + /* L3 cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_2MB, /* Size */ = \ + 2048, /* Num of sets */ = \ + 16, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* Initialize child cores */ = \ + { = \ + PPTT_CORE_INIT (PackageId, ClusterId, 0), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 1), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 2), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 3) = \ + } = \ + } + +#pragma pack(1) +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package; + RD_PPTT_CLUSTER Cluster[CLUSTER_COUNT]; +} SGI575_PPTT_PACKAGE; + +/* + * Processor Properties Topology Table + */ +typedef struct { + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Header; + SGI575_PPTT_PACKAGE Package; +} EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE; +#pragma pack () + +STATIC EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE Pptt =3D { + { + ARM_ACPI_HEADER ( + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION + ) + }, + + { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( + OFFSET_OF (SGI575_PPTT_PACKAGE, Cluster[0]), + PPTT_PROCESSOR_PACKAGE_FLAGS, 0, 0, 0 + ), + { + PPTT_CLUSTER_INIT (0, 0), + PPTT_CLUSTER_INIT (0, 1) + } + } +}; + +/* + * Reference the table being generated to prevent the optimizer from remov= ing + * the data structure from the executable + */ +VOID* CONST ReferenceAcpiTable =3D &Pptt; --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74913): https://edk2.groups.io/g/devel/message/74913 Mute This Topic: https://groups.io/mt/82729697/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74914+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74914+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677195; cv=none; d=zohomail.com; s=zohoarc; b=LO25TRK0SIeKxQcBckIIswbjKkLkffeMAITbDHOqtZIVUXu0GwdA0G2v6RD9x/QXFd8ONb9dhHoH5HP+y1YXkbiPRQqeSaR+bXqNGz+2LU/xtUJalB6Opp/3hYMNV5xG6SodOTlqGsQiGd2utHvGck4SGRyRcoJcQT4ZcTPS/DA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677195; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=HIbb08loyWdGcU60QA0clkpnbq84ZfCrswX61jGicMY=; b=gbbY4dMXCpmZa8d8WV2EPWOHaSuRD/+YllE9pP/axGUwW7TYykKcvKBIytsQrySxLrjf6fMT64j0D5mj0T52jw5y39oRpFo+lvSO01UmYeF6HVBVQsuyxM7pW6wgtoRgRBcT8VTzP+VNSZIrrX0S0dAVQ5uz5wUrAR4Wn1bHk+8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74914+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620677195473857.4307636787988; Mon, 10 May 2021 13:06:35 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id ZlGAYY1788612xxhR6zx4368; Mon, 10 May 2021 13:06:34 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.2857.1620677193270074074 for ; Mon, 10 May 2021 13:06:33 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DECF2168F; Mon, 10 May 2021 13:06:32 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7C1B83F719; Mon, 10 May 2021 13:06:31 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 04/14] Platform/Sgi: Add CPU container for RD-N1-Edge Date: Tue, 11 May 2021 01:36:05 +0530 Message-Id: <20210510200615.26879-5-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: stLCzyRlHBld08Z5xIFrVxPOx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677194; bh=O6ZNgjGJDwLiAoa4FV0+izcDFiFuFJbDnXg82QtYPCo=; h=Cc:Date:From:Reply-To:Subject:To; b=QbCc/FuyYDqHHW9cForvye8Bh+j2KowwwrlJNma71OCpY9mYerThoBhiywJ9Xv8yT41 NY6hwcahx7NrxxMe0O8kLQomKh+pYsuFLSGdsXxh7AE/XplPiDpJdMt9lwdApp0UxCdSm Ya+Nt9621df/Pr53CO9pQpc2QdwoUrruOYU= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The RD-N1-Edge platform includes two clusters with four single-thread CPUs. Add processor container devices for the two clusters on the RD-N1-Edge platform and move the existing processor devices into respective processor containers. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl | 88 +++++++++++--------- 1 file changed, 48 insertions(+), 40 deletions(-) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl b/Platform/AR= M/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl index d9bac33898b1..b88344c3a7ba 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl @@ -13,54 +13,62 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI", EFI_ACPI_ARM_OEM_REVISION) { Scope (_SB) { - - Device (CP00) { // Neoverse-N1: Cluster 0, Cpu 0 - Name (_HID, "ACPI0007") + Device (CLU0) { // Cluster 0 + Name (_HID, "ACPI0010") Name (_UID, 0) - Name (_STA, 0xF) + + Device (CP00) { // Neoverse-N1: Cluster 0, Cpu 0 + Name (_HID, "ACPI0007") + Name (_UID, 0) + Name (_STA, 0xF) + } + + Device (CP01) { // Neoverse-N1: Cluster 0, Cpu 1 + Name (_HID, "ACPI0007") + Name (_UID, 1) + Name (_STA, 0xF) + } + + Device (CP02) { // Neoverse-N1: Cluster 0, Cpu 2 + Name (_HID, "ACPI0007") + Name (_UID, 2) + Name (_STA, 0xF) + } + + Device (CP03) { // Neoverse-N1: Cluster 0, Cpu 3 + Name (_HID, "ACPI0007") + Name (_UID, 3) + Name (_STA, 0xF) + } } =20 - Device (CP01) { // Neoverse-N1: Cluster 0, Cpu 1 - Name (_HID, "ACPI0007") + Device (CLU1) { // Cluster 1 + Name (_HID, "ACPI0010") Name (_UID, 1) - Name (_STA, 0xF) - } =20 - Device (CP02) { // Neoverse-N1: Cluster 0, Cpu 2 - Name (_HID, "ACPI0007") - Name (_UID, 2) - Name (_STA, 0xF) - } + Device (CP04) { // Neoverse-N1: Cluster 1, Cpu 0 + Name (_HID, "ACPI0007") + Name (_UID, 4) + Name (_STA, 0xF) + } =20 - Device (CP03) { // Neoverse-N1: Cluster 0, Cpu 3 - Name (_HID, "ACPI0007") - Name (_UID, 3) - Name (_STA, 0xF) - } + Device (CP05) { // Neoverse-N1: Cluster 1, Cpu 1 + Name (_HID, "ACPI0007") + Name (_UID, 5) + Name (_STA, 0xF) + } =20 - Device (CP04) { // Neoverse-N1: Cluster 1, Cpu 0 - Name (_HID, "ACPI0007") - Name (_UID, 4) - Name (_STA, 0xF) - } + Device (CP06) { // Neoverse-N1: Cluster 1, Cpu 2 + Name (_HID, "ACPI0007") + Name (_UID, 6) + Name (_STA, 0xF) + } =20 - Device (CP05) { // Neoverse-N1: Cluster 1, Cpu 1 - Name (_HID, "ACPI0007") - Name (_UID, 5) - Name (_STA, 0xF) + Device (CP07) { // Neoverse-N1: Cluster 1, Cpu 3 + Name (_HID, "ACPI0007") + Name (_UID, 7) + Name (_STA, 0xF) + } } - - Device (CP06) { // Neoverse-N1: Cluster 1, Cpu 2 - Name (_HID, "ACPI0007") - Name (_UID, 6) - Name (_STA, 0xF) - } - - Device (CP07) { // Neoverse-N1: Cluster 1, Cpu 3 - Name (_HID, "ACPI0007") - Name (_UID, 7) - Name (_STA, 0xF) - } - } // Scope(_SB) } --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74914): https://edk2.groups.io/g/devel/message/74914 Mute This Topic: https://groups.io/mt/82729698/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74915+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74915+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677201; cv=none; d=zohomail.com; s=zohoarc; b=OchPQ9laiaOVsG9TUeDflh8stSxwIatp0WW14h8VRYgmzF9lQwV4Qy8j2rpdkFNu0D4n6mNt7GeTKL6haA17XEOnR4sjc5r+XtHu5H4fJ+I4shKQNyUS6zA3e1YJZlsYnCxmGgitxlj8gNFNiIFu1xhXGIi/vtMg366mmyI2GYw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677201; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=IYP1KlxD6uH/dhi4v79GgZfzpDyCNiRgdKHMtgstpjE=; b=NwTG7raCyfr1BwEGaTlXQGOmj/P9bwdK/Ps+05aEiZ886rl0TmqRckGyt/t7B4OURdnnA79HLiFUZqZz8FoUQrWEyIgHUS5gE0fY5I8J0fs+5Dkiw2rTXXVSMsYyAKH4o73FMpjEW/i7PNNu1N3taSDP/DT+o/WcA1LIsoddisk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74915+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620677201397417.5022771195514; Mon, 10 May 2021 13:06:41 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id bu0aYY1788612xCz4ixY3Rki; Mon, 10 May 2021 13:06:41 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.2769.1620677195193394012 for ; Mon, 10 May 2021 13:06:35 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BB18F1691; Mon, 10 May 2021 13:06:34 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5832E3F719; Mon, 10 May 2021 13:06:33 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 05/14] Platform/Sgi: ACPI PPTT table for RD-N1-Edge platform Date: Tue, 11 May 2021 01:36:06 +0530 Message-Id: <20210510200615.26879-6-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: aEGzl1iff0Ir0LNgkD2x6htsx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677201; bh=0GqQdBMORm3AKf8VdnLwtCB5Q476tFKuDWrUtgdLN2Y=; h=Cc:Date:From:Reply-To:Subject:To; b=Jv57O1V0Me1cfudwf0wndOefQM2q+HDVBC38ncxypvgFy0NMUaBvULPqxPpXFvM07ug x57bHS3NgN5AyOGm3uKsrf94vgt0uos0LWGjDopno57OFmHDKoOqOfa3SLQGZfbh8nmpA zrn+Gvyqg3xolGs+4HFVDBngDhuNPMyw8nU= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The RD-N1-Edge platform includes two clusters with four single-thread CPUS. Each of the CPUs include 64KB L1 Data cache, 64KB L1 Instruction cache and 512KB L2 cache. Each cluster includes a 2MB L3 cache. The platform also includes a system level cache of 8MB. Add PPTT table for RD-N1-Edge platform with this information. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf | 3 +- Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Pptt.aslc | 186 ++++++++++++++= ++++++ 2 files changed, 188 insertions(+), 1 deletion(-) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf b/Platfo= rm/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf index 22e33239070b..eecb64186473 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf @@ -1,7 +1,7 @@ ## @file # ACPI table data and ASL sources required to boot the platform. # -# Copyright (c) 2018-2020, ARM Ltd. All rights reserved. +# Copyright (c) 2018-2021, ARM Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -23,6 +23,7 @@ Mcfg.aslc RdN1Edge/Dsdt.asl RdN1Edge/Madt.aslc + RdN1Edge/Pptt.aslc Spcr.aslc Ssdt.asl =20 diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Pptt.aslc b/Platform/A= RM/SgiPkg/AcpiTables/RdN1Edge/Pptt.aslc new file mode 100644 index 000000000000..028efa908c54 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Pptt.aslc @@ -0,0 +1,186 @@ +/** @file +* Processor Properties Topology Table (PPTT) for RD-N1-Edge single-chip pl= atform +* +* This file describes the topological structure of the processor block on = the +* RD-N1-Edge single-chip platform in the form as defined by ACPI PPTT tabl= e. The +* RD-N1-Edge platform includes two clusters with four single-thread CPUS. = Each +* of the CPUs include 64KB L1 Data cache, 64KB L1 Instruction cache and 51= 2KB L2 +* cache. Each cluster includes a 2MB L3 cache. The platform also includes a +* system level cache of 8MB. +* +* Copyright (c) 2021, ARM Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +* @par Specification Reference: +* - ACPI 6.3, Chapter 5, Section 5.2.29, Processor Properties Topology T= able +**/ + +#include +#include +#include +#include + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" + +/*! + \brief Define helper macro for populating processor core information. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. + \param CpuId CPU instance number. +*/ +#define PPTT_CORE_INIT(PackageId, ClusterId, CpuId) = \ + { = \ + /* Parameters for CPU Core */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_CORE, DCache), /* Length */ = \ + PPTT_PROCESSOR_CORE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId]), /* Parent */ = \ + ((PackageId << 3) | (ClusterId << 2) | CpuId), /* ACPI Id */ = \ + 2 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + { = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].DCache), = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].ICache) = \ + }, = \ + = \ + /* L1 data cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 256, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_DATA_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L1 instruction cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 256, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_INST_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L2 cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_512KB, /* Size */ = \ + 1024, /* Num of sets */ = \ + 8, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + } + +/*! + \brief Define helper macro for populating processor container informati= on. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. +*/ +#define PPTT_CLUSTER_INIT(PackageId, ClusterId) = \ + { = \ + /* Parameters for Cluster */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_CLUSTER, L3Cache), /* Length */ = \ + PPTT_PROCESSOR_CLUSTER_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package), /* Parent */ = \ + ((PackageId << 1) | ClusterId), /* ACPI Id */ = \ + 1 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].L3Cache), = \ + = \ + /* L3 cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_2MB, /* Size */ = \ + 2048, /* Num of sets */ = \ + 16, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* Initialize child cores */ = \ + { = \ + PPTT_CORE_INIT (PackageId, ClusterId, 0), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 1), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 2), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 3) = \ + } = \ + } + +#pragma pack(1) +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package; + UINT32 Offset; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE Slc; + RD_PPTT_CLUSTER Cluster[CLUSTER_COUNT]; +} RDN1EDGE_PPTT_PACKAGE ; + +/* + * Processor Properties Topology Table + */ +typedef struct { + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Header; + RDN1EDGE_PPTT_PACKAGE Package; +} EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE; +#pragma pack () + +STATIC EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE Pptt =3D { + { + ARM_ACPI_HEADER ( + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION + ) + }, + + { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( + OFFSET_OF (RDN1EDGE_PPTT_PACKAGE , Slc), + PPTT_PROCESSOR_PACKAGE_FLAGS, 0, 0, 1), + + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, + Package.Slc), + + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ + 0, /* Next level of cache */ + SIZE_8MB, /* Size */ + 8192, /* Num of sets */ + 16, /* Associativity */ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ + 64 /* Line size */ + ), + { + PPTT_CLUSTER_INIT (0, 0), + PPTT_CLUSTER_INIT (0, 1), + } + } +}; + +/* + * Reference the table being generated to prevent the optimizer from remov= ing + * the data structure from the executable + */ +VOID* CONST ReferenceAcpiTable =3D &Pptt; --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74915): https://edk2.groups.io/g/devel/message/74915 Mute This Topic: https://groups.io/mt/82729699/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74916+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74916+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677202; cv=none; d=zohomail.com; s=zohoarc; b=XEcDNIx2IVFf+cdJ/+HJnW58n2tq8TJ8l48NvzjPM93ozMmYHLbBGN70JNduWomjIU/nVC1/ohydVP7zRcP6IEOD+baAih19ws9mOsDzlZOKWCgZJvLoHQ4rI3VU4eMVWo/3ec2YfVgi1FUCC3diWUJGvhokduGpOUjX4vuriEQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677202; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=lZr2jIK5ydlfEYCqZg8HzE97n+dimy+yxAP1oLMNV9g=; b=MR4XNLEhdI0dq8dK+zivrQ0yBv81Bm3RUXw4rzzChKiSTI0BXcdx0s7/QI7uRZkjh19GDWWapiEl1ymPOGpyR/etf8zuP6qxva1+ztnWJkLVwUN+2kxoInesykkX1OCxzo+Qv1UyGatArywhBfl9shKvleGlGpNFeq6PIs5Pc1I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74916+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620677202906206.31554843652032; Mon, 10 May 2021 13:06:42 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id hJAHYY1788612xz3Ax3Fjp8w; Mon, 10 May 2021 13:06:42 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.2770.1620677196950832567 for ; Mon, 10 May 2021 13:06:37 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 968B9168F; Mon, 10 May 2021 13:06:36 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 33CEA3F719; Mon, 10 May 2021 13:06:34 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 06/14] Platform/Sgi: Add DSDT ACPI table for RD-N1-Edge dual-chip platform Date: Tue, 11 May 2021 01:36:07 +0530 Message-Id: <20210510200615.26879-7-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: rJUrebPaBeuTjpT6WNLDSNdLx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677202; bh=bsDZpF1uZ3iY0zxsD06TIsU1Kb2LCwP2MRD381KyXSE=; h=Cc:Date:From:Reply-To:Subject:To; b=qtILOLTpbg3HPWzNqO0x+yzMshj4Q6O4AsW2HQpfB4Abil62XjKctez+FVJJEyXBZjg 9N9pdi/DYM8uBt393wdvqLAg3JgKGlQcZEvVSF4b5SaYOEWAdD2Nn4Poh5hmH/htOsNvM G+98HjbjV4W6bQEZCPef1W01JgWRb0o74ts= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The RD-N1-Edge dual-chip platform is composed of two RD-N1-Edge platforms connected over a coherent link. Each chip has two clusters with four CPUs in each cluster. Add the Differentiated System Description Table (DSDT) ACPI table for this platform with processor container devices defined containing the corresponding processor devices. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf | 2 +- Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl | 136 ++++++++++++= ++++++++ 2 files changed, 137 insertions(+), 1 deletion(-) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Plat= form/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf index 76886d1c6a17..c7c29b9c5946 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf @@ -21,7 +21,7 @@ Gtdt.aslc Iort.aslc Mcfg.aslc - RdN1Edge/Dsdt.asl + RdN1EdgeX2/Dsdt.asl RdN1EdgeX2/Hmat.aslc RdN1EdgeX2/Madt.aslc RdN1EdgeX2/Srat.aslc diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl b/Platform/= ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl new file mode 100644 index 000000000000..2379f20a79ef --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Dsdt.asl @@ -0,0 +1,136 @@ +/** @file +* Differentiated System Description Table Fields (DSDT) +* +* Copyright (c) 2021, ARM Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +* @par Specification Reference: +* - ACPI 6.3, Section 5.2.11.1, Differentiated System Description Table +**/ + +#include "SgiAcpiHeader.h" +#include "SgiPlatform.h" + +DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI", + EFI_ACPI_ARM_OEM_REVISION) { + Scope (_SB) { + /* Chip 0 CPUs */ + Device (CLU0) { // Cluster 0 + Name (_HID, "ACPI0010") + Name (_UID, 0) + + Device (CP00) { // Neoverse-N1: Cluster 0, Cpu 0 + Name (_HID, "ACPI0007") + Name (_UID, 0) + Name (_STA, 0xF) + } + + Device (CP01) { // Neoverse-N1: Cluster 0, Cpu 1 + Name (_HID, "ACPI0007") + Name (_UID, 1) + Name (_STA, 0xF) + } + + Device (CP02) { // Neoverse-N1: Cluster 0, Cpu 2 + Name (_HID, "ACPI0007") + Name (_UID, 2) + Name (_STA, 0xF) + } + + Device (CP03) { // Neoverse-N1: Cluster 0, Cpu 3 + Name (_HID, "ACPI0007") + Name (_UID, 3) + Name (_STA, 0xF) + } + } + + Device (CLU1) { // Cluster 1 + Name (_HID, "ACPI0010") + Name (_UID, 1) + + Device (CP04) { // Neoverse-N1: Cluster 1, Cpu 0 + Name (_HID, "ACPI0007") + Name (_UID, 4) + Name (_STA, 0xF) + } + + Device (CP05) { // Neoverse-N1: Cluster 1, Cpu 1 + Name (_HID, "ACPI0007") + Name (_UID, 5) + Name (_STA, 0xF) + } + + Device (CP06) { // Neoverse-N1: Cluster 1, Cpu 2 + Name (_HID, "ACPI0007") + Name (_UID, 6) + Name (_STA, 0xF) + } + + Device (CP07) { // Neoverse-N1: Cluster 1, Cpu 3 + Name (_HID, "ACPI0007") + Name (_UID, 7) + Name (_STA, 0xF) + } + } + + /* Chip 1 CPUs */ + Device (CLU2) { // Cluster 2 + Name (_HID, "ACPI0010") + Name (_UID, 2) + + Device (CP08) { // Neoverse-N1: Cluster 2, Cpu 0 + Name (_HID, "ACPI0007") + Name (_UID, 8) + Name (_STA, 0xF) + } + + Device (CP09) { // Neoverse-N1: Cluster 2, Cpu 1 + Name (_HID, "ACPI0007") + Name (_UID, 9) + Name (_STA, 0xF) + } + + Device (CP10) { // Neoverse-N1: Cluster 2, Cpu 2 + Name (_HID, "ACPI0007") + Name (_UID, 10) + Name (_STA, 0xF) + } + + Device (CP11) { // Neoverse-N1: Cluster 2, Cpu 3 + Name (_HID, "ACPI0007") + Name (_UID, 11) + Name (_STA, 0xF) + } + } + + Device (CLU3) { // Cluster 3 + Name (_HID, "ACPI0010") + Name (_UID, 3) + + Device (CP12) { // Neoverse-N1: Cluster 3, Cpu 0 + Name (_HID, "ACPI0007") + Name (_UID, 12) + Name (_STA, 0xF) + } + + Device (CP13) { // Neoverse-N1: Cluster 3, Cpu 1 + Name (_HID, "ACPI0007") + Name (_UID, 13) + Name (_STA, 0xF) + } + + Device (CP14) { // Neoverse-N1: Cluster 3, Cpu 2 + Name (_HID, "ACPI0007") + Name (_UID, 14) + Name (_STA, 0xF) + } + + Device (CP15) { // Neoverse-N1: Cluster 3, Cpu 3 + Name (_HID, "ACPI0007") + Name (_UID, 15) + Name (_STA, 0xF) + } + } + } // Scope(_SB) +} --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74916): https://edk2.groups.io/g/devel/message/74916 Mute This Topic: https://groups.io/mt/82729700/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74917+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74917+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677200; cv=none; d=zohomail.com; s=zohoarc; b=ZLQlARvn/3FltMHWAj4qzIPYeU7ngKt2xNzKIGMNzorfvihXUcqurYNX/gkI3YIajQR1eUYEetwW7LKwjFbzXmblfHifiSg/P+mW7WaiSPChgFqmixOCYVCeaO6q+I1ccVXOWyJQkCRRHov/okB3h06wja/OaiorUKpgnn9ZscQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677200; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=nUjdkjZIhx97/EZOmdLaITFLf15Cyc+wcWxg3Dr7O2k=; b=XMVQhHJzUCg/smzN9bwi1j6+7SxQwwixy95uwkt2TqiNuhmpHiX6ocga1g6Nq1VcanNtZSneMQQdBgIh8tKd7wSvlmz8p9h6t+yhifxzFUETlUlvdKUtI+DxXqzQlNKI5I/4UaWJSO0INslZoPHM0PFbdQb+oXmVQKDv8nIhtwQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74917+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620677200142944.3240221872131; Mon, 10 May 2021 13:06:40 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id ErunYY1788612xwrDKsSAtAl; Mon, 10 May 2021 13:06:39 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.2873.1620677198841622854 for ; Mon, 10 May 2021 13:06:39 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 72000168F; Mon, 10 May 2021 13:06:38 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0F65F3F719; Mon, 10 May 2021 13:06:36 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 07/14] Platform/Sgi: ACPI PPTT table for RD-N1-Edge dual-chip Date: Tue, 11 May 2021 01:36:08 +0530 Message-Id: <20210510200615.26879-8-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: 9DOZsNX1VjXVyqXRLQdIgiHyx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677199; bh=gkaYKoVV5iny/iDeAEFg/DNVLfZV9X+e2lCe7Fhi7zw=; h=Cc:Date:From:Reply-To:Subject:To; b=RvFej1FDzSSy28hFdGERahsV1JJ1lg9EU3UVxju/4IO2dMUHh8S8DipO+O7Xpye0HOB Y4MgsgyaRA0gtTtmSfYBTPoCGBniYPSgWtEu0UTXw50b0zIFvxAynnJCBqv+l1NRh58im QHUnpQrfq51BMV2YRYYGZPFf140MW8+EFOA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The RD-N1-Edge dual-chip platform includes two RD-N1-Edge single-chip platforms connected over cache coherent interconnect. Each of the RD-N1-Edge single-chip platform includes two clusters with four single-thread CPUs. Each of the CPUs include 64KB L1 Data cache, 64KB L1 Instruction cache and 512KB L2 cache. Each cluster includes a 2MB L3 cache. The platform also includes a system level cache of 8MB per chip. Add PPTT table for RD-N1-Edge dual-chip platform with this information. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf | 1 + Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Pptt.aslc | 207 ++++++++++++= ++++++++ 2 files changed, 208 insertions(+) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Plat= form/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf index c7c29b9c5946..617519d9dd38 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf @@ -24,6 +24,7 @@ RdN1EdgeX2/Dsdt.asl RdN1EdgeX2/Hmat.aslc RdN1EdgeX2/Madt.aslc + RdN1EdgeX2/Pptt.aslc RdN1EdgeX2/Srat.aslc Spcr.aslc Ssdt.asl diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Pptt.aslc b/Platform= /ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Pptt.aslc new file mode 100644 index 000000000000..1f92af9496a1 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Pptt.aslc @@ -0,0 +1,207 @@ +/** @file +* Processor Properties Topology Table (PPTT) for RD-N1-Edge dual-chip plat= form +* +* This file describes the topological structure of the processor block on = the +* RD-N1-Edge dual-chip platform in the form as defined by ACPI PPTT table.= The +* RD-N1-Edge dual-chip platform includes two RD-N1-Edge single-chip platfo= rms +* connected over cache coherent interconnect. Each of the RD-N1-Edge singl= e-chip +* platform includes two clusters with four single-thread CPUS. Each of the= CPUs +* include 64KB L1 Data cache, 64KB L1 Instruction cache and 512KB L2 cache= . Each +* cluster includes a 2MB L3 cache. Each instance of the chip includes a sy= stem +* level cache of 8MB. +* +* Copyright (c) 2021, ARM Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +* @par Specification Reference: +* - ACPI 6.3, Chapter 5, Section 5.2.29, Processor Properties Topology T= able +**/ + +#include +#include +#include +#include + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" + +#define CHIP_COUNT FixedPcdGet32 (PcdChipCount) + +/*! + \brief Define helper macro for populating processor core information. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. + \param CpuId CPU instance number. +*/ +#define PPTT_CORE_INIT(PackageId, ClusterId, CpuId) = \ + { = \ + /* Parameters for CPU Core */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_CORE, DCache), /* Length */ = \ + PPTT_PROCESSOR_CORE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Cluster[ClusterId]), /* Parent */ = \ + ((PackageId << 3) | (ClusterId << 2) | CpuId), /* ACPI Id */ = \ + 2 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + { = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Cluster[ClusterId].Core[CpuId].DCache), = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Cluster[ClusterId].Core[CpuId].ICache) = \ + }, = \ + = \ + /* L1 data cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 256, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_DATA_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L1 instruction cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 256, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_INST_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L2 cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_512KB, /* Size */ = \ + 1024, /* Num of sets */ = \ + 8, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + } + +/*! + \brief Define helper macro for populating processor container informati= on. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. +*/ +#define PPTT_CLUSTER_INIT(PackageId, ClusterId) = \ + { = \ + /* Parameters for Cluster */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_CLUSTER, L3Cache), /* Length */ = \ + PPTT_PROCESSOR_CLUSTER_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId]), /* Parent */ = \ + ((PackageId << 1) | ClusterId), /* ACPI Id */ = \ + 1 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Cluster[ClusterId].L3Cache), = \ + = \ + /* L3 cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_2MB, /* Size */ = \ + 2048, /* Num of sets */ = \ + 16, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* Initialize child cores */ = \ + { = \ + PPTT_CORE_INIT (PackageId, ClusterId, 0), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 1), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 2), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 3) = \ + } = \ + } + +/*! + \brief Define helper macro for populating SoC package information. + \param PackageId Package instance number. +*/ +#define PPTT_PACKAGE_INIT(PackageId) = \ + { = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RDN1EDGEX2_PPTT_PACKAGE , Slc), /* Length */ = \ + PPTT_PROCESSOR_PACKAGE_FLAGS, /* Flag */ = \ + 0, /* Parent */ = \ + 0, /* ACPI Id */ = \ + 1 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Slc), = \ + = \ + /* SLC parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_8MB, /* Size */ = \ + 8192, /* Num of sets */ = \ + 16, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + { = \ + PPTT_CLUSTER_INIT (PackageId, 0), = \ + PPTT_CLUSTER_INIT (PackageId, 1), = \ + } = \ + } + +#pragma pack(1) +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package; + UINT32 Offset; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE Slc; + RD_PPTT_CLUSTER Cluster[CLUSTER_COUNT]; +} RDN1EDGEX2_PPTT_PACKAGE; + +/* + * Processor Properties Topology Table + */ +typedef struct { + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Header; + RDN1EDGEX2_PPTT_PACKAGE Package[CHIP_CO= UNT]; +} EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE; +#pragma pack () + +STATIC EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE Pptt =3D { + { + ARM_ACPI_HEADER ( + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION + ) + }, + + { + PPTT_PACKAGE_INIT (0), + PPTT_PACKAGE_INIT (1) + } +}; + +/* + * Reference the table being generated to prevent the optimizer from remov= ing + * the data structure from the executable + */ +VOID* CONST ReferenceAcpiTable =3D &Pptt; --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74917): https://edk2.groups.io/g/devel/message/74917 Mute This Topic: https://groups.io/mt/82729701/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74918+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74918+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677202; cv=none; d=zohomail.com; s=zohoarc; b=ScHc76PyJcQVfx8tGZXn4lIjtZVfEDfMyRkNDpZjg23qORcjP+mJbHD4lebLolOKxA4/4gBVOEa6E1ofrpUSK6VAuKA/sfyg5SHowbWdcXoMXK/4OsV46BXGAr/VDKM+dBw9Z0TbP2YZgVCd2k/dHx297ixIiPIe7t23QT1d9YM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677202; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=0DjlVWwZD+KYtxvX6jpwssODJgnCltSaCY69VuWJjvA=; b=IooK+IlXhd1JP+/p16i07dksVYmFOeLp9z1nWzDjVHY3TkgQ72+Ar//hTbz+2P5FZHuorpZ88n8Az8pYTzgXlUJrOEzfRI0WZ6ABiC7h+jqikcVehbX8KsqS78aEj4wAF0PndoV7EC0LOv/IHUZOifBNm8hp4RumtxLYelUGCak= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74918+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 162067720226211.90965917357289; Mon, 10 May 2021 13:06:42 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 0fgfYY1788612xYLOjLdJ86C; Mon, 10 May 2021 13:06:41 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.2875.1620677200965232531 for ; Mon, 10 May 2021 13:06:41 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 85680168F; Mon, 10 May 2021 13:06:40 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DED833F719; Mon, 10 May 2021 13:06:38 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 08/14] Platform/Sgi: ACPI PPTT table for RD-E1-Edge platform Date: Tue, 11 May 2021 01:36:09 +0530 Message-Id: <20210510200615.26879-9-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: k0ky01QEk5xZp5AFhGJj7vOlx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677201; bh=7SkEF1rHNT4v0VHVxAspAJpEb/7ye7hAvAe2+ckqA6c=; h=Cc:Date:From:Reply-To:Subject:To; b=M2o5LTBu9EHCm+Xo1vhaKSSS/H6xEZRrFlTiE9QcbvacSw4PmDIKfmMqDCmD0kJAFTy 9yeaWPYbG4wtPB2ces40E/kla+hvSsdPtYnLCZhZbM9aVurJx3H305NR6a/oO5D7nTpKf KzE97aswi0DdGEjzUzNU1aJ5yQ3klJjbI/E= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The RD-E1-Edge platform includes two clusters with eight multi-thread CPUs. Each of the CPUs include 32KB L1 Data cache, 32KB L1 Instruction cache and 256KB L2 cache. Each cluster includes a 2MB L3 cache. The platform also includes a system level cache of 8MB. Add PPTT table for RD-E1-Edge platform with this information. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf | 3 +- Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc | 252 ++++++++++++++= ++++++ 2 files changed, 254 insertions(+), 1 deletion(-) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf b/Platfo= rm/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf index 2dd2275665a2..04ef2bfcaa26 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf @@ -1,7 +1,7 @@ ## @file # ACPI table data and ASL sources required to boot the platform. # -# Copyright (c) 2018-2020, ARM Ltd. All rights reserved. +# Copyright (c) 2018-2021, ARM Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -23,6 +23,7 @@ Mcfg.aslc RdE1Edge/Dsdt.asl RdE1Edge/Madt.aslc + RdE1Edge/Pptt.aslc Spcr.aslc Ssdt.asl =20 diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc b/Platform/A= RM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc new file mode 100644 index 000000000000..91baab73d108 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc @@ -0,0 +1,252 @@ +/** @file +* Processor Properties Topology Table (PPTT) for RD-E1-Edge platform +* +* This file describes the topological structure of the processor block on = the +* RD-E1-Edge platform in the form as defined by ACPI PPTT table. The RD-E1= -Edge +* platform includes two clusters with eight dual-thread CPUS. Each of the = CPUs +* include 32KB L1 Data cache, 32KB L1 Instruction cache and 256KB L2 cache. +* Each cluster includes a 2MB L3 cache. The platform also includes a system +* level cache of 8MB. +* +* Copyright (c) 2021, ARM Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +* @par Specification Reference: +* - ACPI 6.3, Chapter 5, Section 5.2.29, Processor Properties Topology T= able +**/ + +#include +#include +#include +#include + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" + +#define THREAD_PER_CORE_E1 2 + +/*! + \brief Define helper macro for populating processor thread information. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. + \param CpuId CPU instance number. + \param ThreadId CPU thread number. +*/ +#define PPTT_THREAD_INIT(PackageId, ClusterId, CpuId, ThreadId) = \ + { = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + sizeof (RDE1EDGE_PPTT_THREAD), /* Length */ = \ + PPTT_PROCESSOR_THREAD_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId]), /* Parent */ = \ + ((PackageId << 5) | (ClusterId << 4) | (CpuId << 1) | ThreadId), = \ + /* ACPI Id */ = \ + 0 /* Num of private resource */ = \ + ) = \ + } + +/*! + \brief Define helper macro for populating processor core information. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. + \param CpuId CPU instance number. +*/ +#define PPTT_CORE_INIT(PackageId, ClusterId, CpuId) = \ + { = \ + /* Parameters for CPU Core */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RDE1EDGE_PPTT_CORE, DCache), /* Length */ = \ + PPTT_PROCESSOR_CORE_THREADED_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId]), /* Parent */ = \ + 0, /* ACPI Id */ = \ + 2 /* Num of private resource= */ \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + { = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].DCache), = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].ICache) = \ + }, = \ + = \ + /* L1 data cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_32KB, /* Size */ = \ + 128, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_DATA_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L1 instruction cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_32KB, /* Size */ = \ + 128, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_INST_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L2 cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_256KB, /* Size */ = \ + 1024, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* Thread Initialization */ = \ + { = \ + PPTT_THREAD_INIT (PackageId, ClusterId, CpuId, 0), = \ + PPTT_THREAD_INIT (PackageId, ClusterId, CpuId, 1) = \ + } = \ + } + +/*! + \brief Define helper macro for populating processor container informati= on. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. +*/ +#define PPTT_CLUSTER_INIT(PackageId, ClusterId) = \ + { = \ + /* Parameters for Cluster */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RDE1EDGE_PPTT_CLUSTER, L3Cache), /* Length */ = \ + PPTT_PROCESSOR_CLUSTER_THREADED_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package), /* Parent */ = \ + 0, /* ACPI Id */ = \ + 1 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].L3Cache), = \ + = \ + /* L3 cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_2MB, /* Size */ = \ + 2048, /* Num of sets */ = \ + 16, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* Initialize child cores */ = \ + { = \ + PPTT_CORE_INIT (PackageId, ClusterId, 0), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 1), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 2), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 3), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 4), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 5), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 6), = \ + PPTT_CORE_INIT (PackageId, ClusterId, 7) = \ + } = \ + } + +/*! + \brief Define helper macro for populating SoC package information. + \param PackageId Package instance number. +*/ +#define PPTT_PACKAGE_INIT(PackageId) = \ + { = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RDE1EDGE_PPTT_PACKAGE, Slc), = \ + PPTT_PROCESSOR_PACKAGE_FLAGS, = \ + 0, = \ + 0, = \ + 1 = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Slc), = \ + = \ + /* SLC parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_8MB, /* Size */ = \ + 8192, /* Num of sets */ = \ + 16, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + { = \ + PPTT_CLUSTER_INIT (PackageId, 0), = \ + PPTT_CLUSTER_INIT (PackageId, 1), = \ + } = \ + } + +#pragma pack(1) +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Thread; +} RDE1EDGE_PPTT_THREAD; + +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Core; + UINT32 Offset[2]; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE DCache; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE ICache; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L2Cache; + RDE1EDGE_PPTT_THREAD Thread[THREAD_PER_CORE_E1]; +} RDE1EDGE_PPTT_CORE; + +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Cluster; + UINT32 Offset; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE L3Cache; + RDE1EDGE_PPTT_CORE Core[CORE_COUNT / THREAD_PER_CORE= _E1]; +} RDE1EDGE_PPTT_CLUSTER; + +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package; + UINT32 Offset; + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE Slc; + RDE1EDGE_PPTT_CLUSTER Cluster[CLUSTER_COUNT]; +} RDE1EDGE_PPTT_PACKAGE; + +/* + * Processor Properties Topology Table + */ +typedef struct { + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Header; + RDE1EDGE_PPTT_PACKAGE Package; +} EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE; +#pragma pack () + +STATIC EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE Pptt =3D { + { + ARM_ACPI_HEADER ( + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION + ) + }, + + PPTT_PACKAGE_INIT (0) +}; + +/* + * Reference the table being generated to prevent the optimizer from remov= ing + * the data structure from the executable + */ +VOID* CONST ReferenceAcpiTable =3D &Pptt; --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74918): https://edk2.groups.io/g/devel/message/74918 Mute This Topic: https://groups.io/mt/82729702/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74919+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74919+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677204; cv=none; d=zohomail.com; s=zohoarc; b=WEPU+1i1Z/rMASANYlndsP+C2eeXExI49OzdmgV4WqDJay0EGuU9vmbQ2hg1j+hjA5ZL/2BuzbnLmpg5ekG7N8BYkXYqv9UihiS3RSLz1uQCxSGcf6de78hsTJ5K8zN+lWIjvapp2XoJ6jB2rMUhSzMGq9H9x8jKnl+C5JBD4Kg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677204; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=DLGMtq6hPWBAdrWvib6tQx9/F0H0/o0BqE69oGmO2yo=; b=V5iHuKe+QFQ9e1AvfSVw52Fjzzl7gq3l86miIJx2GVQT2jSj92g+oYowRSB5M4bKsyJPxTlGk8AAroOHcuMgsblg6hP+sejPuGdBRCAFUhxb1Z/sO+mGgbWsu5spyaDMAn0oWfL9ykImuvC1rZL+E2TGoxcKeDm5IVNSz99tR6o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74919+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620677204025632.3332767403048; Mon, 10 May 2021 13:06:44 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id Zq7HYY1788612xJptbe0rjKP; Mon, 10 May 2021 13:06:43 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.2861.1620677202738188570 for ; Mon, 10 May 2021 13:06:42 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 60DE81691; Mon, 10 May 2021 13:06:42 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id F26E03F719; Mon, 10 May 2021 13:06:40 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 09/14] Platform/Sgi: Add CPU container for RD-V1 platform Date: Tue, 11 May 2021 01:36:10 +0530 Message-Id: <20210510200615.26879-10-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: YrSAn5U643paxdK6aAhLdzeWx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677203; bh=CBab2KNPHA5PTunGGIWSTqziinjW9DjpJRgzIPRYKNA=; h=Cc:Date:From:Reply-To:Subject:To; b=L9ghId2Y6SW4hvWuN47imBGlxm7c04OmTodhvYjwDmpEcTSLU8Z4jnvdmyB/szcjFrj SV7d/GEoWzMKr+IS+1QMUCEmFg9aOH0P7KyK26TvBrWsCMFDhtn1F9KP7rcooLS0u4c8M 1h0qvKP280PhzzBfHwMgBRCi4dzrnqUyfWI= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The RD-V1 platform is a sixteen core platform with each core contained in a minimal cluster logic. Update the processor device entries accordingly in the DSDT ACPI table by moving each of the processor device entries into a separate processor container device. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl | 176 ++++++++++++++------ 1 file changed, 128 insertions(+), 48 deletions(-) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl b/Platform/ARM/Sg= iPkg/AcpiTables/RdV1/Dsdt.asl index f3e31e4085a3..05e8601290e2 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1/Dsdt.asl @@ -13,100 +13,180 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI", EFI_ACPI_ARM_OEM_REVISION) { Scope (_SB) { - Device (CP00) { // Neoverse V1 core 0 - Name (_HID, "ACPI0007") + Device (CL00) { // Cluster 0 + Name (_HID, "ACPI0010") Name (_UID, 0) - Name (_STA, 0xF) + + Device (CP00) { // Neoverse V1 core 0 + Name (_HID, "ACPI0007") + Name (_UID, 0) + Name (_STA, 0xF) + } } =20 - Device (CP01) { // Neoverse V1 core 1 - Name (_HID, "ACPI0007") + Device (CL01) { // Cluster 1 + Name (_HID, "ACPI0010") Name (_UID, 1) - Name (_STA, 0xF) + + Device (CP01) { // Neoverse V1 core 1 + Name (_HID, "ACPI0007") + Name (_UID, 1) + Name (_STA, 0xF) + } } =20 - Device (CP02) { // Neoverse V1 core 2 - Name (_HID, "ACPI0007") + Device (CL02) { // Cluster 2 + Name (_HID, "ACPI0010") Name (_UID, 2) - Name (_STA, 0xF) + + Device (CP02) { // Neoverse V1 core 2 + Name (_HID, "ACPI0007") + Name (_UID, 2) + Name (_STA, 0xF) + } } =20 - Device (CP03) { // Neoverse V1 core 3 - Name (_HID, "ACPI0007") + Device (CL03) { // Cluster 3 + Name (_HID, "ACPI0010") Name (_UID, 3) - Name (_STA, 0xF) + + Device (CP03) { // Neoverse V1 core 3 + Name (_HID, "ACPI0007") + Name (_UID, 3) + Name (_STA, 0xF) + } } =20 - Device (CP04) { // Neoverse V1 core 4 - Name (_HID, "ACPI0007") + Device (CL04) { // Cluster 4 + Name (_HID, "ACPI0010") Name (_UID, 4) - Name (_STA, 0xF) + + Device (CP04) { // Neoverse V1 core 4 + Name (_HID, "ACPI0007") + Name (_UID, 4) + Name (_STA, 0xF) + } } =20 - Device (CP05) { // Neoverse V1 core 5 - Name (_HID, "ACPI0007") + Device (CL05) { // Cluster 5 + Name (_HID, "ACPI0010") Name (_UID, 5) - Name (_STA, 0xF) + + Device (CP05) { // Neoverse V1 core 5 + Name (_HID, "ACPI0007") + Name (_UID, 5) + Name (_STA, 0xF) + } } =20 - Device (CP06) { // Neoverse V1 core 6 - Name (_HID, "ACPI0007") + Device (CL06) { // Cluster 6 + Name (_HID, "ACPI0010") Name (_UID, 6) - Name (_STA, 0xF) + + Device (CP06) { // Neoverse V1 core 6 + Name (_HID, "ACPI0007") + Name (_UID, 6) + Name (_STA, 0xF) + } } =20 - Device (CP07) { // Neoverse V1 core 7 - Name (_HID, "ACPI0007") + Device (CL07) { // Cluster 7 + Name (_HID, "ACPI0010") Name (_UID, 7) - Name (_STA, 0xF) + + Device (CP07) { // Neoverse V1 core 7 + Name (_HID, "ACPI0007") + Name (_UID, 7) + Name (_STA, 0xF) + } } =20 - Device (CP08) { // Neoverse V1 core 8 - Name (_HID, "ACPI0007") + Device (CL08) { // Cluster 8 + Name (_HID, "ACPI0010") Name (_UID, 8) - Name (_STA, 0xF) + + Device (CP08) { // Neoverse V1 core 8 + Name (_HID, "ACPI0007") + Name (_UID, 8) + Name (_STA, 0xF) + } } =20 - Device (CP09) { // Neoverse V1 core 9 - Name (_HID, "ACPI0007") + Device (CL09) { // Cluster 9 + Name (_HID, "ACPI0010") Name (_UID, 9) - Name (_STA, 0xF) + + Device (CP09) { // Neoverse V1 core 9 + Name (_HID, "ACPI0007") + Name (_UID, 9) + Name (_STA, 0xF) + } } =20 - Device (CP10) { // Neoverse V1 core 10 - Name (_HID, "ACPI0007") + Device (CL10) { // Cluster 10 + Name (_HID, "ACPI0010") Name (_UID, 10) - Name (_STA, 0xF) + + Device (CP10) { // Neoverse V1 core 10 + Name (_HID, "ACPI0007") + Name (_UID, 10) + Name (_STA, 0xF) + } } =20 - Device (CP11) { // Neoverse V1 core 11 - Name (_HID, "ACPI0007") + Device (CL11) { // Cluster 11 + Name (_HID, "ACPI0010") Name (_UID, 11) - Name (_STA, 0xF) + + Device (CP11) { // Neoverse V1 core 11 + Name (_HID, "ACPI0007") + Name (_UID, 11) + Name (_STA, 0xF) + } } =20 - Device (CP12) { // Neoverse V1 core 12 - Name (_HID, "ACPI0007") + Device (CL12) { // Cluster 12 + Name (_HID, "ACPI0010") Name (_UID, 12) - Name (_STA, 0xF) + + Device (CP12) { // Neoverse V1 core 12 + Name (_HID, "ACPI0007") + Name (_UID, 12) + Name (_STA, 0xF) + } } =20 - Device (CP13) { // Neoverse V1 core 13 - Name (_HID, "ACPI0007") + Device (CL13) { // Cluster 13 + Name (_HID, "ACPI0010") Name (_UID, 13) - Name (_STA, 0xF) + + Device (CP13) { // Neoverse V1 core 13 + Name (_HID, "ACPI0007") + Name (_UID, 13) + Name (_STA, 0xF) + } } =20 - Device (CP14) { // Neoverse V1 core 14 - Name (_HID, "ACPI0007") + Device (CL14) { // Cluster 14 + Name (_HID, "ACPI0010") Name (_UID, 14) - Name (_STA, 0xF) + + Device (CP14) { // Neoverse V1 core 14 + Name (_HID, "ACPI0007") + Name (_UID, 14) + Name (_STA, 0xF) + } } =20 - Device (CP15) { // Neoverse V1 core 15 - Name (_HID, "ACPI0007") + Device (CL15) { // Cluster 15 + Name (_HID, "ACPI0010") Name (_UID, 15) - Name (_STA, 0xF) + + Device (CP15) { // Neoverse V1 core 15 + Name (_HID, "ACPI0007") + Name (_UID, 15) + Name (_STA, 0xF) + } } } // Scope(_SB) } --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74919): https://edk2.groups.io/g/devel/message/74919 Mute This Topic: https://groups.io/mt/82729704/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74920+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74920+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677205; cv=none; d=zohomail.com; s=zohoarc; b=IQKmA5KffO8Nq8gxtNbfSlXdA7TWxJJ17DG0eOfyUIe7k1SsRNjqVlGqXr11efHq6ZUiN4X4wV659BlrkdDtCuv2cVO1Vik2/8vBmJhmb2Dzdggh9IeNN4V9Lxjdw7swZpesflS0fNA1wouz+W4pmNrLpBH7ewJdbtYyNu4JrWk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677205; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=QoBbIfvdxoFkpq5C2XfvgHi6DB28WK2eBy1Nwc7GCxc=; b=lxVskS54P6/icNw3fgiHy6gh2DQYcsaqYmdbDKqMsh1tBa2gm96FFB8JxGIji+YsJKOpo7eCa74KqSY6QwAFTCVwcTObbixllSEwyoNY5INc2zYKtMPO45EU/kMu62k8SryoU8UdLVNLkrpWllebqCj+4OcJHhxZAWfibBpF4zo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74920+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 162067720587293.2661685019749; Mon, 10 May 2021 13:06:45 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id yMSCYY1788612x0XZxMmQuWR; Mon, 10 May 2021 13:06:45 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.2877.1620677204554781728 for ; Mon, 10 May 2021 13:06:44 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3C687168F; Mon, 10 May 2021 13:06:44 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id CE1B33F719; Mon, 10 May 2021 13:06:42 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 10/14] Platform/Sgi: ACPI PPTT Table for RD-V1 platform Date: Tue, 11 May 2021 01:36:11 +0530 Message-Id: <20210510200615.26879-11-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: PUjugsT2W3huClYM02XXwMZux1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677205; bh=m7nzUTRw1a6q6z+gYqRNvpi4FSHG0/Wm+HtMqP/SLDU=; h=Cc:Date:From:Reply-To:Subject:To; b=xVdpXfjgxoh+azhedLU2HxZZ9I9Wyf4Lw/HRtwpHtOWaD9/l16tpxlDxFmjCvpiDLul /DrQybLrdjrtlOn6lC7DvfpzhCUDtuf9meKCXnPpud35d6VAfC80kdZmS9QxFd2Cp2nvS aCZyvpoAV8mcsyT0auAk0zmsUBA2uHXmUHw= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The RD-V1 platform includes sixteen single-thread CPUs. Each of the CPUs include 64KB L1 Data cache, 64KB L1 Instruction cache and 1MB L2 cache. The platform also includes a system level cache of 16MB. Add PPTT table for RD-V1 platform with this information. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf | 3 +- Platform/ARM/SgiPkg/AcpiTables/RdV1/Pptt.aslc | 175 ++++++++++++++++++= ++ 2 files changed, 177 insertions(+), 1 deletion(-) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf b/Platform/A= RM/SgiPkg/AcpiTables/RdV1AcpiTables.inf index a21dcfafef1a..a3e558cf1535 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf @@ -1,7 +1,7 @@ ## @file # ACPI table data and ASL sources required to boot the platform. # -# Copyright (c) 2020, Arm Ltd. All rights reserved. +# Copyright (c) 2020-2021, Arm Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -23,6 +23,7 @@ Mcfg.aslc RdV1/Dsdt.asl RdV1/Madt.aslc + RdV1/Pptt.aslc Spcr.aslc Ssdt.asl =20 diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1/Pptt.aslc b/Platform/ARM/S= giPkg/AcpiTables/RdV1/Pptt.aslc new file mode 100644 index 000000000000..e494b101e338 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1/Pptt.aslc @@ -0,0 +1,175 @@ +/** @file +* Processor Properties Topology Table (PPTT) for RD-V1 single-chip platform +* +* This file describes the topological structure of the processor block on = the +* RD-V1 single-chip platform in the form as defined by ACPI PPTT table. The +* RD-V1 single-chip platform includes sixteen single-thread CPUS. Each of = the +* CPUs include 64KB L1 Data cache, 64KB L1 Instruction cache and 1MB L2 ca= che. +* The platform also includes a system level cache of 16MB. +* +* Copyright (c) 2021, ARM Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +* @par Specification Reference: +* - ACPI 6.3, Chapter 5, Section 5.2.29, Processor Properties Topology T= able +**/ + +#include +#include +#include +#include + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" + +/*! + \brief Define helper macro for populating processor core information. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. + \param CpuId CPU instance number. +*/ +#define PPTT_CORE_INIT(PackageId, ClusterId, CpuId) = \ + { = \ + /* Parameters for CPU Core */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_CORE, DCache), /* Length */ = \ + PPTT_PROCESSOR_CORE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId]), /* Parent */ = \ + ((PackageId << 4) | ClusterId), /* ACPI Id */ = \ + 2 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + { = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].DCache), = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].ICache) = \ + }, = \ + = \ + /* L1 data cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 256, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_DATA_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L1 instruction cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 256, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_INST_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L2 cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_1MB, /* Size */ = \ + 2048, /* Num of sets */ = \ + 8, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + } + +/*! + \brief Define helper macro for populating processor container informati= on. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. +*/ +#define PPTT_CLUSTER_INIT(PackageId, ClusterId) = \ + { = \ + /* Parameters for Cluster */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_MINIMAL_CLUSTER, Core), /* Length */ = \ + PPTT_PROCESSOR_CLUSTER_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package), /* Parent */ = \ + ((PackageId << 4) | ClusterId), /* ACPI Id */ = \ + 0 /* Num of private resource */ = \ + ), = \ + = \ + /* Initialize child core */ = \ + { = \ + PPTT_CORE_INIT (PackageId, ClusterId, 0) = \ + } = \ + } + +#pragma pack(1) +/* + * Processor Properties Topology Table + */ +typedef struct { + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Header; + RD_PPTT_SLC_PACKAGE Package; +} EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE; +#pragma pack () + +STATIC EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE Pptt =3D { + { + ARM_ACPI_HEADER ( + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION + ) + }, + + { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( + OFFSET_OF (RD_PPTT_SLC_PACKAGE, Slc), + PPTT_PROCESSOR_PACKAGE_FLAGS, 0, 0, 1), + + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, + Package.Slc), + + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ + 0, /* Next level of cache */ + SIZE_16MB, /* Size */ + 16384, /* Num of sets */ + 16, /* Associativity */ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ + 64 /* Line size */ + ), + + { + PPTT_CLUSTER_INIT (0, 0), + PPTT_CLUSTER_INIT (0, 1), + PPTT_CLUSTER_INIT (0, 2), + PPTT_CLUSTER_INIT (0, 3), + PPTT_CLUSTER_INIT (0, 4), + PPTT_CLUSTER_INIT (0, 5), + PPTT_CLUSTER_INIT (0, 6), + PPTT_CLUSTER_INIT (0, 7), + PPTT_CLUSTER_INIT (0, 8), + PPTT_CLUSTER_INIT (0, 9), + PPTT_CLUSTER_INIT (0, 10), + PPTT_CLUSTER_INIT (0, 11), + PPTT_CLUSTER_INIT (0, 12), + PPTT_CLUSTER_INIT (0, 13), + PPTT_CLUSTER_INIT (0, 14), + PPTT_CLUSTER_INIT (0, 15) + } + } +}; + +/* + * Reference the table being generated to prevent the optimizer from remov= ing + * the data structure from the executable + */ +VOID* CONST ReferenceAcpiTable =3D &Pptt; --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74920): https://edk2.groups.io/g/devel/message/74920 Mute This Topic: https://groups.io/mt/82729706/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74921+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74921+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677207; cv=none; d=zohomail.com; s=zohoarc; b=SzssTAODardRJvdUL3hqoLcJ3kQ1ZUKPkoDz+jX+kZWeHZAP/VjtDikwg38lSBhnrcra0ySVS/77LZr2mD/ejUA/HBkD8Sp0dMDEjZCshv1fnWxs11vTicYhWKe9/yn7gClhkvZ/JkBSrqDLdumVcjX4WdFkpgu2Sd6Wo4kbWDI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677207; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Eew9mpMEYf9zEG1JhkrGxOxrFo3Scj2DvrT0wcNd9bM=; b=I7QyniEWYxVKFN9H7KJvz8AA/82E5x9OeH/uT3+BGavrpQzcLc7DZK7TlPB/hwhbhDUJj2gdlGfBHzdwsLPWNPhXMBHb7aYEC1GFg7+07NPJjwPxqsFSig9FNwkoag4wAd2DWUuhN3mAh0ozn5ZiZJag0/WRqREzeR+VHACsW/g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74921+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620677207797449.2053106954073; Mon, 10 May 2021 13:06:47 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 8uSqYY1788612xqzEaRNvuxY; Mon, 10 May 2021 13:06:47 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web09.2928.1620677206419295074 for ; Mon, 10 May 2021 13:06:46 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 19C17168F; Mon, 10 May 2021 13:06:46 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A94703F719; Mon, 10 May 2021 13:06:44 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 11/14] Platform/Sgi: Add CPU container for RD-V1 quad-chip platform Date: Tue, 11 May 2021 01:36:12 +0530 Message-Id: <20210510200615.26879-12-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: crPR8HuJFvP3yh1IXfZDQpz1x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677207; bh=gwh7Rip68wPmnj9s7mpG0I/GqJn1TwppJh3iJdo075Q=; h=Cc:Date:From:Reply-To:Subject:To; b=mftbhFQIsIK9q3gINH0Kc2XIRnZ8ELsa+L1EV9x57Y8/bsRxOjXzyHonSb05H4w2Hjg GAbYxxXaVSeehJ5imIC4o+wCnY1ztZ6WFdZdA/VW5ZncbTBozI4vPAhVdrQzMox8J9qah AeFCfbsjDtp3E4y6SdALjK/lht0i5u5vFUk= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The RD-V1 quad-chip platform is composed of four RD-V1 platforms connected over a coherent link. Each chip has four CPU cores with each core contained in a minimal cluster logic. Update the processor device entries accordingly in the DSDT ACPI table by moving each of the processor device entries into a separate processor container devices. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl | 177 ++++++++++++++------ 1 file changed, 128 insertions(+), 49 deletions(-) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl b/Platform/ARM/= SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl index b1e88587080c..16919cc5aaa0 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Dsdt.asl @@ -13,101 +13,180 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI", EFI_ACPI_ARM_OEM_REVISION) { Scope (_SB) { - - Device (CP00) { // Neoverse V1 core 0 - Name (_HID, "ACPI0007") + Device (CL00) { // Cluster 0 + Name (_HID, "ACPI0010") Name (_UID, 0) - Name (_STA, 0xF) + + Device (CP00) { // Neoverse V1 core 0 + Name (_HID, "ACPI0007") + Name (_UID, 0) + Name (_STA, 0xF) + } } =20 - Device (CP01) { // Neoverse V1 core 1 - Name (_HID, "ACPI0007") + Device (CL01) { // Cluster 1 + Name (_HID, "ACPI0010") Name (_UID, 1) - Name (_STA, 0xF) + + Device (CP01) { // Neoverse V1 core 1 + Name (_HID, "ACPI0007") + Name (_UID, 1) + Name (_STA, 0xF) + } } =20 - Device (CP02) { // Neoverse V1 core 2 - Name (_HID, "ACPI0007") + Device (CL02) { // Cluster 2 + Name (_HID, "ACPI0010") Name (_UID, 2) - Name (_STA, 0xF) + + Device (CP02) { // Neoverse V1 core 2 + Name (_HID, "ACPI0007") + Name (_UID, 2) + Name (_STA, 0xF) + } } =20 - Device (CP03) { // Neoverse V1 core 3 - Name (_HID, "ACPI0007") + Device (CL03) { // Cluster 3 + Name (_HID, "ACPI0010") Name (_UID, 3) - Name (_STA, 0xF) + + Device (CP03) { // Neoverse V1 core 3 + Name (_HID, "ACPI0007") + Name (_UID, 3) + Name (_STA, 0xF) + } } =20 - Device (CP04) { // Neoverse V1 core 4 - Name (_HID, "ACPI0007") + Device (CL04) { // Cluster 4 + Name (_HID, "ACPI0010") Name (_UID, 4) - Name (_STA, 0xF) + + Device (CP04) { // Neoverse V1 core 4 + Name (_HID, "ACPI0007") + Name (_UID, 4) + Name (_STA, 0xF) + } } =20 - Device (CP05) { // Neoverse V1 core 5 - Name (_HID, "ACPI0007") + Device (CL05) { // Cluster 5 + Name (_HID, "ACPI0010") Name (_UID, 5) - Name (_STA, 0xF) + + Device (CP05) { // Neoverse V1 core 5 + Name (_HID, "ACPI0007") + Name (_UID, 5) + Name (_STA, 0xF) + } } =20 - Device (CP06) { // Neoverse V1 core 6 - Name (_HID, "ACPI0007") + Device (CL06) { // Cluster 6 + Name (_HID, "ACPI0010") Name (_UID, 6) - Name (_STA, 0xF) + + Device (CP06) { // Neoverse V1 core 6 + Name (_HID, "ACPI0007") + Name (_UID, 6) + Name (_STA, 0xF) + } } =20 - Device (CP07) { // Neoverse V1 core 7 - Name (_HID, "ACPI0007") + Device (CL07) { // Cluster 7 + Name (_HID, "ACPI0010") Name (_UID, 7) - Name (_STA, 0xF) + + Device (CP07) { // Neoverse V1 core 7 + Name (_HID, "ACPI0007") + Name (_UID, 7) + Name (_STA, 0xF) + } } =20 - Device (CP08) { // Neoverse V1 core 8 - Name (_HID, "ACPI0007") + Device (CL08) { // Cluster 8 + Name (_HID, "ACPI0010") Name (_UID, 8) - Name (_STA, 0xF) + + Device (CP08) { // Neoverse V1 core 8 + Name (_HID, "ACPI0007") + Name (_UID, 8) + Name (_STA, 0xF) + } } =20 - Device (CP09) { // Neoverse V1 core 9 - Name (_HID, "ACPI0007") + Device (CL09) { // Cluster 9 + Name (_HID, "ACPI0010") Name (_UID, 9) - Name (_STA, 0xF) + + Device (CP09) { // Neoverse V1 core 9 + Name (_HID, "ACPI0007") + Name (_UID, 9) + Name (_STA, 0xF) + } } =20 - Device (CP10) { // Neoverse V1 core 10 - Name (_HID, "ACPI0007") + Device (CL10) { // Cluster 10 + Name (_HID, "ACPI0010") Name (_UID, 10) - Name (_STA, 0xF) + + Device (CP10) { // Neoverse V1 core 10 + Name (_HID, "ACPI0007") + Name (_UID, 10) + Name (_STA, 0xF) + } } =20 - Device (CP11) { // Neoverse V1 core 11 - Name (_HID, "ACPI0007") + Device (CL11) { // Cluster 11 + Name (_HID, "ACPI0010") Name (_UID, 11) - Name (_STA, 0xF) + + Device (CP11) { // Neoverse V1 core 11 + Name (_HID, "ACPI0007") + Name (_UID, 11) + Name (_STA, 0xF) + } } =20 - Device (CP12) { // Neoverse V1 core 12 - Name (_HID, "ACPI0007") + Device (CL12) { // Cluster 12 + Name (_HID, "ACPI0010") Name (_UID, 12) - Name (_STA, 0xF) + + Device (CP12) { // Neoverse V1 core 12 + Name (_HID, "ACPI0007") + Name (_UID, 12) + Name (_STA, 0xF) + } } =20 - Device (CP13) { // Neoverse V1 core 13 - Name (_HID, "ACPI0007") + Device (CL13) { // Cluster 13 + Name (_HID, "ACPI0010") Name (_UID, 13) - Name (_STA, 0xF) + + Device (CP13) { // Neoverse V1 core 13 + Name (_HID, "ACPI0007") + Name (_UID, 13) + Name (_STA, 0xF) + } } =20 - Device (CP14) { // Neoverse V1 core 14 - Name (_HID, "ACPI0007") + Device (CL14) { // Cluster 14 + Name (_HID, "ACPI0010") Name (_UID, 14) - Name (_STA, 0xF) + + Device (CP14) { // Neoverse V1 core 14 + Name (_HID, "ACPI0007") + Name (_UID, 14) + Name (_STA, 0xF) + } } =20 - Device (CP15) { // Neoverse V1 core 15 - Name (_HID, "ACPI0007") + Device (CL15) { // Cluster 15 + Name (_HID, "ACPI0010") Name (_UID, 15) - Name (_STA, 0xF) + + Device (CP15) { // Neoverse V1 core 15 + Name (_HID, "ACPI0007") + Name (_UID, 15) + Name (_STA, 0xF) + } } } // Scope(_SB) } --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74921): https://edk2.groups.io/g/devel/message/74921 Mute This Topic: https://groups.io/mt/82729710/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74922+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74922+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677214; cv=none; d=zohomail.com; s=zohoarc; b=IAgIJptsCLuIBQrYjFMahXYDFlitYeN7EH3FGpr81eW+E8lUW4+HfwjTOprKvGJ0bc98TCMTzrGzJMjW1021ld07lqCLwLgpHHu63u0RilJK3rh11/2fKBN3YJSDPSEozRhBetFI2Yw3r6rBdcmaAXvVBUI+fZVGD7xRgrfzHKA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677214; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=3xpFiawgVKMFGbjWQqLBRYkbOJd8+IT1NkzTnQI+BXM=; b=RwQMa60RoXh0qeGc/LL6AELfQOwVlKDZv+8BlDvf8tlISyyFZ4JgX9O1neTXXsrdMM69N5zAki+702ld5/TPuUowSkEuwuQUoLQvRR7O5r07LSrM8WEnLagFiD7Ku+KcAPxgA74BSDHgx2I2iVhmrtTdKDXrczj/e/8aq3j9dBM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74922+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620677214273137.8661536099952; Mon, 10 May 2021 13:06:54 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id WWqSYY1788612xHRKFnnJOHd; Mon, 10 May 2021 13:06:53 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.2774.1620677208266599425 for ; Mon, 10 May 2021 13:06:48 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E7045168F; Mon, 10 May 2021 13:06:47 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 848293F719; Mon, 10 May 2021 13:06:46 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 12/14] Platform/Sgi: ACPI PPTT Table for RD-V1 quad-chip platform Date: Tue, 11 May 2021 01:36:13 +0530 Message-Id: <20210510200615.26879-13-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: NKRviesmdEWczjtNKx2jk09Tx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677213; bh=f9STwBuGNT0q5r+iFvOqbpXcO0YUWaa0MMQVyWt/qS4=; h=Cc:Date:From:Reply-To:Subject:To; b=Oasaipet+fbbCDQ74YaNk3ohrCtyl17COzQYqdoWFFoCwnzCIAaQ0o6545ogg75tPuo mzVDzJ9XbAfySrOvVQmiPCFNG/hB8Z7m2w8UoyNtlYhRvHNxGGnZ/qNVl+NqrKxMajfvU bq4K6sQOBqO6Nu4u7knFrb/epTNay9k4npk= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The RD-V1 quad-chip platform consists of four chips connected over cache coherent interconnect. Each chip on the platform includes four single- thread CPUS. Each of the CPUs include 64KB L1 Data cache, 64KB L1 Instruction cache and 1MB L2 cache. The platform also includes a system level cache of 16MB per chip. Add PPTT table for RD-V1 quad-chip platform with this information. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf | 1 + Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Pptt.aslc | 184 ++++++++++++++++= ++++ 2 files changed, 185 insertions(+) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf b/Platform= /ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf index c49546ec0b27..ffda4f925b19 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf @@ -24,6 +24,7 @@ RdV1Mc/Dsdt.asl RdV1Mc/Hmat.aslc RdV1Mc/Madt.aslc + RdV1Mc/Pptt.aslc RdV1Mc/Srat.aslc Spcr.aslc Ssdt.asl diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Pptt.aslc b/Platform/ARM= /SgiPkg/AcpiTables/RdV1Mc/Pptt.aslc new file mode 100644 index 000000000000..4b91aa9001cf --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Pptt.aslc @@ -0,0 +1,184 @@ +/** @file +* Processor Properties Topology Table (PPTT) for RD-V1 quad-chip platform +* +* This file describes the topological structure of the processor block on = the +* RD-V1 quad-chip platform in the form as defined by ACPI PPTT table. The = RD-V1 +* quad-chip platform is composed of four identical chips connected over ca= che +* coherent interconnect. Each of the chip on the platform includes four si= ngle +* thread CPUS. Each of the CPUs include 64KB L1 Data cache, 64KB L1 Instru= ction +* cache and 1MB L2 cache. The platform also includes a system level cache = of +* 16MB per chip. +* +* Copyright (c) 2021, ARM Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +* @par Specification Reference: +* - ACPI 6.3, Chapter 5, Section 5.2.29, Processor Properties Topology T= able +**/ + +#include +#include +#include +#include + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" + +#define CHIP_COUNT FixedPcdGet32 (PcdChipCount) + +/*! + \brief Define helper macro for populating processor core information. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. + \param CpuId CPU instance number. +*/ +#define PPTT_CORE_INIT(PackageId, ClusterId, CpuId) = \ + { = \ + /* Parameters for CPU Core */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_CORE, DCache), /* Length */ = \ + PPTT_PROCESSOR_CORE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Cluster[ClusterId]), /* Parent */ = \ + ((PackageId << 2) | ClusterId), /* ACPI Id */ = \ + 2 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + { = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Cluster[ClusterId].Core[CpuId].DCache), = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Cluster[ClusterId].Core[CpuId].ICache) = \ + }, = \ + = \ + /* L1 data cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 256, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_DATA_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L1 instruction cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 256, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_INST_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L2 cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_1MB, /* Size */ = \ + 2048, /* Num of sets */ = \ + 8, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + } + +/*! + \brief Define helper macro for populating processor container informati= on. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. +*/ +#define PPTT_CLUSTER_INIT(PackageId, ClusterId) = \ + { = \ + /* Parameters for Cluster */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_MINIMAL_CLUSTER, Core), /* Length */ = \ + PPTT_PROCESSOR_CLUSTER_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId]), /* Parent */ = \ + ((PackageId << 2) | ClusterId), /* ACPI Id */ = \ + 0 /* Num of private resource */ = \ + ), = \ + = \ + /* Initialize child core */ = \ + { = \ + PPTT_CORE_INIT (PackageId, ClusterId, 0) = \ + } = \ + } + +/*! + \brief Define helper macro for populating SoC package information. + \param PackageId Package instance number. +*/ +#define PPTT_PACKAGE_INIT(PackageId) = \ + { = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_SLC_PACKAGE, Slc), /* Length */ = \ + PPTT_PROCESSOR_PACKAGE_FLAGS, /* Flag */ = \ + 0, /* Parent */ = \ + 0, /* ACPI Id */ = \ + 1 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package[PackageId].Slc), = \ + = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_16MB, /* Size */ = \ + 16384, /* Num of sets */ = \ + 16, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + { = \ + PPTT_CLUSTER_INIT (PackageId, 0), = \ + PPTT_CLUSTER_INIT (PackageId, 1), = \ + PPTT_CLUSTER_INIT (PackageId, 2), = \ + PPTT_CLUSTER_INIT (PackageId, 3), = \ + } = \ + } + +#pragma pack(1) +/* + * Processor Properties Topology Table + */ +typedef struct { + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Header; + RD_PPTT_SLC_PACKAGE Package[CHIP_CO= UNT]; +} EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE; +#pragma pack () + +STATIC EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE Pptt =3D { + { + ARM_ACPI_HEADER ( + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION + ) + }, + + { + PPTT_PACKAGE_INIT (0), + PPTT_PACKAGE_INIT (1), + PPTT_PACKAGE_INIT (2), + PPTT_PACKAGE_INIT (3) + } +}; + +/* + * Reference the table being generated to prevent the optimizer from remov= ing + * the data structure from the executable + */ +VOID* CONST ReferenceAcpiTable =3D &Pptt; --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74922): https://edk2.groups.io/g/devel/message/74922 Mute This Topic: https://groups.io/mt/82729711/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74923+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74923+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677212; cv=none; d=zohomail.com; s=zohoarc; b=hxqciC6T373HfUUnJ6uskvtHMEMVsnCOZMvrhPGpeNovr7rJXfoC1w2C6TAqkUs+ou8ICiPHghKJRETCh1woP/TYMZ9IQAksc0aEJ57dUQLR8Vv5maeXjk5dt93J0+KoniZsoecyj23ZHTo5ioQusRJ2pogKP+fD5yAdqsozrUI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677212; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=oPABd7RaiSv1wJW7mdedHVsTpH7CIhzpjy0DULV444k=; b=UXMvujdGjzncGaLtOOtj3JsF3MqIPqnDd/pvTJsIZMkT7p87uLc1BGOIFc+1Blmkg8N+iW1tQfkpge4Drj9OSN3FusuQarne0p0j3CWWhhdXLw4/kPWDEWSEzsBLF+1wNWpV9WkCx1UJDvpOcGTaJ/FGotip1fscTJuVjv4yTks= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74923+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620677212889211.4267031580556; Mon, 10 May 2021 13:06:52 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id xQUZYY1788612xXRaPG8djwm; Mon, 10 May 2021 13:06:52 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.2866.1620677210226915244 for ; Mon, 10 May 2021 13:06:50 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C2573168F; Mon, 10 May 2021 13:06:49 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5FA9E3F719; Mon, 10 May 2021 13:06:48 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 13/14] Platform/Sgi: Add CPU container for RD-N2 platform Date: Tue, 11 May 2021 01:36:14 +0530 Message-Id: <20210510200615.26879-14-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: WWzby3TpzVH0tIZPqDNMZDbux1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677212; bh=BIqwFicsZKHlfi7LvEM0PhTM+G4Os3iSVVuzr+CsXFo=; h=Cc:Date:From:Reply-To:Subject:To; b=JN0bVfSiN0BjE+y2maNiJiK4s6ZUZHJpxStPg/KnmQDs01E+in3aRUUPQNzr16XkWOT GaeARmj3kGllCj58fs1QziVxQuTbuRuW5UwAbk4lwFLqijO9I7/mEflL3hiEbmd58HRjC yjE9v7MaJw89y5pGv5XkeFT7g55/GEes9W0= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The RD-N2 platform is a sixteen core platform with each core contained in a minimal cluster logic. Update the processor device entries accordingly in the DSDT ACPI table by moving each of the processor device entries into a separate processor container devices. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl | 176 ++++++++++++++------ 1 file changed, 128 insertions(+), 48 deletions(-) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl b/Platform/ARM/Sg= iPkg/AcpiTables/RdN2/Dsdt.asl index 42cb8655b4fb..c5d6f44b3e44 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Dsdt.asl @@ -13,100 +13,180 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "ARMLTD", "ARMSGI", EFI_ACPI_ARM_OEM_REVISION) { Scope (_SB) { - Device (CP00) { // Neoverse N2 core 0 - Name (_HID, "ACPI0007") + Device (CL00) { // Cluster 0 + Name (_HID, "ACPI0010") Name (_UID, 0) - Name (_STA, 0xF) + + Device (CP00) { // Neoverse N2 core 0 + Name (_HID, "ACPI0007") + Name (_UID, 0) + Name (_STA, 0xF) + } } =20 - Device (CP01) { // Neoverse N2 core 1 - Name (_HID, "ACPI0007") + Device (CL01) { // Cluster 1 + Name (_HID, "ACPI0010") Name (_UID, 1) - Name (_STA, 0xF) + + Device (CP01) { // Neoverse N2 core 1 + Name (_HID, "ACPI0007") + Name (_UID, 1) + Name (_STA, 0xF) + } } =20 - Device (CP02) { // Neoverse N2 core 2 - Name (_HID, "ACPI0007") + Device (CL02) { // Cluster 2 + Name (_HID, "ACPI0010") Name (_UID, 2) - Name (_STA, 0xF) + + Device (CP02) { // Neoverse N2 core 2 + Name (_HID, "ACPI0007") + Name (_UID, 2) + Name (_STA, 0xF) + } } =20 - Device (CP03) { // Neoverse N2 core 3 - Name (_HID, "ACPI0007") + Device (CL03) { // Cluster 3 + Name (_HID, "ACPI0010") Name (_UID, 3) - Name (_STA, 0xF) + + Device (CP03) { // Neoverse N2 core 3 + Name (_HID, "ACPI0007") + Name (_UID, 3) + Name (_STA, 0xF) + } } =20 - Device (CP04) { // Neoverse N2 core 4 - Name (_HID, "ACPI0007") + Device (CL04) { // Cluster 4 + Name (_HID, "ACPI0010") Name (_UID, 4) - Name (_STA, 0xF) + + Device (CP04) { // Neoverse N2 core 4 + Name (_HID, "ACPI0007") + Name (_UID, 4) + Name (_STA, 0xF) + } } =20 - Device (CP05) { // Neoverse N2 core 5 - Name (_HID, "ACPI0007") + Device (CL05) { // Cluster 5 + Name (_HID, "ACPI0010") Name (_UID, 5) - Name (_STA, 0xF) + + Device (CP05) { // Neoverse N2 core 5 + Name (_HID, "ACPI0007") + Name (_UID, 5) + Name (_STA, 0xF) + } } =20 - Device (CP06) { // Neoverse N2 core 6 - Name (_HID, "ACPI0007") + Device (CL06) { // Cluster 6 + Name (_HID, "ACPI0010") Name (_UID, 6) - Name (_STA, 0xF) + + Device (CP06) { // Neoverse N2 core 6 + Name (_HID, "ACPI0007") + Name (_UID, 6) + Name (_STA, 0xF) + } } =20 - Device (CP07) { // Neoverse N2 core 7 - Name (_HID, "ACPI0007") + Device (CL07) { // Cluster 7 + Name (_HID, "ACPI0010") Name (_UID, 7) - Name (_STA, 0xF) + + Device (CP07) { // Neoverse N2 core 7 + Name (_HID, "ACPI0007") + Name (_UID, 7) + Name (_STA, 0xF) + } } =20 - Device (CP08) { // Neoverse N2 core 8 - Name (_HID, "ACPI0007") + Device (CL08) { // Cluster 8 + Name (_HID, "ACPI0010") Name (_UID, 8) - Name (_STA, 0xF) + + Device (CP08) { // Neoverse N2 core 8 + Name (_HID, "ACPI0007") + Name (_UID, 8) + Name (_STA, 0xF) + } } =20 - Device (CP09) { // Neoverse N2 core 9 - Name (_HID, "ACPI0007") + Device (CL09) { // Cluster 9 + Name (_HID, "ACPI0010") Name (_UID, 9) - Name (_STA, 0xF) + + Device (CP09) { // Neoverse N2 core 9 + Name (_HID, "ACPI0007") + Name (_UID, 9) + Name (_STA, 0xF) + } } =20 - Device (CP10) { // Neoverse N2 core 10 - Name (_HID, "ACPI0007") + Device (CL10) { // Cluster 10 + Name (_HID, "ACPI0010") Name (_UID, 10) - Name (_STA, 0xF) + + Device (CP10) { // Neoverse N2 core 10 + Name (_HID, "ACPI0007") + Name (_UID, 10) + Name (_STA, 0xF) + } } =20 - Device (CP11) { // Neoverse N2 core 11 - Name (_HID, "ACPI0007") + Device (CL11) { // Cluster 11 + Name (_HID, "ACPI0010") Name (_UID, 11) - Name (_STA, 0xF) + + Device (CP11) { // Neoverse N2 core 11 + Name (_HID, "ACPI0007") + Name (_UID, 11) + Name (_STA, 0xF) + } } =20 - Device (CP12) { // Neoverse N2 core 12 - Name (_HID, "ACPI0007") + Device (CL12) { // Cluster 12 + Name (_HID, "ACPI0010") Name (_UID, 12) - Name (_STA, 0xF) + + Device (CP12) { // Neoverse N2 core 12 + Name (_HID, "ACPI0007") + Name (_UID, 12) + Name (_STA, 0xF) + } } =20 - Device (CP13) { // Neoverse N2 core 13 - Name (_HID, "ACPI0007") + Device (CL13) { // Cluster 13 + Name (_HID, "ACPI0010") Name (_UID, 13) - Name (_STA, 0xF) + + Device (CP13) { // Neoverse N2 core 13 + Name (_HID, "ACPI0007") + Name (_UID, 13) + Name (_STA, 0xF) + } } =20 - Device (CP14) { // Neoverse N2 core 14 - Name (_HID, "ACPI0007") + Device (CL14) { // Cluster 14 + Name (_HID, "ACPI0010") Name (_UID, 14) - Name (_STA, 0xF) + + Device (CP14) { // Neoverse N2 core 14 + Name (_HID, "ACPI0007") + Name (_UID, 14) + Name (_STA, 0xF) + } } =20 - Device (CP15) { // Neoverse N2 core 15 - Name (_HID, "ACPI0007") + Device (CL15) { // Cluster 15 + Name (_HID, "ACPI0010") Name (_UID, 15) - Name (_STA, 0xF) + + Device (CP15) { // Neoverse N2 core 15 + Name (_HID, "ACPI0007") + Name (_UID, 15) + Name (_STA, 0xF) + } } } // Scope(_SB) } --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74923): https://edk2.groups.io/g/devel/message/74923 Mute This Topic: https://groups.io/mt/82729712/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 14:01:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74924+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74924+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1620677218; cv=none; d=zohomail.com; s=zohoarc; b=azeWDrMFoVFFXEbqDfHOjVuw8pbXrPoVlx+ZlwC1fM1c/8pvOM9V2rxfIALjajUMTAmXTFCibJhktjLkAknJ8fSOJUsvU/4r+XIEwF28T02OZSwiwGITOf2nYFtJ7vrqLWnJTveqouKgC9PTBUy7JfCVZSW31m/aff93kB5J6QM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620677218; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=suVrLn5pmwjb2SzXUUp6kskF6mb+YTUPhj1kkhj5UdA=; b=dFcOZjoQm36eFU+CSiqDas3A6KSYjuRThlOdObl+wmR470kZlx4HoUmNLlYEzYBxF1VHJlZ5rmkp2uT7NbM1tM9+ec+tAEYDMvoMMv1lCf+PDjr/JnpXCYZXKUflwhdCbXxOCJATNHAi1Uj0POW8nYmApYDoNy9kzMGy9SD3+jY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74924+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620677218467994.3814067436977; Mon, 10 May 2021 13:06:58 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id ZuzmYY1788612xIy2CKeIXrf; Mon, 10 May 2021 13:06:57 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.2776.1620677211982403156 for ; Mon, 10 May 2021 13:06:52 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9DD21168F; Mon, 10 May 2021 13:06:51 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3B2093F719; Mon, 10 May 2021 13:06:50 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Pierre Gondois Subject: [edk2-devel] [edk2-platforms][PATCH V3 14/14] Platform/Sgi: ACPI PPTT table for RD-N2 platform Date: Tue, 11 May 2021 01:36:15 +0530 Message-Id: <20210510200615.26879-15-pranav.madhu@arm.com> In-Reply-To: <20210510200615.26879-1-pranav.madhu@arm.com> References: <20210510200615.26879-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: JjzC6vOSCibFjgIZgdcCCeKbx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620677217; bh=Nuucc1dZnzBs0dbkSf4IFjHfp4Xcct6v0ieC7Xa5K9c=; h=Cc:Date:From:Reply-To:Subject:To; b=AqeLaKg7/qNvFf4jI+C11iUDPSqwbgZfyodVigux+bC9tyl2B5VgIox4lRJOPAGd8Iv 0eciHie04ivMj11Dvvh9Z023OmFau3phvuDVM0C9pJgE7lTekX3ffns7NAJFHe6Qlk48a Hps6i5aHAzUTiPIdqMMjWlb0SkmW7RLNfXQ= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The RD-N2 platform includes sixteen single-thread CPUS. Each of the CPUs include 64KB L1 Data cache, 64KB L1 Instruction cache and 1MB L2 cache. The platform also includes a system level cache of 32MB. Add PPTT table for RD-N2 platform with this information. Signed-off-by: Pranav Madhu --- Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf | 3 +- Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc | 175 ++++++++++++++++++= ++ 2 files changed, 177 insertions(+), 1 deletion(-) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf b/Platform/A= RM/SgiPkg/AcpiTables/RdN2AcpiTables.inf index 2ec3e42473a9..c1282a3422ab 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf @@ -1,7 +1,7 @@ ## @file # ACPI table data and ASL sources required to boot the platform. # -# Copyright (c) 2020, Arm Ltd. All rights reserved. +# Copyright (c) 2020-2021, Arm Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,7 @@ Mcfg.aslc RdN2/Dsdt.asl RdN2/Madt.aslc + RdN2/Pptt.aslc Spcr.aslc Ssdt.asl SsdtRos.asl diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc b/Platform/ARM/S= giPkg/AcpiTables/RdN2/Pptt.aslc new file mode 100644 index 000000000000..16daf5b7f266 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc @@ -0,0 +1,175 @@ +/** @file +* Processor Properties Topology Table (PPTT) for RD-N2 platform +* +* This file describes the topological structure of the processor block on = the +* RD-N2 platform in the form as defined by ACPI PPTT table. The RD-N2 plat= form +* includes sixteen single-thread CPUS. Each of the CPUs include 64KB L1 Da= ta +* cache, 64KB L1 Instruction cache and 1MB L2 cache. The platform also inc= ludes +* system level cache of 32MB. +* +* Copyright (c) 2021, ARM Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +* @par Specification Reference: +* - ACPI 6.3, Chapter 5, Section 5.2.29, Processor Properties Topology T= able +**/ + +#include +#include +#include +#include + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" + +/*! + \brief Define helper macro for populating processor core information. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. + \param CpuId CPU instance number. +*/ +#define PPTT_CORE_INIT(PackageId, ClusterId, CpuId) = \ + { = \ + /* Parameters for CPU Core */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_CORE, DCache), /* Length */ = \ + PPTT_PROCESSOR_CORE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId]), /* Parent */ = \ + ((PackageId << 4) | ClusterId), /* ACPI Id */ = \ + 2 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + { = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].DCache), = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].ICache) = \ + }, = \ + = \ + /* L1 data cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 256, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_DATA_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L1 instruction cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[ClusterId].Core[CpuId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 256, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_INST_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L2 cache parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_1MB, /* Size */ = \ + 2048, /* Num of sets */ = \ + 8, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + } + +/*! + \brief Define helper macro for populating processor container informati= on. + \param PackageId Package instance number. + \param ClusterId Cluster instance number. +*/ +#define PPTT_CLUSTER_INIT(PackageId, ClusterId) = \ + { = \ + /* Parameters for Cluster */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + OFFSET_OF (RD_PPTT_MINIMAL_CLUSTER, Core), /* Length */ = \ + PPTT_PROCESSOR_CLUSTER_FLAGS, /* Flag */ = \ + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package), /* Parent */ = \ + ((PackageId << 4) | ClusterId), /* ACPI Id */ = \ + 0 /* Num of private resource */ = \ + ), = \ + = \ + /* Initialize child core */ = \ + { = \ + PPTT_CORE_INIT (PackageId, ClusterId, 0) = \ + } = \ + } + +#pragma pack(1) +/* + * Processor Properties Topology Table + */ +typedef struct { + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Header; + RD_PPTT_SLC_PACKAGE Package; +} EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE; +#pragma pack () + +STATIC EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE Pptt =3D { + { + ARM_ACPI_HEADER ( + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION + ) + }, + + { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( + OFFSET_OF (RD_PPTT_SLC_PACKAGE, Slc), + PPTT_PROCESSOR_PACKAGE_FLAGS, 0, 0, 1), + + OFFSET_OF (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, + Package.Slc), + + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ + 0, /* Next level of cache */ + SIZE_32MB, /* Size */ + 32768, /* Num of sets */ + 16, /* Associativity */ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ + 64 /* Line size */ + ), + + { + PPTT_CLUSTER_INIT (0, 0), + PPTT_CLUSTER_INIT (0, 1), + PPTT_CLUSTER_INIT (0, 2), + PPTT_CLUSTER_INIT (0, 3), + PPTT_CLUSTER_INIT (0, 4), + PPTT_CLUSTER_INIT (0, 5), + PPTT_CLUSTER_INIT (0, 6), + PPTT_CLUSTER_INIT (0, 7), + PPTT_CLUSTER_INIT (0, 8), + PPTT_CLUSTER_INIT (0, 9), + PPTT_CLUSTER_INIT (0, 10), + PPTT_CLUSTER_INIT (0, 11), + PPTT_CLUSTER_INIT (0, 12), + PPTT_CLUSTER_INIT (0, 13), + PPTT_CLUSTER_INIT (0, 14), + PPTT_CLUSTER_INIT (0, 15) + } + } +}; + +/* + * Reference the table being generated to prevent the optimizer from remov= ing + * the data structure from the executable + */ +VOID* CONST ReferenceAcpiTable =3D &Pptt; --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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