From nobody Fri Apr 26 10:07:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74735+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74735+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1620141662; cv=none; d=zohomail.com; s=zohoarc; b=EIkQeSah7Zs97dz+Y5SSU0KASV5FPm/roMsbbahp9Xnhici7F2I29JhoOGNxvHjYbajVjT5+UFG7dUcNL5TaYNK7sdrOBQYVQWenxcAj5BJ/6ZgvME8ec6gJe1auPQrcxBi9uIYtqrEEC6i1/bAUfrlMXAMMCaa1ir4WTFQgPU0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620141662; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=7Kt3mDnTdtWu4ThllxCkp43AuiM9TB2gmRcq1YEObzI=; b=jAU8T23TzaiNd4/0L/hfif+mX3/e/KQEF3UiFdlyoCOH6OtgLdetiefvQZ3viaq3OfzDGdLzRjaM57iCuAErzy9tV5NuGRkhZ9lGKPrO/fRaCjAg/mrJ1+yzDH4BKOPvSgU74McJYAjqbsdKQJSP7WtssIneL5I7ehsEHsOQO7o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74735+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620141662751700.7887984861095; Tue, 4 May 2021 08:21:02 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id mxSAYY1788612xFewFGszea1; Tue, 04 May 2021 08:21:02 -0700 X-Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) by mx.groups.io with SMTP id smtpd.web09.7361.1620141655803480463 for ; Tue, 04 May 2021 08:20:56 -0700 X-Received: by mail-wr1-f42.google.com with SMTP id x7so9869593wrw.10 for ; Tue, 04 May 2021 08:20:55 -0700 (PDT) X-Gm-Message-State: WkRgp24265BOSA5oxvGRuIqjx1787277AA= X-Google-Smtp-Source: ABdhPJxLO9x9nKDnCBJGxeVI7TM7pZ5oEPTt1ZKhwQWHY4eX9+ehkK9I77JbhjmOMGQyh63uFmPmXQ== X-Received: by 2002:a5d:4888:: with SMTP id g8mr4363841wrq.384.1620141654305; Tue, 04 May 2021 08:20:54 -0700 (PDT) X-Received: from lmecxl0524.lme.st.com ([2a04:cec0:11d7:652f:452f:f0ef:fb46:d5f4]) by smtp.gmail.com with ESMTPSA id c2sm2919661wmr.22.2021.05.04.08.20.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 May 2021 08:20:54 -0700 (PDT) From: "Etienne Carriere" To: devel@edk2.groups.io Cc: Achin Gupta , Ard Biesheuvel , Jiewen Yao , Leif Lindholm , Sami Mujawar , Sughosh Ganu , Etienne Carriere Subject: [edk2-devel] [PATCH 1/5] ArmPkg/IndustryStandard: 32b/64b agnostic FF-A and Mm SVC IDs Date: Tue, 4 May 2021 17:20:44 +0200 Message-Id: <20210504152048.8739-2-etienne.carriere@linaro.org> In-Reply-To: <20210504152048.8739-1-etienne.carriere@linaro.org> References: <20210504152048.8739-1-etienne.carriere@linaro.org> Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,etienne.carriere@linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620141662; bh=GbH+0TzoCACp7fPfBicIxdEpndhnYqPH5rQV8EzL5uw=; h=Cc:Date:From:Reply-To:Subject:To; b=GVm1HcVX6uz33p2XicHyBRTm/hgeKDpuDd4N3tYJEJQ/hXFUNTe8SGQ7sl+XOuD1EQo TOZzrbqBr9d0V7U8jUquPqj1aZvdZbl29XFaxhr5lg2otqvXcc2rKa4bs/tmM40hxX96N 6X1r/k77Pk/Xx9uYYU3e6fKatM3o0ubx9og= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Defines ARM_SVC_ID_FFA_* and ARM_SVC_ID_SP_* identifiers for 32bit function IDs as per SMCCC specification. Defines also generic ARM SVC identifier macros to wrap 32bit or 64bit identifiers upon target built architecture. Cc: Achin Gupta Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Sughosh Ganu Signed-off-by: Etienne Carriere Reviewed-by: Sami Mujawar --- ArmPkg/Include/IndustryStandard/ArmFfaSvc.h | 12 ++++++++++++ ArmPkg/Include/IndustryStandard/ArmMmSvc.h | 15 +++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h b/ArmPkg/Include/I= ndustryStandard/ArmFfaSvc.h index 65b8343ade..ebcb54b28b 100644 --- a/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h +++ b/ArmPkg/Include/IndustryStandard/ArmFfaSvc.h @@ -17,9 +17,21 @@ #define ARM_FFA_SVC_H_ =20 #define ARM_SVC_ID_FFA_VERSION_AARCH32 0x84000063 +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH32 0x8400006F +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH32 0x84000070 #define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64 0xC400006F #define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64 0xC4000070 =20 +/* Generic IDs when using AArch32 or AArch64 execution state */ +#ifdef MDE_CPU_AARCH64 +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ ARM_SVC_ID_FFA_MSG_SEND_DIR= ECT_REQ_AARCH64 +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP ARM_SVC_ID_FFA_MSG_SEND_DIR= ECT_RESP_AARCH64 +#endif +#ifdef MDE_CPU_ARM +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ ARM_SVC_ID_FFA_MSG_SEND_DIR= ECT_REQ_AARCH32 +#define ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP ARM_SVC_ID_FFA_MSG_SEND_DIR= ECT_RESP_AARCH32 +#endif + #define SPM_MAJOR_VERSION_FFA 1 #define SPM_MINOR_VERSION_FFA 0 =20 diff --git a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h b/ArmPkg/Include/In= dustryStandard/ArmMmSvc.h index 33d60ccf17..deb3bc99d2 100644 --- a/ArmPkg/Include/IndustryStandard/ArmMmSvc.h +++ b/ArmPkg/Include/IndustryStandard/ArmMmSvc.h @@ -15,10 +15,25 @@ * privileged operations on its behalf. */ #define ARM_SVC_ID_SPM_VERSION_AARCH32 0x84000060 +#define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH32 0x84000061 +#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH32 0x84000064 +#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH32 0x84000065 #define ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64 0xC4000061 #define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64 0xC4000064 #define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64 0xC4000065 =20 +/* Generic IDs when using AArch32 or AArch64 execution state */ +#ifdef MDE_CPU_AARCH64 +#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COM= PLETE_AARCH64 +#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRI= BUTES_AARCH64 +#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRI= BUTES_AARCH64 +#endif +#ifdef MDE_CPU_ARM +#define ARM_SVC_ID_SP_EVENT_COMPLETE ARM_SVC_ID_SP_EVENT_COM= PLETE_AARCH32 +#define ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES ARM_SVC_ID_SP_GET_MEM_ATTRI= BUTES_AARCH32 +#define ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES ARM_SVC_ID_SP_SET_MEM_ATTRI= BUTES_AARCH32 +#endif + #define SET_MEM_ATTR_DATA_PERM_MASK 0x3 #define SET_MEM_ATTR_DATA_PERM_SHIFT 0 #define SET_MEM_ATTR_DATA_PERM_NO_ACCESS 0 --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74735): https://edk2.groups.io/g/devel/message/74735 Mute This Topic: https://groups.io/mt/82580245/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 10:07:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74736+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74736+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1620141663; cv=none; d=zohomail.com; s=zohoarc; b=mOWtU1x/LSjQiC+VgeHTuGHNm3utirYHMrf9aeXXlIzmg0t066dy2LyFbOVLsevFiUU9hE1yKFrEG64qzC9ne7K8mpQGGva2zLFgz2r0kcwVn9CiE0mcho/8O11fYP3OG8RLdagl6rsD61pyhMElgOT96Daqe+/mHN8+6RSDg90= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620141663; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=XnhDDsRNk6yCgS+99QgcBaUeuue/Td//xcPmTFld7ec=; b=R0AOs76SFsT8YTeAKjeWzhgSOS6/tEKo8TjLV5mFgBc2QIJmNsnJ/KE3DcIAMLVv0TCud8PmyOdQTCefUbkPFfugRu0ZeIGH8UAokP5U1gt02aCfuSdUVrpPFuDPEr8EV/tGepcvxXzgNnOqVr3jMhwyQxZU5sJS0m8XnJqMDvg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74736+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620141663036991.2391671841339; Tue, 4 May 2021 08:21:03 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id jXUFYY1788612xwm5mFnroPr; Tue, 04 May 2021 08:21:02 -0700 X-Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) by mx.groups.io with SMTP id smtpd.web11.7408.1620141656714496905 for ; Tue, 04 May 2021 08:20:57 -0700 X-Received: by mail-wm1-f41.google.com with SMTP id l24-20020a7bc4580000b029014ac3b80020so1518479wmi.1 for ; Tue, 04 May 2021 08:20:56 -0700 (PDT) X-Gm-Message-State: 7LTW2iHZn8W0zf6wuuyfdDmBx1787277AA= X-Google-Smtp-Source: ABdhPJzg9uDYdL+vxs/vyZ3hXeCgPfJKXgFpNvJvyIWqe5P8vnLVzrjqtSXF5Mt4iierLLuoyqi31Q== X-Received: by 2002:a1c:7716:: with SMTP id t22mr28510563wmi.154.1620141655203; Tue, 04 May 2021 08:20:55 -0700 (PDT) X-Received: from lmecxl0524.lme.st.com ([2a04:cec0:11d7:652f:452f:f0ef:fb46:d5f4]) by smtp.gmail.com with ESMTPSA id c2sm2919661wmr.22.2021.05.04.08.20.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 May 2021 08:20:54 -0700 (PDT) From: "Etienne Carriere" To: devel@edk2.groups.io Cc: Achin Gupta , Ard Biesheuvel , Jiewen Yao , Leif Lindholm , Sami Mujawar , Sughosh Ganu , Etienne Carriere Subject: [edk2-devel] [PATCH 2/5] ArmPkg: prepare 32bit ARM build of StandaloneMmPkg Date: Tue, 4 May 2021 17:20:45 +0200 Message-Id: <20210504152048.8739-3-etienne.carriere@linaro.org> In-Reply-To: <20210504152048.8739-1-etienne.carriere@linaro.org> References: <20210504152048.8739-1-etienne.carriere@linaro.org> Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,etienne.carriere@linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620141662; bh=d6k2vcZJ93VfO3Yazc+Nh20JEbJmQrRO+eRUoHtKFqw=; h=Cc:Date:From:Reply-To:Subject:To; b=KWInpWvrekP6iw6r0PlxxIYqH8lwFNNokVwJIdIRh80QEkfLIglTCj39TnwuR9JzGT4 AjDG2wOFQKyXgi2BAvhuctkXtqTmbrCM8Jf7o1x0MjghiF9ENWbTURAhsQXr/iHqRgHs4 W+/MhykcKCBJutstS+cTzB+Tm1+CFxuCCAE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Changes in ArmPkg to prepare building StandaloneMm firmware for 32bit Arm architectures. Adds MmCommunicationDxe driver and ArmMmuPeiLib and ArmmmuStandaloneMmLib libraries to the list of the standard components build for ArmPkg on when ARM architectures. Changes path of source file AArch64/ArmMmuStandaloneMmLib.c and compile it for both 32bit and 64bit architectures. Cc: Achin Gupta Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Sughosh Ganu Signed-off-by: Etienne Carriere Reviewed-by: Sami Mujawar --- ArmPkg/ArmPkg.dec | = 2 +- ArmPkg/ArmPkg.dsc | = 2 +- ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c | = 2 +- ArmPkg/Library/StandaloneMmMmuLib/{AArch64 =3D> }/ArmMmuStandaloneMmLib.c = | 15 ++++++++------- ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf | = 6 +++--- 5 files changed, 14 insertions(+), 13 deletions(-) diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index 214b2f5892..6ed51edd03 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -137,7 +137,7 @@ # hardware coherency (i.e., no virtualization or cache coherent DMA) gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x0= 0000043 =20 -[PcdsFeatureFlag.AARCH64] +[PcdsFeatureFlag.AARCH64, PcdsFeatureFlag.ARM] ## Used to select method for requesting services from S-EL1.

# TRUE - Selects FF-A calls for communication between S-EL0 and SPMC.=
# FALSE - Selects SVC calls for communication between S-EL0 and SPMC.<= BR> diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc index 926986cf7f..4c79dadf9e 100644 --- a/ArmPkg/ArmPkg.dsc +++ b/ArmPkg/ArmPkg.dsc @@ -158,7 +158,7 @@ ArmPkg/Universal/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf =20 -[Components.AARCH64] +[Components.AARCH64, Components.ARM] ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf diff --git a/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c b/ArmPkg/D= rivers/MmCommunicationDxe/MmCommunication.c index b1e3095809..4ae38a9f22 100644 --- a/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c +++ b/ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c @@ -125,7 +125,7 @@ MmCommunication2Communicate ( } =20 // SMC Function ID - CommunicateSmcArgs.Arg0 =3D ARM_SMC_ID_MM_COMMUNICATE_AARCH64; + CommunicateSmcArgs.Arg0 =3D ARM_SMC_ID_MM_COMMUNICATE; =20 // Cookie CommunicateSmcArgs.Arg1 =3D 0; diff --git a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLi= b.c b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c similarity index 92% rename from ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib= .c rename to ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c index dd014beec8..20f873e680 100644 --- a/ArmPkg/Library/StandaloneMmMmuLib/AArch64/ArmMmuStandaloneMmLib.c +++ b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.c @@ -2,6 +2,7 @@ File managing the MMU for ARMv8 architecture in S-EL0 =20 Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.
+ Copyright (c) 2021, Linaro Limited SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Reference(s): @@ -62,7 +63,7 @@ SendMemoryPermissionRequest ( // for other Direct Request calls which are not atomic // We therefore check only for Direct Response by the // callee. - if (SvcArgs->Arg0 =3D=3D ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_AARCH64) { + if (SvcArgs->Arg0 =3D=3D ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP) { // A Direct Response means FF-A success // Now check the payload for errors // The callee sends back the return value @@ -164,13 +165,13 @@ GetMemoryPermissions ( ZeroMem (&SvcArgs, sizeof (ARM_SVC_ARGS)); if (FeaturePcdGet (PcdFfaEnable)) { // See [2], Section 10.2 FFA_MSG_SEND_DIRECT_REQ. - SvcArgs.Arg0 =3D ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64; + SvcArgs.Arg0 =3D ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ; SvcArgs.Arg1 =3D ARM_FFA_DESTINATION_ENDPOINT_ID; SvcArgs.Arg2 =3D 0; - SvcArgs.Arg3 =3D ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg3 =3D ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES; SvcArgs.Arg4 =3D BaseAddress; } else { - SvcArgs.Arg0 =3D ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg0 =3D ARM_SVC_ID_SP_GET_MEM_ATTRIBUTES; SvcArgs.Arg1 =3D BaseAddress; SvcArgs.Arg2 =3D 0; SvcArgs.Arg3 =3D 0; @@ -219,15 +220,15 @@ RequestMemoryPermissionChange ( ZeroMem (&SvcArgs, sizeof (ARM_SVC_ARGS)); if (FeaturePcdGet (PcdFfaEnable)) { // See [2], Section 10.2 FFA_MSG_SEND_DIRECT_REQ. - SvcArgs.Arg0 =3D ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64; + SvcArgs.Arg0 =3D ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ; SvcArgs.Arg1 =3D ARM_FFA_DESTINATION_ENDPOINT_ID; SvcArgs.Arg2 =3D 0; - SvcArgs.Arg3 =3D ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg3 =3D ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES; SvcArgs.Arg4 =3D BaseAddress; SvcArgs.Arg5 =3D EFI_SIZE_TO_PAGES (Length); SvcArgs.Arg6 =3D Permissions; } else { - SvcArgs.Arg0 =3D ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES_AARCH64; + SvcArgs.Arg0 =3D ARM_SVC_ID_SP_SET_MEM_ATTRIBUTES; SvcArgs.Arg1 =3D BaseAddress; SvcArgs.Arg2 =3D EFI_SIZE_TO_PAGES (Length); SvcArgs.Arg3 =3D Permissions; diff --git a/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf b/= ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf index 6c71fe0023..ff20e58980 100644 --- a/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf +++ b/ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf @@ -16,14 +16,14 @@ LIBRARY_CLASS =3D StandaloneMmMmuLib PI_SPECIFICATION_VERSION =3D 0x00010032 =20 -[Sources.AARCH64] - AArch64/ArmMmuStandaloneMmLib.c +[Sources] + ArmMmuStandaloneMmLib.c =20 [Packages] ArmPkg/ArmPkg.dec MdePkg/MdePkg.dec =20 -[FeaturePcd.AARCH64] +[FeaturePcd.ARM, FeaturePcd.AARCH64] gArmTokenSpaceGuid.PcdFfaEnable =20 [LibraryClasses] --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74736): https://edk2.groups.io/g/devel/message/74736 Mute This Topic: https://groups.io/mt/82580246/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 10:07:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74737+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74737+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1620141664; cv=none; d=zohomail.com; s=zohoarc; b=nAZbkSbZjZqmKTrylEAK92E/91CSy9lhaPIcQXODUvpmmaO6B7lG1srCAPHZSSA9k28ygCiwKIBpfXT5b0lexQmBo6SDfryGLNYBvrTYwN3CB77KKnX7Lr6S+L3DDQQa4/BLX5/lf8YuN0Bgb3zKXIHdqoJnMSSL2OmCupD8tr4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620141664; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=0Rhnnifcr928u6+61yHLXT550lRPOM1X1GdaGOET0Tk=; b=eOuPyCSn50JwwpcQkFVvInarJnPXP3s4dkpZecj0SYoX63ik/oa90DZxoOAg+hZcu73KW8gctLRS8IIwF5fv4u4pXjP04NaqVEAq5LdDEnRADhqzy/5KlbUsME0im7krfsWl3GB0otqMzwsns006us7Gk5YJCyW5JfDTmHpvNBE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74737+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620141664202580.819346716274; Tue, 4 May 2021 08:21:04 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id y0U6YY1788612xfWBQG7bcQ3; Tue, 04 May 2021 08:21:03 -0700 X-Received: from mail-wr1-f46.google.com (mail-wr1-f46.google.com [209.85.221.46]) by mx.groups.io with SMTP id smtpd.web09.7363.1620141657784929652 for ; Tue, 04 May 2021 08:20:58 -0700 X-Received: by mail-wr1-f46.google.com with SMTP id l14so9878533wrx.5 for ; Tue, 04 May 2021 08:20:57 -0700 (PDT) X-Gm-Message-State: lFT7rqVmPw5plFFDiQsifKNpx1787277AA= X-Google-Smtp-Source: ABdhPJy3EcNz7FHvu5aKviGH3H8Zj33briJaW58iNDG6e/uzyN0owMUbvXn4I1LYZfsEBgk5hxJyVQ== X-Received: by 2002:adf:f1ca:: with SMTP id z10mr4362407wro.271.1620141656272; Tue, 04 May 2021 08:20:56 -0700 (PDT) X-Received: from lmecxl0524.lme.st.com ([2a04:cec0:11d7:652f:452f:f0ef:fb46:d5f4]) by smtp.gmail.com with ESMTPSA id c2sm2919661wmr.22.2021.05.04.08.20.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 May 2021 08:20:55 -0700 (PDT) From: "Etienne Carriere" To: devel@edk2.groups.io Cc: Achin Gupta , Ard Biesheuvel , Jiewen Yao , Leif Lindholm , Sami Mujawar , Sughosh Ganu , Etienne Carriere , Bob Feng , Liming Gao Subject: [edk2-devel] [PATCH 3/5] GenGv: Arm: support images entered in Thumb mode Date: Tue, 4 May 2021 17:20:46 +0200 Message-Id: <20210504152048.8739-4-etienne.carriere@linaro.org> In-Reply-To: <20210504152048.8739-1-etienne.carriere@linaro.org> References: <20210504152048.8739-1-etienne.carriere@linaro.org> Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,etienne.carriere@linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620141663; bh=VJE12fi6pDs1fzgGrCDW0/PKZe1GWV7ZIK22QK7O2e0=; h=Cc:Date:From:Reply-To:Subject:To; b=FoLgy0cX2xKXxGg73zxe+EbaYdIvSgregLqdlDHy1OZENdnS4XpJPhSajiskUss+Fnb nWO4EbzWaNnVsk4m162xsRyRnT8sDzjKDzoCRBmfh3aGY2cI3wEnb7JIrEEJrX5LA/iAd U8Byz6nXCePJts2bNGBitzha9pIJKpfcmBc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Change GenFv for Arm architecture to generate a specific jump instruction as image entry instruction, when the target entry label is assembled with Thumb instruction set. This is possible since SecCoreEntryAddress value fetched from the PE32 as its LSBit set when the entry instruction executes in Thumb mode. Cc: Bob Feng Cc: Liming Gao Cc: Achin Gupta Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Sughosh Ganu Signed-off-by: Etienne Carriere --- BaseTools/Source/C/GenFv/GenFvInternalLib.c | 38 +++++++++++++++----- 1 file changed, 29 insertions(+), 9 deletions(-) diff --git a/BaseTools/Source/C/GenFv/GenFvInternalLib.c b/BaseTools/Source= /C/GenFv/GenFvInternalLib.c index 6e296b8ad6..3af65146f6 100644 --- a/BaseTools/Source/C/GenFv/GenFvInternalLib.c +++ b/BaseTools/Source/C/GenFv/GenFvInternalLib.c @@ -34,9 +34,27 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include "FvLib.h" #include "PeCoffLib.h" =20 -#define ARMT_UNCONDITIONAL_JUMP_INSTRUCTION 0xEB000000 #define ARM64_UNCONDITIONAL_JUMP_INSTRUCTION 0x14000000 =20 +/* + * Arm instruction to jump to Fv enry instruction in Arm or Thumb mode. + * From ARM Arch Ref Manual versions b/c/d, section A8.8.25 BL, BLX (immed= iate) + * BLX (encoding A2) branches to offset in Thumb instruction set mode. + * BL (encoding A1) branches to offset in Arm instruction set mode. + */ +#define ARM_JUMP_OFFSET_MAX 0xffffff +#define ARM_JUMP_TO_ARM(Offset) (0xeb000000 | ((Offset - 8) >> 2)) + +#define _ARM_JUMP_TO_THUMB(Imm32) (0xfa000000 | \ + (((Imm32) & (1 << 1)) << (24 - 1)) | \ + (((Imm32) >> 2) & 0x7fffff)) +#define ARM_JUMP_TO_THUMB(Offset) _ARM_JUMP_TO_THUMB((Offset) - 8) + +/* + * Arm instruction to retrun from exception (MOVS PC, LR) + */ +#define ARM_RETURN_FROM_EXCEPTION 0xE1B0F07E + BOOLEAN mArm =3D FALSE; BOOLEAN mRiscV =3D FALSE; STATIC UINT32 MaxFfsAlignment =3D 0; @@ -2203,23 +2221,25 @@ Returns: // if we found an SEC core entry point then generate a branch instruct= ion // to it and populate a debugger SWI entry as well if (UpdateVectorSec) { + UINT32 EntryOffset; =20 VerboseMsg("UpdateArmResetVectorIfNeeded updating ARM SEC vector"); =20 - // B SecEntryPoint - signed_immed_24 part +/-32MB offset - // on ARM, the PC is always 8 ahead, so we're not really jumping fro= m the base address, but from base address + 8 - ResetVector[0] =3D (INT32)(SecCoreEntryAddress - FvInfo->BaseAddress= - 8) >> 2; + EntryOffset =3D (INT32)(SecCoreEntryAddress - FvInfo->BaseAddress); =20 - if (ResetVector[0] > 0x00FFFFFF) { - Error(NULL, 0, 3000, "Invalid", "SEC Entry point must be within 32= MB of the start of the FV"); + if (EntryOffset > ARM_JUMP_OFFSET_MAX) { + Error(NULL, 0, 3000, "Invalid", "SEC Entry point offset above 1M= B of the start of the FV"); return EFI_ABORTED; } =20 - // Add opcode for an unconditional branch with no link. i.e.: " B Se= cEntryPoint" - ResetVector[0] |=3D ARMT_UNCONDITIONAL_JUMP_INSTRUCTION; + if (SecCoreEntryAddress & 1) { + ResetVector[0] =3D ARM_JUMP_TO_THUMB(EntryOffset); + } else { + ResetVector[0] =3D ARM_JUMP_TO_ARM(EntryOffset); + } =20 // SWI handler movs pc,lr. Just in case a debugger uses SWI - ResetVector[2] =3D 0xE1B0F07E; + ResetVector[2] =3D ARM_RETURN_FROM_EXCEPTION; =20 // Place holder to support a common interrupt handler from ROM. // Currently not supported. For this to be used the reset vector wou= ld not be in this FV --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74737): https://edk2.groups.io/g/devel/message/74737 Mute This Topic: https://groups.io/mt/82580247/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 10:07:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74738+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74738+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1620141660; cv=none; d=zohomail.com; s=zohoarc; b=KGX05iOb3QHGQVuPMCPdb1PVnmjgGhIXigSvmjj6aFzwz1rRO741nuOHYfBbJwCHi3ock+jTc+cBXoq/2hE7tzmmqq0KeGom17Ct6ADgx9QxVYlDlbyoR5oBixnGt/Espo+Ncktayl+tGLYN98/pxnzhXBd+lxigaGSPQS5hEd4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620141660; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=f5moE5lNkqsCqxLUw2hhkf0GDupGXk37NKi3XieBRD4=; b=kVD8klieKC5lXD6xbpfUEPhm6E3fpWsD1i+3bQ4kjwNrR2pZS3wcrlWrhb3N/19W8pvs3DvDlZQLxB5DjJ/87WLXmwAwVmmoAehB5KM2ZlBwmEVer6EpHyZL8aqYE5nC3IO9W/yFbdOiEeEcbIlvwTxo0Pbv5sC9y8X17/iX7t4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74738+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620141660471685.1517078228471; Tue, 4 May 2021 08:21:00 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 5M66YY1788612xv6GxYFqIw9; Tue, 04 May 2021 08:20:59 -0700 X-Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) by mx.groups.io with SMTP id smtpd.web08.7250.1620141658905294444 for ; Tue, 04 May 2021 08:20:59 -0700 X-Received: by mail-wm1-f51.google.com with SMTP id g65so5692360wmg.2 for ; Tue, 04 May 2021 08:20:58 -0700 (PDT) X-Gm-Message-State: 8NpRfPDv65QTUO76rHJiXazRx1787277AA= X-Google-Smtp-Source: ABdhPJyJovNlOuqWnblM4G0OFg80ZvwS7WSSMlhVI8RH+uGt3vd63b7jsPSR/rW9uvKtJlp01fDScA== X-Received: by 2002:a05:600c:3515:: with SMTP id h21mr4626235wmq.148.1620141657394; Tue, 04 May 2021 08:20:57 -0700 (PDT) X-Received: from lmecxl0524.lme.st.com ([2a04:cec0:11d7:652f:452f:f0ef:fb46:d5f4]) by smtp.gmail.com with ESMTPSA id c2sm2919661wmr.22.2021.05.04.08.20.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 May 2021 08:20:56 -0700 (PDT) From: "Etienne Carriere" To: devel@edk2.groups.io Cc: Achin Gupta , Ard Biesheuvel , Jiewen Yao , Leif Lindholm , Sami Mujawar , Sughosh Ganu , Etienne Carriere Subject: [edk2-devel] [PATCH 4/5] StandaloneMmPkg: fix pointer/int casts against 32bit architectures Date: Tue, 4 May 2021 17:20:47 +0200 Message-Id: <20210504152048.8739-5-etienne.carriere@linaro.org> In-Reply-To: <20210504152048.8739-1-etienne.carriere@linaro.org> References: <20210504152048.8739-1-etienne.carriere@linaro.org> Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,etienne.carriere@linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620141659; bh=w/z2vR3hTL89jZitXbHiuVLNdCwVUHPXUUAmsVK4c7o=; h=Cc:Date:From:Reply-To:Subject:To; b=po/9PvZiy8zUdC5Duxt/ub8drKVkZJ5s238hzhedMDl2EuDpsqrg2hjjP8bL8qG8cNb OCCZGC/dRyYyz8KeQcmYVlhjBzYHElh6My15xMtmtlpL65ZFaOteOcvaakhMINGQaR4Ek fykMBL5zCiX7k+Dctz+q+93CdPu0uxa9Nts= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Use intermediate (UINTN) cast when casting int from/to pointer. This is needed as UINT64 values cast from/to 32bit pointer for 32bit architectures. Cc: Achin Gupta Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Leif Lindholm Cc: Sami Mujawar Cc: Sughosh Ganu Signed-off-by: Etienne Carriere Acked-by: Jiewen Yao Reviewed-by: Sami Mujawar --- StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c = | 8 ++++---- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobList.c= | 14 +++++++------- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/StandaloneMmCor= eEntryPoint.c | 2 +- 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCp= u.c b/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c index 6884095c49..d4590bcd19 100644 --- a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c +++ b/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c @@ -164,8 +164,8 @@ StandaloneMmCpuInitialize ( =20 // Share the entry point of the CPU driver DEBUG ((DEBUG_INFO, "Sharing Cpu Driver EP *0x%lx =3D 0x%lx\n", - (UINT64) CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr, - (UINT64) PiMmStandaloneArmTfCpuDriverEntry)); + (UINTN) CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr, + (UINTN) PiMmStandaloneArmTfCpuDriverEntry)); *(CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr) =3D PiMmStandaloneArmTfC= puDriverEntry; =20 // Find the descriptor that contains the whereabouts of the buffer for @@ -180,8 +180,8 @@ StandaloneMmCpuInitialize ( return Status; } =20 - DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalStart - 0x%lx\n", (UINT64) Ns= CommBufMmramRange->PhysicalStart)); - DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalSize - 0x%lx\n", (UINT64) NsC= ommBufMmramRange->PhysicalSize)); + DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalStart - 0x%lx\n", (UINTN) NsC= ommBufMmramRange->PhysicalStart)); + DEBUG ((DEBUG_INFO, "mNsCommBuffer.PhysicalSize - 0x%lx\n", (UINTN) NsCo= mmBufMmramRange->PhysicalSize)); =20 CopyMem (&mNsCommBuffer, NsCommBufMmramRange, sizeof(EFI_MMRAM_DESCRIPTO= R)); DEBUG ((DEBUG_INFO, "mNsCommBuffer: 0x%016lx - 0x%lx\n", mNsCommBuffer.C= puStart, mNsCommBuffer.PhysicalSize)); diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/Cre= ateHobList.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/C= reateHobList.c index e8fb96bd6e..4d4cf3d5ff 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobL= ist.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobL= ist.c @@ -72,14 +72,14 @@ CreateHobListFromBootInfo ( =20 // Create a hoblist with a PHIT and EOH HobStart =3D HobConstructor ( - (VOID *) PayloadBootInfo->SpMemBase, + (VOID *) (UINTN) PayloadBootInfo->SpMemBase, (UINTN) PayloadBootInfo->SpMemLimit - PayloadBootInfo->SpM= emBase, - (VOID *) PayloadBootInfo->SpHeapBase, - (VOID *) (PayloadBootInfo->SpHeapBase + PayloadBootInfo->Sp= HeapSize) + (VOID *) (UINTN) PayloadBootInfo->SpHeapBase, + (VOID *) (UINTN) (PayloadBootInfo->SpHeapBase + PayloadBoot= Info->SpHeapSize) ); =20 // Check that the Hoblist starts at the bottom of the Heap - ASSERT (HobStart =3D=3D (VOID *) PayloadBootInfo->SpHeapBase); + ASSERT (HobStart =3D=3D (VOID *) (UINTN) PayloadBootInfo->SpHeapBase); =20 // Build a Boot Firmware Volume HOB BuildFvHob (PayloadBootInfo->SpImageBase, PayloadBootInfo->SpImageSize); @@ -190,9 +190,9 @@ CreateHobListFromBootInfo ( MmramRanges[3].RegionState =3D EFI_CACHEABLE | EFI_ALLOCATED; =20 // Base and size of heap memory shared by all cpus - MmramRanges[4].PhysicalStart =3D (EFI_PHYSICAL_ADDRESS) HobStart; - MmramRanges[4].CpuStart =3D (EFI_PHYSICAL_ADDRESS) HobStart; - MmramRanges[4].PhysicalSize =3D HobStart->EfiFreeMemoryBottom - (EFI_PH= YSICAL_ADDRESS) HobStart; + MmramRanges[4].PhysicalStart =3D (EFI_PHYSICAL_ADDRESS) (UINTN) HobStart; + MmramRanges[4].CpuStart =3D (EFI_PHYSICAL_ADDRESS) (UINTN) HobStart; + MmramRanges[4].PhysicalSize =3D HobStart->EfiFreeMemoryBottom - (EFI_PH= YSICAL_ADDRESS) (UINTN) HobStart; MmramRanges[4].RegionState =3D EFI_CACHEABLE | EFI_ALLOCATED; =20 // Base and size of heap memory shared by all cpus diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/Sta= ndaloneMmCoreEntryPoint.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPo= int/AArch64/StandaloneMmCoreEntryPoint.c index 6c50f470aa..b445d6942e 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/Standalone= MmCoreEntryPoint.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/Standalone= MmCoreEntryPoint.c @@ -328,7 +328,7 @@ _ModuleEntryPoint ( =20 // Locate PE/COFF File information for the Standalone MM core module Status =3D LocateStandaloneMmCorePeCoffData ( - (EFI_FIRMWARE_VOLUME_HEADER *) PayloadBootInfo->SpImageBase, + (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PayloadBootInfo->SpIma= geBase, &TeData, &TeDataSize ); --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#74738): https://edk2.groups.io/g/devel/message/74738 Mute This Topic: https://groups.io/mt/82580249/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 10:07:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+74739+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74739+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1620141666; cv=none; d=zohomail.com; s=zohoarc; b=Xq6FJpzMXF/39MvgKBdC7h4iZW4sY994CvfCQEQJDCTq6UtqZzxPlP+7OVcjA32h6hgOB63jbGWpEC1D399HteTnP+j8rfnjfoBWNkFaJQxJ/IHYHEBCOiYJR7nK0himbt+7QFOmw90Gxn8Z2r0OtGj+XJnKH5Q4aToWqHqM8GM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1620141666; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=oZdWh+AA1bPdC3X+B0BArxK3i9B+HzOYJxCXQ9Gejaw=; b=i49xoxVNBoFBQv2gFGZuO1SpuRUMETBxVVqK2938D6NUiiyXEb9UvgH6cR/DQeAIJMjCwEU6tINIUCmuvM7geDl2Fbbn7CfKamYRZjpFpaxCjYE5a65TpGe+MYhxWgbvDEubhLF6Yj82606+KqxRjw7FIN6p3WhtdjjwCHv6z0I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+74739+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1620141666593617.1319933778962; Tue, 4 May 2021 08:21:06 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id HZQmYY1788612xT4HaoN7msv; Tue, 04 May 2021 08:21:05 -0700 X-Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) by mx.groups.io with SMTP id smtpd.web08.7251.1620141660021653278 for ; Tue, 04 May 2021 08:21:00 -0700 X-Received: by mail-wr1-f42.google.com with SMTP id v12so9854952wrq.6 for ; Tue, 04 May 2021 08:20:59 -0700 (PDT) X-Gm-Message-State: LkGtH4Bpc26IH5uXqISPxPF2x1787277AA= X-Google-Smtp-Source: ABdhPJzlqfSJ7Nc/33dVvzUrToSOifOhM1h87hqTx7JkmFDfIrONbktCQUlC64MihcQywphbSAlf1w== X-Received: by 2002:adf:e947:: with SMTP id m7mr34038979wrn.70.1620141658448; Tue, 04 May 2021 08:20:58 -0700 (PDT) X-Received: from lmecxl0524.lme.st.com ([2a04:cec0:11d7:652f:452f:f0ef:fb46:d5f4]) by smtp.gmail.com with ESMTPSA id c2sm2919661wmr.22.2021.05.04.08.20.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 May 2021 08:20:58 -0700 (PDT) From: "Etienne Carriere" To: devel@edk2.groups.io Cc: Achin Gupta , Ard Biesheuvel , Jiewen Yao , Leif Lindholm , Sami Mujawar , Sughosh Ganu , Etienne Carriere Subject: [edk2-devel] [PATCH 5/5] StandaloneMmPkg: build for 32bit arm machines Date: Tue, 4 May 2021 17:20:48 +0200 Message-Id: <20210504152048.8739-6-etienne.carriere@linaro.org> In-Reply-To: <20210504152048.8739-1-etienne.carriere@linaro.org> References: <20210504152048.8739-1-etienne.carriere@linaro.org> Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,etienne.carriere@linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1620141665; bh=C7SThk16XAFt9vODatjJSzAnXVzOBH8KZZ4hq1MMe5Q=; h=Cc:Date:From:Reply-To:Subject:To; b=WjYWz0C9fRrFmINr2TTnFYhCIQ6O3fEP3aCW9Zyb9Nvok2ce0drxWCz0dZlPg6XpIGY lRsROvQMp8/+QHMcgxPQRwinkRXZydOq7mGe02B8jy4hg4+QHyph5aOtdUqFaT33CgJ9J 1m9RPx/ExsH5g9tx7T1N9IZ0vOohxslfyn8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This change allows to build StandaloneMmPkg components for 32bit Arm StandaloneMm firmware. This change mainly moves AArch64/ source files to Arm/ side directory for several components: StandaloneMmCpu, StandaloneMmCoreEntryPoint and StandaloneMmMemLib. The source file is built for both 32b and 64b Arm targets. Cc: Achin Gupta Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Leif Lindholm Cc: Sami Mujawar Cc: Sughosh Ganu Signed-off-by: Etienne Carriere Reviewed-by: Sami Mujawar --- StandaloneMmPkg/Core/StandaloneMmCore.inf = | 2 +- StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 =3D> }/EventHandle.c = | 12 ++++++++++-- StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 =3D> }/StandaloneMmCpu.c = | 2 +- StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 =3D> }/StandaloneMmCpu.h = | 0 StandaloneMmPkg/Drivers/StandaloneMmCpu/{AArch64 =3D> }/StandaloneMmCpu.in= f | 0 StandaloneMmPkg/Include/Library/{AArch64 =3D> Arm}/StandaloneMmCoreEntryPo= int.h | 0 StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/{AArch64 =3D> Arm}/Crea= teHobList.c | 2 +- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/{AArch64 =3D> Arm}/SetP= ermissions.c | 2 +- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/{AArch64 =3D> Arm}/Stan= daloneMmCoreEntryPoint.c | 16 ++++++++-------- StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPo= int.inf | 14 +++++++------- StandaloneMmPkg/Library/StandaloneMmCoreHobLib/{AArch64 =3D> Arm}/Standalo= neMmCoreHobLib.c | 0 StandaloneMmPkg/Library/StandaloneMmCoreHobLib/{AArch64 =3D> Arm}/Standalo= neMmCoreHobLibInternal.c | 0 StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf = | 8 ++++---- StandaloneMmPkg/Library/StandaloneMmMemLib/{AArch64/StandaloneMmMemLibInte= rnal.c =3D> ArmStandaloneMmMemLibInternal.c} | 9 ++++++++- StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf = | 6 +++--- StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf = | 2 +- StandaloneMmPkg/StandaloneMmPkg.dsc = | 8 ++++---- 17 files changed, 49 insertions(+), 34 deletions(-) diff --git a/StandaloneMmPkg/Core/StandaloneMmCore.inf b/StandaloneMmPkg/Co= re/StandaloneMmCore.inf index 87bf6e9440..56042b7b39 100644 --- a/StandaloneMmPkg/Core/StandaloneMmCore.inf +++ b/StandaloneMmPkg/Core/StandaloneMmCore.inf @@ -17,7 +17,7 @@ PI_SPECIFICATION_VERSION =3D 0x00010032 ENTRY_POINT =3D StandaloneMmMain =20 -# VALID_ARCHITECTURES =3D IA32 X64 AARCH64 +# VALID_ARCHITECTURES =3D IA32 X64 AARCH64 ARM =20 [Sources] StandaloneMmCore.c diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c = b/StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c similarity index 92% rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c index 63fbe26642..2d7fd81133 100644 --- a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/EventHandle.c +++ b/StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c @@ -2,6 +2,7 @@ =20 Copyright (c) 2016 HP Development Company, L.P. Copyright (c) 2016 - 2021, Arm Limited. All rights reserved. + Copyright (c) 2021, Linaro Limited =20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -27,6 +28,13 @@ =20 #include "StandaloneMmCpu.h" =20 +#ifdef MDE_CPU_AARCH64 +#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH= 64 +#endif +#ifdef MDE_CPU_ARM +#define ARM_SMC_ID_MM_COMMUNICATE ARM_SMC_ID_MM_COMMUNICATE_AARCH= 32 +#endif + EFI_STATUS EFIAPI MmFoundationEntryRegister ( @@ -92,8 +100,8 @@ PiMmStandaloneArmTfCpuDriverEntry ( // receipt of a synchronous MM request. Use the Event ID to distinguish // between synchronous and asynchronous events. // - if ((ARM_SMC_ID_MM_COMMUNICATE_AARCH64 !=3D EventId) && - (ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ_AARCH64 !=3D EventId)) { + if ((ARM_SMC_ID_MM_COMMUNICATE !=3D EventId) && + (ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ !=3D EventId)) { DEBUG ((DEBUG_INFO, "UnRecognized Event - 0x%x\n", EventId)); return EFI_INVALID_PARAMETER; } diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCp= u.c b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.c similarity index 96% rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu= .c rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.c index d4590bcd19..10097f792f 100644 --- a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.c +++ b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.c @@ -10,7 +10,7 @@ =20 #include #include -#include +#include #include #include #include diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCp= u.h b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.h similarity index 100% rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu= .h rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.h diff --git a/StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCp= u.inf b/StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf similarity index 100% rename from StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu= .inf rename to StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf diff --git a/StandaloneMmPkg/Include/Library/AArch64/StandaloneMmCoreEntryP= oint.h b/StandaloneMmPkg/Include/Library/Arm/StandaloneMmCoreEntryPoint.h similarity index 100% rename from StandaloneMmPkg/Include/Library/AArch64/StandaloneMmCoreEntryPo= int.h rename to StandaloneMmPkg/Include/Library/Arm/StandaloneMmCoreEntryPoint.h diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/Cre= ateHobList.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/Creat= eHobList.c similarity index 97% rename from StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/Crea= teHobList.c rename to StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/CreateHobL= ist.c index 4d4cf3d5ff..85f8194687 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/CreateHobL= ist.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/CreateHobList.c @@ -14,7 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include =20 -#include +#include #include #include #include diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/Set= Permissions.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/SetP= ermissions.c similarity index 96% rename from StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/SetP= ermissions.c rename to StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/SetPermiss= ions.c index 4a380df4a6..cd4b90823e 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/SetPermiss= ions.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/SetPermissions= .c @@ -14,7 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include =20 -#include +#include #include #include #include diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/Sta= ndaloneMmCoreEntryPoint.c b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPo= int/Arm/StandaloneMmCoreEntryPoint.c similarity index 94% rename from StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/Stan= daloneMmCoreEntryPoint.c rename to StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/Standalone= MmCoreEntryPoint.c index b445d6942e..e199e81bbd 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/AArch64/Standalone= MmCoreEntryPoint.c +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/StandaloneMmCo= reEntryPoint.c @@ -10,7 +10,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =20 #include =20 -#include +#include =20 #include #include @@ -182,13 +182,13 @@ DelegatedEventLoop ( } =20 if (FfaEnabled) { - EventCompleteSvcArgs->Arg0 =3D ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_A= ARCH64; + EventCompleteSvcArgs->Arg0 =3D ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP; EventCompleteSvcArgs->Arg1 =3D 0; EventCompleteSvcArgs->Arg2 =3D 0; - EventCompleteSvcArgs->Arg3 =3D ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64; + EventCompleteSvcArgs->Arg3 =3D ARM_SVC_ID_SP_EVENT_COMPLETE; EventCompleteSvcArgs->Arg4 =3D SvcStatus; } else { - EventCompleteSvcArgs->Arg0 =3D ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64; + EventCompleteSvcArgs->Arg0 =3D ARM_SVC_ID_SP_EVENT_COMPLETE; EventCompleteSvcArgs->Arg1 =3D SvcStatus; } } @@ -273,13 +273,13 @@ InitArmSvcArgs ( ) { if (FeaturePcdGet (PcdFfaEnable)) { - InitMmFoundationSvcArgs->Arg0 =3D ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP_= AARCH64; + InitMmFoundationSvcArgs->Arg0 =3D ARM_SVC_ID_FFA_MSG_SEND_DIRECT_RESP; InitMmFoundationSvcArgs->Arg1 =3D 0; InitMmFoundationSvcArgs->Arg2 =3D 0; - InitMmFoundationSvcArgs->Arg3 =3D ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64; + InitMmFoundationSvcArgs->Arg3 =3D ARM_SVC_ID_SP_EVENT_COMPLETE; InitMmFoundationSvcArgs->Arg4 =3D *Ret; } else { - InitMmFoundationSvcArgs->Arg0 =3D ARM_SVC_ID_SP_EVENT_COMPLETE_AARCH64; + InitMmFoundationSvcArgs->Arg0 =3D ARM_SVC_ID_SP_EVENT_COMPLETE; InitMmFoundationSvcArgs->Arg1 =3D *Ret; } } @@ -395,7 +395,7 @@ _ModuleEntryPoint ( // ProcessModuleEntryPointList (HobStart); =20 - DEBUG ((DEBUG_INFO, "Shared Cpu Driver EP 0x%lx\n", (UINT64) CpuDriverEn= tryPoint)); + DEBUG ((DEBUG_INFO, "Shared Cpu Driver EP %p\n", (void *) CpuDriverEntry= Point)); =20 finish: if (Status =3D=3D RETURN_UNSUPPORTED) { diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneM= mCoreEntryPoint.inf b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/St= andaloneMmCoreEntryPoint.inf index 4fa426f58e..1762586cfa 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEn= tryPoint.inf +++ b/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEn= tryPoint.inf @@ -21,10 +21,10 @@ # VALID_ARCHITECTURES =3D IA32 X64 IPF EBC (EBC is for build on= ly) # =20 -[Sources.AARCH64] - AArch64/StandaloneMmCoreEntryPoint.c - AArch64/SetPermissions.c - AArch64/CreateHobList.c +[Sources.AARCH64, Sources.ARM] + Arm/StandaloneMmCoreEntryPoint.c + Arm/SetPermissions.c + Arm/CreateHobList.c =20 [Sources.X64] X64/StandaloneMmCoreEntryPoint.c @@ -34,14 +34,14 @@ MdeModulePkg/MdeModulePkg.dec StandaloneMmPkg/StandaloneMmPkg.dec =20 -[Packages.AARCH64] +[Packages.ARM, Packages.AARCH64] ArmPkg/ArmPkg.dec =20 [LibraryClasses] BaseLib DebugLib =20 -[LibraryClasses.AARCH64] +[LibraryClasses.ARM, LibraryClasses.AARCH64] StandaloneMmMmuLib ArmSvcLib =20 @@ -51,7 +51,7 @@ gEfiStandaloneMmNonSecureBufferGuid gEfiArmTfCpuDriverEpDescriptorGuid =20 -[FeaturePcd.AARCH64] +[FeaturePcd.ARM, FeaturePcd.AARCH64] gArmTokenSpaceGuid.PcdFfaEnable =20 [BuildOptions] diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/AArch64/Standal= oneMmCoreHobLib.c b/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/Arm/Stan= daloneMmCoreHobLib.c similarity index 100% rename from StandaloneMmPkg/Library/StandaloneMmCoreHobLib/AArch64/Standalo= neMmCoreHobLib.c rename to StandaloneMmPkg/Library/StandaloneMmCoreHobLib/Arm/StandaloneMmCo= reHobLib.c diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/AArch64/Standal= oneMmCoreHobLibInternal.c b/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/= Arm/StandaloneMmCoreHobLibInternal.c similarity index 100% rename from StandaloneMmPkg/Library/StandaloneMmCoreHobLib/AArch64/Standalo= neMmCoreHobLibInternal.c rename to StandaloneMmPkg/Library/StandaloneMmCoreHobLib/Arm/StandaloneMmCo= reHobLibInternal.c diff --git a/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCor= eHobLib.inf b/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCo= reHobLib.inf index a2559920e8..34ed536480 100644 --- a/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib= .inf +++ b/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib= .inf @@ -22,7 +22,7 @@ LIBRARY_CLASS =3D HobLib|MM_CORE_STANDALONE =20 # -# VALID_ARCHITECTURES =3D X64 AARCH64 +# VALID_ARCHITECTURES =3D X64 AARCH64 ARM # [Sources.common] Common.c @@ -30,9 +30,9 @@ [Sources.X64] X64/StandaloneMmCoreHobLib.c =20 -[Sources.AARCH64] - AArch64/StandaloneMmCoreHobLib.c - AArch64/StandaloneMmCoreHobLibInternal.c +[Sources.AARCH64, Sources.ARM] + Arm/StandaloneMmCoreHobLib.c + Arm/StandaloneMmCoreHobLibInternal.c =20 [Packages] MdePkg/MdePkg.dec diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneM= mMemLibInternal.c b/StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandalon= eMmMemLibInternal.c similarity index 86% rename from StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMm= MemLibInternal.c rename to StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandaloneMmMemLibI= nternal.c index 4124959e04..fa7df46413 100644 --- a/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLib= Internal.c +++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/ArmStandaloneMmMemLibInter= nal.c @@ -20,6 +20,13 @@ // extern EFI_PHYSICAL_ADDRESS mMmMemLibInternalMaximumSupportAddress; =20 +#ifdef MDE_CPU_AARCH64 +#define ARM_PHYSICAL_ADDRESS_BITS 36 +#endif +#ifdef MDE_CPU_ARM +#define ARM_PHYSICAL_ADDRESS_BITS 32 +#endif + /** Calculate and save the maximum support address. =20 @@ -31,7 +38,7 @@ MmMemLibInternalCalculateMaximumSupportAddress ( { UINT8 PhysicalAddressBits; =20 - PhysicalAddressBits =3D 36; + PhysicalAddressBits =3D ARM_PHYSICAL_ADDRESS_BITS; =20 // // Save the maximum support address in one global variable diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.= inf b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf index 062b0d7a11..b29d97a746 100644 --- a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf +++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf @@ -28,7 +28,7 @@ # # The following information is for reference only and not required by the = build tools. # -# VALID_ARCHITECTURES =3D IA32 X64 AARCH64 +# VALID_ARCHITECTURES =3D IA32 X64 AARCH64 ARM # =20 [Sources.Common] @@ -37,8 +37,8 @@ [Sources.IA32, Sources.X64] X86StandaloneMmMemLibInternal.c =20 -[Sources.AARCH64] - AArch64/StandaloneMmMemLibInternal.c +[Sources.AARCH64, Sources.ARM] + ArmStandaloneMmMemLibInternal.c =20 [Packages] MdePkg/MdePkg.dec diff --git a/StandaloneMmPkg/Library/VariableMmDependency/VariableMmDepende= ncy.inf b/StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency= .inf index a2a059c5d6..ffb2a6d083 100644 --- a/StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf +++ b/StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf @@ -20,7 +20,7 @@ # # The following information is for reference only and not required by the = build tools. # -# VALID_ARCHITECTURES =3D AARCH64 +# VALID_ARCHITECTURES =3D AARCH64|ARM # # =20 diff --git a/StandaloneMmPkg/StandaloneMmPkg.dsc b/StandaloneMmPkg/Standalo= neMmPkg.dsc index 0c45df95e2..01bfbe8cc5 100644 --- a/StandaloneMmPkg/StandaloneMmPkg.dsc +++ b/StandaloneMmPkg/StandaloneMmPkg.dsc @@ -20,7 +20,7 @@ PLATFORM_VERSION =3D 1.0 DSC_SPECIFICATION =3D 0x00010011 OUTPUT_DIRECTORY =3D Build/StandaloneMm - SUPPORTED_ARCHITECTURES =3D AARCH64|X64 + SUPPORTED_ARCHITECTURES =3D AARCH64|X64|ARM BUILD_TARGETS =3D DEBUG|RELEASE SKUID_IDENTIFIER =3D DEFAULT =20 @@ -60,7 +60,7 @@ StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint= /StandaloneMmDriverEntryPoint.inf VariableMmDependency|StandaloneMmPkg/Library/VariableMmDependency/Variab= leMmDependency.inf =20 -[LibraryClasses.AARCH64] +[LibraryClasses.AARCH64, LibraryClasses.ARM] ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf StandaloneMmMmuLib|ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmL= ib.inf ArmSvcLib|ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf @@ -118,7 +118,7 @@ StandaloneMmPkg/Library/StandaloneMmMemoryAllocationLib/StandaloneMmMemo= ryAllocationLib.inf StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf =20 -[Components.AARCH64] +[Components.AARCH64, Components.ARM] StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf StandaloneMmPkg/Library/StandaloneMmPeCoffExtraActionLib/StandaloneMmPeC= offExtraActionLib.inf =20 @@ -131,7 +131,7 @@ # module style (EDK or EDKII) specified in [Compone= nts] section. # ##########################################################################= ######################### -[BuildOptions.AARCH64] +[BuildOptions.AARCH64, BuildOptions.ARM] GCC:*_*_*_DLINK_FLAGS =3D -z common-page-size=3D0x1000 -march=3Darmv8-a+no= fp -mstrict-align GCC:*_*_*_CC_FLAGS =3D -mstrict-align =20 --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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