From nobody Fri Mar 29 15:11:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+73851+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+73851+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1617889401; cv=none; d=zohomail.com; s=zohoarc; b=coDe00OCb6p62NFeGoyfKCyD81msq3tQUreSy428NQEXaCgPTSHB1DugrjqmpsfQxPDqMm5OC1MN2NCAEGclXAPuCmfplLZZcXOPq9cTAWwvaE9LX3Ct2KW7BgmFF5XbIwbAmTBWd9PkWhbo7B6n3Irdn2nrRRdpJ0u51wCH7HQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1617889401; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=TQFQtcwMUSy52EUC2cu3aUDJUE3WE4d/YpiihBdLoQ4=; b=Q64iz8l+8OWhDYUkWsL7cFJknx+10WXePr3AhmDwu6Z9TeKSYNwtl3WrMfbYb9iswQxL5eRBnjYsH3cLWnFmbc4pO/58RPzxDoeWyjotZCKWZqs2y6F606jvYnAhbK7OA3Z2nMaFx7rYu6fRrXSwpNkZUsvvqBzB4xoIUdI1GSE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+73851+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1617889401339796.933575049003; Thu, 8 Apr 2021 06:43:21 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id hwh9YY1788612xGym3ANyk0a; Thu, 08 Apr 2021 06:43:21 -0700 X-Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mx.groups.io with SMTP id smtpd.web10.8290.1617889395106903196 for ; Thu, 08 Apr 2021 06:43:15 -0700 IronPort-SDR: +tdTLrt8Hxq0eGWnz70Gl83mMGe2VB3yZSPvw8i3zcMXYmiKZy4wmFby1XFwcoF8MxcEEwudIO bG3H19QZ7/QQ== X-IronPort-AV: E=McAfee;i="6000,8403,9948"; a="190339897" X-IronPort-AV: E=Sophos;i="5.82,206,1613462400"; d="scan'208";a="190339897" X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Apr 2021 06:43:14 -0700 IronPort-SDR: daEePPhMoSF73scpJNgfDk+5XYQnYVDcJa0C3qNC2tYM2y5frk8vINwQ8pWDLtIShhlS/0KyvS GjIT/BVC54Ug== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,206,1613462400"; d="scan'208";a="422251078" X-Received: from ray-dev.ccr.corp.intel.com ([10.239.158.87]) by orsmga008.jf.intel.com with ESMTP; 08 Apr 2021 06:43:12 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Liming Gao , Eric Dong Subject: [edk2-devel] [PATCH v2] MinPlatformPkg: Add PcdMicrocodeOffsetInFv Date: Thu, 8 Apr 2021 21:42:59 +0800 Message-Id: <20210408134259.903-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: xoE0VTzWKakaI3c0Xoqk5MWPx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1617889401; bh=3m3S5CqFnZwlEgZokJyk/Z1FuItbghKY2UHmmwMep+I=; h=Cc:Date:From:Reply-To:Subject:To; b=L2mDKZMSbjTkZihRSpzy8wqNXRjsXYzkduA3KcEh0cSWG9HPGSoTsrFdT6m8diQy3MV C2VOXzUg/Fm5EfV261st6LYcg8tVtOiVc4IZtd9p45KpCVkZYHRyK+XZzjhhX+1aatf9F Q/SCqwzBOaO4ZjkRiJKcNWn0K0rPX4zWEiA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Add PcdMicrocodeOffsetInFv in MinPlatformPkg.dec and update SecFspWrapperPlatformSecLib library to use the microcode location PCDs defined in MinPlatformPkg. Signed-off-by: Ray Ni Cc: Chasel Chiu Cc: Nate DeSimone Cc: Liming Gao Cc: Eric Dong Reviewed-by: Chasel Chiu --- .../SecFspWrapperPlatformSecLib.inf | 8 ++++---- .../SecFspWrapperPlatformSecLib/SecRamInitData.c | 6 +++--- Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 10 +++++++++- 3 files changed, 16 insertions(+), 8 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapper= PlatformSecLib/SecFspWrapperPlatformSecLib.inf b/Platform/Intel/MinPlatform= Pkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSec= Lib.inf index 4f3fa9fa34..2e0d67eae4 100644 --- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor= mSecLib/SecFspWrapperPlatformSecLib.inf +++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor= mSecLib/SecFspWrapperPlatformSecLib.inf @@ -1,7 +1,7 @@ ## @file # Provide FSP wrapper platform sec related function. # -# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -88,9 +88,9 @@ gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable ## C= ONSUMES =20 [FixedPcd] - gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress ## C= ONSUMES - gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## C= ONSUMES - gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset ## C= ONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase ## C= ONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize ## C= ONSUMES + gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv ## C= ONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress ## C= ONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize ## C= ONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## C= ONSUMES diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapper= PlatformSecLib/SecRamInitData.c b/Platform/Intel/MinPlatformPkg/FspWrapper/= Library/SecFspWrapperPlatformSecLib/SecRamInitData.c index b356327b4c..355d1e6509 100644 --- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor= mSecLib/SecRamInitData.c +++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatfor= mSecLib/SecRamInitData.c @@ -1,7 +1,7 @@ /** @file Provide TempRamInitParams data. =20 -Copyright (c) 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -24,8 +24,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED CONST FSPT_UPD_CORE_DATA Fs= ptUpdDataPtr =3D { } }, { - ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32 (= PcdFlashMicrocodeOffset)), - ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet3= 2 (PcdFlashMicrocodeOffset)), + FixedPcdGet32 (PcdFlashFvMicrocodeBase) + FixedPcdGet32 (PcdMicrocodeO= ffsetInFv), + FixedPcdGet32 (PcdFlashFvMicrocodeSize) - FixedPcdGet32 (PcdMicrocodeO= ffsetInFv), 0, // Set CodeRegionBase as 0, so that caching will be 4GB-(C= odeRegionSize > LLCSize ? LLCSize : CodeRegionSize) will be used. FixedPcdGet32 (PcdFlashCodeCacheSize), { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/In= tel/MinPlatformPkg/MinPlatformPkg.dec index 2b246cf0ac..28d2b1965e 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -6,7 +6,7 @@ # INF files to generate AutoGen.c and AutoGen.h files # for the build infrastructure. # -# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -162,10 +162,18 @@ gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|= 0x10000001 gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000= 002 =20 + ## Indicates the MMIO base address of the microcode FV in flash. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|= 0x30000004 + + ## Indicates the size of the microcode FV in flash. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|= 0x30000005 + + ## Indicates the offset of the microcode FV relative to the beginning of= flash. gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT3= 2|0x30000006 =20 + ## Indicates the offset of the actual microcode content relative to the = beginning of the microcode FV. + gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv|0x90|UINT32|0x30000= 007 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|= 0x20000004 gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|= 0x20000005 gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT3= 2|0x20000006 --=20 2.27.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#73851): https://edk2.groups.io/g/devel/message/73851 Mute This Topic: https://groups.io/mt/81941954/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-