From nobody Tue Feb 10 05:44:16 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+73652+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+73652+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1617354812; cv=none; d=zohomail.com; s=zohoarc; b=i/gL5Up03/CD023+IPMvj+clKmsZn+qzE+fBTNff6TgqZr7UZmFi+SEKU9XCsKSN89qiepVNxeCAWafTVFNuvIb4QIkgMqWSqp6011I4HUzgSZWwsYsM2xF3Wq3RSUBDl/RIP95Ssg3GNOM63Rx/7KkrLSstXF5LftG9Y/wc+vg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1617354812; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=prd8dnQnkQZoklboXemjHQWIo5tVe9rU/NSUUM9jmL0=; b=nbq/5c3TgGFsCTjGsTbaAfoYR01Sa7UouDauZDlOK0sQaUZtKt/NTwJl08pE3sqc5tgjEddS3O3/PaKAsT10DBIvrFLcr0tbnqTzD44O9qHLsXK16Sa+6jtHJWwkWwvY0czo6VMwu0Z4itwfv6nGWdwwiHv/07NSDJkNddabAP4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+73652+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 16173548122231007.1906115758728; Fri, 2 Apr 2021 02:13:32 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id OrdRYY1788612xPf6JGpWHq5; Fri, 02 Apr 2021 02:13:31 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.13600.1617354806178514117 for ; Fri, 02 Apr 2021 02:13:26 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CA4AF11FB; Fri, 2 Apr 2021 02:13:20 -0700 (PDT) X-Received: from usa.arm.com (a074742.blr.arm.com [10.162.16.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 679933F792; Fri, 2 Apr 2021 02:13:19 -0700 (PDT) From: "Pranav Madhu" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar Subject: [edk2-devel] [edk2-platforms][PATCH V1 2/8] Platform/Sgi: ACPI PPTT table for SGI-575 platform Date: Fri, 2 Apr 2021 14:42:02 +0530 Message-Id: <20210402091208.16752-3-pranav.madhu@arm.com> In-Reply-To: <20210402091208.16752-1-pranav.madhu@arm.com> References: <20210402091208.16752-1-pranav.madhu@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pranav.madhu@arm.com X-Gm-Message-State: 066xV8XUHMBhV60IcQpc8i8dx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1617354811; bh=TKhhYeiAAlne80Z3ckDLwyVHTjs6Qu1k8pzlp3+v6Vw=; h=Cc:Date:From:Reply-To:Subject:To; b=HOTx1cYSO/WBQg5B1jaNUAX5yjJ336y+Fo67CQPhMtmvdXqI2AZg/nAWGX1RjGlhj1f odUiuHQfxK16BOIP3yJm0P7tINuJbLs9NzMeW8eFYGfOTV652jhjXgh8BFzZtUW6iincx EWyxsIEkSHpELp8iCPD+S10B8FAvKlvmxjA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Pranav Madhu The SGI-575 platform includes two clusters with four single-thread CPUs. Each of the CPUs include 64KB L1 Data cache, 64KB L1 Instruction cache and 512KB L2 cache. Each cluster includes a 2MB L3 cache. Add PPTT table for SGI-575 platform with this information. Signed-off-by: Pranav Madhu --- .../SgiPkg/AcpiTables/Sgi575AcpiTables.inf | 3 +- .../ARM/SgiPkg/AcpiTables/Sgi575/Pptt.aslc | 161 ++++++++++++++++++ 2 files changed, 163 insertions(+), 1 deletion(-) create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Pptt.aslc diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf b/Platform= /ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf index 2121fd39f2f0..b1ee16e98ea3 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf @@ -1,7 +1,7 @@ ## @file # ACPI table data and ASL sources required to boot the platform. # -# Copyright (c) 2018, ARM Ltd. All rights reserved. +# Copyright (c) 2018 - 2021, ARM Ltd. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,7 @@ Mcfg.aslc Sgi575/Dsdt.asl Sgi575/Madt.aslc + Sgi575/Pptt.aslc Spcr.aslc Ssdt.asl =20 diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Pptt.aslc b/Platform/ARM= /SgiPkg/AcpiTables/Sgi575/Pptt.aslc new file mode 100644 index 000000000000..043482ee3b9a --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Pptt.aslc @@ -0,0 +1,161 @@ +/** @file +* Processor Properties Topology Table (PPTT) for SGI-575 platform +* +* This file describes the topological structure of the processor block on = the +* SGI-575 platform in the form as defined by ACPI PPTT table. The SGI-575 +* platform includes two clusters with four single-thread CPUS. Each of the= CPUs +* include 64KB L1 Data cache, 64KB L1 Instruction cache and 512KB L2 cache. +* Each cluster includes a 2MB L3 cache. +* +* Copyright (c) 2021, ARM Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +* @par Specification Reference: +* - ACPI 6.3, Chapter 5, Section 5.2.29, Processor Properties Topology T= able +**/ + +#include +#include +#include +#include + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" + +#define PPTT_CORE_INIT(pid, cid, coreId) = \ + { = \ + /* Parameters for CPU Core */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + __builtin_offsetof (RD_PPTT_CORE, DCache), /* Length */ = \ + PPTT_PROCESSOR_CORE_FLAGS, /* Flag */ = \ + __builtin_offsetof (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE= , \ + Package.Cluster[cid]), /* Parent */ = \ + ((pid << 3) | (cid << 2) | coreId), /* ACPI Id */ = \ + 2 /* Num of private resour= ce */\ + ), = \ + = \ + /* Offsets of the private resources */ = \ + { = \ + __builtin_offsetof (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE= , \ + Package.Cluster[cid].Core[coreId].DCache), = \ + __builtin_offsetof (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE= , \ + Package.Cluster[cid].Core[coreId].ICache) = \ + }, = \ + = \ + /* L1 Data Cache Parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + __builtin_offsetof (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE= , \ + Package.Cluster[cid].Core[coreId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 64, /* Num of sets */ = \ + 16, /* Associativity */ = \ + PPTT_DATA_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L1 Instruction Cache Parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + __builtin_offsetof (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE= , \ + Package.Cluster[cid].Core[coreId].L2Cache), = \ + /* Next level of cache */ = \ + SIZE_64KB, /* Size */ = \ + 256, /* Num of sets */ = \ + 4, /* Associativity */ = \ + PPTT_INST_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* L2 Cache Parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_512KB, /* Size */ = \ + 1024, /* Num of sets */ = \ + 8, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + } + +#define PPTT_CLUSTER_INIT(pid, cid) = \ + { = \ + /* Parameters for Cluster */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( = \ + __builtin_offsetof (RD_PPTT_CLUSTER, L3Cache), = \ + /* Length */ = \ + PPTT_PROCESSOR_CLUSTER_FLAGS, /* Flag */ = \ + __builtin_offsetof (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE= , \ + Package), /* Parent */ = \ + 0, /* ACPI Id */ = \ + 1 /* Num of private resource */ = \ + ), = \ + = \ + /* Offsets of the private resources */ = \ + __builtin_offsetof (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, = \ + Package.Cluster[cid].L3Cache), = \ + = \ + /* L3 Cache Parameters */ = \ + EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT ( = \ + PPTT_CACHE_STRUCTURE_FLAGS, /* Flag */ = \ + 0, /* Next level of cache */ = \ + SIZE_2MB, /* Size */ = \ + 2048, /* Num of sets */ = \ + 16, /* Associativity */ = \ + PPTT_UNIFIED_CACHE_ATTR, /* Attributes */ = \ + 64 /* Line size */ = \ + ), = \ + = \ + /* Initialize child cores */ = \ + { = \ + PPTT_CORE_INIT (pid, cid, 0), = \ + PPTT_CORE_INIT (pid, cid, 1), = \ + PPTT_CORE_INIT (pid, cid, 2), = \ + PPTT_CORE_INIT (pid, cid, 3) = \ + } = \ + } + +#pragma pack(1) +typedef struct { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Package; + RD_PPTT_CLUSTER Cluster[CLUSTER_COUNT]; +} SGI575_PPTT_PACKAGE; + +/* + * Processor Properties Topology Table + */ +typedef struct { + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Header; + SGI575_PPTT_PACKAGE Package; +} EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE; +#pragma pack () + +STATIC EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE Pptt =3D { + { + ARM_ACPI_HEADER ( + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE, + EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION + ) + }, + + { + EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT ( + __builtin_offsetof (SGI575_PPTT_PACKAGE, Cluster[0]), + PPTT_PROCESSOR_PACKAGE_FLAGS, 0, 0, 0 + ), + { + PPTT_CLUSTER_INIT (0, 0), + PPTT_CLUSTER_INIT (0, 1) + } + } +}; + +/* + * Reference the table being generated to prevent the optimizer from remov= ing + * the data structure from the executable + */ +VOID* CONST ReferenceAcpiTable =3D &Pptt; --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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