From nobody Mon Feb 9 23:16:11 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+72830+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+72830+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1615842156; cv=none; d=zohomail.com; s=zohoarc; b=dL03njUCfI/L7LjZehHv0XJebEc2k83rxFN4jcFxq9ZGxtjnA22xL5g2bi9aJrGUTxaq8Qr5l6iVDLuGPF5jscE1PcesVWdGAqGZnp4phlDbhkKis8VyU5KuY61kH5PCMaWWL9bZbeKuJkLfGAMLRF4AuvVdQXlX1YK3Lt1t7M0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615842156; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=wkNp9Mt8wlFeNWNBpPEKP2L4/ht0r4utz0HIoAMyn+o=; b=bRgzIe1TJ6som+FmiY1bTVfdOooQQdUky/ROqJSJhRfOO/b1GxOUGZ9k/eo/jxkbXNxQkoOO4KzAkqF1m0/5v4CwBJIVd3Z1QxlAqzgWGKvnUh4fdM8xLTR9TdMASp6p65i8445VKFJAJ/63Hs/LL3q51QLhgEvhoKvYkquqo90= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+72830+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1615842156468113.17210047258095; Mon, 15 Mar 2021 14:02:36 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 7UdSYY1788612xgHjPgV5Q3E; Mon, 15 Mar 2021 14:02:36 -0700 X-Received: from zg8tmja5ljk3lje4mi4ymjia.icoremail.net (zg8tmja5ljk3lje4mi4ymjia.icoremail.net [209.97.182.222]) by mx.groups.io with SMTP id smtpd.web09.6574.1615546935395452910 for ; Fri, 12 Mar 2021 03:02:15 -0800 X-Received: from localhost.localdomain (unknown [223.104.131.160]) by c1app4 (Coremail) with SMTP id BAINCgC3mwEVSktgMY01BQ--.34795S18; Fri, 12 Mar 2021 19:02:10 +0800 (CST) From: Ling Jia To: devel@edk2.groups.io Cc: Leif Lindholm , Peng Xie , Yiqi Shu , Ling Jia Subject: [edk2-devel] [PATCH v3 41/46] Silicon/Phytium: Added PciHostBridgeLib to FT2000/4 Date: Fri, 12 Mar 2021 19:01:36 +0800 Message-Id: <20210312110141.75749-17-jialing@phytium.com.cn> In-Reply-To: <20210312110141.75749-1-jialing@phytium.com.cn> References: <20210312110141.75749-1-jialing@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: BAINCgC3mwEVSktgMY01BQ--.34795S18 X-Coremail-Antispam: 1UD129KBjvJXoWxtw1rWFWxWr1rGF4UGryUKFg_yoWfZF1rpw 4Utan8X345X3Wjvw48A3s2gF43Aa9Fkw45Jr43Xw17ZFyfXF4kJrsFka43Wa4jq3WDXw4x WF1YqFyfu3ZYgaUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUm014x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JF0E3s1l82xGYI kIc2x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2 z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr1j6F 4UJwA2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26rxl 6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6x IIjxv20xvE14v26r106r15McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_ Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7MxkF7I0En4kS14v26r 126r1DMxkIecxEwVAFwVW8KwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8 JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1V AFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVW8JVW5JwCI42IY6xII jxv20xvEc7CjxVAFwI0_Gr1j6F4UJwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcV C2z280aVAFwI0_Gr0_Cr1lIxAIcVC2z280aVCY1x0267AKxVW8Jr0_Cr1UYxBIdaVFxhVj vjDU0xZFpf9x0JUk8nOUUUUU= X-Originating-IP: [223.104.131.160] X-CM-SenderInfo: xmldzxdqj61x51wl3zoofrzhdfq/ Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jialing@phytium.com.cn X-Gm-Message-State: B33iIONXpWluT0eFYJBm9WQZx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1615842156; bh=48FPA778YunDeGAFmntTtdWqyJRlh5frLug+6lCFDPg=; h=Cc:Date:From:Reply-To:Subject:To; b=U5J8ILPHnY1psEI3e99c508eVwN26HsOkV+9p7Es+HtnyNT6KeF8n8wSlql614NVu/D P7WPofjwfhcFODQdSJS8dGxLLiKJ72VLapty0B5IVV8gjPvM+xQ0hBp58C7SWQPtsJxd3 +BdOhjHCK+vmInEc5e0q3/o/klQGMSzNlYY= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The Pci host bridge library is mainly to get Pci bridge information. v3: Optimize the codes of PciHostBridgeLib.c to conform to specifications. Signed-off-by: Ling Jia Reviewed-by: Leif Lindholm --- Platform/Phytium/DurianPkg/DurianPkg.dsc = | 9 + Platform/Phytium/DurianPkg/DurianPkg.fdf = | 6 + Silicon/Phytium/FT2000-4Pkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf = | 47 +++++ Silicon/Phytium/FT2000-4Pkg/Library/PciHostBridgeLib/PciHostBridgeLib.c = | 181 ++++++++++++++++++++ 4 files changed, 243 insertions(+) diff --git a/Platform/Phytium/DurianPkg/DurianPkg.dsc b/Platform/Phytium/Du= rianPkg/DurianPkg.dsc index 093b2cd9dbd4..3a9bc2289cf3 100644 --- a/Platform/Phytium/DurianPkg/DurianPkg.dsc +++ b/Platform/Phytium/DurianPkg/DurianPkg.dsc @@ -37,6 +37,7 @@ [LibraryClasses.common] [LibraryClasses.common.DXE_DRIVER] # Pci dependencies PciSegmentLib|Silicon/Phytium/FT2000-4Pkg/Library/PciSegmentLib/PciSegme= ntLib.inf + PciHostBridgeLib|Silicon/Phytium/FT2000-4Pkg/Library/PciHostBridgeLib/Pc= iHostBridgeLib.inf =20 ##########################################################################= ###### # @@ -263,6 +264,14 @@ [Components.common] MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf =20 + # + # PCI Support + # + ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf + MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf + MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf + MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDevic= eDxe.inf + # # The following 2 module perform the same work except one operate variab= le. # Only one of both should be put into fdf. diff --git a/Platform/Phytium/DurianPkg/DurianPkg.fdf b/Platform/Phytium/Du= rianPkg/DurianPkg.fdf index 3106a43fb744..a443d0f3a4ac 100644 --- a/Platform/Phytium/DurianPkg/DurianPkg.fdf +++ b/Platform/Phytium/DurianPkg/DurianPkg.fdf @@ -135,6 +135,12 @@ [FV.FvMain] INF FatPkg/EnhancedFatDxe/Fat.inf INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.i= nf =20 + # + # PCI Support + # + INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf + INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf + # # SATA Controller # diff --git a/Silicon/Phytium/FT2000-4Pkg/Library/PciHostBridgeLib/PciHostBr= idgeLib.inf b/Silicon/Phytium/FT2000-4Pkg/Library/PciHostBridgeLib/PciHostB= ridgeLib.inf new file mode 100644 index 000000000000..0e6f0797b0fe --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Library/PciHostBridgeLib/PciHostBridgeLib= .inf @@ -0,0 +1,47 @@ +#/** @file +# PCI Host Bridge Library instance for Phytium SOC. +# +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION =3D 0x0001001b + BASE_NAME =3D PciHostBridgeLib + FILE_GUID =3D f965de0e-40fe-11eb-8290-3f9d1f895a80 + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D PciHostBridgeLib|DXE_DRIVER + +# +# The following information is for reference only and not required by the = build +# tools. +# +# VALID_ARCHITECTURES =3D ARM AARCH64 +# + +[Sources] + PciHostBridgeLib.c + +[Packages] + ArmPkg/ArmPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec + +[LibraryClasses] + DebugLib + +[Guids] + +[FixedPcd] + gArmTokenSpaceGuid.PcdPciBusMin + gArmTokenSpaceGuid.PcdPciBusMax + gArmTokenSpaceGuid.PcdPciIoBase + gArmTokenSpaceGuid.PcdPciIoSize + gArmTokenSpaceGuid.PcdPciMmio32Base + gArmTokenSpaceGuid.PcdPciMmio32Size + gArmTokenSpaceGuid.PcdPciMmio64Base + gArmTokenSpaceGuid.PcdPciMmio64Size diff --git a/Silicon/Phytium/FT2000-4Pkg/Library/PciHostBridgeLib/PciHostBr= idgeLib.c b/Silicon/Phytium/FT2000-4Pkg/Library/PciHostBridgeLib/PciHostBri= dgeLib.c new file mode 100644 index 000000000000..8ed3516749a1 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Library/PciHostBridgeLib/PciHostBridgeLib= .c @@ -0,0 +1,181 @@ +/** @file + PCI host bridge library instance for Phytium SOC. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include + +#pragma pack(1) + +typedef struct { + ACPI_HID_DEVICE_PATH AcpiDevicePath; + EFI_DEVICE_PATH_PROTOCOL EndDevicePath; +} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH; + +#pragma pack () + +#define END_DEVICE_PATH_DEF { END_DEVICE_PATH_TYPE, \ + END_ENTIRE_DEVICE_PATH_SUBTYPE, \ + { END_DEVICE_PATH_LENGTH, 0 } \ + } + +#define ACPI_DEVICE_PATH_DEF(UID) {{ ACPI_DEVICE_PATH, ACPI_DP, \ + { (UINT8) (sizeof (ACPI_HID_DEVICE_PA= TH)), \ + (UINT8) (sizeof (ACPI_HID_DEVICE_PA= TH) >> 8)} \ + }, \ + EISA_PNP_ID (0x0A03), UID \ + } + +STATIC CONST EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[]= =3D { + { + ACPI_DEVICE_PATH_DEF (0), + END_DEVICE_PATH_DEF + }, +}; + +GLOBAL_REMOVE_IF_UNREFERENCED +CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] =3D { + L"Mem", L"I/O", L"Bus" +}; + +STATIC PCI_ROOT_BRIDGE mRootBridge =3D { + 0, // Segment + 0, // Supports + 0, // Attributes + TRUE, // DmaAbove4G + FALSE, // NoExtendedConfigSpace + FALSE, // ResourceAssigned + EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM | // AllocationAttributes + EFI_PCI_HOST_BRIDGE_MEM64_DECODE, + { + // Bus + FixedPcdGet32 (PcdPciBusMin), + FixedPcdGet32 (PcdPciBusMax) + }, { + // Io + FixedPcdGet64 (PcdPciIoBase), + FixedPcdGet64 (PcdPciIoBase) + FixedPcdGet64 (PcdPciIoSize) - 1 + }, { + // Mem + FixedPcdGet32 (PcdPciMmio32Base), + FixedPcdGet32 (PcdPciMmio32Base) + (FixedPcdGet32 (PcdPciMmio32Size) -= 1) + //0x7FFFFFFF + }, { + // MemAbove4G + FixedPcdGet64 (PcdPciMmio64Base), + FixedPcdGet64 (PcdPciMmio64Base) + FixedPcdGet64 (PcdPciMmio64Size) - 1 + }, { + // PMem + MAX_UINT64, + 0 + }, { + // PMemAbove4G + MAX_UINT64, + 0 + }, + (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath +}; + +/** + Return all the root bridge instances in an array. + + @param[out] Count Return the count of root bridge instances. + + @return All the root bridge instances in an array. + The array should be passed into PciHostBridgeFreeRootBridges() + when it's not used. + +**/ +PCI_ROOT_BRIDGE * +EFIAPI +PciHostBridgeGetRootBridges ( + OUT UINTN *Count + ) +{ + *Count =3D 1; + return &mRootBridge; +} + + +/** + Free the root bridge instances array returned from PciHostBridgeGetRootB= ridges(). + + @param[in] Bridges The root bridge instances array. + @param[in] Count The count of the array. + +**/ +VOID +EFIAPI +PciHostBridgeFreeRootBridges ( + IN PCI_ROOT_BRIDGE *Bridges, + IN UINTN Count + ) +{ + +} + + +/** + Inform the platform that the resource conflict happens. + + @param[in] HostBridgeHandle Handle of the Host Bridge. + @param[in] Configuration Pointer to PCI I/O and PCI memory resource + descriptors. The Configuration contains the reso= urces + for all the root bridges. The resource for each = root + bridge is terminated with END descriptor and an + additional END is appended indicating the end of= the + entire resources. The resource descriptor field + values follow the description in + EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL + SubmitResources(). + +**/ +VOID +EFIAPI +PciHostBridgeResourceConflict ( + IN EFI_HANDLE HostBridgeHandle, + IN VOID *Configuration + ) +{ + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor; + BOOLEAN IsPrefetchable; + + Descriptor =3D (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration; + while (Descriptor->Desc =3D=3D ACPI_ADDRESS_SPACE_DESCRIPTOR) { + for (; Descriptor->Desc =3D=3D ACPI_ADDRESS_SPACE_DESCRIPTOR; Descript= or++) { + ASSERT (Descriptor->ResType < + ARRAY_SIZE (mPciHostBridgeLibAcpiAddressSpaceTypeStr)); + DEBUG ((DEBUG_INFO, " %s: Length/Alignment =3D 0x%lx / 0x%lx\n", + mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType= ], + Descriptor->AddrLen, + Descriptor->AddrRangeMax + )); + if (Descriptor->ResType =3D=3D ACPI_ADDRESS_SPACE_TYPE_MEM) { + + IsPrefetchable =3D (Descriptor->SpecificFlag & + EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE) != =3D 0; + + DEBUG ((DEBUG_INFO, " Granularity/SpecificFlag =3D %ld / %02x%= s\n", + Descriptor->AddrSpaceGranularity, + Descriptor->SpecificFlag, + (IsPrefetchable) ? L" (Prefetchable)" : L"" + )); + } + } + // + // Skip the end descriptor for root bridge + // + ASSERT (Descriptor->Desc =3D=3D ACPI_END_TAG_DESCRIPTOR); + Descriptor =3D (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) ( + (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1 + ); + } +} --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#72830): https://edk2.groups.io/g/devel/message/72830 Mute This Topic: https://groups.io/mt/81361287/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-