From nobody Mon Nov 25 12:54:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+72810+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+72810+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1615842151; cv=none; d=zohomail.com; s=zohoarc; b=PGHVC6enX4520JW+vTdycpbllD7OSjZsS12/EGJveyhjCLQFWEVszMZrWsunaH8s7MlrVdhrhjC8Sv6I63xo74C9tQfUAVLSSjDZO44piWwswRqK4N8zwui6zztWo3RjEwUxRSVHxCRQpVk8B2+at84IyNMxezH61mYAAuCOK9w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615842151; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=0B4JNmTU2JOc5gojHmT5+fT5tWdT4G+u3mYZ7WdOKy8=; b=BFsJa41yHTvD69lWzLBskmbgEmYB0vFwEBqEHmtO2HdwXQ1jF+h2P7DRUHBIH6mPSC2cNb1TwcnK2yZCE9tdHbs7W531I27hz+23LGSXcAg42lqjs20WSHJFJ9ueqx/eGpd0uH/Wv+0lCtlM/Llrj1dWew4GE+hpzT1GFukS0ZM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+72810+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1615842151225936.0290948759558; Mon, 15 Mar 2021 14:02:31 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id KTF4YY1788612xQg6rJ3PdhQ; Mon, 15 Mar 2021 14:02:30 -0700 X-Received: from zg8tmty1ljiyny4xntqumjca.icoremail.net (zg8tmty1ljiyny4xntqumjca.icoremail.net [165.227.154.27]) by mx.groups.io with SMTP id smtpd.web11.6619.1615546635009233045 for ; Fri, 12 Mar 2021 02:57:15 -0800 X-Received: from localhost.localdomain (unknown [223.104.131.160]) by c1app11 (Coremail) with SMTP id CwINCgD3GAbgSEtgauKHAw--.20002S3; Fri, 12 Mar 2021 18:57:06 +0800 (CST) From: Ling Jia To: devel@edk2.groups.io Cc: Leif Lindholm , Peng Xie , Yiqi Shu , Takuto Naito , Sai Chaganty , Nate DeSimone , Heng Luo Subject: [edk2-devel] [PATCH v3 01/46] TigerlakeOpenBoardPkg: Fix build errors with GCC5 Date: Fri, 12 Mar 2021 18:55:33 +0800 Message-Id: <20210312105618.75605-2-jialing@phytium.com.cn> In-Reply-To: <20210312105618.75605-1-jialing@phytium.com.cn> References: <20210312105618.75605-1-jialing@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: CwINCgD3GAbgSEtgauKHAw--.20002S3 X-Coremail-Antispam: 1UD129KBjvJXoWxKF4UtrykJr17ZFW8tF1rtFb_yoWxZF1fpr WDJr47A34rWr4a9r47Xa48CF1qyFWDJw1rJ3yrZw18XwnIyws7AFn0ya4fZ3y3ArnxtFyx uF4j9w47CFsFqr7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUBYb7Iv0xC_Kw4lb4IE77IF4wAFF20E14v26r4j6ryUM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28IrcIa0xkI8VA2jI 8067AKxVWUGwA2048vs2IY020Ec7CjxVAFwI0_Jrv_JF4l8cAvFVAK0II2c7xJM28CjxkF 64kEwVA0rcxSw2x7M28EF7xvwVC0I7IYx2IY67AKxVWUJVWUCwA2z4x0Y4vE2Ix0cI8IcV CY1x0267AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv 6xkF7I0E14v26rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c 02F40Ex7xfMcIj6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE 4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41lc2xSY4AK67AK6r4DMxAIw28IcxkI7V AKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCj r7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUtVW8ZwCIc40Y0x0EwIxGrwCI42IY6x IIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY6xAI w20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x 0267AKxVW8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa7IU5DgA7UUUUU== X-Originating-IP: [223.104.131.160] X-CM-SenderInfo: xmldzxdqj61x51wl3zoofrzhdfq/ Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jialing@phytium.com.cn X-Gm-Message-State: K2tT4Y4LhJolyLApnkvejWgqx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1615842150; bh=ab8PhmI/95t3yfbdYONJFZVtNznZEDvpvzVhBKbDBrg=; h=Cc:Date:From:Reply-To:Subject:To; b=msFq/45U5SzjHpHaXAl3Mga4qv5ywLJToPgDaAQMDxusYW2hwh5JrYEoRU1g1Tta23A hbkSqlqjyG07hMj72LJxWArM5ZhFVJi4r3GCxERcIyaY1UHbtre7xJOy4CnPfr01ksaKk LVj5wgeoFcmQ9ho9jEZMq4yAAGDJhaFS8lU= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Takuto Naito REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3224 - Fix the path of TigerLakeFspBinPkg - Fix misuse of RETURN_ERROR - Remove unused function CheckNationalSio. Cc: Sai Chaganty Cc: Nate DeSimone Cc: Heng Luo Signed-off-by: Takuto Naito Reviewed-by: Heng Luo Reviewed-by: Nate DeSimone --- Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLi= b/PeiFspPolicyInitLib.inf | 2 +- Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatf= ormHookLib.c | 188 -------------------- Platform/Intel/TigerlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyUpdate= Lib/DxeSiliconPolicyUpdateLate.c | 2 +- 3 files changed, 2 insertions(+), 190 deletions(-) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFsp= PolicyInitLib/PeiFspPolicyInitLib.inf b/Platform/Intel/TigerlakeOpenBoardPk= g/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPolicyInitLib.inf index 9d85d855f501..708fbac08fd6 100644 --- a/Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyI= nitLib/PeiFspPolicyInitLib.inf +++ b/Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyI= nitLib/PeiFspPolicyInitLib.inf @@ -52,7 +52,7 @@ [Packages] MdeModulePkg/MdeModulePkg.dec IntelFsp2Pkg/IntelFsp2Pkg.dec TigerlakeSiliconPkg/SiPkg.dec - TigerLakeFspBinPkg/TigerLakeFspBinPkg.dec + TigerLakeFspBinPkg/Client/TigerLakeFspBinPkg.dec TigerlakeOpenBoardPkg/OpenBoardPkg.dec UefiCpuPkg/UefiCpuPkg.dec IntelSiliconPkg/IntelSiliconPkg.dec diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookL= ib/BasePlatformHookLib.c b/Platform/Intel/TigerlakeOpenBoardPkg/Library/Bas= ePlatformHookLib/BasePlatformHookLib.c index 6209e5045061..cc5337698b8a 100644 --- a/Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/Base= PlatformHookLib.c +++ b/Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/Base= PlatformHookLib.c @@ -94,194 +94,6 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_SIO_TABLE mSioTableWi= nbond_x374[] =3D { {0x30, 0x01} // Enable it with Activation bit }; =20 -/** - Detect if a National 393 SIO is docked. If yes, enable the docked SIO - and its serial port, and disable the onboard serial port. - - @retval EFI_SUCCESS Operations performed successfully. -**/ -STATIC -VOID -CheckNationalSio ( - VOID - ) -{ - UINT8 Data8; - - // - // Pc87393 access is through either (0x2e, 0x2f) or (0x4e, 0x4f). - // We use (0x2e, 0x2f) which is determined by BADD default strapping - // - - // - // Read the Pc87393 signature - // - IoWrite8 (0x2e, 0x20); - Data8 =3D IoRead8 (0x2f); - - if (Data8 =3D=3D 0xea) { - // - // Signature matches - National PC87393 SIO is docked - // - - // - // Enlarge the LPC decode scope to accommodate the Docking LPC Switch - // Register (SIO_DOCKING_LPC_SWITCH_REGISTER_ADDRESS is allocated at - // SIO_BASE_ADDRESS + 0x10) - // - PchLpcGenIoRangeSet ((FixedPcdGet16 (PcdSioBaseAddress) & (UINT16)~0x7= F), 0x20); - - // - // Enable port switch - // - IoWrite8 (SIO_DOCKING_LPC_SWITCH_REGISTER_ADDRESS, 0x06); - - // - // Turn on docking power - // - IoWrite8 (FixedPcdGet16 (PcdSioBaseAddress) + 0x0E, 0x8c); - - IoWrite8 (FixedPcdGet16 (PcdSioBaseAddress) + 0x0E, 0x9c); - - IoWrite8 (FixedPcdGet16 (PcdSioBaseAddress) + 0x0E, 0xBc); - - // - // Enable port switch - // - IoWrite8 (SIO_DOCKING_LPC_SWITCH_REGISTER_ADDRESS, 0x7); - - // - // GPIO setting - // - IoWrite8 (0x2e, 0x24); - IoWrite8 (0x2f, 0x29); - - // - // Enable chip clock - // - IoWrite8 (0x2e, 0x29); - IoWrite8 (0x2f, 0x1e); - - - // - // Enable serial port - // - - // - // Select com1 - // - IoWrite8 (0x2e, 0x7); - IoWrite8 (0x2f, 0x3); - - // - // Base address: 0x3f8 - // - IoWrite8 (0x2e, 0x60); - IoWrite8 (0x2f, 0x03); - IoWrite8 (0x2e, 0x61); - IoWrite8 (0x2f, 0xf8); - - // - // Interrupt: 4 - // - IoWrite8 (0x2e, 0x70); - IoWrite8 (0x2f, 0x04); - - // - // Enable bank selection - // - IoWrite8 (0x2e, 0xf0); - IoWrite8 (0x2f, 0x82); - - // - // Activate - // - IoWrite8 (0x2e, 0x30); - IoWrite8 (0x2f, 0x01); - - // - // Disable onboard serial port - // - IoWrite8 (FixedPcdGet16 (PcdLpcSioConfigDefaultPort), 0x55); - - // - // Power Down UARTs - // - IoWrite8 (PcdGet16 (PcdLpcSioIndexPort), 0x2); - IoWrite8 (PcdGet16 (PcdLpcSioDataPort), 0x00); - - // - // Dissable COM1 decode - // - IoWrite8 (PcdGet16 (PcdLpcSioIndexPort), 0x24); - IoWrite8 (PcdGet16 (PcdLpcSioDataPort), 0); - - // - // Disable COM2 decode - // - IoWrite8 (PcdGet16 (PcdLpcSioIndexPort), 0x25); - IoWrite8 (PcdGet16 (PcdLpcSioDataPort), 0); - - // - // Disable interrupt - // - IoWrite8 (PcdGet16 (PcdLpcSioIndexPort), 0x28); - IoWrite8 (PcdGet16 (PcdLpcSioDataPort), 0x0); - - IoWrite8 (FixedPcdGet16 (PcdLpcSioConfigDefaultPort), 0xAA); - - // - // Enable floppy - // - - // - // Select floppy - // - IoWrite8 (0x2e, 0x7); - IoWrite8 (0x2f, 0x0); - - // - // Base address: 0x3f0 - // - IoWrite8 (0x2e, 0x60); - IoWrite8 (0x2f, 0x03); - IoWrite8 (0x2e, 0x61); - IoWrite8 (0x2f, 0xf0); - - // - // Interrupt: 6 - // - IoWrite8 (0x2e, 0x70); - IoWrite8 (0x2f, 0x06); - - // - // DMA 2 - // - IoWrite8 (0x2e, 0x74); - IoWrite8 (0x2f, 0x02); - - // - // Activate - // - IoWrite8 (0x2e, 0x30); - IoWrite8 (0x2f, 0x01); - - } else { - - // - // No National pc87393 SIO is docked, turn off dock power and - // disable port switch - // - // IoWrite8 (SIO_BASE_ADDRESS + 0x0E, 0xbf); - // IoWrite8 (0x690, 0); - - // - // If no National pc87393, just return - // - return ; - } -} - /** Check whether the IT8628 SIO present on LPC. If yes, enable its serial por= ts =20 diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Policy/Library/DxeSilicon= PolicyUpdateLib/DxeSiliconPolicyUpdateLate.c b/Platform/Intel/TigerlakeOpen= BoardPkg/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSiliconPolicyUpdateLat= e.c index 2eee9958beea..410a8d1073a9 100644 --- a/Platform/Intel/TigerlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyU= pdateLib/DxeSiliconPolicyUpdateLate.c +++ b/Platform/Intel/TigerlakeOpenBoardPkg/Policy/Library/DxeSiliconPolicyU= pdateLib/DxeSiliconPolicyUpdateLate.c @@ -88,8 +88,8 @@ SiliconPolicyUpdateLate ( // GOP Dxe Policy Initialization // Status =3D GopPolicyInitDxe (gImageHandle); - RETURN_ERROR (Status); DEBUG ((DEBUG_INFO, "GOP Dxe Policy Initialization done\n")); + ASSERT_EFI_ERROR (Status); } =20 return Policy; --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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