From nobody Mon Nov 25 11:51:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+72811+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+72811+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1615842075; cv=none; d=zohomail.com; s=zohoarc; b=e7y4GXMORj8qkyxlWxGNDm7tMT/2EbXd8NyANZHIpEeX2EoV00bcoB11FPrjrkFj3OVvIhCLot6O46Uu6LkNUyKW3jd8aBFp3uQC7AszYN38tsBdKioHTZtDFs4/VBwV2cKBauOWwOECoezpHJWs+PQRm9jePP8fVszsga2nN6I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1615842075; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=YzYTTempuafa6RdJ5ektwRW/nHXxCnUv54itnf4bQw8=; b=X+WzVwuHx3z1yCxE1QRftJOUJBUOBBnXzSGtkv8LSQywDBB6I02Iz0nTKEk3FZ/ZRVfqSDuLstlik/XpW5ibKaSNgYTqdLGo3eFAt6JZSMFCsNRzEl2vUJENF2RjfPHD3znRTPegXZXaXojNEiycgsjBeatlpXcQwbeB1rLgEwA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+72811+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1615842074747476.5092180184473; Mon, 15 Mar 2021 14:01:14 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id jyUXYY1788612xLoqSLaKJlj; Mon, 15 Mar 2021 14:01:14 -0700 X-Received: from zg8tmty1ljiyny4xntqumjca.icoremail.net (zg8tmty1ljiyny4xntqumjca.icoremail.net [165.227.154.27]) by mx.groups.io with SMTP id smtpd.web10.6584.1615546758743007438 for ; Fri, 12 Mar 2021 02:59:19 -0800 X-Received: from localhost.localdomain (unknown [223.104.131.160]) by c1app11 (Coremail) with SMTP id CwINCgD3GAbgSEtgauKHAw--.20002S4; Fri, 12 Mar 2021 18:59:15 +0800 (CST) From: Ling Jia To: devel@edk2.groups.io Cc: Leif Lindholm , Peng Xie , Yiqi Shu , Ling Jia Subject: [edk2-devel] [PATCH v3 14/46] Silicon/Phytium: Added Acpi support to FT2000/4 Date: Fri, 12 Mar 2021 18:55:46 +0800 Message-Id: <20210312105618.75605-15-jialing@phytium.com.cn> In-Reply-To: <20210312105618.75605-1-jialing@phytium.com.cn> References: <20210312105618.75605-1-jialing@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: CwINCgD3GAbgSEtgauKHAw--.20002S4 X-Coremail-Antispam: 1UD129KBjvAXoWDXry5uFyDKw1xCrWkCryfZwb_yoW7Jw4xZo WI93Z2g3y8Gr4kZw40v3yDKFWUur1fuayYyrn3u398ZF9xXw13tF97Xa13Xryaqr1DKrnx GrWxta4rAF4xK34kn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUYt7AC8VAFwI0_Xr0_Wr1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l82xGYIkIc2x26280x7IE14v26r15M28IrcIa0x kI8VCY1x0267AKxVW8JVW5JwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK021l84AC jcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j6F4UM2 8EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_GcCE3s1l e2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI 8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwAC jcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lc2xSY4AK67AK6r4DMxAIw2 8IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4l x2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrw CI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI 42IY6xAIw20EY4v20xvaj40_Zr0_Wr1UMIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4 A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0JU7GYJUUUUU= X-Originating-IP: [223.104.131.160] X-CM-SenderInfo: xmldzxdqj61x51wl3zoofrzhdfq/ Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jialing@phytium.com.cn X-Gm-Message-State: GSsKMgyWbagrMDpdyiVYBOz7x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1615842074; bh=Hbfr0rjcHME0wh21PoR10w2DUX9/jm4ja47xn2H/H0M=; h=Cc:Date:From:Reply-To:Subject:To; b=Os03MUX1HmX8O/QAuBJXaz/PjqKR0CpvCN0rziG+x1OulS3mwLdQjVBKedUXqO68Jn2 0Gt/1aLKK/2/uEOka2bJnUbT8w1cz0vqXHDCPoVWPLl808byjA8VXcEppnZaQ7RbxpUAI t4d/CCMalk/xW1vAXaWnKClGbav4t5qQLnE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Added Acpi driver and table to FT2000/4, the ACPI Tables providing library AcpiTables.inf uses a lot of information that is available in the form of PCDs for differnt platforms. v3: Optimize code to conform to specifications. Signed-off-by: Ling Jia Reviewed-by: Leif Lindholm --- Platform/Phytium/DurianPkg/DurianPkg.dsc = | 6 + Platform/Phytium/DurianPkg/DurianPkg.fdf = | 7 + Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/AcpiTables.inf = | 56 +++++ Silicon/Phytium/PhytiumCommonPkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.i= nf | 53 +++++ Silicon/Phytium/PhytiumCommonPkg/Include/Platform.h = | 80 +++++++ Silicon/Phytium/PhytiumCommonPkg/Drivers/AcpiPlatformDxe/AcpiPlatform.c = | 250 ++++++++++++++++++++ Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/AcpiSsdtRootPci.asl = | 209 ++++++++++++++++ Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dbg2.aslc = | 80 +++++++ Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dsdt/Cpu.asl = | 85 +++++++ Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dsdt/Dsdt.asl = | 15 ++ Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dsdt/Uart.asl = | 65 +++++ Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Fadt.aslc = | 77 ++++++ Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Gtdt.aslc = | 83 +++++++ Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Iort.aslc = | 89 +++++++ Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Madt.aslc = | 67 ++++++ Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Mcfg.aslc = | 65 +++++ Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Pptt.aslc = | 219 +++++++++++++++++ Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Spcr.aslc = | 73 ++++++ 18 files changed, 1579 insertions(+) diff --git a/Platform/Phytium/DurianPkg/DurianPkg.dsc b/Platform/Phytium/Du= rianPkg/DurianPkg.dsc index b523ecd6584b..6f38acb6361c 100644 --- a/Platform/Phytium/DurianPkg/DurianPkg.dsc +++ b/Platform/Phytium/DurianPkg/DurianPkg.dsc @@ -279,6 +279,12 @@ [Components.common] # MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf =20 + # + # ACPI Support + # + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/AcpiTables.inf + Silicon/Phytium/PhytiumCommonPkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe= .inf =20 # # Bds diff --git a/Platform/Phytium/DurianPkg/DurianPkg.fdf b/Platform/Phytium/Du= rianPkg/DurianPkg.fdf index 9d75b072c6dc..f435f7cb51c2 100644 --- a/Platform/Phytium/DurianPkg/DurianPkg.fdf +++ b/Platform/Phytium/DurianPkg/DurianPkg.fdf @@ -111,6 +111,13 @@ [FV.FvMain] =20 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf =20 + # + # ACPI Support + # + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + INF RuleOverride=3DACPITABLE Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTab= les/AcpiTables.inf + INF Silicon/Phytium/PhytiumCommonPkg/Drivers/AcpiPlatformDxe/AcpiPlatfor= mDxe.inf + # # Multiple Console IO support # diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/AcpiTables.inf = b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/AcpiTables.inf new file mode 100644 index 000000000000..e3fd86f19733 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/AcpiTables.inf @@ -0,0 +1,56 @@ +#/** @file +# +# ACPI table data and ASL sources required to boot the platform. +# +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION =3D 0x0001001b + BASE_NAME =3D AcpiTables + FILE_GUID =3D 7E374E25-8E01-4FEE-87F2-390C23C606CD + MODULE_TYPE =3D USER_DEFINED + VERSION_STRING =3D 1.0 + +[Sources] + AcpiSsdtRootPci.asl + Dsdt/Dsdt.asl + Fadt.aslc + Iort.aslc + Gtdt.aslc + Madt.aslc + Mcfg.aslc + Pptt.aslc + Spcr.aslc + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec + +[FixedPcd] + gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase + gArmTokenSpaceGuid.PcdGicRedistributorsBase + + gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum + + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase + + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate + gArmPlatformTokenSpaceGuid.PL011UartClkInHz + gArmPlatformTokenSpaceGuid.PL011UartInterrupt + + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase + gArmPlatformTokenSpaceGuid.PcdWatchdogCount diff --git a/Silicon/Phytium/PhytiumCommonPkg/Drivers/AcpiPlatformDxe/AcpiP= latformDxe.inf b/Silicon/Phytium/PhytiumCommonPkg/Drivers/AcpiPlatformDxe/A= cpiPlatformDxe.inf new file mode 100644 index 000000000000..0f6d46fdba91 --- /dev/null +++ b/Silicon/Phytium/PhytiumCommonPkg/Drivers/AcpiPlatformDxe/AcpiPlatform= Dxe.inf @@ -0,0 +1,53 @@ +#/** @file +# Sample ACPI Platform Driver. +# +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION =3D 0x0001001b + BASE_NAME =3D AcpiPlatform + FILE_GUID =3D d51068e8-40dc-11eb-9322-1f6d234e9e6e + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D AcpiPlatformEntryPoint + +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D IA32 X64 IPF EBC +# + +[Sources] + AcpiPlatform.c + +[Packages] + ArmPkg/ArmPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec + +[LibraryClasses] + BaseMemoryLib + DebugLib + DxeServicesLib + UefiLib + UefiBootServicesTableLib + UefiDriverEntryPoint + +[Guids] + +[Protocols] + gEfiAcpiTableProtocolGuid ## CONSUMES + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile ## CONSUMES + +[FixedPcd] + gArmTokenSpaceGuid.PcdGicRedistributorsBase + +[Depex] + gEfiAcpiTableProtocolGuid diff --git a/Silicon/Phytium/PhytiumCommonPkg/Include/Platform.h b/Silicon/= Phytium/PhytiumCommonPkg/Include/Platform.h new file mode 100644 index 000000000000..d5e3907e377a --- /dev/null +++ b/Silicon/Phytium/PhytiumCommonPkg/Include/Platform.h @@ -0,0 +1,80 @@ +/** @file + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef PHYTIUM_H_ +#define PHYTIUM_H_ + +#include + +#define EFI_ACPI_6_1_GIC_ITS_INIT(GicITSHwId, GicITSBase) = \ + { = \ + EFI_ACPI_6_1_GIC_ITS, sizeof (EFI_ACPI_6_1_GIC_ITS_STRUCTURE), EFI_ACP= I_RESERVED_WORD, \ + GicITSHwId, GicITSBase, EFI_ACPI_RESERVED_DWORD = \ + } + +#define EFI_ACPI_5_1_GICR_STRUCTURE_INIT( = \ + GicRBase, GicRlength) = \ + { = \ + EFI_ACPI_5_1_GICR, sizeof (EFI_ACPI_5_1_GICR_STRUCTURE), EFI_ACPI_RESE= RVED_WORD, \ + GicRBase, GicRlength = \ + } + +#define EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT( = \ + ProximityDomain, ACPIProcessorUID, Flags, ClockDomain) = \ + { = \ + 3, sizeof (EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE),ProximityDomain , = \ + ACPIProcessorUID, Flags, ClockDomain = \ + } + +#define EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE_INIT( = \ + ProximityDomain, AddressBaseLow, AddressBaseHigh, LengthLow, LengthHig= h, Flags) \ + { = \ + 1, sizeof (EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE),ProximityDomain , E= FI_ACPI_RESERVED_WORD, \ + AddressBaseLow, AddressBaseHigh, LengthLow, LengthHigh, EFI_ACPI_RESER= VED_DWORD, Flags, \ + EFI_ACPI_RESERVED_QWORD = \ + } + +#define EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, = PmuIrq, \ + GicBase, GicVBase, GicHBase, GsivId, GicRBase, ProcessorPowerEfficienc= yClass) \ + { = \ + EFI_ACPI_6_1_GIC, sizeof (EFI_ACPI_6_1_GIC_STRUCTURE), EFI_ACPI_RESERV= ED_WORD, \ + GicId, AcpiCpuUid, Flags, 0, PmuIrq, 0, GicBase, GicVBase, GicHBase, = \ + GsivId, GicRBase, Mpidr, ProcessorPowerEfficiencyClass, {0, 0, 0} = \ + } + +#define EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, GicDis= tVector, GicVersion) \ + { = \ + EFI_ACPI_6_1_GICD, sizeof (EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE), EF= I_ACPI_RESERVED_WORD, \ + GicDistHwId, GicDistBase, GicDistVector, GicVersion, = \ + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYT= E} \ + } + +// +// ACPI table information used to initialize tables. +// +#define EFI_ACPI_PHYTIUM_OEM_ID 'F','T','-','L','T','D' = // OEMID 6 bytes long +#define EFI_ACPI_PHYTIUM_OEM_TABLE_ID SIGNATURE_64('P','H','Y','T','I'= ,'U','M',' ') // OEM table id 8 bytes long +#define EFI_ACPI_PHYTIUM_OEM_REVISION 0x20201111 +#define EFI_ACPI_PHYTIUM_CREATOR_ID SIGNATURE_32('P','H','Y','T') +#define EFI_ACPI_PHYTIUM_CREATOR_REVISION 0x20201111 + +// A macro to initialise the common header part of EFI ACPI tables as defi= ned by +// EFI_ACPI_DESCRIPTION_HEADER structure. +#define PHYTIUM_ACPI_HEADER(Signature, Type, Revision) { \ + Signature, /* UINT32 Signature */ \ + sizeof (Type), /* UINT32 Length */ \ + Revision, /* UINT8 Revision */ \ + 0, /* UINT8 Checksum */ \ + { EFI_ACPI_PHYTIUM_OEM_ID }, /* UINT8 OemId[6] */ \ + EFI_ACPI_PHYTIUM_OEM_TABLE_ID, /* UINT64 OemTableId */ \ + EFI_ACPI_PHYTIUM_OEM_REVISION, /* UINT32 OemRevision */ \ + EFI_ACPI_PHYTIUM_CREATOR_ID, /* UINT32 CreatorId */ \ + EFI_ACPI_PHYTIUM_CREATOR_REVISION /* UINT32 CreatorRevision */ \ + } + +#endif diff --git a/Silicon/Phytium/PhytiumCommonPkg/Drivers/AcpiPlatformDxe/AcpiP= latform.c b/Silicon/Phytium/PhytiumCommonPkg/Drivers/AcpiPlatformDxe/AcpiPl= atform.c new file mode 100644 index 000000000000..c48ed74f5386 --- /dev/null +++ b/Silicon/Phytium/PhytiumCommonPkg/Drivers/AcpiPlatformDxe/AcpiPlatform= .c @@ -0,0 +1,250 @@ +/** @file + Sample ACPI Platform Driver. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/** + Locate the first instance of a protocol. If the protocol requested is an + FV protocol, then it will return the first FV that contains the ACPI tab= le + storage file. + + @param[out] Instance Return pointer to the first instance of th= e protocol. + + @return EFI_SUCCESS The function completed successfully. + + @return EFI_NOT_FOUND The protocol could not be located. + + @return EFI_OUT_OF_RESOURCES There are not enough resources to find the= protocol. + +**/ +EFI_STATUS +LocateFvInstanceWithTables ( + OUT EFI_FIRMWARE_VOLUME2_PROTOCOL **Instance + ) +{ + EFI_STATUS Status; + EFI_HANDLE *HandleBuffer; + UINTN NumberOfHandles; + EFI_FV_FILETYPE FileType; + UINT32 FvStatus; + EFI_FV_FILE_ATTRIBUTES Attributes; + UINTN Size; + UINTN Index; + EFI_FIRMWARE_VOLUME2_PROTOCOL *FvInstance; + + FvStatus =3D 0; + + // + // Locate protocol. + // + Status =3D gBS->LocateHandleBuffer ( + ByProtocol, + &gEfiFirmwareVolume2ProtocolGuid, + NULL, + &NumberOfHandles, + &HandleBuffer + ); + if (EFI_ERROR (Status)) { + // + // Defined errors at this time are not found and out of resources. + // + return Status; + } + + // + // Looking for FV with ACPI storage file + // + + for (Index =3D 0; Index < NumberOfHandles; Index++) { + // + // Get the protocol on this handle + // This should not fail because of LocateHandleBuffer + // + Status =3D gBS->HandleProtocol ( + HandleBuffer[Index], + &gEfiFirmwareVolume2ProtocolGuid, + (VOID **)&FvInstance + ); + ASSERT_EFI_ERROR (Status); + + // + // See if it has the ACPI storage file + // + Status =3D FvInstance->ReadFile ( + FvInstance, + (EFI_GUID *)PcdGetPtr (PcdAcpiTableStorageFile), + NULL, + &Size, + &FileType, + &Attributes, + &FvStatus + ); + + // + // If we found it, then we are done + // + if (Status =3D=3D EFI_SUCCESS) { + *Instance =3D FvInstance; + break; + } + } + + // + // Free any allocated buffers + // + gBS->FreePool (HandleBuffer); + + return Status; +} + + +/** + This function calculates and updates an UINT8 checksum. + + @param[in] Buffer Pointer to buffer to checksum. + + @param[in] Size Number of bytes to checksum. + +**/ +VOID +AcpiPlatformChecksum ( + IN UINT8 *Buffer, + IN UINTN Size + ) +{ + UINTN ChecksumOffset; + + ChecksumOffset =3D OFFSET_OF (EFI_ACPI_DESCRIPTION_HEADER, Checksum); + + // + // Set checksum to 0 first + // + Buffer[ChecksumOffset] =3D 0; + + // + // Update checksum value + // + Buffer[ChecksumOffset] =3D CalculateCheckSum8 (Buffer, Size); +} + + +/** + This function is the entrypoint of the acpi platform. + + @param[in] ImageHandle The firmware allocated handle for the EFI imag= e. + + @param[in] SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS The entry point is executed successfully. + + @retval other Some error occurs when executing this entry po= int. + +**/ +EFI_STATUS +EFIAPI +AcpiPlatformEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_ACPI_TABLE_PROTOCOL *AcpiTable; + EFI_FIRMWARE_VOLUME2_PROTOCOL *FwVol; + INTN Instance; + EFI_ACPI_COMMON_HEADER *CurrentTable; + UINTN TableHandle; + UINT32 FvStatus; + UINTN TableSize; + UINTN Size; + + Instance =3D 0; + CurrentTable =3D NULL; + TableHandle =3D 0; + + // + // Find the AcpiTable protocol + // + Status =3D gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID = **)&AcpiTable); + if (EFI_ERROR (Status)) { + return EFI_ABORTED; + } + + // + // Locate the firmware volume protocol + // + Status =3D LocateFvInstanceWithTables (&FwVol); + if (EFI_ERROR (Status)) { + return EFI_ABORTED; + } + // + // Read tables from the storage file. + // + while (Status =3D=3D EFI_SUCCESS) { + + Status =3D FwVol->ReadSection ( + FwVol, + (EFI_GUID *)PcdGetPtr (PcdAcpiTableStorageFile), + EFI_SECTION_RAW, + Instance, + (VOID **)&CurrentTable, + &Size, + &FvStatus + ); + if ( ! EFI_ERROR (Status)) { + // + // Add the table + // + TableHandle =3D 0; + + TableSize =3D ((EFI_ACPI_DESCRIPTION_HEADER *) CurrentTable)->Length; + ASSERT (Size >=3D TableSize); + + // + // Checksum ACPI table + // + AcpiPlatformChecksum ((UINT8 *)CurrentTable, TableSize); + + // + // Install ACPI table + // + Status =3D AcpiTable->InstallAcpiTable ( + AcpiTable, + CurrentTable, + TableSize, + &TableHandle + ); + + // + // Free memory allocated by ReadSection + // + gBS->FreePool (CurrentTable); + + if (EFI_ERROR (Status)) { + return EFI_ABORTED; + } + + // + // Increment the instance + // + Instance++; + CurrentTable =3D NULL; + } + } + + return EFI_SUCCESS; +} + diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/AcpiSsdtRootPci= .asl b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/AcpiSsdtRootPci.asl new file mode 100644 index 000000000000..667f8cc8fb65 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/AcpiSsdtRootPci.asl @@ -0,0 +1,209 @@ +/** @file + Phytium ACPI ASL Sources. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include + +#define LNK_DEVICE(Unique_Id, Link_Name, irq) = \ + Device (Link_Name) { = \ + Name (_HID, EISAID ("PNP0C0F")) = \ + Name (_UID, Unique_Id) = \ + Name (_PRS, ResourceTemplate () { = \ + Interrupt (ResourceProducer, Level, ActiveHigh, Exclusive) { irq }= \ + }) = \ + Method (_CRS, 0) { Return (_PRS) } = \ + Method (_SRS, 1) { } = \ + Method (_DIS) { } = \ + } + +#define PRT_ENTRY(Address, Pin, Link) \ + Package (4) { \ + Address, \ + Pin, \ + Link, \ + Zero \ + } + +#define ROOT_PRT_ENTRY(Dev, Pin, Link) PRT_ENTRY(Dev * 0x10000 + 0xFFFF,= Pin, Link) + + +DefinitionBlock ("SsdtPci.aml", "SSDT", 2, "FT-LTD", "PHYTIUM ", EFI_ACPI_= PHYTIUM_OEM_REVISION) { + Scope (_SB) { + // + // PCI Root Complex + // + LNK_DEVICE (1, LNKA, 60) + LNK_DEVICE (2, LNKB, 61) + LNK_DEVICE (3, LNKC, 62) + LNK_DEVICE (4, LNKD, 63) + + // reserve ECAM memory range + Device (RES0) + { + Name (_HID, EISAID ("PNP0C02")) + Name (_UID, 0) + Name (_CRS, ResourceTemplate () { + QWordMemory (ResourceConsumer, PosDecode, MinFixed, MaxFixed, Cach= eable, ReadWrite, + 0x0, // Granularity + 0x40000000, // Range Minimum + 0x4FFFFFFF, // Range Maximum + 0, // Translation Offset + 0x10000000, // Length + ,,) + }) + } + + Device (PCI0) + { + Name (_HID, EISAID ("PNP0A08")) // PCI Express Root Bridge + Name (_CID, EISAID ("PNP0A03")) // Compatible PCI Root Bridge + Name (_SEG, Zero) // PCI Segment Group number + Name (_BBN, 0) // PCI Base Bus Number + Name (_CCA, 1) + + // Root Complex + Device (RP0) { + Name (_ADR, 0x00000000) // Dev 0, Func 0 + } + // PCI Routing Table + Name (_PRT, Package () { + ROOT_PRT_ENTRY (0, 0, LNKA), // INTA + ROOT_PRT_ENTRY (0, 1, LNKB), // INTB + ROOT_PRT_ENTRY (0, 2, LNKC), // INTC + ROOT_PRT_ENTRY (0, 3, LNKD), // INTD + + ROOT_PRT_ENTRY (1, 0, LNKA), // INTA + ROOT_PRT_ENTRY (1, 1, LNKB), // INTB + ROOT_PRT_ENTRY (1, 2, LNKC), // INTC + ROOT_PRT_ENTRY (1, 3, LNKD), // INTD + + ROOT_PRT_ENTRY (2, 0, LNKA), // INTA + ROOT_PRT_ENTRY (2, 1, LNKB), // INTB + ROOT_PRT_ENTRY (2, 2, LNKC), // INTC + ROOT_PRT_ENTRY (2, 3, LNKD), // INTD + + ROOT_PRT_ENTRY (3, 0, LNKA), // INTA + ROOT_PRT_ENTRY (3, 1, LNKB), // INTB + ROOT_PRT_ENTRY (3, 2, LNKC), // INTC + ROOT_PRT_ENTRY (3, 3, LNKD), // INTD + + ROOT_PRT_ENTRY (4, 0, LNKA), // INTA + ROOT_PRT_ENTRY (4, 1, LNKB), // INTB + ROOT_PRT_ENTRY (4, 2, LNKC), // INTC + ROOT_PRT_ENTRY (4, 3, LNKD), // INTD + + ROOT_PRT_ENTRY (5, 0, LNKA), // INTA + ROOT_PRT_ENTRY (5, 1, LNKB), // INTB + ROOT_PRT_ENTRY (5, 2, LNKC), // INTC + ROOT_PRT_ENTRY (5, 3, LNKD), // INTD + }) + + // Root complex resources + Method (_CRS, 0, Serialized) { + Name (RBUF, ResourceTemplate () { + WordBusNumber ( + ResourceProducer, + MinFixed, MaxFixed, PosDecode, + 0, // AddressGranularity + 0, // AddressMinimum - Minimum Bus Number + 255, // AddressMaximum - Maximum Bus Number + 0, // AddressTranslation - Set to 0 + 256 // RangeLength - Number of Busses + ) + + DWordMemory ( // 32-bit BAR Windows + ResourceProducer, PosDecode, + MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x58000000, // Min Base Address + 0x7FFFFFFF, // Max Base Address + 0x00000000, // Translate + 0x28000000 // Length + ) + + QWordMemory ( // 64-bit BAR Windows + ResourceProducer, PosDecode, + MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x1000000000, // Min Base Address + 0x1FFFFFFFFF, // Max Base Address + 0x0000000000, // Translate + 0x1000000000 // Length + ) + + DWordIo ( // IO window + ResourceProducer, + MinFixed, + MaxFixed, + PosDecode, + EntireRange, + 0x00000000, // Granularity + 0x00000000, // Min Base Address + 0x00efffff, // Max Base Address + 0x50000000, // Translate + 0x00f00000, // Length + ,,, TypeTranslation + ) + }) // Name(RBUF) + + Return (RBUF) + } // Method(_CRS) + + // + // OS Control Handoff + // + Name (SUPP, Zero) // PCI _OSC Support Field value + Name (CTRL, Zero) // PCI _OSC Control Field value + + /* + See [1] 6.2.10, [2] 4.5 + */ + Method (_OSC, 4) { + // Check for proper UUID + If (LEqual (Arg0, ToUUID ("33DB4D5B-1FF7-401C-9657-7441C03DD766"))= ) { + // Create DWord-adressable fields from the Capabilities Buffer + CreateDWordField (Arg3, 0, CDW1) + CreateDWordField (Arg3, 4, CDW2) + CreateDWordField (Arg3, 8, CDW3) + + // Save Capabilities DWord2 & 3 + Store (CDW2, SUPP) + Store (CDW3, CTRL) + + // Only allow native hot plug control if OS supports: + // * ASPM + // * Clock PM + // * MSI/MSI-X + If (LNotEqual (And (SUPP, 0x16), 0x16)) { + And (CTRL, 0x1E, CTRL) // Mask bit 0 (and undefined bits) + } + + // Do not allow native PME, AER (no dependencies) + // Never allow SHPC (no SHPC controller in this system) + And (CTRL, 0x10, CTRL) + + If (LNotEqual (Arg1, One)) { // Unknown revision + Or (CDW1, 0x08, CDW1) + } + + If (LNotEqual (CDW3, CTRL)) { // Capabilities bits were masked + Or (CDW1, 0x10, CDW1) + } + // Update DWORD3 in the buffer + Store (CTRL, CDW3) + Return (Arg3) + } Else { + Or (CDW1, 4, CDW1) // Unrecognized UUID + Return (Arg3) + } + } + } + } +} diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dbg2.aslc b/Sil= icon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dbg2.aslc new file mode 100644 index 000000000000..5349f6364b3d --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dbg2.aslc @@ -0,0 +1,80 @@ +/** @file + Phytium ACPI ASL Sources. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include + +#define NUMBER_DEBUG_DEVICE_INFO 1 +#define NUMBER_OF_GENERIC_ADDRESS 1 +#define NAMESPACE_STRING_SIZE 8 + +#pragma pack(1) + +typedef struct { + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT DdiHeader; + EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE Address[NUMBER_OF_GENERIC_ADDRESS= ]; + UINT32 AddressSize[NUMBER_OF_GENERIC_ADDRESS]; + CHAR8 NamespaceString[NAMESPACE_STRING_SIZE]; +} EFI_ACPI_DBG2_DDI_STRUCT; + +typedef struct { + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Desc; + EFI_ACPI_DBG2_DDI_STRUCT Ddi[NUMBER_DEBUG_DEVICE_INFO]; +} EFI_ACPI_DEBUG_PORT_2_TABLE; + +#pragma pack() + +EFI_ACPI_DEBUG_PORT_2_TABLE Dbg2 =3D { + { + PHYTIUM_ACPI_HEADER ( + EFI_ACPI_6_1_DEBUG_PORT_2_TABLE_SIGNATURE, + EFI_ACPI_DEBUG_PORT_2_TABLE, + EFI_ACPI_DEBUG_PORT_2_TABLE_REVISION + ), + OFFSET_OF (EFI_ACPI_DEBUG_PORT_2_TABLE, Ddi), + NUMBER_DEBUG_DEVICE_INFO + }, + { + { + { + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, + sizeof (EFI_ACPI_DBG2_DDI_STRUCT), + NUMBER_OF_GENERIC_ADDRESS, + NAMESPACE_STRING_SIZE, + OFFSET_OF (EFI_ACPI_DBG2_DDI_STRUCT, NamespaceString), + 0, + 0, + EFI_ACPI_DBG2_PORT_TYPE_SERIAL, + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART, + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, + OFFSET_OF (EFI_ACPI_DBG2_DDI_STRUCT, Address), + OFFSET_OF (EFI_ACPI_DBG2_DDI_STRUCT, AddressSize), + }, + { + { + EFI_ACPI_6_1_SYSTEM_MEMORY, + 32, + 0, + EFI_ACPI_6_1_DWORD, + FixedPcdGet64 (PcdSerialRegisterBase) + } + }, + { + 0x1000 + }, + "COM0" + } + } +}; + +VOID * CONST ReferenceAcpiTable =3D &Dbg2; diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dsdt/Cpu.asl b/= Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dsdt/Cpu.asl new file mode 100644 index 000000000000..219a129fa540 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dsdt/Cpu.asl @@ -0,0 +1,85 @@ +/** @file + Phytium ACPI ASL Sources. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +Scope (_SB) +{ + Device (CLU0) { + Name (_HID, "ACPI0010") + Name (_UID, 0) + Method (_STA, 0, NotSerialized) { + Return (0x0F) + } + Device (CPU0) { + Name (_HID, "ACPI0007") + Name (_UID, 0) + Name (_DSD, Package () { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () {"clock-name", "c0"}, + Package () {"clock-domain", 0}, + } + }) + Method (_STA, 0, NotSerialized) { + Return (0x0F) + } + } + + Device (CPU1) { + Name (_HID, "ACPI0007") + Name (_UID, 1) + Name (_DSD, Package () { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () {"clock-name", "c0"}, + Package () {"clock-domain", 0}, + } + }) + Method (_STA, 0, NotSerialized) { + Return (0x0F) + } + } + } + + Device (CLU1) { + Name (_HID, "ACPI0010") + Name (_UID, 1) + Method (_STA, 0, NotSerialized) { + Return (0x0F) + } + Device (CPU2) { + Name (_HID, "ACPI0007") + Name (_UID, 2) + Name (_DSD, Package () { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () {"clock-name", "c1"}, + Package () {"clock-domain", 1}, + } + }) + Method (_STA, 0, NotSerialized) { + Return (0x0F) + } + } + + Device (CPU3) { + Name (_HID, "ACPI0007") + Name (_UID, 3) + Name (_DSD, Package () { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () {"clock-name", "c1"}, + Package () {"clock-domain", 1}, + } + }) + Method (_STA, 0, NotSerialized) { + Return (0x0F) + } + } + } +} diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dsdt/Dsdt.asl b= /Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dsdt/Dsdt.asl new file mode 100644 index 000000000000..b21431ca36dc --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dsdt/Dsdt.asl @@ -0,0 +1,15 @@ +/** @file + Phytium ACPI ASL Sources. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include + +DefinitionBlock ("DsdtTable.aml", "DSDT", 2, "FT-LTD", "PHYTIUM ", EFI_ACP= I_PHYTIUM_OEM_REVISION) { + include ("Cpu.asl") + include ("Uart.asl") +} diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dsdt/Uart.asl b= /Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dsdt/Uart.asl new file mode 100644 index 000000000000..25752036b550 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Dsdt/Uart.asl @@ -0,0 +1,65 @@ +/** @file + Phytium ACPI ASL Sources. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +Scope (_SB) +{ + //UART 0 + Device (UAR0) { + Name (_HID, "ARMH0011") + Name (_UID, 0) + Name (_CRS, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x28000000, 0x1000) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 38 } + }) + + Method (_STA, 0, NotSerialized) { + Return (0x0F) + } + } + + //UART 1 + Device (UAR1) { + Name (_HID, "ARMH0011") + Name (_UID, 1) + Name (_CRS, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x28001000, 0x1000) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {39} + }) + + Method (_STA, 0, NotSerialized) { Return (0x0F) } + } + + //UART 2 + Device (UAR2) { + Name (_HID, "ARMH0011") + Name (_UID, 2) + Name (_CRS, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x28002000, 0x1000) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {40} + }) + + Method (_STA, 0, NotSerialized) { + Return (0x0F) + } + } + + //UART 3 + Device (UAR3) { + Name (_HID, "ARMH0011") + Name (_UID, 3) + Name (_CRS, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x28003000, 0x1000) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {41} + }) + + Method (_STA, 0, NotSerialized) { + Return (0x0F) + } + } +} diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Fadt.aslc b/Sil= icon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Fadt.aslc new file mode 100644 index 000000000000..10612c136876 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Fadt.aslc @@ -0,0 +1,77 @@ +/** @file + Phytium ACPI ASL Sources. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include + +EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt =3D { + PHYTIUM_ACPI_HEADER ( + EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE, + EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION + ), + 0, = // UINT32 FirmwareCtrl + 0, = // UINT32 Dsdt + EFI_ACPI_RESERVED_BYTE, = // UINT8 Reserved0 + EFI_ACPI_6_1_PM_PROFILE_ENTERPRISE_SERVER, = // UINT8 PreferredPmProfile + 0, = // UINT16 SciInt + 0, = // UINT32 SmiCmd + 0, = // UINT8 AcpiEnable + 0, = // UINT8 AcpiDisable + 0, = // UINT8 S4BiosReq + 0, = // UINT8 PstateCnt + 0, = // UINT32 Pm1aEvtBlk + 0, = // UINT32 Pm1bEvtBlk + 0, = // UINT32 Pm1aCntBlk + 0, = // UINT32 Pm1bCntBlk + 0, = // UINT32 Pm2CntBlk + 0, = // UINT32 PmTmrBlk + 0, = // UINT32 Gpe0Blk + 0, = // UINT32 Gpe1Blk + 0, = // UINT8 Pm1EvtLen + 0, = // UINT8 Pm1CntLen + 0, = // UINT8 Pm2CntLen + 0, = // UINT8 PmTmrLen + 0, = // UINT8 Gpe0BlkLen + 0, = // UINT8 Gpe1BlkLen + 0, = // UINT8 Gpe1Base + 0, = // UINT8 CstCnt + 0, = // UINT16 PLvl2Lat + 0, = // UINT16 PLvl3Lat + 0, = // UINT16 FlushSize + 0, = // UINT16 FlushStride + 0, = // UINT8 DutyOffset + 0, = // UINT8 DutyWidth + 0, = // UINT8 DayAlrm + 0, = // UINT8 MonAlrm + 0, = // UINT8 Century + 0, = // UINT16 IaPcBootArch + 0, = // UINT8 Reserved1 + EFI_ACPI_6_1_HW_REDUCED_ACPI | EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE, = // UINT32 Flags + NULL_GAS, // EFI_A= CPI_6_1__GENERIC_ADDRESS_STRUCTURE ResetReg + 0, // UINT8= ResetValue + EFI_ACPI_6_1_ARM_PSCI_COMPLIANT, // UINT1= 6 ArmBootArchFlags + EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // UINT8= MinorRevision + 0, // UINT6= 4 XFirmwareCtrl + 0, // UINT6= 4 XDsdt + NULL_GAS, // EFI_ACPI_6= _1__GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk + NULL_GAS, // EFI_ACPI_6= _1__GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk + NULL_GAS, // EFI_ACPI_6= _1__GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk + NULL_GAS, // EFI_ACPI_6= _1__GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk + NULL_GAS, // EFI_ACPI_6= _1__GENERIC_ADDRESS_STRUCTURE XPm2CntBlk + NULL_GAS, // EFI_ACPI_6= _1__GENERIC_ADDRESS_STRUCTURE XPmTmrBlk + NULL_GAS, // EFI_ACPI_6= _1__GENERIC_ADDRESS_STRUCTURE XGpe0Blk + NULL_GAS, // EFI_ACPI_6= _1__GENERIC_ADDRESS_STRUCTURE XGpe1Blk + NULL_GAS, // EFI_ACPI_6= _1__GENERIC_ADDRESS_STRUCTURE SleepControlReg + NULL_GAS, // EFI_ACPI_6= _1__GENERIC_ADDRESS_STRUCTURE SleepStatusReg + 0 // UINT64 = Hypervisor Vendor Identify +}; + +VOID * CONST ReferenceAcpiTable =3D &Fadt; diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Gtdt.aslc b/Sil= icon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Gtdt.aslc new file mode 100644 index 000000000000..67468db2d4bd --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Gtdt.aslc @@ -0,0 +1,83 @@ +/** @file + Phytium ACPI ASL Sources. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include + +#define GTDT_GLOBAL_FLAGS_MAPPED EFI_ACPI_6_1_GTDT_GLOBAL_FLAG_MEMORY= _MAPPED_BLOCK_PRESENT +#define GTDT_GLOBAL_FLAGS_NOT_MAPPED 0 +#define GTDT_GLOBAL_FLAGS_EDGE EFI_ACPI_6_1_GTDT_GLOBAL_FLAG_INTERR= UPT_MODE +#define GTDT_GLOBAL_FLAGS_LEVEL 0 + +#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_6_1_GTDT_TIMER_FLAG_TIMER_INT= ERRUPT_MODE +#define GTDT_TIMER_LEVEL_TRIGGERED 0 +#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_1_GTDT_TIMER_FLAG_TIMER_INT= ERRUPT_POLARITY +#define GTDT_TIMER_ACTIVE_HIGH 0 +#define GTDT_TIMER_ALWAYS_ON_CAPABILITY EFI_ACPI_6_1_GTDT_TIMER_FLAG_ALWAY= S_ON_CAPABILITY + +#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LE= VEL_TRIGGERED \ + | EFI_ACPI_6_1_GTDT_TIMER_FLAG_ALWAYS_= ON_CAPABILITY) + +#pragma pack (1) + +typedef struct { + EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; + EFI_ACPI_6_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE Watchdogs[2]; +} EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES; + +#pragma pack () + +EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt =3D { + { + PHYTIUM_ACPI_HEADER ( + EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES, + EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION + ), + 0xFFFFFFFFFFFFFFFF, // UINT64 PhysicalAddre= ss + 0, // UINT32 Reserved + FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1Time= rGSIV + GTDT_GTIMER_FLAGS, // UINT32 SecurePL1Time= rFlags + FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1T= imerGSIV + GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1T= imerFlags + FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerG= SIV + GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerF= lags + FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2T= imerGSIV + GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2T= imerFlags + 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePh= ysicalAddress + 2, + sizeof (EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE) + }, + + { + { + 1, //Type + 28, //Size of this structure + 0, //reserved + 0x2800a000, //RefreshFrame Physical Address + 0x2800b000, //WatchdogControlFrame Physical Address + 48, //Watchdog Timer GSIV + 0, //Watchdog Timer Flags high level + }, + + { + 1, + 28, + 0, + 0x28016000, + 0x28017000, + 49, + 0, + } + } +}; + +VOID * CONST ReferenceAcpiTable =3D &Gtdt; diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Iort.aslc b/Sil= icon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Iort.aslc new file mode 100644 index 000000000000..4239499b68e5 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Iort.aslc @@ -0,0 +1,89 @@ +/** @file + Phytium ACPI ASL Sources. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include + +#define FIELD_OFFSET(type, name) __builtin_offsetof(type, name) + +#pragma pack(1) +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE Node; + UINT32 Identifiers[1]; +} PHYTIUM_ITS_NODE; + +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_RC_NODE Node; + EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMapping; +} PHYTIUM_RC_NODE; + +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort; + PHYTIUM_ITS_NODE ItsNode; + PHYTIUM_RC_NODE RcNode[1]; +} PHYTIUM_IO_REMAPPING_STRUCTURE; + +#define __PHYTIUM_ID_MAPPING(In, Num, Out, Ref, Flags) \ + { \ + In, \ + Num, \ + Out, \ + FIELD_OFFSET (PHYTIUM_IO_REMAPPING_STRUCTURE, Ref), \ + Flags \ + } + +STATIC PHYTIUM_IO_REMAPPING_STRUCTURE Iort =3D { + { + PHYTIUM_ACPI_HEADER (EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE, + PHYTIUM_IO_REMAPPING_STRUCTURE, + EFI_ACPI_IO_REMAPPING_TABLE_REVISION), + 2, // NumNodes + sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset + 0 // Reserved + }, { + // ItsNode + { + { + EFI_ACPI_IORT_TYPE_ITS_GROUP, // Type + sizeof (PHYTIUM_ITS_NODE), // Length + 0x0, // Revision + 0x0, // Reserved + 0x0, // NumIdMappin= gs + 0x0, // IdReference + }, + 1, + }, { + 0x0 + }, + }, { + { + // PciRcNode + { + { + EFI_ACPI_IORT_TYPE_ROOT_COMPLEX, // Type + sizeof (PHYTIUM_RC_NODE), // Length + 0x0, // Revision + 0x0, // Reserved + 0x1, // NumIdMapp= ings + FIELD_OFFSET (PHYTIUM_RC_NODE, RcIdMapping), // IdReferen= ce + }, + EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA, // CacheCohe= rent + 0x0, // Allocatio= nHints + 0x0, // Reserved + EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM, // MemoryAcc= essFlags + EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED, // AtsAttrib= ute + 0x0, // PciSegmen= tNumber + }, + __PHYTIUM_ID_MAPPING (0x0, 0xffff, 0x0, ItsNode, 0), + } + } +}; +#pragma pack() +# +VOID * CONST ReferenceAcpiTable =3D &Iort; diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Madt.aslc b/Sil= icon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Madt.aslc new file mode 100644 index 000000000000..ef6d94837fa2 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Madt.aslc @@ -0,0 +1,67 @@ +/** @file + Phytium ACPI ASL Sources. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include + + +#define PLATFORM_GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (Core= Id)) + +#define EFI_GICC_STRUCTURE(AcpiCpuUid, Mpidr, GicRBaseOffset) = \ + EFI_ACPI_6_1_GICC_STRUCTURE_INIT(0, AcpiCpuUid, Mpidr, EFI_ACPI_6_1_G= IC_ENABLED, 23, \ + FixedPcdGet64(PcdGicInterruptInterfaceBase), FixedPcdGet64 (PcdGicInte= rruptInterfaceBase) + 0x20000, \ + FixedPcdGet64(PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet= 64 (PcdGicRedistributorsBase) + GicRBaseOffset, 0) +#define CORE_NUM 4 +// +// Multiple APIC Description Table +// +#pragma pack (1) + +typedef struct { + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[CORE= _NUM]; + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[1]; +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE; + +#pragma pack () + +// +// Multiple APIC Description Table +// +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt =3D { + { + PHYTIUM_ACPI_HEADER ( + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE, + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION + ), + // + // MADT specific fields + // + 0, // LocalApicAddress + 0, // Flags + }, + { + EFI_GICC_STRUCTURE (0x00, PLATFORM_GET_MPID (0x00, 0), 0x000000), + EFI_GICC_STRUCTURE (0x01, PLATFORM_GET_MPID (0x00, 1), 0x020000), + EFI_GICC_STRUCTURE (0x02, PLATFORM_GET_MPID (0x01, 0), 0x040000), + EFI_GICC_STRUCTURE (0x03, PLATFORM_GET_MPID (0x01, 1), 0x060000), + }, + + EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT (0, FixedPcdGet32 (PcdGicDistributorBa= se), 0, 0x3), + { + EFI_ACPI_6_1_GIC_ITS_INIT (0, FixedPcdGet64 (PcdGicDistributorBase) + = 0x20000), + } +}; + +VOID * CONST ReferenceAcpiTable =3D &Madt; diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Mcfg.aslc b/Sil= icon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Mcfg.aslc new file mode 100644 index 000000000000..34eebd6aeec9 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Mcfg.aslc @@ -0,0 +1,65 @@ +/** @file + Phytium ACPI ASL Sources. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include + +#define ACPI_6_1_MCFG_VERSION 0x1 + +#pragma pack(1) +typedef struct +{ + UINT64 BaseAddress; + UINT16 SegGroupNum; + UINT8 StartBusNum; + UINT8 EndBusNum; + UINT32 Reserved2; +} EFI_ACPI_6_1_MCFG_CONFIG_STRUCTURE; + +typedef struct +{ + EFI_ACPI_DESCRIPTION_HEADER Header; + UINT64 Reserved1; +} EFI_ACPI_6_1_MCFG_TABLE_CONFIG; + +typedef struct +{ + EFI_ACPI_6_1_MCFG_TABLE_CONFIG Acpi_Table_Mcfg; + EFI_ACPI_6_1_MCFG_CONFIG_STRUCTURE Config_Structure[1]; +} EFI_ACPI_6_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_TABLE; +#pragma pack() + +EFI_ACPI_6_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_TABLE Mcfg=3D +{ + { + { + EFI_ACPI_6_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDR= ESS_DESCRIPTION_TABLE_SIGNATURE, + sizeof (EFI_ACPI_6_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_T= ABLE), + ACPI_6_1_MCFG_VERSION, + 0x00, // Checksum will b= e updated at runtime + {EFI_ACPI_PHYTIUM_OEM_ID}, + EFI_ACPI_PHYTIUM_OEM_TABLE_ID, + EFI_ACPI_PHYTIUM_OEM_REVISION, + EFI_ACPI_PHYTIUM_CREATOR_ID, + EFI_ACPI_PHYTIUM_CREATOR_REVISION + }, + 0x0000000000000000, //Reserved + }, + { + { + 0x40000000, //Base Address + 0, //Segment Group Num= ber + 0, //Start Bus Number + 0xff, //End Bus Number + 0x00000000, //Reserved + }, + } +}; + +VOID * CONST ReferenceAcpiTable =3D &Mcfg; diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Pptt.aslc b/Sil= icon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Pptt.aslc new file mode 100644 index 000000000000..ae1a21df23b9 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Pptt.aslc @@ -0,0 +1,219 @@ +/** @file + Phytium ACPI ASL Sources. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include + +#define FIELD_OFFSET(type, name) __builtin_offsetof(type, name) + +#pragma pack(1) +typedef struct { + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR Core; + UINT32 Offset[2]; + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE DCache; + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE ICache; +} PHYTIUM_PPTT_CORE; + +typedef struct { + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR Cluster; + UINT32 Offset[1]; + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE L2Cache; + PHYTIUM_PPTT_CORE Cores[2]; +} PHYTIUM_PPTT_CLUSTER; + +typedef struct { + EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR Package; + UINT32 Offset[1]; + EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE L3Cache; + PHYTIUM_PPTT_CLUSTER Clusters[2]; + EFI_ACPI_6_2_PPTT_STRUCTURE_ID ID; +} PHYTIUM_PPTT_PACKAGE; + +typedef struct { + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER Pptt; + PHYTIUM_PPTT_PACKAGE Packages[1]; +} PHYTIUM_PPTT_TABLE; +#pragma pack() + +#define PPTT_CORE(pid, cid, id) { = \ + { = \ + EFI_ACPI_6_2_PPTT_TYPE_PROCESSOR, = \ + FIELD_OFFSET (PHYTIUM_PPTT_CORE, DCache), = \ + {}, = \ + { = \ + 0, /* PhysicalPackage */ = \ + EFI_ACPI_6_2_PPTT_PROCESSOR_ID_VALID, /* AcpiProcessorIdValid */= \ + }, = \ + FIELD_OFFSET (PHYTIUM_PPTT_TABLE, = \ + Packages[pid].Clusters[cid]), /* Parent */ = \ + 8 * (pid) + 4 * (cid) + (id), /* AcpiProcessorId */ = \ + 2, /* NumberOfPrivateResource= s */\ + }, { = \ + FIELD_OFFSET (PHYTIUM_PPTT_TABLE, = \ + Packages[pid].Clusters[cid].Cores[id].DCache), = \ + FIELD_OFFSET (PHYTIUM_PPTT_TABLE, = \ + Packages[pid].Clusters[cid].Cores[id].ICache), = \ + }, { = \ + EFI_ACPI_6_2_PPTT_TYPE_CACHE, = \ + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE), = \ + {}, = \ + { = \ + 1, /* SizePropertyValid */ = \ + 1, /* NumberOfSetsValid */ = \ + 1, /* AssociativityValid */ = \ + 1, /* AllocationTypeValid */ = \ + 1, /* CacheTypeValid */ = \ + 1, /* WritePolicyValid */ = \ + 1, /* LineSizeValid */ = \ + }, = \ + 0, /* NextLevelOfCache */ = \ + SIZE_32KB, /* Size */ = \ + 256, /* NumberOfSets */ = \ + 2, /* Associativity */ = \ + { = \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_DATA, = \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, = \ + }, = \ + 64 /* LineSize */ = \ + }, { = \ + EFI_ACPI_6_2_PPTT_TYPE_CACHE, = \ + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE), = \ + {}, = \ + { = \ + 1, /* SizePropertyValid */ = \ + 1, /* NumberOfSetsValid */ = \ + 1, /* AssociativityValid */ = \ + 1, /* AllocationTypeValid */ = \ + 1, /* CacheTypeValid */ = \ + 0, /* WritePolicyValid */ = \ + 1, /* LineSizeValid */ = \ + }, = \ + 0, /* NextLevelOfCache */ = \ + SIZE_32KB, /* Size */ = \ + 256, /* NumberOfSets */ = \ + 2, /* Associativity */ = \ + { = \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ, /* AllocationType = */ \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION, = \ + 0, /* WritePolicy */ = \ + }, = \ + 64 /* LineSize */ = \ + } = \ +} + +#define PPTT_CLUSTER(pid, cid) { = \ + { = \ + EFI_ACPI_6_2_PPTT_TYPE_PROCESSOR, = \ + FIELD_OFFSET (PHYTIUM_PPTT_CLUSTER, L2Cache), = \ + {}, = \ + { = \ + 0, /* PhysicalPackage */ = \ + EFI_ACPI_6_2_PPTT_PROCESSOR_ID_INVALID, /* AcpiProcessorIdValid */ = \ + }, = \ + FIELD_OFFSET (PHYTIUM_PPTT_TABLE, Packages[pid]), /* Parent */ = \ + 0, /* AcpiProcessorId */ = \ + 1, /* NumberOfPrivateResources = */ \ + }, { = \ + FIELD_OFFSET (PHYTIUM_PPTT_TABLE, Packages[pid].Clusters[cid].L2Cache)= , \ + }, { = \ + EFI_ACPI_6_2_PPTT_TYPE_CACHE, = \ + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE), = \ + {}, = \ + { = \ + 1, /* SizePropertyValid */ = \ + 1, /* NumberOfSetsValid */ = \ + 1, /* AssociativityValid */ = \ + 1, /* AllocationTypeValid */ = \ + 1, /* CacheTypeValid */ = \ + 1, /* WritePolicyValid */ = \ + 1, /* LineSizeValid */ = \ + }, = \ + 0, /* NextLevelOfCache */ = \ + SIZE_2MB, /* Size */ = \ + 2048, /* NumberOfSets */ = \ + 16, /* Associativity */ = \ + { = \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE, = \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, = \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, = \ + }, = \ + 64 /* LineSize */ = \ + }, { = \ + PPTT_CORE (pid, cid, 0), = \ + PPTT_CORE (pid, cid, 1), = \ + } = \ +} + +#define PPTT_PANEL(pid) { = \ + { = \ + EFI_ACPI_6_2_PPTT_TYPE_PROCESSOR, = \ + FIELD_OFFSET (PHYTIUM_PPTT_PACKAGE, L3Cache), = \ + {}, = \ + { = \ + 1, /* PhysicalPackage */ = \ + EFI_ACPI_6_2_PPTT_PROCESSOR_ID_INVALID, /* AcpiProcessorIdValid = */ \ + }, = \ + 0, /* Parent */ = \ + 0, /* AcpiProcessorId */ = \ + 1, /* NumberOfPrivateResour= ces */ \ + }, { = \ + FIELD_OFFSET (PHYTIUM_PPTT_TABLE, Packages[pid].L3Cache), = \ + }, { = \ + EFI_ACPI_6_2_PPTT_TYPE_CACHE, = \ + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE), = \ + {}, = \ + { = \ + 1, /* SizePropertyValid */ = \ + 1, /* NumberOfSetsValid */ = \ + 1, /* AssociativityValid */= \ + 0, /* AllocationTypeValid *= / \ + 1, /* CacheTypeValid */ = \ + 1, /* WritePolicyValid */ = \ + 1, /* LineSizeValid */ = \ + }, = \ + 0, /* NextLevelOfCache */ = \ + SIZE_4MB, /* Size */ = \ + 4096, /* NumberOfSets */ = \ + 16, /* Associativity */ = \ + { = \ + 0, = \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED, = \ + EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK, = \ + }, = \ + 64 /* LineSize */ = \ + }, { = \ + PPTT_CLUSTER (pid, 0), = \ + PPTT_CLUSTER (pid, 1), = \ + }, { = \ + EFI_ACPI_6_2_PPTT_TYPE_ID, = \ + sizeof (EFI_ACPI_6_2_PPTT_STRUCTURE_ID), = \ + {0}, = \ + 0x54594850, = \ + 0x3, = \ + 0x1, = \ + 0, = \ + 0, = \ + 0, = \ + } = \ +} + + +STATIC PHYTIUM_PPTT_TABLE mPhytiumPpttTable =3D { + { + PHYTIUM_ACPI_HEADER (EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_= STRUCTURE_SIGNATURE, + PHYTIUM_PPTT_TABLE, + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISIO= N), + }, + { + PPTT_PANEL (0) + } +}; + +VOID * CONST ReferenceAcpiTable =3D &mPhytiumPpttTable; diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Spcr.aslc b/Sil= icon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Spcr.aslc new file mode 100644 index 000000000000..00ffb7e7a90d --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/AcpiTables/Spcr.aslc @@ -0,0 +1,73 @@ +/** @file + Phytium ACPI ASL Sources. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include + +/// +/// SPCR Flow Control +/// +#define SPCR_FLOW_CONTROL_NONE 0 + + +STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr =3D { + PHYTIUM_ACPI_HEADER (EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_= SIGNATURE, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISI= ON), + // UINT8 InterfaceType; + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_= UART, + // UINT8 Reserved1[3]; + { + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE + }, + // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE BaseAddress; + ARM_GAS32 (FixedPcdGet64 (PcdSerialRegisterBase)), + // UINT8 InterruptType; + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC, + // UINT8 Irq; + 0, // Not used on ARM + // UINT32 GlobalSystemInterrupt; + FixedPcdGet32 (PL011UartInterrupt), + // UINT8 BaudRate; + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200, + // UINT8 Parity; + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY, + // UINT8 StopBits; + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1, + // UINT8 FlowControl; + SPCR_FLOW_CONTROL_NONE, + // UINT8 TerminalType; + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI, + // UINT8 Reserved2; + EFI_ACPI_RESERVED_BYTE, + // UINT16 PciDeviceId; + 0xFFFF, + // UINT16 PciVendorId; + 0xFFFF, + // UINT8 PciBusNumber; + 0x00, + // UINT8 PciDeviceNumber; + 0x00, + // UINT8 PciFunctionNumber; + 0x00, + // UINT32 PciFlags; + 0x00000000, + // UINT8 PciSegment; + 0x00, + // UINT32 Reserved3; + EFI_ACPI_RESERVED_DWORD +}; + +VOID * CONST ReferenceAcpiTable =3D &Spcr; --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#72811): https://edk2.groups.io/g/devel/message/72811 Mute This Topic: https://groups.io/mt/81361265/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-