From nobody Thu May 2 13:16:10 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+71131+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+71131+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1612407587; cv=none; d=zohomail.com; s=zohoarc; b=m/Z+JJ/wwNugEZDYgzgwmgIz/y08uQpbJKpJwaMyCA/Bcmdf9tyGvpL1RI1G5XsTSIcg/rAzTX9FHoHA2rXDf8sAFIDd5dJWfxx9QSG7UFaWl42PiAWrcwPfjywgEhrsGrBH9cCmo5O0f63Jx4gsMrm79xN0U+iuxvHHZr+p5uc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1612407587; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=+ljmQ9q3mVa3hAU8BMZRZHPvPy7MhX365eiYHT8NCZA=; b=m5wfqgGlIMrkVvKzxyz9sm7e6aVrkHzWq9MieAN5f7jZRV1j7Wpugl6DBOuUm6iBTi+jPpAu/YF/qZuv6jSe/74QbK1cxrd4w9tYOU66dgGAqpenRIKh/L3qNZJWqGyUjK03xZmLrbuIGZZQpEWeKe4d0t3UHa+IykbK8ttbcEQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+71131+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1612407587538726.2148868574485; Wed, 3 Feb 2021 18:59:47 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id kEsgYY1788612xpgwkx9vTwc; Wed, 03 Feb 2021 18:59:47 -0800 X-Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.2281.1612407581546439199 for ; Wed, 03 Feb 2021 18:59:41 -0800 IronPort-SDR: +sHoirMVgGwbqtgyNdEm2z2kkdIrl3y9RWSa613bJDlZbPzHZdwyfP+MYoxdoTcfhk3GSI69JH LCZSI8o8H90w== X-IronPort-AV: E=McAfee;i="6000,8403,9884"; a="168269633" X-IronPort-AV: E=Sophos;i="5.79,400,1602572400"; d="scan'208";a="168269633" X-Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2021 18:59:40 -0800 IronPort-SDR: GW13SBaYBItJvo3yGDgccaoEXxmi022SN2I2byoE4dJdhD3TRijwmMxLsbZ13tNmFkETIWQF3r yIY4J3sANZJA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,400,1602572400"; d="scan'208";a="480711034" X-Received: from ray-dev.ccr.corp.intel.com ([10.239.158.87]) by fmsmga001.fm.intel.com with ESMTP; 03 Feb 2021 18:59:37 -0800 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Laszlo Ersek , Rahul Kumar Subject: [edk2-devel] [PATCH 1/2] UefiCpuPkg/MpInitLib: Use NASM struc to avoid hardcode offset Date: Thu, 4 Feb 2021 10:59:20 +0800 Message-Id: <20210204025921.1428-2-ray.ni@intel.com> In-Reply-To: <20210204025921.1428-1-ray.ni@intel.com> References: <20210204025921.1428-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: RJiRYkTMuOFsgnWuGy1jo5zGx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1612407587; bh=mP8u7FzmFd+S4kBKwomdecQiuE6qoZkbCxyDKDZYUCE=; h=Cc:Date:From:Reply-To:Subject:To; b=VIM0L0k2rR/Id74Te5mGn2loziI28CnucR8/aIZ2JkCgqygyX3kHM0i3Oj7W2CgDQ60 M18czuj4PyQLIzYoPtw80n64kHQQiVGkvQv86tY4PL5ojVa+Q3HdnhGlvbwW1AlAHlcY1 KCPbUbwht3OMjt60gJf68G3GendGixYSaMU= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" In Windows environment, "dumpbin /disasm" is used to verify the disassembly before and after using NASM struc doesn't change. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Laszlo Ersek Cc: Rahul Kumar --- UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc | 52 ++++++++++-------- .../Library/MpInitLib/Ia32/MpFuncs.nasm | 35 ++++++------ UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc | 54 ++++++++++--------- UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 46 ++++++++-------- 4 files changed, 98 insertions(+), 89 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc b/UefiCpuPkg/Libra= ry/MpInitLib/Ia32/MpEqu.inc index 4f5a7c859a..244c1e72b7 100644 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc @@ -1,5 +1,5 @@ ;-------------------------------------------------------------------------= ----- ; -; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Module Name: @@ -19,25 +19,31 @@ CPU_SWITCH_STATE_IDLE equ 0 CPU_SWITCH_STATE_STORED equ 1 CPU_SWITCH_STATE_LOADED equ 2 =20 -LockLocation equ (SwitchToRealProcEnd - Rendezvous= FunnelProcStart) -StackStartAddressLocation equ LockLocation + 04h -StackSizeLocation equ LockLocation + 08h -ApProcedureLocation equ LockLocation + 0Ch -GdtrLocation equ LockLocation + 10h -IdtrLocation equ LockLocation + 16h -BufferStartLocation equ LockLocation + 1Ch -ModeOffsetLocation equ LockLocation + 20h -ApIndexLocation equ LockLocation + 24h -CodeSegmentLocation equ LockLocation + 28h -DataSegmentLocation equ LockLocation + 2Ch -EnableExecuteDisableLocation equ LockLocation + 30h -Cr3Location equ LockLocation + 34h -InitFlagLocation equ LockLocation + 38h -CpuInfoLocation equ LockLocation + 3Ch -NumApsExecutingLocation equ LockLocation + 40h -InitializeFloatingPointUnitsAddress equ LockLocation + 48h -ModeTransitionMemoryLocation equ LockLocation + 4Ch -ModeTransitionSegmentLocation equ LockLocation + 50h -ModeHighMemoryLocation equ LockLocation + 52h -ModeHighSegmentLocation equ LockLocation + 56h - +MP_CPU_EXCHANGE_INFO_OFFSET equ (SwitchToRealProcEnd - RendezvousFunnelPro= cStart) +struc MP_CPU_EXCHANGE_INFO + .Lock: resd 1 + .StackStart: resd 1 + .StackSize: resd 1 + .CFunction: resd 1 + .GdtrProfile: resb 6 + .IdtrProfile: resb 6 + .BufferStart: resd 1 + .ModeOffset: resd 1 + .ApIndex: resd 1 + .CodeSegment: resd 1 + .DataSegment: resd 1 + .EnableExecuteDisable: resd 1 + .Cr3: resd 1 + .InitFlag: resd 1 + .CpuInfo: resd 1 + .NumApsExecuting: resd 1 + .CpuMpData: resd 1 + .InitializeFloatingPointUnits: resd 1 + .ModeTransitionMemory: resd 1 + .ModeTransitionSegment:resw 1 + .ModeHighMemory: resd 1 + .ModeHighSegment: resw 1 + .Enable5LevelPaging: resb 1 + .SevEsIsEnabled: resb 1 + .GhcbBase: resd 1 +endstruc diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Li= brary/MpInitLib/Ia32/MpFuncs.nasm index 7e81d24aa6..908c2eb447 100644 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm @@ -1,5 +1,5 @@ ;-------------------------------------------------------------------------= ----- ; -; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
+; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Module Name: @@ -39,21 +39,21 @@ BITS 16 mov fs, ax mov gs, ax =20 - mov si, BufferStartLocation + mov si, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Buf= ferStart mov ebx, [si] =20 - mov si, DataSegmentLocation + mov si, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Dat= aSegment mov edx, [si] =20 ; ; Get start address of 32-bit code in low memory (<1MB) ; - mov edi, ModeTransitionMemoryLocation + mov edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Mod= eTransitionMemory =20 - mov si, GdtrLocation + mov si, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Gdtr= Profile o32 lgdt [cs:si] =20 - mov si, IdtrLocation + mov si, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Idtr= Profile o32 lidt [cs:si] =20 ; @@ -82,7 +82,7 @@ Flat32Start: ; protecte= d mode entry point mov esi, ebx =20 mov edi, esi - add edi, EnableExecuteDisableLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.En= ableExecuteDisable cmp byte [edi], 0 jz SkipEnableExecuteDisable =20 @@ -96,7 +96,7 @@ Flat32Start: ; protecte= d mode entry point wrmsr =20 mov edi, esi - add edi, Cr3Location + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Cr3 mov eax, dword [edi] mov cr3, eax =20 @@ -110,19 +110,19 @@ Flat32Start: ; prot= ected mode entry point =20 SkipEnableExecuteDisable: mov edi, esi - add edi, InitFlagLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Ini= tFlag cmp dword [edi], 1 ; 1 =3D=3D ApInitConfig jnz GetApicId =20 ; Increment the number of APs executing here as early as possible ; This is decremented in C code when AP is finished executing mov edi, esi - add edi, NumApsExecutingLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Num= ApsExecuting lock inc dword [edi] =20 ; AP init mov edi, esi - add edi, LockLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET mov eax, NotVacantFlag =20 TestLock: @@ -131,7 +131,7 @@ TestLock: jz TestLock =20 mov ecx, esi - add ecx, ApIndexLocation + add ecx, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.ApI= ndex inc dword [ecx] mov ebx, [ecx] =20 @@ -140,13 +140,13 @@ Releaselock: xchg [edi], eax =20 mov edi, esi - add edi, StackSizeLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Sta= ckSize mov eax, [edi] mov ecx, ebx inc ecx mul ecx ; EAX =3D StackSize * (Cp= uNumber + 1) mov edi, esi - add edi, StackStartAddressLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Sta= ckStart add eax, [edi] mov esp, eax jmp CProcedureInvoke @@ -179,7 +179,7 @@ GetProcessorNumber: ; Note that BSP may become an AP due to SwitchBsp() ; xor ebx, ebx - lea eax, [esi + CpuInfoLocation] + lea eax, [esi + MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_= INFO.CpuInfo] mov edi, [eax] =20 GetNextProcNumber: @@ -203,13 +203,12 @@ CProcedureInvoke: =20 push ebx ; Push ApIndex mov eax, esi - add eax, LockLocation + add eax, MP_CPU_EXCHANGE_INFO_OFFSET push eax ; push address of exchange info data buff= er =20 mov edi, esi - add edi, ApProcedureLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.CFu= nction mov eax, [edi] - call eax ; Invoke C function =20 jmp $ ; Never reach here diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc b/UefiCpuPkg/Librar= y/MpInitLib/X64/MpEqu.inc index c92daaaffd..3974330991 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc @@ -1,5 +1,5 @@ ;-------------------------------------------------------------------------= ----- ; -; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
+; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Module Name: @@ -19,27 +19,31 @@ CPU_SWITCH_STATE_IDLE equ 0 CPU_SWITCH_STATE_STORED equ 1 CPU_SWITCH_STATE_LOADED equ 2 =20 -LockLocation equ (SwitchToRealProcEnd - Rendezvous= FunnelProcStart) -StackStartAddressLocation equ LockLocation + 08h -StackSizeLocation equ LockLocation + 10h -ApProcedureLocation equ LockLocation + 18h -GdtrLocation equ LockLocation + 20h -IdtrLocation equ LockLocation + 2Ah -BufferStartLocation equ LockLocation + 34h -ModeOffsetLocation equ LockLocation + 3Ch -ApIndexLocation equ LockLocation + 44h -CodeSegmentLocation equ LockLocation + 4Ch -DataSegmentLocation equ LockLocation + 54h -EnableExecuteDisableLocation equ LockLocation + 5Ch -Cr3Location equ LockLocation + 64h -InitFlagLocation equ LockLocation + 6Ch -CpuInfoLocation equ LockLocation + 74h -NumApsExecutingLocation equ LockLocation + 7Ch -InitializeFloatingPointUnitsAddress equ LockLocation + 8Ch -ModeTransitionMemoryLocation equ LockLocation + 94h -ModeTransitionSegmentLocation equ LockLocation + 98h -ModeHighMemoryLocation equ LockLocation + 9Ah -ModeHighSegmentLocation equ LockLocation + 9Eh -Enable5LevelPagingLocation equ LockLocation + 0A0h -SevEsIsEnabledLocation equ LockLocation + 0A1h -GhcbBaseLocation equ LockLocation + 0A2h +MP_CPU_EXCHANGE_INFO_OFFSET equ (SwitchToRealProcEnd - RendezvousFunnelPro= cStart) +struc MP_CPU_EXCHANGE_INFO + .Lock: resq 1 + .StackStart: resq 1 + .StackSize: resq 1 + .CFunction: resq 1 + .GdtrProfile: resb 10 + .IdtrProfile: resb 10 + .BufferStart: resq 1 + .ModeOffset: resq 1 + .ApIndex: resq 1 + .CodeSegment: resq 1 + .DataSegment: resq 1 + .EnableExecuteDisable: resq 1 + .Cr3: resq 1 + .InitFlag: resq 1 + .CpuInfo: resq 1 + .NumApsExecuting: resq 1 + .CpuMpData: resq 1 + .InitializeFloatingPointUnits: resq 1 + .ModeTransitionMemory: resd 1 + .ModeTransitionSegment:resw 1 + .ModeHighMemory: resd 1 + .ModeHighSegment: resw 1 + .Enable5LevelPaging: resb 1 + .SevEsIsEnabled: resb 1 + .GhcbBase: resq 1 +endstruc diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Lib= rary/MpInitLib/X64/MpFuncs.nasm index aecfd07bc0..423beb2cca 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm @@ -1,5 +1,5 @@ ;-------------------------------------------------------------------------= ----- ; -; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
+; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Module Name: @@ -43,21 +43,21 @@ BITS 16 mov fs, ax mov gs, ax =20 - mov si, BufferStartLocation + mov si, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Buf= ferStart mov ebx, [si] =20 - mov si, DataSegmentLocation + mov si, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Dat= aSegment mov edx, [si] =20 ; ; Get start address of 32-bit code in low memory (<1MB) ; - mov edi, ModeTransitionMemoryLocation + mov edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Mod= eTransitionMemory =20 - mov si, GdtrLocation + mov si, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Gdtr= Profile o32 lgdt [cs:si] =20 - mov si, IdtrLocation + mov si, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Idtr= Profile o32 lidt [cs:si] =20 ; @@ -85,7 +85,7 @@ Flat32Start: ; protecte= d mode entry point ; ; Enable execute disable bit ; - mov esi, EnableExecuteDisableLocation + mov esi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Ena= bleExecuteDisable cmp byte [ebx + esi], 0 jz SkipEnableExecuteDisableBit =20 @@ -101,7 +101,7 @@ SkipEnableExecuteDisableBit: mov eax, cr4 bts eax, 5 =20 - mov esi, Enable5LevelPagingLocation + mov esi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Ena= ble5LevelPaging cmp byte [ebx + esi], 0 jz SkipEnable5LevelPaging =20 @@ -117,7 +117,7 @@ SkipEnable5LevelPaging: ; ; Load page table ; - mov esi, Cr3Location ; Save CR3 in ecx + mov esi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Cr3= ; Save CR3 in ecx mov ecx, [ebx + esi] mov cr3, ecx ; Load CR3 =20 @@ -139,26 +139,26 @@ SkipEnable5LevelPaging: ; ; Far jump to 64-bit code ; - mov edi, ModeHighMemoryLocation + mov edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Mod= eHighMemory add edi, ebx jmp far [edi] =20 BITS 64 LongModeStart: mov esi, ebx - lea edi, [esi + InitFlagLocation] + lea edi, [esi + MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_I= NFO.InitFlag] cmp qword [edi], 1 ; ApInitConfig jnz GetApicId =20 ; Increment the number of APs executing here as early as possible ; This is decremented in C code when AP is finished executing mov edi, esi - add edi, NumApsExecutingLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Num= ApsExecuting lock inc dword [edi] =20 ; AP init mov edi, esi - add edi, LockLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Lock mov rax, NotVacantFlag =20 TestLock: @@ -166,7 +166,7 @@ TestLock: cmp rax, NotVacantFlag jz TestLock =20 - lea ecx, [esi + ApIndexLocation] + lea ecx, [esi + MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_I= NFO.ApIndex] inc dword [ecx] mov ebx, [ecx] =20 @@ -175,17 +175,17 @@ Releaselock: xchg qword [edi], rax ; program stack mov edi, esi - add edi, StackSizeLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Sta= ckSize mov eax, dword [edi] mov ecx, ebx inc ecx mul ecx ; EAX =3D StackSize * (Cp= uNumber + 1) mov edi, esi - add edi, StackStartAddressLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Sta= ckStart add rax, qword [edi] mov rsp, rax =20 - lea edi, [esi + SevEsIsEnabledLocation] + lea edi, [esi + MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_I= NFO.SevEsIsEnabled] cmp byte [edi], 1 ; SevEsIsEnabled jne CProcedureInvoke =20 @@ -199,7 +199,7 @@ Releaselock: mov ecx, ebx mul ecx ; EAX =3D SIZE_4K * 2 * C= puNumber mov edi, esi - add edi, GhcbBaseLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Ghc= bBase add rax, qword [edi] mov rdx, rax shr rdx, 32 @@ -208,7 +208,7 @@ Releaselock: jmp CProcedureInvoke =20 GetApicId: - lea edi, [esi + SevEsIsEnabledLocation] + lea edi, [esi + MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_I= NFO.SevEsIsEnabled] cmp byte [edi], 1 ; SevEsIsEnabled jne DoCpuid =20 @@ -302,7 +302,7 @@ GetProcessorNumber: ; Note that BSP may become an AP due to SwitchBsp() ; xor ebx, ebx - lea eax, [esi + CpuInfoLocation] + lea eax, [esi + MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_= INFO.CpuInfo] mov rdi, [eax] =20 GetNextProcNumber: @@ -321,17 +321,17 @@ CProcedureInvoke: push rbp mov rbp, rsp =20 - mov rax, qword [esi + InitializeFloatingPointUnitsAddress] + mov rax, qword [esi + MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCH= ANGE_INFO.InitializeFloatingPointUnits] sub rsp, 20h call rax ; Call assembly function to initialize FP= U per UEFI spec add rsp, 20h =20 mov edx, ebx ; edx is ApIndex mov ecx, esi - add ecx, LockLocation ; rcx is address of exchange info data bu= ffer + add ecx, MP_CPU_EXCHANGE_INFO_OFFSET ; rcx is address of exchan= ge info data buffer =20 mov edi, esi - add edi, ApProcedureLocation + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.CFu= nction mov rax, qword [edi] =20 sub rsp, 20h --=20 2.27.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71131): https://edk2.groups.io/g/devel/message/71131 Mute This Topic: https://groups.io/mt/80372085/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Thu May 2 13:16:10 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+71132+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+71132+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1612407597; cv=none; d=zohomail.com; s=zohoarc; b=ljUnWvwVgmTSmbwSEyK+PZcYcQh83X5n7sFHR8UjaAXGQjeId6u99nFhdsuIcbnRSL1Puw7P7Gs/wrZLAgE1V8NUORudh2XDJqHzoI3I9sXYFaAPuQp5P8MBeiN4ndA5tVPGP5nOmNilZvPLJgKIhDh8Et+R37oyIXDLDjwcZrY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1612407597; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=ojv3X7HgIQuX/8DLc78cHLXtuL8sDdTyCRL/nIpSfPI=; b=CNRs/sqH49wSWmb2Wbbj2yPghQL68BLTdJ8zxUv3TsZzGgCK+Fk4sgf6E22XWZwCamqN7LutvGvCfWT1rzaFC5iMOd3yHjRmvO5uNnNhXHY7YwpmTOguzJm6ECKzgBtT0qZrnXoqifFzzK1tVji7D0CgImn93Mx7tYAIPqjO/j8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+71132+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1612407597470323.11611341915454; Wed, 3 Feb 2021 18:59:57 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id EWK2YY1788612xbiJLhUxzIt; Wed, 03 Feb 2021 18:59:57 -0800 X-Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.2283.1612407591616301107 for ; Wed, 03 Feb 2021 18:59:51 -0800 IronPort-SDR: /M2/E6OExTBuzrQkswZjX74fjqBBcYj2kuQgAu6PwUIRzpJiScCRyBcNzWS4eAxolbBjGA+fhW La9KpMykFU6Q== X-IronPort-AV: E=McAfee;i="6000,8403,9884"; a="168269643" X-IronPort-AV: E=Sophos;i="5.79,400,1602572400"; d="scan'208";a="168269643" X-Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2021 18:59:42 -0800 IronPort-SDR: 0ydndPKYMJrOiK7iVdgRnIrNox7ViU/xBzJvvxC2WsChaepcXSoadbXXyYhzfw4XbVRkOfd6x3 urzzSGubAB+g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,400,1602572400"; d="scan'208";a="480711045" X-Received: from ray-dev.ccr.corp.intel.com ([10.239.158.87]) by fmsmga001.fm.intel.com with ESMTP; 03 Feb 2021 18:59:40 -0800 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Laszlo Ersek , Eric Dong , Rahul1 Kumar Subject: [edk2-devel] [PATCH 2/2] UefiCpuPkg/MpInitLib: Use XADD to avoid lock acquire/release Date: Thu, 4 Feb 2021 10:59:21 +0800 Message-Id: <20210204025921.1428-3-ray.ni@intel.com> In-Reply-To: <20210204025921.1428-1-ray.ni@intel.com> References: <20210204025921.1428-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: 1WxzplspMQJC7xqpnbp3Uof9x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1612407597; bh=BcNLqViY/23PenIysQGtdm/XD6FoYvGysE/zLHA9xgc=; h=Cc:Date:From:Reply-To:Subject:To; b=SK/JW/Htyi0d7gI4ChmJR2U+F/746xCeqi085c7qehwa/eVdxM5wzVxFGk7Tfs8ZSlZ jkRDb3xrZ4QsrqGu1dDlBTWA5ly4Lfbn8rIAnmG44LClyhe/9oYJUIXhvPoMh6H2a8FjW rkeDZUEmK6fJtfZvdeBbldMxTwVT69GoQPc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" When AP firstly wakes up, MpFuncs.nasm contains below logic to assign an unique ApIndex to each AP according to who comes first: ---ASM--- TestLock: xchg [edi], eax cmp eax, NotVacantFlag jz TestLock mov ecx, esi add ecx, ApIndexLocation inc dword [ecx] mov ebx, [ecx] Releaselock: mov eax, VacantFlag xchg [edi], eax ---ASM END--- "lock inc" cannot be used to increase ApIndex because not only the global ApIndex should be increased, but also the result should be stored to a local general purpose register EBX. This patch learns from the NASM implementation of InternalSyncIncrement() to use "XADD" instruction which can increase the global ApIndex and store the original ApIndex to EBX in one instruction. With this patch, OVMF when running in a 255 threads QEMU spends about one second to wakeup all APs. Original implementation needs more than 10 seconds. Signed-off-by: Ray Ni Cc: Laszlo Ersek Cc: Eric Dong Cc: Rahul1 Kumar --- UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc | 4 ---- .../Library/MpInitLib/Ia32/MpFuncs.nasm | 21 +++++-------------- UefiCpuPkg/Library/MpInitLib/MpLib.c | 3 +-- UefiCpuPkg/Library/MpInitLib/MpLib.h | 3 +-- UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc | 4 ---- UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 18 ++++------------ 6 files changed, 11 insertions(+), 42 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc b/UefiCpuPkg/Libra= ry/MpInitLib/Ia32/MpEqu.inc index 244c1e72b7..5f1f0351d2 100644 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc @@ -12,16 +12,12 @@ ; ;-------------------------------------------------------------------------= ------ =20 -VacantFlag equ 00h -NotVacantFlag equ 0ffh - CPU_SWITCH_STATE_IDLE equ 0 CPU_SWITCH_STATE_STORED equ 1 CPU_SWITCH_STATE_LOADED equ 2 =20 MP_CPU_EXCHANGE_INFO_OFFSET equ (SwitchToRealProcEnd - RendezvousFunnelPro= cStart) struc MP_CPU_EXCHANGE_INFO - .Lock: resd 1 .StackStart: resd 1 .StackSize: resd 1 .CFunction: resd 1 diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Li= brary/MpInitLib/Ia32/MpFuncs.nasm index 908c2eb447..b7267393db 100644 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm @@ -122,23 +122,12 @@ SkipEnableExecuteDisable: =20 ; AP init mov edi, esi - add edi, MP_CPU_EXCHANGE_INFO_OFFSET - mov eax, NotVacantFlag - -TestLock: - xchg [edi], eax - cmp eax, NotVacantFlag - jz TestLock - - mov ecx, esi - add ecx, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.ApI= ndex - inc dword [ecx] - mov ebx, [ecx] - -Releaselock: - mov eax, VacantFlag - xchg [edi], eax + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.ApI= ndex + mov ebx, 1 + lock xadd [edi], ebx ; EBX =3D ApIndex++ + inc ebx ; EBX is CpuNumber =20 + ; program stack mov edi, esi add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Sta= ckSize mov eax, [edi] diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index 8b1f7f84ba..32a3951742 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -1,7 +1,7 @@ /** @file CPU MP Initialize Library common functions. =20 - Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.
Copyright (c) 2020, AMD Inc. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent @@ -1012,7 +1012,6 @@ FillExchangeInfoData ( IA32_CR4 Cr4; =20 ExchangeInfo =3D CpuMpData->MpCpuExchangeInfo; - ExchangeInfo->Lock =3D 0; ExchangeInfo->StackStart =3D CpuMpData->Buffer; ExchangeInfo->StackSize =3D CpuMpData->CpuApStackSize; ExchangeInfo->BufferStart =3D CpuMpData->WakeupBuffer; diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index 02652eaae1..0bd60388b1 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -1,7 +1,7 @@ /** @file Common header file for MP Initialize Library. =20 - Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.
Copyright (c) 2020, AMD Inc. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent @@ -190,7 +190,6 @@ typedef struct _CPU_MP_DATA CPU_MP_DATA; // into this structure are used in assembly code in this module // typedef struct { - UINTN Lock; UINTN StackStart; UINTN StackSize; UINTN CFunction; diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc b/UefiCpuPkg/Librar= y/MpInitLib/X64/MpEqu.inc index 3974330991..32e9a262bc 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc @@ -12,16 +12,12 @@ ; ;-------------------------------------------------------------------------= ------ =20 -VacantFlag equ 00h -NotVacantFlag equ 0ffh - CPU_SWITCH_STATE_IDLE equ 0 CPU_SWITCH_STATE_STORED equ 1 CPU_SWITCH_STATE_LOADED equ 2 =20 MP_CPU_EXCHANGE_INFO_OFFSET equ (SwitchToRealProcEnd - RendezvousFunnelPro= cStart) struc MP_CPU_EXCHANGE_INFO - .Lock: resq 1 .StackStart: resq 1 .StackSize: resq 1 .CFunction: resq 1 diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Lib= rary/MpInitLib/X64/MpFuncs.nasm index 423beb2cca..383b4974f8 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm @@ -158,21 +158,11 @@ LongModeStart: =20 ; AP init mov edi, esi - add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Lock - mov rax, NotVacantFlag + add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.ApI= ndex + mov ebx, 1 + lock xadd [edi], ebx ; EBX =3D ApIndex++ + inc ebx ; EBX is CpuNumber =20 -TestLock: - xchg qword [edi], rax - cmp rax, NotVacantFlag - jz TestLock - - lea ecx, [esi + MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_I= NFO.ApIndex] - inc dword [ecx] - mov ebx, [ecx] - -Releaselock: - mov rax, VacantFlag - xchg qword [edi], rax ; program stack mov edi, esi add edi, MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO.Sta= ckSize --=20 2.27.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71132): https://edk2.groups.io/g/devel/message/71132 Mute This Topic: https://groups.io/mt/80372087/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-