From nobody Sun Feb 8 14:24:37 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+69911+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69911+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1610016426; cv=none; d=zohomail.com; s=zohoarc; b=FfcDkrqtBXCd609SAihWFhDqwHqlIEumTqKrQd7hfqmZpb3iOpg+JzVEmkXTcZwjQUXUIlwPanMHA/vfI7hZKwx0JGgoucUq2Y+ypAWkJdzg9CXhuZMJSNCfgE7J33pBl0abpQ4RoobH4pgvYxKpUD6wuApMackApyVFMTNJY4c= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1610016426; h=Content-Transfer-Encoding:Cc:Date:From:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=f4AVC28FajrR/C+jQyKZbSK9L+UzxqWaO2VWltVne9o=; b=WvTp5/UR7eJlko+7yzylPurn3XLeYThOPKeRU21+IPjlGqer6axv9skiRu3Qyu1EU+akLrHzgWw1Kxgq4Z8e9H+LTaKtwsOwXGmBUACbIUaCr3qO3OzfOKO0/C73jeB8N0Bnt3ycM37sZ9KafUhxJUsl6gixl0qUXnRR4NgN7DI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69911+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1610016426519708.1697565346986; Thu, 7 Jan 2021 02:47:06 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id SYlDYY1788612x7JcKbrEz6L; Thu, 07 Jan 2021 02:47:06 -0800 X-Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mx.groups.io with SMTP id smtpd.web10.6630.1610016419860293245 for ; Thu, 07 Jan 2021 02:47:00 -0800 IronPort-SDR: VGnhTiUhyTej3Zmgm96Ega+tvHMgtnBFf2WNICs03JU1Sk/fY8nmJlm/F5qChuR4YyIzlXwijC zefhiXjr+7eQ== X-IronPort-AV: E=McAfee;i="6000,8403,9856"; a="177559893" X-IronPort-AV: E=Sophos;i="5.79,329,1602572400"; d="scan'208";a="177559893" X-Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2021 02:46:54 -0800 IronPort-SDR: CyVeB/G2ssWaMyJAJ9S2VDD+n+BmGtdsVHj2NXdbo9XEgbmMD6IGeRMDRa/fhxpmpDpSXTRTdw pTOZsd3Dv0Rw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,329,1602572400"; d="scan'208";a="398571740" X-Received: from shwdeopenpsi068.ccr.corp.intel.com ([10.239.158.37]) by fmsmga002.fm.intel.com with ESMTP; 07 Jan 2021 02:46:52 -0800 From: "Zeng, Star" To: devel@edk2.groups.io Cc: Star Zeng , Ray Ni , Laszlo Ersek , Eric Dong Subject: [edk2-devel] [PATCH V3] UefiCpuPkg PiSmmCpuDxeSmm: Reduce SMRAM consumption in CpuS3.c Date: Thu, 7 Jan 2021 18:46:50 +0800 Message-Id: <20210107104650.27404-1-star.zeng@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,star.zeng@intel.com X-Gm-Message-State: KWnv3niAER8kl2H9AbSxjVYvx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1610016426; bh=pREKGqwcxixlA0Hybp0YdRsiQlW53PwI7qiE7tB+8Qo=; h=Cc:Date:From:Reply-To:Subject:To; b=sbuxKFYx3t3Uv7A1zvq1N3/AsIb1jwxClFcVPek+Kf542bx9b34w336TYg5Onkvw1T7 TKRDT9p8ndWfFoKN1nsyZdOiqsFjNtHJwiQjQwOqhAHANqf1RCjB/rf21QOPQEDMkxhyJ ggCy+TeclrJiw/q5BQhPE+zbeHrlS5XMy+g= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" This patch makes two refinements to reduce SMRAM consumption in CpuS3.c. 1. Only do CopyRegisterTable() when register table is not empty, IsRegisterTableEmpty() is created to check whether the register table is empty or not. Take empty PreSmmInitRegisterTable as example, about 24K SMRAM consumption could be reduced when mAcpiCpuData.NumberOfCpus=3D1024. sizeof (CPU_REGISTER_TABLE) =3D 24 mAcpiCpuData.NumberOfCpus =3D 1024 =3D 1K mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE) =3D 24K 2. Only copy table entries buffer instead of whole buffer. AllocatedSize in SourceRegisterTableList is the whole buffer size. Actually, only the table entries buffer needs to be copied, and the size is TableLength * sizeof (CPU_REGISTER_TABLE_ENTRY). Take AllocatedSize=3D0x1000=3D4096, TableLength=3D100 and NumberOfCpus=3D= 1024 as example, about 1696K SMRAM consumption could be reduced. sizeof (CPU_REGISTER_TABLE_ENTRY) =3D 24 TableLength =3D 100 TableLength * sizeof (CPU_REGISTER_TABLE_ENTRY) =3D 2400 AllocatedSize =3D 0x1000 =3D 4096 AllocatedSize - TableLength * sizeof (CPU_REGISTER_TABLE_ENTRY) =3D 4096 = - 2400 =3D 1696 NumberOfCpus =3D 1024 =3D 1K NumberOfCpus * (AllocatedSize - TableLength * sizeof (CPU_REGISTER_TABLE_= ENTRY)) =3D 1696K This patch also corrects the CopyRegisterTable() function description. Signed-off-by: Star Zeng Reviewed-by: Ray Ni Reviewed-by: Laszlo Ersek Cc: Ray Ni Cc: Eric Dong Cc: Laszlo Ersek --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 73 ++++++++++++++++++++++++------- 1 file changed, 56 insertions(+), 17 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/= CpuS3.c index 9592430636ec..724e5460ba6f 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -1,7 +1,7 @@ /** @file Code for Processor S3 restoration =20 -Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -487,6 +487,9 @@ SetRegister ( } else { RegisterTables =3D (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.RegisterT= able; } + if (RegisterTables =3D=3D NULL) { + return; + } =20 InitApicId =3D GetInitialApicId (); RegisterTable =3D NULL; @@ -948,7 +951,7 @@ InitSmmS3ResumeState ( } =20 /** - Copy register table from ACPI NVS memory into SMRAM. + Copy register table from non-SMRAM into SMRAM. =20 @param[in] DestinationRegisterTableList Points to destination register = table. @param[in] SourceRegisterTableList Points to source register table. @@ -967,7 +970,8 @@ CopyRegisterTable ( =20 CopyMem (DestinationRegisterTableList, SourceRegisterTableList, NumberOf= Cpus * sizeof (CPU_REGISTER_TABLE)); for (Index =3D 0; Index < NumberOfCpus; Index++) { - if (DestinationRegisterTableList[Index].AllocatedSize !=3D 0) { + if (DestinationRegisterTableList[Index].TableLength !=3D 0) { + DestinationRegisterTableList[Index].AllocatedSize =3D DestinationReg= isterTableList[Index].TableLength * sizeof (CPU_REGISTER_TABLE_ENTRY); RegisterTableEntry =3D AllocateCopyPool ( DestinationRegisterTableList[Index].AllocatedSize, (VOID *)(UINTN)SourceRegisterTableList[Index].RegisterTableEntry @@ -978,6 +982,33 @@ CopyRegisterTable ( } } =20 +/** + Check whether the register table is empty or not. + + @param[in] RegisterTable Point to the register table. + + @retval TRUE The register table is empty. + @retval FALSE The register table is not empty. +**/ +BOOLEAN +IsRegisterTableEmpty ( + IN CPU_REGISTER_TABLE *RegisterTable, + IN UINT32 NumberOfCpus + ) +{ + UINTN Index; + + if (RegisterTable !=3D NULL) { + for (Index =3D 0; Index < NumberOfCpus; Index++) { + if (RegisterTable[Index].TableLength !=3D 0) { + return FALSE; + } + } + } + + return TRUE; +} + /** Get ACPI CPU data. =20 @@ -1032,23 +1063,31 @@ GetAcpiCpuData ( =20 CopyMem ((VOID *)(UINTN)mAcpiCpuData.IdtrProfile, (VOID *)(UINTN)AcpiCpu= Data->IdtrProfile, sizeof (IA32_DESCRIPTOR)); =20 - mAcpiCpuData.PreSmmInitRegisterTable =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Al= locatePool (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE)); - ASSERT (mAcpiCpuData.PreSmmInitRegisterTable !=3D 0); + if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->Pre= SmmInitRegisterTable, mAcpiCpuData.NumberOfCpus)) { + mAcpiCpuData.PreSmmInitRegisterTable =3D (EFI_PHYSICAL_ADDRESS)(UINTN)= AllocatePool (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE)); + ASSERT (mAcpiCpuData.PreSmmInitRegisterTable !=3D 0); =20 - CopyRegisterTable ( - (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.PreSmmInitRegisterTable, - (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->PreSmmInitRegisterTable, - mAcpiCpuData.NumberOfCpus - ); + CopyRegisterTable ( + (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.PreSmmInitRegisterTable, + (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->PreSmmInitRegisterTable, + mAcpiCpuData.NumberOfCpus + ); + } else { + mAcpiCpuData.PreSmmInitRegisterTable =3D 0; + } =20 - mAcpiCpuData.RegisterTable =3D (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool= (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE)); - ASSERT (mAcpiCpuData.RegisterTable !=3D 0); + if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->Reg= isterTable, mAcpiCpuData.NumberOfCpus)) { + mAcpiCpuData.RegisterTable =3D (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePo= ol (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE)); + ASSERT (mAcpiCpuData.RegisterTable !=3D 0); =20 - CopyRegisterTable ( - (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.RegisterTable, - (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable, - mAcpiCpuData.NumberOfCpus - ); + CopyRegisterTable ( + (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.RegisterTable, + (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable, + mAcpiCpuData.NumberOfCpus + ); + } else { + mAcpiCpuData.RegisterTable =3D 0; + } =20 // // Copy AP's GDT, IDT and Machine Check handler into SMRAM. --=20 2.21.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#69911): https://edk2.groups.io/g/devel/message/69911 Mute This Topic: https://groups.io/mt/79496286/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-