From nobody Fri Apr 26 19:03:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+69725+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69725+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1609864476; cv=none; d=zohomail.com; s=zohoarc; b=luZu0prq05yuuYX3Sie1EEL61BWFhPXS8YrfwTM45ZbyokmIKyeMjRvrsUN8x0WbCto2IKwIT4W0Ex/+UWNV3yQwmlO68BfPMFIQmAA6DyLsn/4YYTPggC5nOAQAWpHNi25EnnQJn+DE/Q2Dg09BOBGiOmHrwH8fpLMI2IDoab4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609864476; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Fkoj2YF+a0oWiTQNkgfDz8qTrsWj4Km8VXBkFRtC89M=; b=BlGf6h8D2oiZ7XICdHj6QME5ICx44f/0UHqNmdADhmr3AnyJu79gF1nw6Ed6KgbeeESicp4WAlL8F4OyvyhRRo40Y4c+nqXZknQohLZK6cNP4Rmy/GmQ//oYhcDrPoyzf9cdZDZ9hgZsoVfcIsE+EoHUa/4YHTGzGX1FpjMv2cQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69725+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1609864476922640.4939111105236; Tue, 5 Jan 2021 08:34:36 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id KvEaYY1788612xlPPWGHKKfn; Tue, 05 Jan 2021 08:34:36 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.7983.1609864476096590202 for ; Tue, 05 Jan 2021 08:34:36 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BAC0B11D4; Tue, 5 Jan 2021 08:34:25 -0800 (PST) X-Received: from mammon-tx2.austin.arm.com (mammon-tx2.austin.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A98423F70D; Tue, 5 Jan 2021 08:34:25 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: ard.biesheuvel@arm.com, leif@nuviainc.com, pete@akeo.ie, samer.el-haj-mahmoud@arm.com, awarkentin@vmware.com, Jeremy Linton Subject: [edk2-devel] [PATCH v4 1/7] Platform/RaspberryPi: Update VPU mailbox constants Date: Tue, 5 Jan 2021 10:34:14 -0600 Message-Id: <20210105163420.1711652-2-jeremy.linton@arm.com> In-Reply-To: <20210105163420.1711652-1-jeremy.linton@arm.com> References: <20210105163420.1711652-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: xIsxQXIjhnNHFc8SqMD9tv7bx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1609864476; bh=Sv5ZOvJTK69GcWn8qThREEUmsxqFzQlv2236bE6iERk=; h=Cc:Date:From:Reply-To:Subject:To; b=eswW/RtXf6HnPR/m5BJeN70tZX7w1hHsS6uQOMLStHQ46HuigbN1nUsoYoAN2d99Olf u6gVKmQCw8LNGar+jyZLqEkfjS69YA11J4DsnxaDWytY4olbGjMlBhfFugaPmU1KQmHfl zETOD4fJyH7boGwNgdFuKAV/eqbUXVI20qE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Lets sync our mailbox commands with the known/Linux constants so that we have a more complete view of what we can request from the VPU. Signed-off-by: Jeremy Linton Reviewed-by: Andrei Warkentin --- .../RaspberryPi/Include/IndustryStandard/RpiMbox.h | 94 ++++++++++++++++++= ++-- 1 file changed, 89 insertions(+), 5 deletions(-) diff --git a/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h b/Plat= form/RaspberryPi/Include/IndustryStandard/RpiMbox.h index 7104068998..551c2b82e5 100644 --- a/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h +++ b/Platform/RaspberryPi/Include/IndustryStandard/RpiMbox.h @@ -45,6 +45,10 @@ #define RPI_MBOX_GET_BOARD_SERIAL 0x00010004 #define RPI_MBOX_GET_ARM_MEMSIZE 0x00010005 #define RPI_MBOX_GET_VC_MEMSIZE 0x00010006 +#define RPI_MBOX_GET_CLOCKS 0x00010007 + +#define RPI_MBOX_GET_POWER_STATE 0x00020001 +#define RPI_MBOX_GET_TIMING 0x00020002 =20 #define RPI_MBOX_SET_POWER_STATE 0x00028001 =20 @@ -58,28 +62,92 @@ #define RPI_MBOX_POWER_STATE_SPI 0x00000007 #define RPI_MBOX_POWER_STATE_CCP2TX 0x00000008 =20 +#define RPI_MBOX_GET_CLOCK_STATE 0x00030001 #define RPI_MBOX_GET_CLOCK_RATE 0x00030002 +#define RPI_MBOX_GET_VOLTAGE 0x00030003 #define RPI_MBOX_GET_MAX_CLOCK_RATE 0x00030004 +#define RPI_MBOX_GET_MAX_VOLTAGE 0x00030005 +#define RPI_MBOX_GET_TEMPERATURE 0x00030006 #define RPI_MBOX_GET_MIN_CLOCK_RATE 0x00030007 - +#define RPI_MBOX_GET_MIN_VOLTAGE 0x00030008 +#define RPI_MBOX_GET_TURBO 0x00030009 +#define RPI_MBOX_GET_MAX_TEMPERATURE 0x0003000a +#define RPI_MBOX_GET_STC 0x0003000b +#define RPI_MBOX_ALLOCATE_MEMORY 0x0003000c +#define RPI_MBOX_LOCK_MEMORY 0x0003000d +#define RPI_MBOX_UNLOCK_MEMORY 0x0003000e +#define RPI_MBOX_RELEASE_MEMORY 0x0003000f +#define RPI_MBOX_EXECUTE_CODE 0x00030010 +#define RPI_MBOX_EXECUTE_QPU 0x00030011 +#define RPI_MBOX_SET_ENABLE_QPU 0x00030012 +#define RPI_MBOX_GET_DISPMANX_RESOURCE_MEM_HANDLE 0x00030014 +#define RPI_MBOX_GET_EDID_BLOCK 0x00030020 +#define RPI_MBOX_GET_CUSTOMER_OTP 0x00030021 +#define RPI_MBOX_GET_DOMAIN_STATE 0x00030030 +#define RPI_MBOX_GET_GPIO_STATE 0x00030041 +#define RPI_MBOX_GET_GPIO_CONFIG 0x00030043 +#define RPI_MBOX_GET_PERIPH_REG 0x00030045 +#define RPI_MBOX_GET_THROTTLED 0x00030046 +#define RPI_MBOX_GET_CLOCK_MEASURED 0x00030047 +#define RPI_MBOX_NOTIFY_REBOOT 0x00030048 +#define RPI_MBOX_GET_POE_HAT_VAL 0x00030049 +#define RPI_MBOX_SET_POE_HAT_VAL 0x00030050 #define RPI_MBOX_NOTIFY_XHCI_RESET 0x00030058 =20 +#define RPI_MBOX_SET_CLOCK_STATE 0x00038001 #define RPI_MBOX_SET_CLOCK_RATE 0x00038002 +#define RPI_MBOX_SET_VOLTAGE 0x00038003 +#define RPI_MBOX_SET_TURBO 0x00038009 +#define RPI_MBOX_SET_CUSTOMER_OTP 0x00038021 +#define RPI_MBOX_SET_DOMAIN_STATE 0x00038030 #define RPI_MBOX_SET_GPIO 0x00038041 +#define RPI_MBOX_SET_SDHOST_CLOCK 0x00038042 +#define RPI_MBOX_SET_GPIO_CONFIG 0x00038043 +#define RPI_MBOX_SET_PERIPH_REG 0x00038045 =20 +#define RPI_MBOX_ALLOC_FB 0x00040001 +#define RPI_MBOX_FB_BLANK 0x00040002 #define RPI_MBOX_GET_FB_GEOMETRY 0x00040003 -#define RPI_MBOX_GET_FB_LINELENGTH 0x00040008 +#define RPI_MBOX_GET_FB_VIRTUAL_WIDTH_HEIGHT 0x00040004 #define RPI_MBOX_GET_FB_COLOR_DEPTH 0x00040005 -#define RPI_MBOX_GET_FB_REGION 0x00040001 +#define RPI_MBOX_GET_FB_PIXEL_ORDER 0x00040006 +#define RPI_MBOX_GET_FB_ALPHA_MODE 0x00040007 +#define RPI_MBOX_GET_FB_LINELENGTH 0x00040008 +#define RPI_MBOX_GET_FB_VIRTUAL_OFFSET 0x00040009 +#define RPI_MBOX_GET_FB_OVERSCAN 0x0004000a +#define RPI_MBOX_GET_FB_PALETTE 0x0004000b +#define RPI_MBOX_GET_FB_TOUCHBUF 0x0004000f +#define RPI_MBOX_GET_FB_GPIOVIRTBUF 0x00040010 + +#define RPI_MBOX_TEST_FB_PHYSICAL_WIDTH_HEIGHT 0x00044003 +#define RPI_MBOX_TEST_FB_VIRTUAL_WIDTH_HEIGHT 0x00044004 +#define RPI_MBOX_TEST_FB_DEPTH 0x00044005 +#define RPI_MBOX_TEST_FB_PIXEL_ORDER 0x00044006 +#define RPI_MBOX_TEST_FB_ALPHA_MODE 0x00044007 +#define RPI_MBOX_TEST_FB_VIRTUAL_OFFSET 0x00044009 +#define RPI_MBOX_TEST_FB_OVERSCAN 0x0004400a +#define RPI_MBOX_TEST_FB_PALETTE 0x0004400b +#define RPI_MBOX_TEST_FB_VSYNC 0x0004400e =20 +#define RPI_MBOX_FREE_FB 0x00048001 #define RPI_MBOX_SET_FB_PGEOM 0x00048003 #define RPI_MBOX_SET_FB_VGEOM 0x00048004 #define RPI_MBOX_SET_FB_DEPTH 0x00048005 -#define RPI_MBOX_ALLOC_FB 0x00040001 -#define RPI_MBOX_FREE_FB 0x00048001 +#define RPI_MBOX_SET_FB_PIXEL_ORDER 0x00048006 +#define RPI_MBOX_SET_FB_ALPHA_MODE 0x00048007 +#define RPI_MBOX_SET_FB_VIRTUAL_OFFSET 0x00048009 +#define RPI_MBOX_SET_FB_OVERSCAN 0x0004800a +#define RPI_MBOX_SET_FB_PALET TE 0x0004800b +#define RPI_MBOX_VCHIQ_INIT 0x00048010 +#define RPI_MBOX_SET_FB_TOUCHBUF 0x0004801f +#define RPI_MBOX_SET_FB_GPIOVIRTBUF 0x00048020 +#define RPI_MBOX_SET_FB_VSYNC 0x0004800e +#define RPI_MBOX_SET_FB_BACKLIGHT 0x0004800f =20 #define RPI_MBOX_GET_COMMAND_LINE 0x00050001 =20 +#define RPI_MBOX_GET_DMA_CHANNELS 0x00060001 + #define RPI_MBOX_POWER_STATE_ENABLE BIT0 #define RPI_MBOX_POWER_STATE_WAIT BIT1 =20 @@ -93,5 +161,21 @@ #define RPI_MBOX_CLOCK_RATE_SDRAM 0x000000008 #define RPI_MBOX_CLOCK_RATE_PIXEL 0x000000009 #define RPI_MBOX_CLOCK_RATE_PWM 0x00000000a +#define RPI_MBOX_CLOCK_RATE_HEVC 0x00000000b +#define RPI_MBOX_CLOCK_RATE_EMMC2 0x00000000c +#define RPI_MBOX_CLOCK_RATE_M2MC 0x00000000d +#define RPI_MBOX_CLOCK_RATE_PIXEL_BVB 0x00000000d + +#define RPI_EXP_GPIO_DIR_IN 0 +#define RPI_EXP_GPIO_DIR_OUT 1 + +#define RPI_EXP_GPIO_BT 0 +#define RPI_EXP_GPIO_WIFI 1 +#define RPI_EXP_GPIO_LED 2 +#define RPI_EXP_GPIO_RESET 3 +#define RPI_EXP_GPIO_SD_VOLT 4 +#define RPI_EXP_GPIO_CAMERA 5 +#define RPI_EXP_GPIO_SD_POWER 6 +#define RPI_EXP_GPIO_POWER_LED 7 =20 #endif /* __RASPBERRY_PI_MAILBOX_H__ */ --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#69725): https://edk2.groups.io/g/devel/message/69725 Mute This Topic: https://groups.io/mt/79453716/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 19:03:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+69726+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69726+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1609864478; cv=none; d=zohomail.com; s=zohoarc; b=Ov1CaffpWebKYoTweFwLaLHS18KV8EuGTUUpGeA1bCJ7bSV9kfbioss4hAiUJFx9HtvmYM5qugRzXFsLdofvxgr2z4OI09M6RlUkOcLmdXFVDalPYoV3Uxlrj5DMZ5o4YSwgtm8XPjqwpautpIEmBUgIjgMnhGVTCjx997ScN2M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609864478; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=g5coEbW+mhxFl1lX715ylvVdvZwKThUuJI1mNWeCqDc=; b=gONQmyZwuMSGPLKtSXtA3GQVh8g2lwt7mZejmFF9mYrZH8s8A+mGkjjAKGDnMDyNYT+quATZLU06UOrsmAP26c6nNDzrgbti0PyIUG9L7t5za3KEJzuNw8ROZ8Np6dE6fTI6gsdeqFqtSYdH7FgucaWylBfFOkEAjDOr+YhTkIg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69726+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1609864478084956.9891228508375; Tue, 5 Jan 2021 08:34:38 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 9qXCYY1788612xC9AfEBvmId; Tue, 05 Jan 2021 08:34:37 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.8126.1609864477172989218 for ; Tue, 05 Jan 2021 08:34:37 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DC39112FC; Tue, 5 Jan 2021 08:34:26 -0800 (PST) X-Received: from mammon-tx2.austin.arm.com (mammon-tx2.austin.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D30463F70D; Tue, 5 Jan 2021 08:34:26 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: ard.biesheuvel@arm.com, leif@nuviainc.com, pete@akeo.ie, samer.el-haj-mahmoud@arm.com, awarkentin@vmware.com, Jeremy Linton Subject: [edk2-devel] [PATCH v4 2/7] Platform/RaspberryPi: Add further mailbox helpers Date: Tue, 5 Jan 2021 10:34:15 -0600 Message-Id: <20210105163420.1711652-3-jeremy.linton@arm.com> In-Reply-To: <20210105163420.1711652-1-jeremy.linton@arm.com> References: <20210105163420.1711652-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: fyxCbieBfSJAouuvj1Jk391ix1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1609864477; bh=AOM3uCX2ixxfpZw8QBre4CeRq87qJJr4rF+lcYJ7b1c=; h=Cc:Date:From:Reply-To:Subject:To; b=ABZiyiKg7ErTI7mh2ykRNxiYUwR8JUMhvdGjoBq53szp1D70X6NLYcrzxD2i7ZEYDOh mUlxNJ/bEhdup2s47XdwYN3A7z1A1TEKpvFr+LzlYdpd9U6J5P2SSoCs5gtDxmGikYxA8 DpxbfwH3jBHvwNhSnDVfTY85deWsLxYD6v4= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Lets add some further mailbox helpers and convert the existing RpiFirmwareSetLed into a generic SetGpio() function. Signed-off-by: Jeremy Linton Reviewed-by: Andrei Warkentin --- .../Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c | 240 +++++++++++++++++= +++- .../RaspberryPi/Include/Protocol/RpiFirmware.h | 25 +++ 2 files changed, 255 insertions(+), 10 deletions(-) diff --git a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c b= /Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c index ade91c9f34..bf74148bbb 100644 --- a/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c +++ b/Platform/RaspberryPi/Drivers/RpiFirmwareDxe/RpiFirmwareDxe.c @@ -1090,7 +1090,6 @@ RpiFirmwareSetClockRate ( return EFI_SUCCESS; } =20 - #pragma pack() typedef struct { UINT32 ClockId; @@ -1152,6 +1151,17 @@ RpiFirmwareGetClockRate ( STATIC EFI_STATUS EFIAPI +RpiFirmwareGetCurrentClockState ( + IN UINT32 ClockId, + OUT UINT32 *ClockState + ) +{ + return RpiFirmwareGetClockRate (ClockId, RPI_MBOX_GET_CLOCK_STATE, Clock= State); +} + +STATIC +EFI_STATUS +EFIAPI RpiFirmwareGetCurrentClockRate ( IN UINT32 ClockId, OUT UINT32 *ClockRate @@ -1181,6 +1191,63 @@ RpiFirmwareGetMinClockRate ( { return RpiFirmwareGetClockRate (ClockId, RPI_MBOX_GET_MIN_CLOCK_RATE, Cl= ockRate); } + +#pragma pack() +typedef struct { + UINT32 ClockId; + UINT32 ClockState; +} RPI_FW_GET_CLOCK_STATE_TAG; + +typedef struct { + RPI_FW_BUFFER_HEAD BufferHead; + RPI_FW_TAG_HEAD TagHead; + RPI_FW_GET_CLOCK_STATE_TAG TagBody; + UINT32 EndTag; +} RPI_FW_SET_CLOCK_STATE_CMD; +#pragma pack() + +STATIC +EFI_STATUS +RpiFirmwareSetClockState ( + IN UINT32 ClockId, + IN UINT32 ClockState + ) +{ + RPI_FW_SET_CLOCK_STATE_CMD *Cmd; + EFI_STATUS Status; + UINT32 Result; + + if (!AcquireSpinLockOrFail (&mMailboxLock)) { + DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)= ); + return EFI_DEVICE_ERROR; + } + + Cmd =3D mDmaBuffer; + ZeroMem (Cmd, sizeof (*Cmd)); + + Cmd->BufferHead.BufferSize =3D sizeof (*Cmd); + Cmd->BufferHead.Response =3D 0; + Cmd->TagHead.TagId =3D RPI_MBOX_SET_CLOCK_STATE; + Cmd->TagHead.TagSize =3D sizeof (Cmd->TagBody); + Cmd->TagHead.TagValueSize =3D 0; + Cmd->TagBody.ClockId =3D ClockId; + Cmd->TagBody.ClockState =3D ClockState; + Cmd->EndTag =3D 0; + + Status =3D MailboxTransaction (Cmd->BufferHead.BufferSize, RPI_MBOX_VC_C= HANNEL, &Result); + + ReleaseSpinLock (&mMailboxLock); + + if (EFI_ERROR (Status) || + Cmd->BufferHead.Response !=3D RPI_MBOX_RESP_SUCCESS) { + DEBUG ((DEBUG_ERROR, + "%a: mailbox transaction error: Status =3D=3D %r, Response =3D=3D 0x= %x\n", + __FUNCTION__, Status, Cmd->BufferHead.Response)); + return EFI_DEVICE_ERROR; + } + + return EFI_SUCCESS; +} =20 #pragma pack() typedef struct { @@ -1199,8 +1266,9 @@ typedef struct { STATIC VOID EFIAPI -RpiFirmwareSetLed ( - IN BOOLEAN On +RpiFirmwareSetGpio ( + IN UINT32 Gpio, + IN BOOLEAN State ) { RPI_FW_SET_GPIO_CMD *Cmd; @@ -1220,14 +1288,10 @@ RpiFirmwareSetLed ( Cmd->TagHead.TagId =3D RPI_MBOX_SET_GPIO; Cmd->TagHead.TagSize =3D sizeof (Cmd->TagBody); /* - * GPIO_PIN_2 =3D Activity LED - * GPIO_PIN_4 =3D HDMI Detect (Input / Active Low) - * GPIO_PIN_7 =3D Power LED (Input / Active Low) - * * There's also a 128 pin offset. */ - Cmd->TagBody.Pin =3D 128 + 2; - Cmd->TagBody.State =3D On; + Cmd->TagBody.Pin =3D 128 + Gpio; + Cmd->TagBody.State =3D State; Cmd->TagHead.TagValueSize =3D 0; Cmd->EndTag =3D 0; =20 @@ -1242,6 +1306,16 @@ RpiFirmwareSetLed ( __FUNCTION__, Status, Cmd->BufferHead.Response)); } } + +STATIC +VOID +EFIAPI +RpiFirmwareSetLed ( + IN BOOLEAN On + ) +{ + RpiFirmwareSetGpio (RPI_EXP_GPIO_LED, On); +} =20 #pragma pack() typedef struct { @@ -1299,6 +1373,149 @@ RpiFirmwareNotifyXhciReset ( return Status; } =20 +#pragma pack() +typedef struct { + UINT32 Gpio; + UINT32 Direction; + UINT32 Polarity; + UINT32 TermEn; + UINT32 TermPullUp; +} RPI_FW_GPIO_GET_CFG_TAG; + +typedef struct { + RPI_FW_BUFFER_HEAD BufferHead; + RPI_FW_TAG_HEAD TagHead; + RPI_FW_GPIO_GET_CFG_TAG TagBody; + UINT32 EndTag; +} RPI_FW_NOTIFY_GPIO_GET_CFG_CMD; +#pragma pack() + + +STATIC +EFI_STATUS +EFIAPI +RpiFirmwareNotifyGpioGetCfg ( + IN UINTN Gpio, + IN UINT32 *Polarity + ) +{ + RPI_FW_NOTIFY_GPIO_GET_CFG_CMD *Cmd; + EFI_STATUS Status; + UINT32 Result; + + if (!AcquireSpinLockOrFail (&mMailboxLock)) { + DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)= ); + return EFI_DEVICE_ERROR; + } + + Cmd =3D mDmaBuffer; + ZeroMem (Cmd, sizeof (*Cmd)); + + Cmd->BufferHead.BufferSize =3D sizeof (*Cmd); + Cmd->BufferHead.Response =3D 0; + Cmd->TagHead.TagId =3D RPI_MBOX_GET_GPIO_CONFIG; + Cmd->TagHead.TagSize =3D sizeof (Cmd->TagBody); + Cmd->TagBody.Gpio =3D 128 + Gpio; + + Cmd->TagHead.TagValueSize =3D 0; + Cmd->EndTag =3D 0; + + Status =3D MailboxTransaction (Cmd->BufferHead.BufferSize, RPI_MBOX_VC_C= HANNEL, &Result); + + *Polarity =3D Cmd->TagBody.Polarity; + + ReleaseSpinLock (&mMailboxLock); + + if (EFI_ERROR (Status) || + Cmd->BufferHead.Response !=3D RPI_MBOX_RESP_SUCCESS) { + DEBUG ((DEBUG_ERROR, + "%a: mailbox transaction error: Status =3D=3D %r, Response =3D=3D 0= x%x\n", + __FUNCTION__, Status, Cmd->BufferHead.Response)); + } + + return Status; +} + + +#pragma pack() +typedef struct { + UINT32 Gpio; + UINT32 Direction; + UINT32 Polarity; + UINT32 TermEn; + UINT32 TermPullUp; + UINT32 State; +} RPI_FW_GPIO_SET_CFG_TAG; + +typedef struct { + RPI_FW_BUFFER_HEAD BufferHead; + RPI_FW_TAG_HEAD TagHead; + RPI_FW_GPIO_SET_CFG_TAG TagBody; + UINT32 EndTag; +} RPI_FW_NOTIFY_GPIO_SET_CFG_CMD; +#pragma pack() + + +STATIC +EFI_STATUS +EFIAPI +RpiFirmwareNotifyGpioSetCfg ( + IN UINTN Gpio, + IN UINTN Direction, + IN UINTN State + ) +{ + RPI_FW_NOTIFY_GPIO_SET_CFG_CMD *Cmd; + EFI_STATUS Status; + UINT32 Result; + + Status =3D RpiFirmwareNotifyGpioGetCfg (Gpio, &Result); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Failed to get GPIO polarity\n", __FUNCTION__)= ); + Result =3D 0; //default polarity + } + + + if (!AcquireSpinLockOrFail (&mMailboxLock)) { + DEBUG ((DEBUG_ERROR, "%a: failed to acquire spinlock\n", __FUNCTION__)= ); + return EFI_DEVICE_ERROR; + } + + Cmd =3D mDmaBuffer; + ZeroMem (Cmd, sizeof (*Cmd)); + + Cmd->BufferHead.BufferSize =3D sizeof (*Cmd); + Cmd->BufferHead.Response =3D 0; + Cmd->TagHead.TagId =3D RPI_MBOX_SET_GPIO_CONFIG; + Cmd->TagHead.TagSize =3D sizeof (Cmd->TagBody); + + Cmd->TagBody.Gpio =3D 128 + Gpio; + Cmd->TagBody.Direction =3D Direction; + Cmd->TagBody.Polarity =3D Result; + Cmd->TagBody.TermEn =3D 0; + Cmd->TagBody.TermPullUp =3D 0; + Cmd->TagBody.State =3D State; + + Cmd->TagHead.TagValueSize =3D 0; + Cmd->EndTag =3D 0; + + Status =3D MailboxTransaction (Cmd->BufferHead.BufferSize, RPI_MBOX_VC_C= HANNEL, &Result); + + ReleaseSpinLock (&mMailboxLock); + + if (EFI_ERROR (Status) || + Cmd->BufferHead.Response !=3D RPI_MBOX_RESP_SUCCESS) { + DEBUG ((DEBUG_ERROR, + "%a: mailbox transaction error: Status =3D=3D %r, Response =3D=3D 0= x%x\n", + __FUNCTION__, Status, Cmd->BufferHead.Response)); + } + + RpiFirmwareSetGpio (Gpio,!State); + + + return Status; +} + STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL mRpiFirmwareProtocol =3D { RpiFirmwareSetPowerState, RpiFirmwareGetMacAddress, @@ -1321,7 +1538,10 @@ STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL mRpiFirmwarePr= otocol =3D { RpiFirmwareGetCpuName, RpiFirmwareGetArmMemory, RPiFirmwareGetModelInstalledMB, - RpiFirmwareNotifyXhciReset + RpiFirmwareNotifyXhciReset, + RpiFirmwareGetCurrentClockState, + RpiFirmwareSetClockState, + RpiFirmwareNotifyGpioSetCfg }; =20 /** diff --git a/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h b/Platform= /RaspberryPi/Include/Protocol/RpiFirmware.h index 56a8d15a38..d841608e57 100644 --- a/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h +++ b/Platform/RaspberryPi/Include/Protocol/RpiFirmware.h @@ -37,6 +37,20 @@ EFI_STATUS =20 typedef EFI_STATUS +(EFIAPI *GET_CLOCK_STATE) ( + IN UINT32 ClockId, + OUT UINT32 *ClockState + ); + +typedef +EFI_STATUS +(EFIAPI *SET_CLOCK_STATE) ( + IN UINT32 ClockId, + IN UINT32 ClockState + ); + +typedef +EFI_STATUS (EFIAPI *GET_CLOCK_RATE) ( IN UINT32 ClockId, OUT UINT32 *ClockRate @@ -149,6 +163,14 @@ EFI_STATUS UINTN FunctionNumber ); =20 +typedef=20 +EFI_STATUS +(EFIAPI *GPIO_SET_CFG) ( + UINTN Gpio, + UINTN Direction, + UINTN State + ); + typedef struct { SET_POWER_STATE SetPowerState; GET_MAC_ADDRESS GetMacAddress; @@ -172,6 +194,9 @@ typedef struct { GET_ARM_MEM GetArmMem; GET_MODEL_INSTALLED_MB GetModelInstalledMB; NOTIFY_XHCI_RESET NotifyXhciReset; + GET_CLOCK_STATE GetClockState; + SET_CLOCK_STATE SetClockState; + GPIO_SET_CFG SetGpioConfig; } RASPBERRY_PI_FIRMWARE_PROTOCOL; =20 extern EFI_GUID gRaspberryPiFirmwareProtocolGuid; --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#69726): https://edk2.groups.io/g/devel/message/69726 Mute This Topic: https://groups.io/mt/79453718/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 19:03:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+69719+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69719+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1609864479; cv=none; d=zohomail.com; s=zohoarc; b=YdBQpRYERCtKsQ5b0/raDJelgaEsP37jcEQNxtTMN9zYWds79QkWmz9W98o9ZMd62/3p70w+WcVfHFZ1n1YvyILM9iv/io5MaJaNUmh5d5pljYa8XVQLF2ePI2qecguo5lmYdpP9tpsh8y22sC+sZMtp4i6ljSPc1ItdVDexBBI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609864479; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=H0bUVg/LXrqbl2xRw/LhB4cDENKoCj+gGxXnEGc270w=; b=LrUMxe69VSFUFobxuL8myTOvg1RTw/qRQW20NVEgRND4dxt3hLXSF0CaIF1YdDJgaOdVdCBZP65Q3MjdDKuK4FqqB9eUmofxrSY6JCnKthGGD6tNdsZGHuq6z2DKkaEUvn2c6+QEaXE6HF2O11YF805BNgBBQMhfh8mCf3OHSwA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69719+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1609864479264269.11329371640534; Tue, 5 Jan 2021 08:34:39 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id GrPQYY1788612x5RR3N1h4mi; Tue, 05 Jan 2021 08:34:38 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web09.7966.1609864473031984439 for ; Tue, 05 Jan 2021 08:34:33 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B8AC61396; Tue, 5 Jan 2021 08:34:27 -0800 (PST) X-Received: from mammon-tx2.austin.arm.com (mammon-tx2.austin.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A844A3F70D; Tue, 5 Jan 2021 08:34:27 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: ard.biesheuvel@arm.com, leif@nuviainc.com, pete@akeo.ie, samer.el-haj-mahmoud@arm.com, awarkentin@vmware.com, Jeremy Linton Subject: [edk2-devel] [PATCH v4 3/7] Platform/RaspberryPi: Split MMC register definitions Date: Tue, 5 Jan 2021 10:34:16 -0600 Message-Id: <20210105163420.1711652-4-jeremy.linton@arm.com> In-Reply-To: <20210105163420.1711652-1-jeremy.linton@arm.com> References: <20210105163420.1711652-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: 0pctIAlR1djFyVC8wKK7fB7Zx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1609864478; bh=+F6LtsmicZS/KhQe3Kd0NBCAkyYXbzoJTrJqBsXshcU=; h=Cc:Date:From:Reply-To:Subject:To; b=Vr7JGFqAWNXGWl0ElYTd6fgjy7r1EcbgvTjPvnQEupV11ZjIQuQ1vHIdhfb9OP8RaJ1 N7/vrGIAqSP5lD0xp4U7EdlqYZkJoMQV5jdP9/NmaLp3XzXWM687/3ILZfP+2c2ad7DK+ cH+/m6dhfJagw5CvXmoEzP7+/iVrFEYfyLc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The current MMC (really SDHCI) definitions are tied to the Arasan controller. As we intend to reuse the definitions lets make the base address configurable when the driver loads. This assumes we won't ever want to run both the eMMC2 and Arasan SDHCI controller at the same time. Signed-off-by: Jeremy Linton Reviewed-by: Andrei Warkentin Reviewed-by: Philippe Mathieu-Daude --- .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c | 9 ++++- .../Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h | 42 ++++++++++++------= ---- 2 files changed, 32 insertions(+), 19 deletions(-) diff --git a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe= .c b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c index 88e9126e35..c8fdfc193b 100644 --- a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c +++ b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c @@ -16,6 +16,7 @@ STATIC CARD_DETECT_STATE mCardDetectState =3D CardDetectR= equired; UINT32 LastExecutedCommand =3D (UINT32) -1; =20 STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol; +STATIC UINTN MmcHsBase; =20 /** These SD commands are optional, according to the SD Spec @@ -763,7 +764,13 @@ MMCInitialize ( =20 DEBUG ((DEBUG_MMCHOST_SD, "ArasanMMCHost: MMCInitialize()\n")); =20 - if (!PcdGet32 (PcdSdIsArasan)) { + if (PcdGet32 (PcdSdIsArasan)) { + DEBUG ((DEBUG_INFO, "SD is routed to Arasan\n")); + MmcHsBase =3D MMCHS1_BASE; + } else if (RPI_MODEL =3D=3D 4) { + DEBUG ((DEBUG_INFO, "SD is routed to emmc2\n")); + MmcHsBase =3D MMCHS2_BASE; + } else { DEBUG ((DEBUG_INFO, "SD is not routed to Arasan\n")); return EFI_REQUEST_UNLOAD_IMAGE; } diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Sdio.= h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h index fd07b47170..1d38cb3d3f 100644 --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Sdio.h @@ -13,15 +13,18 @@ =20 // MMC/SD/SDIO1 register definitions. #define MMCHS1_OFFSET 0x00300000 +#define MMCHS2_OFFSET 0x00340000 #define MMCHS1_BASE (BCM2836_SOC_REGISTERS + MMCHS1_OFFSET) +#define MMCHS2_BASE (BCM2836_SOC_REGISTERS + MMCHS2_OFFSET) #define MMCHS1_LENGTH 0x00000100 +#define MMCHS2_LENGTH 0x00000100 =20 -#define MMCHS_BLK (MMCHS1_BASE + 0x4) +#define MMCHS_BLK (MmcHsBase + 0x4) #define BLEN_512BYTES (0x200UL << 0) =20 -#define MMCHS_ARG (MMCHS1_BASE + 0x8) +#define MMCHS_ARG (MmcHsBase + 0x8) =20 -#define MMCHS_CMD (MMCHS1_BASE + 0xC) +#define MMCHS_CMD (MmcHsBase + 0xC) #define BCE_ENABLE BIT1 #define DDIR_READ BIT4 #define DDIR_WRITE (0x0UL << 4) @@ -43,13 +46,13 @@ #define INDX(CMD_INDX) (TYPE(CMD_TYPE_NORMAL) | _INDX(CMD_INDX)) #define INDX_ABORT(CMD_INDX) (TYPE(CMD_TYPE_ABORT) | _INDX(CMD_INDX)) =20 -#define MMCHS_RSP10 (MMCHS1_BASE + 0x10) -#define MMCHS_RSP32 (MMCHS1_BASE + 0x14) -#define MMCHS_RSP54 (MMCHS1_BASE + 0x18) -#define MMCHS_RSP76 (MMCHS1_BASE + 0x1C) -#define MMCHS_DATA (MMCHS1_BASE + 0x20) +#define MMCHS_RSP10 (MmcHsBase + 0x10) +#define MMCHS_RSP32 (MmcHsBase + 0x14) +#define MMCHS_RSP54 (MmcHsBase + 0x18) +#define MMCHS_RSP76 (MmcHsBase + 0x1C) +#define MMCHS_DATA (MmcHsBase + 0x20) =20 -#define MMCHS_PRES_STATE (MMCHS1_BASE + 0x24) +#define MMCHS_PRES_STATE (MmcHsBase + 0x24) #define CMDI_MASK BIT0 #define CMDI_ALLOWED (0x0UL << 0) #define CMDI_NOT_ALLOWED BIT0 @@ -58,17 +61,19 @@ #define DATI_NOT_ALLOWED BIT1 #define WRITE_PROTECT_OFF BIT19 =20 -#define MMCHS_HCTL (MMCHS1_BASE + 0x28) +#define MMCHS_HCTL (MmcHsBase + 0x28) #define DTW_1_BIT (0x0UL << 1) #define DTW_4_BIT BIT1 #define SDBP_MASK BIT8 #define SDBP_OFF (0x0UL << 8) #define SDBP_ON BIT8 +#define SDVS_MASK (0x7UL << 9) #define SDVS_1_8_V (0x5UL << 9) #define SDVS_3_0_V (0x6UL << 9) +#define SDVS_3_3_V (0x7UL << 9) #define IWE BIT24 =20 -#define MMCHS_SYSCTL (MMCHS1_BASE + 0x2C) +#define MMCHS_SYSCTL (MmcHsBase + 0x2C) #define ICE BIT0 #define ICS_MASK BIT1 #define ICS BIT1 @@ -84,7 +89,7 @@ #define SRC BIT25 #define SRD BIT26 =20 -#define MMCHS_INT_STAT (MMCHS1_BASE + 0x30) +#define MMCHS_INT_STAT (MmcHsBase + 0x30) #define CC BIT0 #define TC BIT1 #define BWR BIT4 @@ -96,7 +101,7 @@ #define DCRC BIT21 #define DEB BIT22 =20 -#define MMCHS_IE (MMCHS1_BASE + 0x34) +#define MMCHS_IE (MmcHsBase + 0x34) #define CC_EN BIT0 #define TC_EN BIT1 #define BWR_EN BIT4 @@ -112,7 +117,7 @@ #define BADA_EN BIT29 #define ALL_EN 0xFFFFFFFF =20 -#define MMCHS_ISE (MMCHS1_BASE + 0x38) +#define MMCHS_ISE (MmcHsBase + 0x38) #define CC_SIGEN BIT0 #define TC_SIGEN BIT1 #define BWR_SIGEN BIT4 @@ -127,14 +132,15 @@ #define CERR_SIGEN BIT28 #define BADA_SIGEN BIT29 =20 -#define MMCHS_AC12 (MMCHS1_BASE + 0x3C) +#define MMCHS_AC12 (MmcHsBase + 0x3C) +#define MMCHS_HC2R (MmcHsBase + 0x3E) =20 -#define MMCHS_CAPA (MMCHS1_BASE + 0x40) +#define MMCHS_CAPA (MmcHsBase + 0x40) #define VS30 BIT25 #define VS18 BIT26 =20 -#define MMCHS_CUR_CAPA (MMCHS1_BASE + 0x48) -#define MMCHS_REV (MMCHS1_BASE + 0xFC) +#define MMCHS_CUR_CAPA (MmcHsBase + 0x48) +#define MMCHS_REV (MmcHsBase + 0xFC) =20 #define BLOCK_COUNT_SHIFT 16 #define RCA_SHIFT 16 --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#69719): https://edk2.groups.io/g/devel/message/69719 Mute This Topic: https://groups.io/mt/79453710/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 19:03:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+69723+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69723+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1609864480; cv=none; d=zohomail.com; s=zohoarc; b=ITifMNP9ZVQICQDK5jOpEZTBX6u0h7Qbq3I5vdHGUC3NiGkAaymh3yRN6+VGgeFhoTnBM0uCWzVa0pAd/RSnBtKYdXIQwigAtgYyjYOW1xmNrqQwC4KA6XmCGClicu4OwIPen3vTv+sGw+9PUu9EDvgN7WxJ8iqDtJCzAEbxNfI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609864480; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=xad0h9dRHzx1xILPyTuUbQ68zyLiHvuXJchlu182ELw=; b=FhJSqSI9+dMCsfNHWaL9ei4Ci628ZMqjfdg2mv0NKVDLCWv/HgZ8vIzfgeN+ExSw8hMATGf2+MmOfZytCOwao25iwjF8vEIZKPAQWDPCXKUikd3zt5hHV1cB1VQW9udkpmZhe6qZfdfBwTsvgxAcMz0so0UGDaT9Lq3ifOYpnQ4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69723+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1609864480444310.45900957700906; Tue, 5 Jan 2021 08:34:40 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id hKloYY1788612xxl4322Z4Si; Tue, 05 Jan 2021 08:34:39 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.8164.1609864473866386545 for ; Tue, 05 Jan 2021 08:34:34 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8B5501435; Tue, 5 Jan 2021 08:34:28 -0800 (PST) X-Received: from mammon-tx2.austin.arm.com (mammon-tx2.austin.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8317B3F70D; Tue, 5 Jan 2021 08:34:28 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: ard.biesheuvel@arm.com, leif@nuviainc.com, pete@akeo.ie, samer.el-haj-mahmoud@arm.com, awarkentin@vmware.com, Jeremy Linton Subject: [edk2-devel] [PATCH v4 4/7] Platform/RaspberryPi/Arasan: Add write delay and voltage/clock config Date: Tue, 5 Jan 2021 10:34:17 -0600 Message-Id: <20210105163420.1711652-5-jeremy.linton@arm.com> In-Reply-To: <20210105163420.1711652-1-jeremy.linton@arm.com> References: <20210105163420.1711652-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: xQJSU8YpTQhOkzx3h2VzpAfax1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1609864479; bh=mY0rhwqMOM7Q8x5ZXfeZXOYUusbKgGwep52KdOhxG3s=; h=Cc:Date:From:Reply-To:Subject:To; b=A3xB4k8/WIt73x1m0OpZe10BwGxo6Jn7nOSOLy/rBE5hjCQBJ5wd3pEPeBg6TVJwrEM DxSN+TqHoW1zXW3xAwswum1M5aIEWdGbxDWDJly+cBQTCltGfhBI0Wuoldm60pR8XQf8b qOPXNieH0++rMq3vvFXm8Rk2C7eezWioS2g= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The uboot and Linux drivers have notes that there is a clock domain crossing problem that happens with back to back writes to the SD controllers on the rpi. Its not clear if this is still applicable to the rpi4/eMMC2 but it seems wise to add it. Further, we need to assure that the card voltage is set to 3.3V, and we should try and follow some of the SDHCI docs when it comes to changing the clock. Signed-off-by: Jeremy Linton Reviewed-by: Andrei Warkentin --- .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c | 112 +++++++++++++++++= ---- .../Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h | 1 + 2 files changed, 93 insertions(+), 20 deletions(-) diff --git a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe= .c b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c index c8fdfc193b..7e7caf40e3 100644 --- a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c +++ b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c @@ -18,6 +18,56 @@ UINT32 LastExecutedCommand =3D (UINT32) -1; STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol; STATIC UINTN MmcHsBase; =20 +STATIC +UINT32 +EFIAPI +SdMmioWrite32 ( + IN UINTN Address, + IN UINT32 Value + ) +{ + UINT32 ret; + ret =3D (UINT32)MmioWrite32 (Address, Value); + // There is a bug about clock domain crossing on writes, delay to avoid = it + gBS->Stall (STALL_AFTER_REG_WRITE_US); + return ret; +} + +STATIC +UINT32 +EFIAPI +SdMmioOr32 ( + IN UINTN Address, + IN UINT32 OrData + ) +{ + return SdMmioWrite32 (Address, MmioRead32 (Address) | OrData); +} + +STATIC +UINT32 +EFIAPI +SdMmioAnd32 ( + IN UINTN Address, + IN UINT32 AndData + ) +{ + return SdMmioWrite32 (Address, MmioRead32 (Address) & AndData); +} + +STATIC +UINT32 +EFIAPI +SdMmioAndThenOr32 ( + IN UINTN Address, + IN UINT32 AndData, + IN UINT32 OrData + ) +{ + return SdMmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData= ); +} + + /** These SD commands are optional, according to the SD Spec **/ @@ -175,7 +225,9 @@ SoftReset ( IN UINT32 Mask ) { - MmioOr32 (MMCHS_SYSCTL, Mask); + DEBUG ((DEBUG_MMCHOST_SD, "SoftReset with mask 0x%x\n", Mask)); + + SdMmioOr32 (MMCHS_SYSCTL, Mask); if (PollRegisterWithMask (MMCHS_SYSCTL, Mask, 0) =3D=3D EFI_TIMEOUT) { DEBUG ((DEBUG_ERROR, "Failed to SoftReset with mask 0x%x\n", Mask)); return EFI_TIMEOUT; @@ -326,29 +378,29 @@ MMCSendCommand ( } =20 if (IsAppCmd && MmcCmd =3D=3D ACMD22) { - MmioWrite32 (MMCHS_BLK, 4); + SdMmioWrite32 (MMCHS_BLK, 4); } else if (IsAppCmd && MmcCmd =3D=3D ACMD51) { - MmioWrite32 (MMCHS_BLK, 8); + SdMmioWrite32 (MMCHS_BLK, 8); } else if (!IsAppCmd && MmcCmd =3D=3D CMD6) { - MmioWrite32 (MMCHS_BLK, 64); + SdMmioWrite32 (MMCHS_BLK, 64); } else if (IsADTCCmd) { - MmioWrite32 (MMCHS_BLK, BLEN_512BYTES); + SdMmioWrite32 (MMCHS_BLK, BLEN_512BYTES); } =20 // Set Data timeout counter value to max value. - MmioAndThenOr32 (MMCHS_SYSCTL, (UINT32) ~DTO_MASK, DTO_VAL); + SdMmioAndThenOr32 (MMCHS_SYSCTL, (UINT32) ~DTO_MASK, DTO_VAL); =20 // // Clear Interrupt Status Register, but not the Card Inserted bit // to avoid messing with card detection logic. // - MmioWrite32 (MMCHS_INT_STAT, ALL_EN & ~(CARD_INS)); + SdMmioWrite32 (MMCHS_INT_STAT, ALL_EN & ~(CARD_INS)); =20 // Set command argument register - MmioWrite32 (MMCHS_ARG, Argument); + SdMmioWrite32 (MMCHS_ARG, Argument); =20 // Send the command - MmioWrite32 (MMCHS_CMD, MmcCmd); + SdMmioWrite32 (MMCHS_CMD, MmcCmd); =20 // Check for the command status. while (RetryCount < MAX_RETRY_COUNT) { @@ -373,7 +425,7 @@ MMCSendCommand ( =20 // Check if command is completed. if ((MmcStatus & CC) =3D=3D CC) { - MmioWrite32 (MMCHS_INT_STAT, CC); + SdMmioWrite32 (MMCHS_INT_STAT, CC); break; } =20 @@ -428,6 +480,21 @@ MMCNotifyState ( return Status; } =20 + DEBUG ((DEBUG_MMCHOST_SD, "ArasanMMCHost: CAP %X CAPH %X\n", MmioRea= d32(MMCHS_CAPA),MmioRead32(MMCHS_CUR_CAPA))); + + // Lets switch to card detect test mode. + SdMmioOr32 (MMCHS_HCTL, BIT7|BIT6); + + // set card voltage + SdMmioAnd32 (MMCHS_HCTL, ~SDBP_ON); + SdMmioAndThenOr32 (MMCHS_HCTL, (UINT32) ~SDBP_MASK, SDVS_3_3_V); + SdMmioOr32 (MMCHS_HCTL, SDBP_ON); + + DEBUG ((DEBUG_MMCHOST_SD, "ArasanMMCHost: AC12 %X HCTL %X\n", MmioRe= ad32(MMCHS_AC12),MmioRead32(MMCHS_HCTL))); + + // First turn off the clock + SdMmioAnd32 (MMCHS_SYSCTL, ~CEN); + // Attempt to set the clock to 400Khz which is the expected initiali= zation speed Status =3D CalculateClockFrequencyDivisor (400000, &Divisor, NULL); if (EFI_ERROR (Status)) { @@ -436,10 +503,15 @@ MMCNotifyState ( } =20 // Set Data Timeout Counter value, set clock frequency, enable inter= nal clock - MmioOr32 (MMCHS_SYSCTL, DTO_VAL | Divisor | CEN | ICS | ICE); + SdMmioOr32 (MMCHS_SYSCTL, DTO_VAL | Divisor | CEN | ICS | ICE); + SdMmioOr32 (MMCHS_HCTL, SDBP_ON); + // wait for ICS + while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) !=3D ICS); + + DEBUG ((DEBUG_MMCHOST_SD, "ArasanMMCHost: AC12 %X HCTL %X\n", MmioRe= ad32(MMCHS_AC12),MmioRead32(MMCHS_HCTL))); =20 // Enable interrupts - MmioWrite32 (MMCHS_IE, ALL_EN); + SdMmioWrite32 (MMCHS_IE, ALL_EN); } break; case MmcIdleState: @@ -452,7 +524,7 @@ MMCNotifyState ( ClockFrequency =3D 25000000; =20 // First turn off the clock - MmioAnd32 (MMCHS_SYSCTL, ~CEN); + SdMmioAnd32 (MMCHS_SYSCTL, ~CEN); =20 Status =3D CalculateClockFrequencyDivisor (ClockFrequency, &Divisor, N= ULL); if (EFI_ERROR (Status)) { @@ -462,13 +534,13 @@ MMCNotifyState ( } =20 // Setup new divisor - MmioAndThenOr32 (MMCHS_SYSCTL, (UINT32) ~CLKD_MASK, Divisor); + SdMmioAndThenOr32 (MMCHS_SYSCTL, (UINT32) ~CLKD_MASK, Divisor); =20 // Wait for the clock to stabilise while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) !=3D ICS); =20 // Set Data Timeout Counter value, set clock frequency, enable interna= l clock - MmioOr32 (MMCHS_SYSCTL, CEN); + SdMmioOr32 (MMCHS_SYSCTL, CEN); break; case MmcTransferState: break; @@ -635,7 +707,7 @@ MMCReadBlockData ( while (RetryCount < MAX_RETRY_COUNT) { MmcStatus =3D MmioRead32 (MMCHS_INT_STAT); if ((MmcStatus & BRR) !=3D 0) { - MmioWrite32 (MMCHS_INT_STAT, BRR); + SdMmioWrite32 (MMCHS_INT_STAT, BRR); /* * Data is ready. */ @@ -662,7 +734,7 @@ MMCReadBlockData ( gBS->Stall (STALL_AFTER_READ_US); } =20 - MmioWrite32 (MMCHS_INT_STAT, BRR); + SdMmioWrite32 (MMCHS_INT_STAT, BRR); return EFI_SUCCESS; } =20 @@ -699,13 +771,13 @@ MMCWriteBlockData ( while (RetryCount < MAX_RETRY_COUNT) { MmcStatus =3D MmioRead32 (MMCHS_INT_STAT); if ((MmcStatus & BWR) !=3D 0) { - MmioWrite32 (MMCHS_INT_STAT, BWR); + SdMmioWrite32 (MMCHS_INT_STAT, BWR); /* * Can write data. */ mFwProtocol->SetLed (TRUE); for (Count =3D 0; Count < BlockLen; Count +=3D 4, Buffer++) { - MmioWrite32 (MMCHS_DATA, *Buffer); + SdMmioWrite32 (MMCHS_DATA, *Buffer); } =20 mFwProtocol->SetLed (FALSE); @@ -726,7 +798,7 @@ MMCWriteBlockData ( gBS->Stall (STALL_AFTER_WRITE_US); } =20 - MmioWrite32 (MMCHS_INT_STAT, BWR); + SdMmioWrite32 (MMCHS_INT_STAT, BWR); return EFI_SUCCESS; } =20 diff --git a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe= .h b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h index 6cd600f738..e94606cc5b 100644 --- a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h +++ b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.h @@ -37,6 +37,7 @@ #define STALL_AFTER_REC_RESP_US (50) #define STALL_AFTER_WRITE_US (200) #define STALL_AFTER_READ_US (20) +#define STALL_AFTER_REG_WRITE_US (10) #define STALL_AFTER_RETRY_US (20) =20 #define MAX_DIVISOR_VALUE 1023 --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#69723): https://edk2.groups.io/g/devel/message/69723 Mute This Topic: https://groups.io/mt/79453714/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 19:03:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+69720+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69720+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1609864479; cv=none; d=zohomail.com; s=zohoarc; b=ThgSSdsPFgYE9dbIYpz9mKQ52Dlk9Rjbm4QssdPzrzRjEsjbSYacKkcy2nIJWxH715QuC6TgSxUz+dRtaGwSJoAKP3LWD6QPgWuKRMFKJKt+2cvL6gqA//3joxjRHwPU8MFYztxVLjTeBQOgEZBYyBcA6V9nPm4iwdJesHL1Rts= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609864479; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=rw9DiFbCaxsCgRM2qsa3G44/EU0vwP2nepd36uY3248=; b=T62ybMY0E/K4o1q1Tc/kLSgi/rEX+ITwFOqVMKP0t0d7gBnfrL9lFpCADr/w+VYSwA3ju/3M3RixbIABNfjntfOBT9L6A6KaU9gOF7ZSNqM5AiZi4xpivSSYd5N6llZD8XjjYjSvGQrAWy4uBZn2bZyqgIpsRgMDTopjNYrk35I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69720+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1609864479553696.5454226395369; Tue, 5 Jan 2021 08:34:39 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id D7v5YY1788612xkSqQJGCLgt; Tue, 05 Jan 2021 08:34:39 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.7982.1609864473790926112 for ; Tue, 05 Jan 2021 08:34:33 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5A076143D; Tue, 5 Jan 2021 08:34:29 -0800 (PST) X-Received: from mammon-tx2.austin.arm.com (mammon-tx2.austin.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 53B043F70D; Tue, 5 Jan 2021 08:34:29 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: ard.biesheuvel@arm.com, leif@nuviainc.com, pete@akeo.ie, samer.el-haj-mahmoud@arm.com, awarkentin@vmware.com, Jeremy Linton Subject: [edk2-devel] [PATCH v4 5/7] Platform/RaspberryPi/Arasan: Select the correct base frequency Date: Tue, 5 Jan 2021 10:34:18 -0600 Message-Id: <20210105163420.1711652-6-jeremy.linton@arm.com> In-Reply-To: <20210105163420.1711652-1-jeremy.linton@arm.com> References: <20210105163420.1711652-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: jNllwnSl8lTbyqokMUnrQ1PKx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1609864479; bh=ayi9Ie1bB8lS8CfLSy1OzYOyfhI0WBFaMcy5yRiPI+8=; h=Cc:Date:From:Reply-To:Subject:To; b=LpNrMlkXEDLAWSxSXFfN0SmsErL+f8ELl5Deb5SBkJeDs40azNbrdhJxTD7YFwv1o5q NpL7HeZcXvNFDijYpSIsUEbRkNsWi7hEDYSSnLA/iL7GL8MIbWcMpe1iMBCSszaWlZTjy Arx43PQ/5JtcseaXZqaG2V8yEUPzSGJdZM8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The firmware reports the eMMC2 frequency with a slightly different mailbox command, lets select the correct one based on which controller we are binding to. Signed-off-by: Jeremy Linton Reviewed-by: Andrei Warkentin --- .../RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c | 10 ++++++= +--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe= .c b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c index 7e7caf40e3..9adc5c53d8 100644 --- a/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c +++ b/Platform/RaspberryPi/Drivers/ArasanMmcHostDxe/ArasanMmcHostDxe.c @@ -250,7 +250,11 @@ CalculateClockFrequencyDivisor ( UINT32 Divisor; UINT32 BaseFrequency =3D 0; =20 - Status =3D mFwProtocol->GetClockRate (RPI_MBOX_CLOCK_RATE_EMMC, &BaseFre= quency); + if (PcdGet32 (PcdSdIsArasan)) { + Status =3D mFwProtocol->GetClockRate (RPI_MBOX_CLOCK_RATE_EMMC, &BaseF= requency); + } else { + Status =3D mFwProtocol->GetClockRate (RPI_MBOX_CLOCK_RATE_EMMC2, &Base= Frequency); + } if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "Couldn't get RPI_MBOX_CLOCK_RATE_EMMC\n")); return Status; @@ -472,8 +476,8 @@ MMCNotifyState ( switch (State) { case MmcHwInitializationState: { - EFI_STATUS Status; - UINT32 Divisor; + + DEBUG ((DEBUG_MMCHOST_SD, "ArasanMMCHost: current divisor %x\n", Mmi= oRead32(MMCHS_SYSCTL))); =20 Status =3D SoftReset (SRA); if (EFI_ERROR (Status)) { --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#69720): https://edk2.groups.io/g/devel/message/69720 Mute This Topic: https://groups.io/mt/79453711/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 19:03:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+69721+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69721+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1609864484; cv=none; d=zohomail.com; s=zohoarc; b=iVO88vwsmU2dO5a8MOyR9Z7HJ2Hk9LhhWYZSHixyzPfBZOCx7GgszQwxn+6VQaJKvh7Vfh+HJ6fs3avtc1eOKwPnI/neBELuQ9uHuzI9IiKWxxr9AAPDmcldXU58a9Tii4cunPC52LhMXjFvlLmJrPNy3eLiHeRXNLGMUN/WMxQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609864484; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=wfie125tEDCR87FOm6fyuWSoS29zydQI4hatH11NE6M=; b=DIXhNq4cioJUGuv5AN8OMPXKqaFVnCI57cEe1Tfu8NJ66xC6TSH7Z8dJpL7VpOfXdonjjXmmDM3JESfrK3k76vM2QHwSgwT4C2dJ5CJM2aQKl5DEVKRpY6X6yqJKmFkev2xGnlM7BvtAOu4iRAZ7NJfPKKv0F2bk923xwG97yeg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69721+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1609864484592451.155380100858; Tue, 5 Jan 2021 08:34:44 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id rHxIYY1788612xYd06ZYZ4Gz; Tue, 05 Jan 2021 08:34:44 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.7989.1609864473788852205 for ; Tue, 05 Jan 2021 08:34:33 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 23C331474; Tue, 5 Jan 2021 08:34:30 -0800 (PST) X-Received: from mammon-tx2.austin.arm.com (mammon-tx2.austin.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 19A723F70D; Tue, 5 Jan 2021 08:34:30 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: ard.biesheuvel@arm.com, leif@nuviainc.com, pete@akeo.ie, samer.el-haj-mahmoud@arm.com, awarkentin@vmware.com, Jeremy Linton Subject: [edk2-devel] [PATCH v4 6/7] Platform/RaspberryPi: Power up SD, and tweak GPIOs Date: Tue, 5 Jan 2021 10:34:19 -0600 Message-Id: <20210105163420.1711652-7-jeremy.linton@arm.com> In-Reply-To: <20210105163420.1711652-1-jeremy.linton@arm.com> References: <20210105163420.1711652-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: evNC5SmGyDpR7leuaCzZMElOx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1609864484; bh=FfNr87PB8P6zIzU7E7WeQVGqJyDHW09YMf40b4IzhDg=; h=Cc:Date:From:Reply-To:Subject:To; b=XzYucFC6tnqPr8gX+4HPVyGWbDVWyh0vCALBVG7EKCbi3fW/c1sXTv2h6dCtRNXjOub uOaKlr58s1BMsSXDxl6+cGqQRQivlW7qbtRre7OZ+Alu5oHN2Auft+XZXP89YHwzMEgFZ WXK/vqWw5PKwLzPZR4GMhoYoYOyyuoKTLoM= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" It seems we should be powering up the SD cards, and possibly the clocks as well to assure they are setup properly before we attempt to access the controller. Signed-off-by: Jeremy Linton Reviewed-by: Andrei Warkentin --- Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c b/Platform/= RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c index 28f57438c5..aa9ba7d76f 100644 --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c @@ -552,6 +552,13 @@ ApplyVariables ( GpioPinFuncSet (37, GPIO_FSEL_ALT3); GpioPinFuncSet (38, GPIO_FSEL_ALT3); GpioPinFuncSet (39, GPIO_FSEL_ALT3); + + Status =3D mFwProtocol->SetPowerState (RPI_MBOX_POWER_STATE_SDHCI, + TRUE, TRUE); //SD on with wait + Status =3D mFwProtocol->SetGpioConfig (RPI_EXP_GPIO_SD_VOLT,=20 + RPI_EXP_GPIO_DIR_OUT, TRUE); //= 3.3v + Status =3D mFwProtocol->SetClockState (RPI_MBOX_CLOCK_RATE_EMMC2, TR= UE); + Status =3D mFwProtocol->SetClockState (RPI_MBOX_CLOCK_RATE_EMMC, TRU= E); } } else { DEBUG ((DEBUG_ERROR, "Model Family %d not supported...\n", mModelFamil= y)); --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#69721): https://edk2.groups.io/g/devel/message/69721 Mute This Topic: https://groups.io/mt/79453712/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri Apr 26 19:03:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+69724+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69724+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1609864476; cv=none; d=zohomail.com; s=zohoarc; b=YKYx9D6mOAXymN4rBSC4cr0F2nffBGwq/xqf/mZKPJvEcsPkylSK/HTU75AOo6aQDEq+d5WyVoCTeerXf/cvbXYeg0ZGuI1tOHm0K/R5Xh7fEpre2HocNxMaj3e2am+Z0Q+DSt1wVdAXa3fnJC8/LN03HVM4Tid/j1uKKGw8oEI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1609864476; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=KT/IW5Xat1qIdb5D/cUYFmPHU5KKpcUMSlCUm+WWL0M=; b=eATI0JE/NgUHMFl7BFADkX4jzmWFTzjM5F3z7TwRHXA3RXYvaNCVQBY1x+m6C6oacNzv15verb7d2km5kTxGXTdB/ccor21peuKStc+n0j/CT9yDd+u92G/qT7Pc3OVyzuDjaOjKmby9++GeTSYmuLDMBhfaSKP8Fdqs7aOyUdo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69724+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 16098644763825.170990933199505; Tue, 5 Jan 2021 08:34:36 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id vmicYY1788612xG6pZCRILSe; Tue, 05 Jan 2021 08:34:36 -0800 X-Received: from foss.arm.com (foss.arm.com []) by mx.groups.io with SMTP id smtpd.web12.7982.1609864473790926112 for ; Tue, 05 Jan 2021 08:34:34 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B9F2D1477; Tue, 5 Jan 2021 08:34:30 -0800 (PST) X-Received: from mammon-tx2.austin.arm.com (mammon-tx2.austin.arm.com [10.118.28.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A8BFC3F70D; Tue, 5 Jan 2021 08:34:30 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: ard.biesheuvel@arm.com, leif@nuviainc.com, pete@akeo.ie, samer.el-haj-mahmoud@arm.com, awarkentin@vmware.com, Jeremy Linton Subject: [edk2-devel] [PATCH v4 7/7] Platform/RaspberryPi: Correct device path removal. Date: Tue, 5 Jan 2021 10:34:20 -0600 Message-Id: <20210105163420.1711652-8-jeremy.linton@arm.com> In-Reply-To: <20210105163420.1711652-1-jeremy.linton@arm.com> References: <20210105163420.1711652-1-jeremy.linton@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jeremy.linton@arm.com X-Gm-Message-State: 36Ii8SI0dA73E835RmLzpdQKx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1609864476; bh=GzZbklHGJhwU2asLY04UeEOdIqX7Pl3m75fLhpWdMds=; h=Cc:Date:From:Reply-To:Subject:To; b=scZb3ut+9jgVpyuhwIVw8d5ivX144tQ01i1dRzjP8VWfYvq2HAEF2mz4uL3okzMdh+w la2nX5XrPXgYxaIl9QPRktaOgksD5XgaMZkh8EQnT4tvfm2IsZzkB2l83Cjz3KXF47TV+ FLx3Ez9izClNJU7nYBHrqVfqxDNevGOfAU8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The Arasan driver now works with the eMMC2 device. This means that both the PcdSdIsArasan and the !PcdSdIsArasan result in valid SD controllers on the rpi4. Lets avoid removing the "stale" boot entry, in this case which also has the side effect of avoiding a boot assert when eMMC2 is selected. Signed-off-by: Jeremy Linton Reviewed-by: Andrei Warkentin --- Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm= .c b/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c index fa46be7917..c2fc40b8ea 100644 --- a/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c +++ b/Platform/RaspberryPi/Library/PlatformBootManagerLib/PlatformBm.c @@ -431,7 +431,7 @@ RemoveStaleBootOptions ( EFI_DEVICE_PATH_PROTOCOL *DevicePath =3D BootOptions[Index].FilePath; =20 if (CompareMem (&mArasan, DevicePath, GetDevicePathSize (DevicePath)) = =3D=3D 0) { - if (PcdGet32 (PcdSdIsArasan)) { + if (PcdGet32 (PcdSdIsArasan) || RPI_MODEL =3D=3D 4) { continue; } } else if (CompareMem (&mSDHost, DevicePath, GetDevicePathSize (Device= Path)) =3D=3D 0) { --=20 2.13.7 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#69724): https://edk2.groups.io/g/devel/message/69724 Mute This Topic: https://groups.io/mt/79453715/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-