From nobody Mon Feb 9 19:06:25 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+69199+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69199+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1608300989; cv=none; d=zohomail.com; s=zohoarc; b=AiHQzDzo4aQjpENI0PNNeRxhbt+Js/ImDujpJVRk8bXFtMAYP/ldRDNnpkJTfFiUCpo/O+xNKRi3ElEN9bSI8PFVg5MLiOp4u6g5AXjILWmkDet2r+tqU3zudVy+kQvT/GAzKpaP1nrMa03XC+Unfz4XmVA83disLD1CCwReiUg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1608300989; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Yy/bzoRRRceJZ1vrb8bDuoN8t3ofbN6ahXtgDVBsiMc=; b=l1QR8eOau7EYMTHZXvDl84jczaDaCWgkj2K7Olh54hGDS+z1VpY1n1jPJ1f6dqZWaTJi97tCOM+HfvLt8v2cp5eGYmjI5JCS806oevYaX9icRTrK+G68xntej8PH45JfX5104LUrJMYAvUisv90UTO/AJ8fELM+AD4nXALacOsM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+69199+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1608300988894243.00159489436442; Fri, 18 Dec 2020 06:16:28 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id M7UeYY1788612xQBQiPUbbzR; Fri, 18 Dec 2020 06:16:27 -0800 X-Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) by mx.groups.io with SMTP id smtpd.web08.10540.1608300982939752976 for ; Fri, 18 Dec 2020 06:16:23 -0800 X-Received: by mail-wm1-f52.google.com with SMTP id 3so2729628wmg.4 for ; Fri, 18 Dec 2020 06:16:22 -0800 (PST) X-Gm-Message-State: BFvye1Nwot4YqMxpl82iPGbrx1787277AA= X-Google-Smtp-Source: ABdhPJyLXsQbByPpWmPq5q8r+iQQ3lgzNZy/z3yw+1YPHU7f+ECNxuyiffrE0U2rzhc5TGxTXs1zNQ== X-Received: by 2002:a1c:6208:: with SMTP id w8mr4472557wmb.96.1608300981244; Fri, 18 Dec 2020 06:16:21 -0800 (PST) X-Received: from vanye.hemma.eciton.net (cpc1-cmbg19-2-0-cust915.5-4.cable.virginm.net. [82.27.183.148]) by smtp.gmail.com with ESMTPSA id b12sm18558569wmj.2.2020.12.18.06.16.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Dec 2020 06:16:20 -0800 (PST) From: "Leif Lindholm" To: devel@edk2.groups.io Cc: Ard Biesheuvel Subject: [edk2-devel] [PATCH 3/9] ArmPkg: remove duplicated ARM/AArch64 ArmGicArchLib sources Date: Fri, 18 Dec 2020 14:16:11 +0000 Message-Id: <20201218141617.26947-4-leif@nuviainc.com> In-Reply-To: <20201218141617.26947-1-leif@nuviainc.com> References: <20201218141617.26947-1-leif@nuviainc.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,leif@nuviainc.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1608300987; bh=/qRj56zTkPZAA35NPuyFfcwiIi9A8Hgut5zMHrG8ckI=; h=Cc:Date:From:Reply-To:Subject:To; b=c/l7KmlMeJKBmqCbfCecVoggiD1C5K3M3QXv4lm9F76U991Dk6ki2ki38yyxuyjSSHQ bF4TAiYF1pwL/wArMw0ETtFU+BZCjqW7yhVXMf2VVbLtgfxAdB7bw9UVkRklzH7N1DebN WUz9EHC1C57GqZ8IJUqSeLkYVEuk8i3CMRI= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The ID register access was the only difference between them, so after switching to the ArmHasGicSystemRegisters () helper, there is no longer any need to have separate ARM/AArch64 source files for ArmGicArchLib, so unify them and drop the subdirectories. Cc: Ard Biesheuvel Signed-off-by: Leif Lindholm --- ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf | 7 +-- ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c | 60 ----------= ---------- ArmPkg/Library/ArmGicArchLib/{AArch64 =3D> }/ArmGicArchLib.c | 0 3 files changed, 2 insertions(+), 65 deletions(-) diff --git a/ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf b/ArmPkg/Librar= y/ArmGicArchLib/ArmGicArchLib.inf index 92ac11c2f5e5..bedddff93955 100644 --- a/ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf +++ b/ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf @@ -14,11 +14,8 @@ [Defines] LIBRARY_CLASS =3D ArmGicArchLib|DXE_DRIVER UEFI_DRIVER = UEFI_APPLICATION CONSTRUCTOR =3D ArmGicArchLibInitialize =20 -[Sources.ARM] - Arm/ArmGicArchLib.c - -[Sources.AARCH64] - AArch64/ArmGicArchLib.c +[Sources] + ArmGicArchLib.c =20 [Packages] MdePkg/MdePkg.dec diff --git a/ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c b/ArmPkg/Libr= ary/ArmGicArchLib/Arm/ArmGicArchLib.c deleted file mode 100644 index 7e7e46e69faa..000000000000 --- a/ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c +++ /dev/null @@ -1,60 +0,0 @@ -/** @file -* -* Copyright (c) 2014, ARM Limited. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* -**/ - -#include -#include - -STATIC ARM_GIC_ARCH_REVISION mGicArchRevision; - -RETURN_STATUS -EFIAPI -ArmGicArchLibInitialize ( - VOID - ) -{ - UINT32 IccSre; - - // Ideally we would like to use the GICC IIDR Architecture version here,= but - // this does not seem to be very reliable as the implementation could ea= sily - // get it wrong. It is more reliable to check if the GICv3 System Regist= er - // feature is implemented on the CPU. This is also convenient as our GIC= v3 - // driver requires SRE. If only Memory mapped access is available we try= to - // drive the GIC as a v2. - if (ArmHasGicSystemRegisters ()) { - // Make sure System Register access is enabled (SRE). This depends on = the - // higher privilege level giving us permission, otherwise we will eith= er - // cause an exception here, or the write doesn't stick in which case w= e need - // to fall back to the GICv2 MMIO interface. - // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is st= arted - // at the same exception level. - // It is the OS responsibility to set this bit. - IccSre =3D ArmGicV3GetControlSystemRegisterEnable (); - if (!(IccSre & ICC_SRE_EL2_SRE)) { - ArmGicV3SetControlSystemRegisterEnable (IccSre| ICC_SRE_EL2_SRE); - IccSre =3D ArmGicV3GetControlSystemRegisterEnable (); - } - if (IccSre & ICC_SRE_EL2_SRE) { - mGicArchRevision =3D ARM_GIC_ARCH_REVISION_3; - goto Done; - } - } - - mGicArchRevision =3D ARM_GIC_ARCH_REVISION_2; - -Done: - return RETURN_SUCCESS; -} - -ARM_GIC_ARCH_REVISION -EFIAPI -ArmGicGetSupportedArchRevision ( - VOID - ) -{ - return mGicArchRevision; -} diff --git a/ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c b/ArmPkg/= Library/ArmGicArchLib/ArmGicArchLib.c similarity index 100% rename from ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c rename to ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.c --=20 2.20.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#69199): https://edk2.groups.io/g/devel/message/69199 Mute This Topic: https://groups.io/mt/79061635/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-