From nobody Thu Oct 30 19:45:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+68728+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+68728+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1607717287; cv=none; d=zohomail.com; s=zohoarc; b=U9FhRs37vYMeL0swjpatEv82oAiXTMLHi8nLnKufBwn6bS0ZjI3hJTgp3catLbmBew3r5kBRhnT6p+bI3odniEtBYATphUNRcZ5S0+Qt2k8JkFnPY/L3UyP5o23TFwj/VRcIkdhS8h5Rje3KXNCI9vxV/AvFfbwj+Ruh0HgRaq0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1607717287; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; 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a="154302271" X-IronPort-AV: E=Sophos;i="5.78,412,1599548400"; d="scan'208";a="154302271" X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Dec 2020 12:07:55 -0800 IronPort-SDR: PN3se9810dL7k9E7aVraVXgMJ/ENsVwqa8GfjFQU1f/XTqi+P9HiPhexejoVf8McNhRNPRrY4j KTtmrFXlK7Ow== X-IronPort-AV: E=Sophos;i="5.78,412,1599548400"; d="scan'208";a="365601928" X-Received: from mdkinney-mobl2.amr.corp.intel.com ([10.212.203.56]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Dec 2020 12:07:54 -0800 From: "Michael D Kinney" To: devel@edk2.groups.io Cc: Jiewen Yao , Vincent Zimmer , Laurie Jarlstrom , Kevin Shaw Subject: [edk2-devel] [tianocore-docs][ATBB-Memory_Protection_in_UEFI_BIOS][Patch 1/2] Clean up format and layout to match template Date: Fri, 11 Dec 2020 12:07:47 -0800 Message-Id: <20201211200748.1622-2-michael.d.kinney@intel.com> In-Reply-To: <20201211200748.1622-1-michael.d.kinney@intel.com> References: <20201211200748.1622-1-michael.d.kinney@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,michael.d.kinney@intel.com X-Gm-Message-State: NrIzSGEXbDE7RIKpttfKTCT8x1787277AA= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1607717283; bh=NZFkkBz1T7mq1oYRaCxaLxoPlCvwhIwm4sh/4VYpgqg=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=whNIBDSOiQvdILbnSulTaqK+NMJEg/gkHmeuVtOKAikAHsmppJVBOpkNdjJbn6YqiVg jDVlJ+0mHS/URSVsjqs1jFv9wrwsPEOZHbgOCN7jAA40v9SYEbFWUclv1S4MgxMZQArLp vuh6oOntZy8E49QbsN0vzg0AnVq4KOLzqDg= X-ZohoMail-DKIM: pass (identity @groups.io) * Move figures from assets directory to media directory * Remove non ASCII characters * Add Figure to TOC * Add missing file headers Cc: Jiewen Yao Cc: Vincent Zimmer Cc: Laurie Jarlstrom Cc: Kevin Shaw Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney Reviewed-by: Jiewen Yao --- README.md | 36 ++--- SUMMARY.md | 38 +++++ assets/Tianocore_logo2.png | Bin 7360 -> 0 bytes authors.md | 31 ++++ book.json | 9 ++ cover.jpg | Bin 0 -> 211343 bytes executive-summary.md | 31 ++++ glossary.md | 68 ++++++--- .../Fig1- SMRAM memory protection.jpg | Bin .../Fig2 - Mapping of Protection in SMM.jpg | Bin ...g3 - Page table enforced memory layout.jpg | Bin .../Fig4 - UEFI memory protection.jpg | Bin media/TianocoreTitlePageLogo.jpg | Bin 0 -> 44499 bytes memory-protection-in-SMM.md | 134 ++++++++++-------- memory-protection-in-uefi.md | 104 +++++++++----- references.md | 50 +++++-- 16 files changed, 359 insertions(+), 142 deletions(-) delete mode 100644 assets/Tianocore_logo2.png create mode 100644 book.json create mode 100644 cover.jpg rename {assets =3D> media}/Fig1- SMRAM memory protection.jpg (100%) rename {assets =3D> media}/Fig2 - Mapping of Protection in SMM.jpg (100%) rename {assets =3D> media}/Fig3 - Page table enforced memory layout.jpg (1= 00%) rename {assets =3D> media}/Fig4 - UEFI memory protection.jpg (100%) create mode 100644 media/TianocoreTitlePageLogo.jpg diff --git a/README.md b/README.md index 6bc2a7b..f470c6e 100644 --- a/README.md +++ b/README.md @@ -29,30 +29,29 @@ =20 --> =20 -![](/assets/Tianocore_logo2.png) + =20 -#####White Paper +### {{ book.title }} =20 +{% if book.draft %} +** DRAFT FOR REVIEW ** +{% else %} +** {{ book.version }} ** +{% endif %} =20 -# A Tour Beyond BIOS - Memory Protection in UEFI BIOS +** {{ gitbook.time|date('MM/DD/YYYY hh:mm:ss') }} ** =20 +{% if book.udkrelease %} +** {{ book.udkrelease }} ** +{% endif %} =20 - - _Jiewen Yao_,=20 + _Jiewen Yao_, _Intel Corporation_ =20 - - - - - _Vincent J. Zimmer _,=20 + _Vincent J. Zimmer _, _Intel Corporation_ =20 - - -##### March 2017 - -## Acknowledgements +### Acknowledgements =20 Redistribution and use in source (original document form) and 'compiled' forms (converted to PDF, epub, HTML and other formats) with or without @@ -78,7 +77,12 @@ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDIN= G NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. =20 -Copyright © 2007-2017, Intel Corporation. All rights reserved. +Copyright (c) 2007-2017, Intel Corporation. All rights reserved. + +### Revision History =20 +| Revision | Revision History | Date | +| ---------- | ------------------ | ----------- | +| 1.0 | Initial release. | March 2017 | =20 =20 diff --git a/SUMMARY.md b/SUMMARY.md index dcce47b..b0250f0 100644 --- a/SUMMARY.md +++ b/SUMMARY.md @@ -1,3 +1,34 @@ + + # Summary =20 * [Introduction](README.md) @@ -8,3 +39,10 @@ * [References](references.md) * [Authors](authors.md) =20 +--- + +* Figures + * [Figure 1 - SMRAM memory protection](memory-protection-in-SMM.md#figur= e-1---smram-memory-protection) + * [Figure 2 - Mapping of Protection in SMM](memory-protection-in-SMM.md#= figure-2---mapping-of-protection-in-smm) + * [Figure 3 - Page table enforced memory layout](memory-protection-in-SM= M.md#figure-3---page-table-enforced-memory-layout) + * [Figure 4 - UEFI memory protection](memory-protection-in-uefi.md#figur= e-4---uefi-memory-protection) diff --git a/assets/Tianocore_logo2.png b/assets/Tianocore_logo2.png deleted file mode 100644 index 0ba21dc7a651ee64ee3449415aabb667022276b8..000000000000000000000000000= 0000000000000 GIT binary patch literal 0 HcmV?d00001 literal 7360 zcmXw;bzBqBx4=3DfCWIrdQ(9JL ze8x|a?Igg>$6|=3DtrAX?w;)oYFR|@S&HqAfHdExkJ6C;ef2Ri%XGhjpXAl(`S7F z(b+_VZo-%M?lZGK+-)yrEYB~`*Lr#i`QKI-3eHQb$sYWok2m2aee=3DZ zwCq0L)>RxD^9f|*Z+#vprEi9)*QcmKl!*I{LcAdg4ZZAMjB( zTG;}x%u4yb`cO3F)-=3D0B`$A=3DbJ)|5|SBO~rqD|D<+o$5Pmj>`D z*L#iDbd8rpeQJzx4xe_B5(e@#QB()|=3DHlF2!cVH}Nh1$#%yaElW2ISkZ25UQ0Y4Dp zSzgD6e&X_(HN&hYZpg1OCd+GiuZC2UeC_WyRy68^lTCwfmE zHa38w0srCG%tZm4yft;*euVvRozaup@x0Y8#l+bz>n1P|!bD}YSH--j1j?0?bC^8? z1BEEB_HtoQi95+t-@=3Dpngd;>E^t@x}-%4wgBg<1n&q^&Or-Zo!3>GnpVxwy{)#xx$f{W-?hM4Lo-?FYtC6icb~d(Qz!+CV z1m38%(H&hq3#B*m$WG?kum3R-G@8bB*X*-P)rZ7m#m@A56W3D_7W}1{dFf9M8=3DXOf z1x8=3DIvvONo8@-Txsy9`!_BZ~X0;));7J+Jf_m&jne1dd99sXn_>rA0#yxFbUt z8W_dBNv%FQI+AkIJuLS`>W@Z1*bS(x`eKx6Yu28Om^O1CyUT z%+nRw#5xsnj3dzSLc}P|da-{@Xp_%n`Gs6_n+TtXqjR&;;vZa!LS$VPU0&sgm9Ju( z5=3DA~=3D3rlXf9?oVQO7Y3)BjAmE1~Hw2HZ|!8*99Gtl7Zxe4+{g9KY~0n!j&y2v_BZM zHVZ%3u{=3D_N1R!5jL7wjVD?t%_8;?Fp_<3u(CUUwPfOVrf*+5Qqnf%TW7c%n%kvmg7A z%=3D&{$s5e7by=3DAFVqk(jH$=3D5sLZNh=3D=3DfWh<9-ptJvs6mAz@d(G)QfXv8XY@4XG^I3R zUWHBbq9UGwM|@D{K4o(a*1hiveoV1dHHZWY;nut){}(OnS9tbbg4_4~{c8D<3KUZKw`17x^)S~!ceK*x2$oA?kwA8QP>j*dbMOUaow(A; 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zFaQhy1Hb?<01N;FzyL4+3;+Yb05AXy00Y1PFaQhy1Hb?<01N;FzyL4+3;+ZF@dm{H G=3D=3Dm>^QGss& literal 0 HcmV?d00001 diff --git a/executive-summary.md b/executive-summary.md index da95613..19c0569 100644 --- a/executive-summary.md +++ b/executive-summary.md @@ -1,3 +1,34 @@ + + # Executive Summary ## Introduction **Data execution protection (DEP)** is intended to prevent an application = or service from executing code from a non-executable memory region. This he= lps prevent certain exploits that store code via a buffer overflow. [[Windo= wsHeap][1]] shows 4 of 7 exploitation techniques that can be mitigated by D= EP and ASLR (Address Space Layout Randomization). [[DEP][2]] also shows 14 = of 19 exploits from popular exploit kits that fail with DEP enabled. Beside= s Windows, the Unix/Linux community also has similar non-executable protect= ion [[PaX][3]]. diff --git a/glossary.md b/glossary.md index f1eb67c..81a3bbb 100644 --- a/glossary.md +++ b/glossary.md @@ -1,51 +1,81 @@ + + # Glossary =20 -ASLR =E2=80=93 Address Space Layout Randomization. +ASLR - Address Space Layout Randomization. =20 BDA - BIOS Data Area. =20 -CSM =E2=80=93 Compatibility Support Module. +CSM - Compatibility Support Module. =20 -DEP =E2=80=93 Data Execution Protection.=20 +DEP - Data Execution Protection. =20 EBDA - Extended BIOS Data Area =20 -HOB =E2=80=93 Hand off block. See [[PI][1]]. +HOB - Hand off block. See [[PI][1]]. =20 -MMIO =E2=80=93 Memory Mapped I/O. +MMIO - Memory Mapped I/O. =20 -NX =E2=80=93 No Execution. See DEP. +NX - No Execution. See DEP. =20 -PE/COFF =E2=80=93 Portable Executable and Common Object File Format. The e= xecutable file format for UEFI. +PE/COFF - Portable Executable and Common Object File Format. The executabl= e file format for UEFI. =20 ROP - Return-oriented programming =20 -RO =E2=80=93 Read Only. +RO - Read Only. =20 -RW =E2=80=93 Read/Write. +RW - Read/Write. =20 -PCD =E2=80=93 Platform configuration database. See [[PI][1]]. +PCD - Platform configuration database. See [[PI][1]]. =20 -PF =E2=80=93 Page Fault Exception. +PF - Page Fault Exception. =20 -PI =E2=80=93 Platform Initialization. Volume 1-5 of the UEFI PI specificat= ions. +PI - Platform Initialization. Volume 1-5 of the UEFI PI specifications. =20 -SPI =E2=80=93 Serial Peripheral Interface. +SPI - Serial Peripheral Interface. =20 TSS - Task-state segment. See [[IA32 SDM][2]]. =20 -UEFI =E2=80=93 Unified Extensible Firmware Interface. Firmware interface= between the platform and the operating system. Predominate interfaces are= in the boot services (BS) or pre-OS. Few runtime (RT) services. =20 +UEFI - Unified Extensible Firmware Interface. Firmware interface between= the platform and the operating system. Predominate interfaces are in the = boot services (BS) or pre-OS. Few runtime (RT) services. =20 -VTd =E2=80=93 Virtualization for Directed IO. See [[VTd][3]] +VTd - Virtualization for Directed IO. See [[VTd][3]] =20 -WP =E2=80=93 Write Protect. +WP - Write Protect. =20 -XD =E2=80=93 Execution Disable. See DEP. +XD - Execution Disable. See DEP. =20 -XP =E2=80=93 Execution Protected. See DEP. +XP - Execution Protected. See DEP. =20 [1]: http://uefi.org "PI" - [2]: https://software.intel.com/en-us/articles/intel-sdm "IA32SDM" [3]: http://www.intel.com/content/www/us/en/embedded/technology/virtualiza= tion/vt-directed-io-spec.html "Vtd" =20 diff --git a/assets/Fig1- SMRAM memory protection.jpg b/media/Fig1- SMRAM m= emory protection.jpg similarity index 100% rename from assets/Fig1- SMRAM memory protection.jpg rename to media/Fig1- SMRAM memory protection.jpg diff --git a/assets/Fig2 - Mapping of Protection in SMM.jpg b/media/Fig2 - = Mapping of Protection in SMM.jpg similarity index 100% rename from assets/Fig2 - Mapping of Protection in SMM.jpg rename to media/Fig2 - Mapping of Protection in SMM.jpg diff --git a/assets/Fig3 - Page table enforced memory layout.jpg b/media/Fi= g3 - Page table enforced memory layout.jpg similarity index 100% rename from assets/Fig3 - Page table enforced memory layout.jpg rename to media/Fig3 - Page table enforced memory layout.jpg diff --git a/assets/Fig4 - UEFI memory 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Figure 1 shows the SMM memory protection. **RO** des= ignates read-only memory. **XD **designates execution-disabled memory. +The SMM is an isolated execution environment according to Intel(R) 64 and = IA-32 Architectures Software Developer's Manual [[IA32SDM][1]]. The UEFI Pl= atform Initialization [[PI][2]] specification volume 4 defines the SMM infr= astructure. Figure 1 shows the SMM memory protection. **RO** designates rea= d-only memory. **XD **designates execution-disabled memory. =20 -![](/assets/Fig1- SMRAM memory protection.jpg) -=20 -Figure 1 - SMRAM memory protection +![](/media/Fig1- SMRAM memory protection.jpg) + +###### Figure 1 - SMRAM memory protection =20 ## Protection for PE image -In UEFI/PI firmware, the SMM image is a normal PE/COFF image loaded by the= SmmCore. If a given section of the SMM image is page aligned, it may be pr= otected according to the section attributes, such as read-only for the code= and non-executable for data. See the top right of figure 1. +In UEFI/PI firmware, the SMM image is a normal PE/COFF image loaded by the= SmmCore. If a given section of the SMM image is page aligned, it may be pr= otected according to the section attributes, such as read-only for the code= and non-executable for data. See the top right of Figure 1. =20 In EDK II, the PiSmmCore (https://github.com/tianocore/edk2/blob/master/Md= eModulePkg/Core/PiSmmCore/MemoryAttributesTable.c) checks the PE image alig= nment and builds an `EDKII_PI_SMM_MEMORY_ATTRIBUTES_TABLE ` (https://github= .com/tianocore/edk2/blob/master/MdeModulePkg/Include/Guid/PiSmmMemoryAttrib= utesTable.h) to record such information. If the PI SMM image is not page al= igned, this table will not be published. If the `EDKII_PI_SMM_MEMORY_ATTRIB= UTES_TABLE` is published, that means the `EfiRuntimeServicesCode` contains = only code and it is ``EFI_MEMORY_RO``, and the `EfiRuntimeServicesData` con= tains only data and it is `EFI_MEMORY_XP`. =20 @@ -15,8 +46,8 @@ Later the PiSmmCpu driver (https://github.com/tianocore/e= dk2/blob/master/UefiCpu =20 There are several assumptions to support the PE image protection in SMM: =20 -1. The PE code section and data sections are not merged. If those 2 sectio= ns are merged, a #PF exception might be generated because the CPU might try= to write a RO data item in the data section or execute a non-executable (N= X) instruction in code section. -2. The PE image can be protected if it is page aligned. There should not b= e any self-modified-code in the code region. If there is, a platform should= not set this PE image to be page aligned. +1. The PE code section and data sections are not merged. If those 2 sectio= ns are merged, a #PF exception might be generated because the CPU might try= to write a RO data item in the data section or execute a non-executable (N= X) instruction in code section. +2. The PE image can be protected if it is page aligned. There should not b= e any self-modified-code in the code region. If there is, a platform should= not set this PE image to be page aligned. =20 A platform may disable the XD in the UEFI environment, but this does not i= mpact the SMM environment. The SMM environment may choose to always enable = the XD upon SMM entry, and restore the XD state at the SMM exit point. =20 @@ -40,31 +71,31 @@ The IDT defines the entry point of the exception handle= r. If the IDT is updated, =20 This work is done by `PatchGdtIdtMap()` at https://github.com/tianocore/ed= k2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c. =20 -However, the IA32 version GDT cannot be set to read-only if the stack guar= d feature is enabled. (https://github.com/tianocore/edk2/blob/master/UefiCp= uPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c) The reason is that the IA32 stack = guard needs to use a "_task switch_" to switch the stack, and the task swit= ch needs to write the GDT and Task-State Segment (TSS). The X64 version of = the GDT does not have such a problem because the X64 stack guard uses =E2= =80=9C_interrupt stack table (IST)_=E2=80=9D to switch the stack. For detai= ls of the stack switch and exceptions, please refer to [[IA32SDM][1]]. +However, the IA32 version GDT cannot be set to read-only if the stack guar= d feature is enabled. (https://github.com/tianocore/edk2/blob/master/UefiCp= uPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c) The reason is that the IA32 stack = guard needs to use a "_task switch_" to switch the stack, and the task swit= ch needs to write the GDT and Task-State Segment (TSS). The X64 version of = the GDT does not have such a problem because the X64 stack guard uses "_int= errupt stack table (IST)_" to switch the stack. For details of the stack sw= itch and exceptions, please refer to [[IA32SDM][1]]. =20 ### Page Table In an X86 CPU, we rely on the page table to set up the read-only or non-ex= ecutable region. In order to prevent the page table itself from being updat= ed, we may need to set the page table itself to be read-only. =20 The work is done at https://github.com/tianocore/edk2/blob/master/UefiCpuP= kg/PiSmmCpuDxeSmm/X64/PageTbl.c `SetPageTableAttributes()`. =20 -However, setting a page table to be read-only may break the original dynam= ic paging feature in SMM. There is a (PCD) ```PcdCpuSmmStaticPageTable ``` = to determine if the platform wants to enable the static page table or the d= ynamic page table. +However, setting a page table to be read-only may break the original dynam= ic paging feature in SMM. There is a (PCD) `PcdCpuSmmStaticPageTable` to de= termine if the platform wants to enable the static page table or the dynami= c page table. =20 -If ```PcdCpuSmmStaticPageTable``` is FALSE, the PiSmmCpu uses the original= dynamic paging policy, namely the the PiSmmCpu only sets 4GiB paging by de= fault. If the PiSmmCpu needs to access above 4GiB memory locations, a page = fault exception (#PF) exception is triggered and an above-4GiB mapping is c= reated in the page fault handler. +If `PcdCpuSmmStaticPageTable` is FALSE, the PiSmmCpu uses the original dyn= amic paging policy, namely the the PiSmmCpu only sets 4GiB paging by defaul= t. If the PiSmmCpu needs to access above 4GiB memory locations, a page faul= t exception (#PF) exception is triggered and an above-4GiB mapping is creat= ed in the page fault handler. =20 -If ```PcdCpuSmmStaticPageTable``` is TRUE, the PiSmmCpu will try to set th= e read-only attribute for the page table. +If `PcdCpuSmmStaticPageTable` is TRUE, the PiSmmCpu will try to set the re= ad-only attribute for the page table. =20 Figure 2 shows the mapping of the protection. =20 -![](/assets/Fig2 - Mapping of Protection in SMM.jpg)=20 +![](/media/Fig2 - Mapping of Protection in SMM.jpg) =20 -Figure 2 Mapping of Protection in SMM +###### Figure 2 - Mapping of Protection in SMM =20 ## Life cycle of the protection -In a normal boot, the page table based protection is configured by the PiS= mmCpu driver just after the SmmReadyToLock event by ```PerformRemainingTask= s()``` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpu= DxeSmm/PiSmmCpuDxeSmm.c. All read-only data must be ready before ```SmmRead= yToLock```. +In a normal boot, the page table based protection is configured by the PiS= mmCpu driver just after the SmmReadyToLock event by `PerformRemainingTasks(= )` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeS= mm/PiSmmCpuDxeSmm.c. All read-only data must be ready before `SmmReadyToLoc= k`. =20 -In an S3 resume, the protection is disabled during SMBASE relocation becau= se the PiSmmCpu needs to set up the environment. The PiSmmCpu uses SmmS3Cr3= , which is generated by ```InitSmmS3Cr3()``` at https://github.com/tianocor= e/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c with 4G = paging only. After the SMBASE relocation is done, all the protection takes = effect up receipt of the next SMI by ```PerformPreTasks()``` at https://git= hub.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm= .c. +In an S3 resume, the protection is disabled during SMBASE relocation becau= se the PiSmmCpu needs to set up the environment. The PiSmmCpu uses SmmS3Cr3= , which is generated by `InitSmmS3Cr3()` at https://github.com/tianocore/ed= k2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c with 4G pagi= ng only. After the SMBASE relocation is done, all the protection takes effe= ct up receipt of the next SMI by `PerformPreTasks()` at https://github.com/= tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c. =20 -If there is an additional lock that needs to be set, it can be done in ```= SmmCpuFeaturesCompleteSmmReadyToLock()``` API (defined in https://github.co= m/tianocore/edk2/blob/master/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h= ). +If there is an additional lock that needs to be set, it can be done in `Sm= mCpuFeaturesCompleteSmmReadyToLock()` API (defined in https://github.com/ti= anocore/edk2/blob/master/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h). =20 ## SMRAM Size Overhead ### PE image @@ -80,29 +111,29 @@ In order to protect the page table itself, we must use= the static page table ins The size of the dynamic paging is fixed. We need 6 fixed pages (24K) and 8= on-demand pages (32K). The total size of the page table is 56K in this cas= e. =20 The size of the static page table depends upon 2 things: 1) 1G paging capa= bility, 2) max supported address bit. A rough estimation is below: -1. If 1G paging is supported, -* 32 bit addressing need (1+1+4) pages =3D 24K. (still use 2M paging for b= elow 4G memory) -* 39 bit addressing need (1+1+4) pages =3D 24K. -* 48 bit addressing need (1+512) pages =3D 2M. +1. If 1G paging is supported, +* 32 bit addressing need (1+1+4) pages =3D 24K. (still use 2M paging for b= elow 4G memory) +* 39 bit addressing need (1+1+4) pages =3D 24K. +* 48 bit addressing need (1+512) pages =3D 2M. * If 1G paging is not supported, 2M paging is used. -* 32 bit addressing need (1+1+4) pages =3D 24K. -* 39 bit addressing need (1+1+512) pages =3D 2M. -* 48 bit addressing need (1+512+512*512) pages =3D 1G. < - This seems ****= not**** acceptable. +* 32 bit addressing need (1+1+4) pages =3D 24K. +* 39 bit addressing need (1+1+512) pages =3D 2M. +* 48 bit addressing need (1+512+512*512) pages =3D 1G. < - This seems ****= not**** acceptable. =20 =20 -The maximum address bit is determined by the (CPU_HOB) if it is present, o= r the physical address bit returned by the CPUID instruction if the CPU_HOB= is not present. (https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/= PiSmmCpuDxeSmm/X64/PageTbl.c, ```CalculateMaximumSupportAddress()```) A pla= tform may set the CPU_HOB based upon the addressing capability of the memor= y controller or the CPU. +The maximum address bit is determined by the (CPU_HOB) if it is present, o= r the physical address bit returned by the CPUID instruction if the CPU_HOB= is not present. (https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/= PiSmmCpuDxeSmm/X64/PageTbl.c, `CalculateMaximumSupportAddress()`) A platfor= m may set the CPU_HOB based upon the addressing capability of the memory co= ntroller or the CPU. =20 ## Performance Overhead -1. The SMRAM protection setup is a one-time activity. It happens just afte= r the SmmReadyToLock event. We do not observe too much impact to the system= firmware boot performance. The activity only takes some small number of mi= lliseconds. +1. The SMRAM protection setup is a one-time activity. It happens just afte= r the SmmReadyToLock event. We do not observe too much impact to the system= firmware boot performance. The activity only takes some small number of mi= lliseconds. =20 -2. The SMRAM runtime protection is based upon the page table. No additiona= l CPU instruction is needed. As such, there is zero SMM runtime performance= impact to have this protection. +2. The SMRAM runtime protection is based upon the page table. No additiona= l CPU instruction is needed. As such, there is zero SMM runtime performance= impact to have this protection. =20 ## Non SMRAM access in SMM Besides the SMRAM, the SMM memory protection also limits the access to the= non-SMRAM region. =20 First, the non-SMRAM region must be set to be non-executable because the S= MM entities should not call any code outside SMRAM. Code outside of SMRAM m= ight be controlled by malicious software. =20 -This protection work is done by ```InitPaging()``` at https://github.com/t= ianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c +This protection work is done by `InitPaging()` at https://github.com/tiano= core/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c =20 =20 Second, because of the security concerns regarding SMM entities accessing = VMM memory, [[WindowsWSMT][3]] [[Wsmt.docx][4]] and [[MicrosoftHV][5]] intr= oduced the Windows SMM Security Mitigations Table (WSMT). A platform needs = to report the WSMT table in order to declare that the SMI handler will vali= date the SMM communication buffer. @@ -113,13 +144,13 @@ A better way is to use an active check. The PiSmmCpu = driver sets the non-fixed D =20 As such, if a platform SMI handler does not include the check recommended = in [[SecureSmmComm][6]], the system will get #PF exception within SMM on su= ch an attack. =20 -This protection work is done by ```SetUefiMemMapAttributes()``` at https:/= /github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemo= ryManagement.c. +This protection work is done by `SetUefiMemMapAttributes()` at https://git= hub.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryMa= nagement.c. =20 Figure 3 shows final image layout. =20 - ![](/assets/Fig3 - Page table enforced memory layout.jpg) + ![](/media/Fig3 - Page table enforced memory layout.jpg) =20 -Figure 3 Page table enforced memory layout +###### Figure 3 - Page table enforced memory layout =20 The assumption for non-SMRAM access in SMM is described in [[SecureSmmComm= ][6]]. Besides that, this solution assumes that all DRAM regions are added to the= Global Coherency Domain (GCD) management before EndOfDxe, so that the UEFI= memory map can return all DRAM regions. If there are more regions added to= the GCD after EndOfDxe, those regions are not set to not-present in the pa= ge table. @@ -128,52 +159,41 @@ NOTE: The SMM does not set the not-present bit for th= e GCD **EfiGcdMemoryTypeNon ## Limitation Setting up RO and NX attribute for SMRAM is a good enhancement to prevent = a code overriding attack. However it has some limitations: =20 -1. It cannot resist a Return-Oriented-Programming (ROP) attack. [[ROP][8]]= . We might need ASLR to mitigate the ROP attack. [[ASLR][7]] With the code = region randomized, an attacker cannot accurately predict the location of in= structions in order to leverage gadgets. -2. Not all important data structure are set to Read-Only. This is the curr= ent SMM driver limitation. The SMM driver can be updated to allocate the im= portant structures to be read-only instead of a read-write global variable. +1. It cannot resist a Return-Oriented-Programming (ROP) attack. [[ROP][8]]= . We might need ASLR to mitigate the ROP attack. [[ASLR][7]] With the code = region randomized, an attacker cannot accurately predict the location of in= structions in order to leverage gadgets. +2. Not all important data structure are set to Read-Only. This is the curr= ent SMM driver limitation. The SMM driver can be updated to allocate the im= portant structures to be read-only instead of a read-write global variable. =20 To set not-present bit for non-fixed DRAM region in SmmReadyToLock is a go= od enhancement to enforce the protection policy. However, it cannot cover b= elow cases: =20 -1. Memory Hot Plug. Take a server platform as the example, A RAS server ma= y hot plug more DRAM during OS runtime, and rely on SMM to initialize those= DRAM. This SMM Memory Initialization module may need access the DRAM for t= he memory test. -2. Memory Mapped IO (MMIO). Ideally, not all MMIO regions are configured t= o be accessible to SMM. Some MMIO BARs are important such as VTd or SPI con= troller. VTd BAR is important because OS need setup VTd to configuration t= he DMA protection. SPI controller BAR is important because BIOS SMM handler= need access it to program the flash device. It should be a platform policy= to configure which one should be accessible. The SMI handler must consider= the case that the MMIO BAR might be modified by the malicious software and= check if the MMIO BAR is in the valid region. +1. Memory Hot Plug. Take a server platform as the example, A RAS server ma= y hot plug more DRAM during OS runtime, and rely on SMM to initialize those= DRAM. This SMM Memory Initialization module may need access the DRAM for t= he memory test. +2. Memory Mapped IO (MMIO). Ideally, not all MMIO regions are configured t= o be accessible to SMM. Some MMIO BARs are important such as VTd or SPI con= troller. VTd BAR is important because OS need setup VTd to configuration t= he DMA protection. SPI controller BAR is important because BIOS SMM handler= need access it to program the flash device. It should be a platform policy= to configure which one should be accessible. The SMI handler must consider= the case that the MMIO BAR might be modified by the malicious software and= check if the MMIO BAR is in the valid region. =20 ## Compatibility Considerations -1. So far, we have not observed self-modified-code in SMM image or executa= ble code in data section. As such, we believe the PE image protection is co= mpatible. +1. So far, we have not observed self-modified-code in SMM image or executa= ble code in data section. As such, we believe the PE image protection is co= mpatible. =20 -2. The protection for the SMM communication buffer may cause a #PF excepti= on in SMM if the SMI handler does not perform the check recommended in [[Se= cureSmmComm][6]]. +2. The protection for the SMM communication buffer may cause a #PF excepti= on in SMM if the SMI handler does not perform the check recommended in [[Se= cureSmmComm][6]]. =20 -3. Some legacy Compatibility Support Module (CSM) drivers may need co-work= with SMM module. Then the SMM driver need access the legacy region. As suc= h these memory regions should be allocated as ReservedMemory, such as BIOS = data area (BDA) or extended BIOS data area (EBDA). +3. Some legacy Compatibility Support Module (CSM) drivers may need co-wor= k with SMM module. Then the SMM driver need access the legacy region. As su= ch these memory regions should be allocated as ReservedMemory, such as BIOS= data area (BDA) or extended BIOS data area (EBDA). =20 ## Call for action In order to support SMM memory protection, the firmware need configure SMM= driver to be page aligned: -1. Override link flags below to support SMM memory protection. - ```css +1. Override link flags below to support SMM memory protection. + ``` [BuildOptions.common.EDKII.DXE_SMM_DRIVER, - BuildOptions.common.EDKII.SMM_CORE]=09 - MSFT:*_*_*_DLINK_FLAGS =3D /ALIGN:4096=20 - GCC:*_*_*_DLINK_FLAGS =3D -z common-page-size=3D0x1000 - ``` + BuildOptions.common.EDKII.SMM_CORE] + MSFT:*_*_*_DLINK_FLAGS =3D /ALIGN:4096 + GCC:*_*_*_DLINK_FLAGS =3D -z common-page-size=3D0x1000 + ``` =20 -2. Evaluate if SMRAM size is big enough. +2. Evaluate if SMRAM size is big enough. =20 #### Summary This section introduces the memory protection in SMM. =20 [1]: https://software.intel.com/en-us/articles/intel-sdm "IA32SDM" [2]: http://uefi.org "PI Spec" - - - [3]: https://msdn.microsoft.com/en-us/library/windows/hardware/dn495660(v= =3Dvs.85).aspx#wsmt "WindowsWSMT" - [4]: http://download.microsoft.com/download/1/8/A/18A21244-EB67-4538-BAA2-= 1A54E0E490B6/WSMT.docx "WindowsWSMT docx" -[5]: https://msdn.microsoft.com/en-us/library/windows/hardware/dn614617 "= MicrosoftHV" -[6]: https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tou= r_Beyond_BIOS_Secure_SMM_Communication.pdf "SecureSmmComm" - - +[5]: https://msdn.microsoft.com/en-us/library/windows/hardware/dn614617 "M= icrosoftHV" +[6]: https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour= _Beyond_BIOS_Secure_SMM_Communication.pdf "SecureSmmComm" [7]: https://en.wikipedia.org/wiki/Address_space_layout_randomization "ASL= R" - [8]: https://en.wikipedia.org/wiki/Return-oriented_programming "ROP" - - - -=E2=80=83 diff --git a/memory-protection-in-uefi.md b/memory-protection-in-uefi.md index 635e0f8..255663d 100644 --- a/memory-protection-in-uefi.md +++ b/memory-protection-in-uefi.md @@ -1,24 +1,55 @@ + + # Memory Protection in UEFI In the white paper [[MemMap][1]], we discussed to how to report the runtim= e memory attribute by using `EFI_MEMORY_ATTRIBUTES_TABLE`, so that OS can a= pply the protection for the runtime code and data. This may bring some comp= atibility concerns if we choose to adopt the full DEP protection for the en= tire UEFI memory. =20 =20 In order to resolve the compatibility concerns, we can define a policy-bas= ed setting to enable partial NX and RO protection for the UEFI memory regio= n. The detailed information will be discussed below. -![](/assets/Fig4 - UEFI memory protection.jpg) -=20 -Figure 4 - UEFI memory protection +![](/media/Fig4 - UEFI memory protection.jpg) + +###### Figure 4 - UEFI memory protection =20 ## Protection for PE image The DXE core may apply a pre-defined policy to set up the NX attribute for= the PE data region and the RO attribute for the PE code region. =20 -1. The image is loaded by the UEFI boot service - `LoadImage()`. If an ima= ge is loaded in some other way, the DXE core does not have such knowledge a= nd the DXE core cannot apply any protection. -2. The image section is page aligned. If an image is not page aligned, the= DXE core cannot apply the page level protection. -3. The protection policy can be based upon a PCD =E2=80=98PcdImageProtecti= onPolicy`. (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/MdeM= odulePkg.dec) Whenever a new image is loaded, the DxeCore checks the source= of the image and then decides the policy of the protection. The policy cou= ld be to enable the protection if the sections are aligned, or disable the = protection. The platform may choose the policy based upon the need. For exa= mple, if a platform thinks the image from the firmware volume should be cap= able of being protection, it can set protection for IMAGE_FROM_FV. But if a= platform is not sure about a PCI option ROM or a file system on disk, it c= an set no-protection. +1. The image is loaded by the UEFI boot service - `LoadImage()`. If an ima= ge is loaded in some other way, the DXE core does not have such knowledge a= nd the DXE core cannot apply any protection. +2. The image section is page aligned. If an image is not page aligned, the= DXE core cannot apply the page level protection. +3. The protection policy can be based upon a PCD `PcdImageProtectionPolicy= `. (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/MdeModulePkg= .dec) Whenever a new image is loaded, the DxeCore checks the source of the = image and then decides the policy of the protection. The policy could be to= enable the protection if the sections are aligned, or disable the protecti= on. The platform may choose the policy based upon the need. For example, if= a platform thinks the image from the firmware volume should be capable of = being protection, it can set protection for IMAGE_FROM_FV. But if a platfor= m is not sure about a PCI option ROM or a file system on disk, it can set n= o-protection. =20 There are assumptions for the PE image protection in UEFI: =20 -1. [Same as SMM] The PE code section and data sections are not merged. If = those 2 sections are merged, a #PF exception might be generated because the= CPU may try to write a RO data in data section or execute a NX instruction= in the code section. -2. [Same as SMM] The PE image can be protected if it is page aligned. Ther= e should not be any self-modifying-code in the code region. If there is, a = platform should not set this PE image to be page aligned. -3. A platform may not disable the XD in the DXE phase. If a platform disab= les the XD in the DXE phase, the X86 page table will become invalid because= the XD bit in page table becomes a RESERVED bit. The consequence is that a= #PF exception will be generated. If a platform wants to disable the XD bit= , it must happen in the PEI phase. +1. [Same as SMM] The PE code section and data sections are not merged. If = those 2 sections are merged, a #PF exception might be generated because the= CPU may try to write a RO data in data section or execute a NX instruction= in the code section. +2. [Same as SMM] The PE image can be protected if it is page aligned. Ther= e should not be any self-modifying-code in the code region. If there is, a = platform should not set this PE image to be page aligned. +3. A platform may not disable the XD in the DXE phase. If a platform disab= les the XD in the DXE phase, the X86 page table will become invalid because= the XD bit in page table becomes a RESERVED bit. The consequence is that a= #PF exception will be generated. If a platform wants to disable the XD bit= , it must happen in the PEI phase. =20 In EDK II, the DXE core image services calls `ProtectUefiImage()` on image= load and `UnprotectUefiImage()` on image unload. (https://github.com/tiano= core/edk2/blob/master/MdeModulePkg/Core/Dxe/Image/Image.c) Then `ProtectUef= iImageCommon()` (https://github.com/tianocore/edk2/blob/master/MdeModulePkg= /Core/Dxe/Misc/MemoryProtection.c) calls `GetUefiImageProtectionPolicy()` t= o check the image source and protection policy and parses PE alignment. If = all checks pass, `SetUefiImageProtectionAttributes()` calls `SetUefiImageMe= moryAttributes()`. Finally, `gCpu->SetMemoryAttribute()` sets **EFI_MEMORY_= XP** or **EFI_MEMORY_RO** for the new loaded image , or clears the protecti= on for the old unloaded image. When the CPU driver gets the memory attribut= e setting request, it updates page table. =20 @@ -26,22 +57,22 @@ The X86 CPU driver https://github.com/tianocore/edk2/bl= ob/master/UefiCpuPkg/CpuD =20 The ARM CPU driver https://github.com/tianocore/edk2/blob/master/ArmPkg/Dr= ivers/CpuDxe/CpuMmuCommon.c `CpuSetMemoryAttributes()` also has similar cap= ability. =20 -If an image is loaded before CPU_ARCH protocol is ready, the DXE core just= skips the setting. Later these images protection will be set in CPU_ARCH c= allback function =E2=80=93 `MemoryProtectionCpuArchProtocolNotify() `(https= ://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Misc/MemoryP= rotection.c). +If an image is loaded before CPU_ARCH protocol is ready, the DXE core just= skips the setting. Later these images protection will be set in CPU_ARCH c= allback function - `MemoryProtectionCpuArchProtocolNotify()`(https://github= .com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Misc/MemoryProtection= .c). =20 In `ExitBootServices` event, `MemoryProtectionExitBootServicesCallback() `= (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Misc/M= emoryProtection.c) is invoked to unprotect the runtime image, because the r= untime image code relocation need write code segment at `SetVirtualAddressM= ap()`. =20 ## Protection for stack and heap -[[UEFI][2]] specification allows=20 ->"Stack may be marked as non-executable in identity mapped page tables."=20 +[[UEFI][2]] specification allows +>"Stack may be marked as non-executable in identity mapped page tables." =20 As such, we set up the NX stack (https://github.com/tianocore/edk2/blob/ma= ster/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c, `CreateIdentityMappi= ngPageTables()`). =20 =20 =20 -The heap protection is based upon the policy, because we already observed = some unexpected usage in [[MemMap][1]] white paper. A platform needs to co= nfigure a PCD `PcdDxeNxMemoryProtectionPolicy`=20 +The heap protection is based upon the policy, because we already observed = some unexpected usage in [[MemMap][1]] white paper. A platform needs to co= nfigure a PCD `PcdDxeNxMemoryProtectionPolicy` (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/MdeModulePkg.d= ec) to indicate which type of memory can be set to NX in the page table. Th= e DxeCore `ApplyMemoryProtectionPolicy()` (https://github.com/tianocore/edk= 2/blob/master/MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c) consumes the P= CD after the memory allocation service and sets NX attribute for the alloca= ted memory by using CPU_ARCH protocol. =20 -Before CPU_ARCH protocol is ready, the protection takes no effect. In CPU_= ARCH callback function =E2=80=93 `MemoryProtectionCpuArchProtocolNotify() `= (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Misc/M= emoryProtection.c), the `InitializeDxeNxMemoryProtectionPolicy()` is called= to get current memory map and setup the NX protection. +Before CPU_ARCH protocol is ready, the protection takes no effect. In CPU_= ARCH callback function - `MemoryProtectionCpuArchProtocolNotify() `(https:/= /github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Misc/MemoryPro= tection.c), the `InitializeDxeNxMemoryProtectionPolicy()` is called to get = current memory map and setup the NX protection. =20 =20 In addition, we may use some special techniques, such as the guard page, t= o apply the protection for the allocated memory in order to detect a buffer= overflow. This is discussed in [[SecurityEnhancement][3]] white paper. @@ -58,10 +89,10 @@ The UEFI firmware does not own page tables after `ExitB= ootServices()`, so the OS =20 ## Size Overhead =20 -1. Runtime memory overhead (visible to OS) -: The size overhead of the runtime PE image is the same as the overhead of= the SMM PE image. If a platform has n runtime images, the average amount = overhead is `6K * n`. -2. Boot time memory overhead (invisible to OS) -: The size of the overhead for the boot time PE image is the same as the o= verhead of the SMM PE image. If a platform has n boot time images, the aver= age overhead is `6K * n`. +1. Runtime memory overhead (visible to OS) +: The size overhead of the runtime PE image is the same as the overhead of= the SMM PE image. If a platform has n runtime images, the average amount = overhead is `6K * n`. +2. Boot time memory overhead (invisible to OS) +: The size of the overhead for the boot time PE image is the same as the o= verhead of the SMM PE image. If a platform has n boot time images, the aver= age overhead is `6K * n`. =20 If the NX protection for data is enabled, the size of the page table is in= creased because we need set fine granularity page level protection. =20 @@ -70,10 +101,10 @@ The size overhead of the boot time page table is also = same as for the SMM static ## Limitation The protection in the UEFI is limited to the PE image and the stack at thi= s moment because of the compatibility concerns. The limitations of the UEFI= memory protection are: =20 -1. Not all images are protected to be NX and RO. The protection is based u= pon the policy. -2. Not all heap regions are protected to be NX due to the compatibility co= ncern. We observed that both Windows boot loader and Linux boot loader may = use the LoaderData type for the code. The heap protection is based upon the= policy. -3. [Same as SMM] The protection cannot resist ROP attack. -4. [Same as SMM] Not all important data structures are set to ReadOnly. +1. Not all images are protected to be NX and RO. The protection is based u= pon the policy. +2. Not all heap regions are protected to be NX due to the compatibility co= ncern. We observed that both Windows boot loader and Linux boot loader may = use the LoaderData type for the code. The heap protection is based upon the= policy. +3. [Same as SMM] The protection cannot resist ROP attack. +4. [Same as SMM] Not all important data structures are set to ReadOnly. =20 ## Compatibility Consideration A platform may need to evaluate and select the image protection policy bas= ed upon the capability of the platform image, Option ROM, and OS loader. Fo= r platform images, the Compatibility Support Module (CSM) and the EDK-I Com= patibility Package (ECP) modules should be considered. If a platform observ= es the compatibility issues, it should choose 1) to disable the protection,= or 2) to fix the compatibility issue and enable the protection. @@ -81,36 +112,31 @@ A platform may need to evaluate and select the image p= rotection policy based upo ## Call for action In order to support UEFI memory protection, the firmware need configure UE= FI driver to be page aligned: =20 -1. Override link flags below to support UEFI runtime attribute table, so t= hat OS can protect the runtime memory. -```css=20 +1. Override link flags below to support UEFI runtime attribute table, so t= hat OS can protect the runtime memory. +``` [BuildOptions.IA32.EDKII.DXE_RUNTIME_DRIVER, BuildOptions.X64.EDKII.DXE_RU= NTIME_DRIVER] -MSFT:*_*_*_DLINK_FLAGS =3D /ALIGN:4096=20 +MSFT:*_*_*_DLINK_FLAGS =3D /ALIGN:4096 GCC:*_*_*_DLINK_FLAGS =3D -z common-page-size=3D0x1000 ``` -2. Override link flags below to support UEFI memory protection. -```css -[BuildOptions.common.EDKII.DXE_DRIVER,=20 -BuildOptions.common.EDKII.DXE_CORE,=20 +2. Override link flags below to support UEFI memory protection. +``` +[BuildOptions.common.EDKII.DXE_DRIVER, +BuildOptions.common.EDKII.DXE_CORE, BuildOptions.common.EDKII.UEFI_DRIVER, BuildOptions.common.EDKII.UEFI_APPL= ICATION] -MSFT:*_*_*_DLINK_FLAGS =3D /ALIGN:4096=20 +MSFT:*_*_*_DLINK_FLAGS =3D /ALIGN:4096 GCC:*_*_*_DLINK_FLAGS =3D -z common-page-size=3D0x1000 ``` -3. Evaluate if the UEFI memory size is big enough to hold the split page t= able. +3. Evaluate if the UEFI memory size is big enough to hold the split page = table. =20 -4. Evaluate if the DXE image can be protected. +4. Evaluate if the DXE image can be protected. =20 -5. Set proper `gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy`. - -6. Set proper `gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPoli= cy`. +5. Set proper `gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy`. =20 +6. Set proper `gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPoli= cy`. =20 #### Summary This section introduces the memory protection in UEFI. =20 [1]: https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour= _Beyond_BIOS_Memory_Map_And_Practices_in_UEFI_BIOS_V2.pdf "MemMap" - - [2]: http://uefi.org "UEFI" - - [3]: https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour= _Beyond_BIOS_Securiy_Enhancement_to_Mitigate_Buffer_Overflow_in_UEFI.pdf "S= ecurity Enhancment" \ No newline at end of file diff --git a/references.md b/references.md index 23894e0..c9ffab7 100644 --- a/references.md +++ b/references.md @@ -1,10 +1,41 @@ + + # References =20 [ASLR] Address Space Layout Randmization, https://en.wikipedia.org/wiki/Ad= dress_space_layout_randomization =20 -[DEP] Exploit Mitigation Improvements in Windows 8, Ken Johnson, Ma, Mille= r, http://media.blackhat.com/bh-us-12/Briefings/M_Miller/BH_US_12_Miller_Ex= ploit_Mitigation_Slides.pdf=20 +[DEP] Exploit Mitigation Improvements in Windows 8, Ken Johnson, Ma, Mille= r, http://media.blackhat.com/bh-us-12/Briefings/M_Miller/BH_US_12_Miller_Ex= ploit_Mitigation_Slides.pdf =20 -[IA32SDM] Intel=C2=AE 64 and IA-32 Architectures Software Developer=E2=80= =99s Manual, www.intel.com https://software.intel.com/en-us/articles/intel-= sdm +[IA32SDM] Intel(R) 64 and IA-32 Architectures Software Developer's Manual,= www.intel.com https://software.intel.com/en-us/articles/intel-sdm =20 [MemMap] A Tour Beyond BIOS Memory Map And Practices in UEFI BIOS, Jiewen = Yao, Vincent Zimmer, 2016 https://github.com/tianocore-docs/Docs/raw/master= /White_Papers/A_Tour_Beyond_BIOS_Memory_Map_And_Practices_in_UEFI_BIOS_V2.p= df =20 @@ -12,25 +43,22 @@ =20 [ROP] Return-oriented programming, https://en.wikipedia.org/wiki/Return-or= iented_programming =20 -[SecureSmmComm] A Tour Beyond BIOS Secure SMM Communication, Jiewen Yao, V= incent Zimmer, Star Zeng, 2016, https://github.com/tianocore-docs/Docs/raw/= master/White_Papers/A_Tour_Beyond_BIOS_Secure_SMM_Communication.pdf=20 +[SecureSmmComm] A Tour Beyond BIOS Secure SMM Communication, Jiewen Yao, V= incent Zimmer, Star Zeng, 2016, https://github.com/tianocore-docs/Docs/raw/= master/White_Papers/A_Tour_Beyond_BIOS_Secure_SMM_Communication.pdf =20 [SecurityEnhancement] A Tour Beyond BIOS Securiy Enhancement to Mitigate B= uffer Overflow in UEFI, Jiewen Yao, Vincent Zimmer, 2016, https://github.co= m/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_Beyond_BIOS_Securiy_En= hancement_to_Mitigate_Buffer_Overflow_in_UEFI.pdf =20 [SecurityDesign] A Tour Beyond BIOS Security Design Guide in EDK II, Jiewe= n Yao, Vincent Zimmer, 2016, https://github.com/tianocore-docs/Docs/raw/mas= ter/White_Papers/A_Tour_Beyond_BIOS_Security_Design_Guide_in_EDK_II.pdf =20 -[UEFI] Unified Extensible Firmware Interface (UEFI) Specification, Version= 2.6 =20 -www.uefi.org=20 +[UEFI] Unified Extensible Firmware Interface (UEFI) Specification, Version= 2.6 +www.uefi.org =20 -[VTd] Intel=C2=AE Virtualization Technology for Directed I/O: Spec, http:/= /www.intel.com/content/www/us/en/embedded/technology/virtualization/vt-dire= cted-io-spec.html +[VTd] Intel(R) Virtualization Technology for Directed I/O: Spec, http://ww= w.intel.com/content/www/us/en/embedded/technology/virtualization/vt-directe= d-io-spec.html =20 [WindowsHeap] Preventing the exploitation of user mode heap corruption vul= nerabilities, 2009, https://blogs.technet.microsoft.com/srd/2009/08/04/prev= enting-the-exploitation-of-user-mode-heap-corruption-vulnerabilities/ =20 [WindowsInternal] Windows Internals, 6th edition, Mark E. Russinovich, Dav= id A. Solomon, Alex Ionescu, 2012, Microsoft Press. ISBN-13: 978-0735648739= /978-0735665873 =20 [WindowsWSMT] Windows SMM Security Table, https://msdn.microsoft.com/en-us= /library/windows/hardware/dn495660(v=3Dvs.85).aspx#wsmt -http://download.microsoft.com/download/1/8/A/18A21244-EB67-4538-BAA2-1A54E= 0E490B6/WSMT.docx=20 - -[MicrosoftHV] Microsoft Hypervisor Requirements, https://msdn.microsoft.co= m/en-us/library/windows/hardware/dn614617=20 - +http://download.microsoft.com/download/1/8/A/18A21244-EB67-4538-BAA2-1A54E= 0E490B6/WSMT.docx =20 -=E2=80=83 +[MicrosoftHV] Microsoft Hypervisor Requirements, https://msdn.microsoft.co= m/en-us/library/windows/hardware/dn614617 --=20 2.29.2.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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mdkinney-mobl2.amr.corp.intel.com ([10.212.203.56]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Dec 2020 12:07:55 -0800 From: "Michael D Kinney" To: devel@edk2.groups.io Cc: Jiewen Yao , Vincent Zimmer , Laurie Jarlstrom , Kevin Shaw Subject: [edk2-devel] [tianocore-docs][ATBB-Memory_Protection_in_UEFI_BIOS][Patch 2/2] Update to match template and enable GitBook action Date: Fri, 11 Dec 2020 12:07:48 -0800 Message-Id: <20201211200748.1622-3-michael.d.kinney@intel.com> In-Reply-To: <20201211200748.1622-1-michael.d.kinney@intel.com> References: <20201211200748.1622-1-michael.d.kinney@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,michael.d.kinney@intel.com X-Gm-Message-State: thzC3RfRWOt1xJHgJaIKxoJgx1787277AA= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1607717279; bh=Enc6T1bubYsn+2M8rjQZzrdbwZDJKHb5RLqTZA/qVcQ=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=leQdwQRzT+HZyj4jz/kKLeHKS6QRPsY0D8apkwFWwv/vBqPKAw3jrA8ogahCACgcfTV Gq/VNDsywWCVeNMRrmqKFSJ2t6YHMd4wxBRNM5tLF9wDnYiJ5dh6BngXzyG/0Xl+uergm WfWPNinPzr1wSr1Cm4hiAXTT0MYAa1XDoUw= X-ZohoMail-DKIM: pass (identity @groups.io) * Add layout directory to match template * Update CSS styles to match template * Add GitBook Action Cc: Jiewen Yao Cc: Vincent Zimmer Cc: Laurie Jarlstrom Cc: Kevin Shaw Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney Reviewed-by: Jiewen Yao --- .bookignore | 3 + .github/workflows/gitbook-action.yml | 39 +++++ .gitignore | 10 +- _layouts/ebook/page.html | 42 +++++ _layouts/ebook/pdf_footer.html | 17 ++ _layouts/ebook/pdf_header.html | 14 ++ _layouts/ebook/summary.html | 98 ++++++++++++ _layouts/layout.html | 27 ++++ _layouts/website/footer.html | 17 ++ _layouts/website/header.html | 31 ++++ _layouts/website/languages.html | 19 +++ _layouts/website/layout.html | 28 ++++ _layouts/website/page.html | 86 +++++++++++ _layouts/website/summary.html | 61 ++++++++ styles/epub.css | 221 ++------------------------ styles/mobi.css | 50 ++++++ styles/pdf.css | 221 +++----------------------- styles/website.css | 223 +++------------------------ 18 files changed, 591 insertions(+), 616 deletions(-) create mode 100644 .bookignore create mode 100644 .github/workflows/gitbook-action.yml create mode 100644 _layouts/ebook/page.html create mode 100644 _layouts/ebook/pdf_footer.html create mode 100644 _layouts/ebook/pdf_header.html create mode 100644 _layouts/ebook/summary.html create mode 100644 _layouts/layout.html create mode 100644 _layouts/website/footer.html create mode 100644 _layouts/website/header.html create mode 100644 _layouts/website/languages.html create mode 100644 _layouts/website/layout.html create mode 100644 _layouts/website/page.html create mode 100644 _layouts/website/summary.html create mode 100644 styles/mobi.css diff --git a/.bookignore b/.bookignore new file mode 100644 index 0000000..ed716f0 --- /dev/null +++ b/.bookignore @@ -0,0 +1,3 @@ +/.github +.gitignore +.bookignore diff --git a/.github/workflows/gitbook-action.yml b/.github/workflows/gitbo= ok-action.yml new file mode 100644 index 0000000..917b0d7 --- /dev/null +++ b/.github/workflows/gitbook-action.yml @@ -0,0 +1,39 @@ +name: 'Gitbook Action Build' +on: + push: + branches: + - master + - release/* + workflow_dispatch: + +jobs: + build: + runs-on: ubuntu-latest + steps: + - name: Checkout action + uses: actions/checkout@v2 + - name: Get Branch + run: | + raw=3D$(git branch -r --contains ${{ github.ref }}) + branch=3D${raw/ origin\/} + pubdir=3D${branch/master/draft} + pubdir=3D${pubdir////-} + echo "ON_PUSH_BRANCH_NAME=3D$branch" >> $GITHUB_ENV + echo "ON_PUSH_PUBDIR=3D$pubdir" >> $GITHUB_ENV + - name: Gitbook Action + uses: zanderzhao/gitbook-action@v1.2.4 + with: + token: ${{secrets.GITBOOK_ACTION_PERSONAL_TOKEN}} + source_branch: ${{env.ON_PUSH_BRANCH_NAME}} + publish_branch: gh-pages + publish_dir: ${{env.ON_PUSH_PUBDIR}} + publish_remove_last_build: true + gitbook_pdf: true + gitbook_pdf_dir: / + gitbook_pdf_name: ${{ github.event.repository.name }}-${{env.ON_PU= SH_PUBDIR}} + gitbook_epub: true + gitbook_epub_dir: / + gitbook_epub_name: ${{ github.event.repository.name }}-${{env.ON_P= USH_PUBDIR}} + gitbook_mobi: true + gitbook_mobi_dir: / + gitbook_mobi_name: ${{ github.event.repository.name }}-${{env.ON_P= USH_PUBDIR}} diff --git a/.gitignore b/.gitignore index 1a366fb..e9c50d9 100644 --- a/.gitignore +++ b/.gitignore @@ -5,12 +5,12 @@ ## Dependency directory ## Commenting this out is preferred by some people, see ## https://docs.npmjs.com/misc/faq#should-i-check-my-node_modules-folder-i= nto-git -node_modules +/node_modules =20 # Book build output -_book +/_book =20 # eBook build output -*.epub -*.mobi -*.pdf \ No newline at end of file +/book.epub +/book.mobi +/book.pdf \ No newline at end of file diff --git a/_layouts/ebook/page.html b/_layouts/ebook/page.html new file mode 100644 index 0000000..9dec3b5 --- /dev/null +++ b/_layouts/ebook/page.html @@ -0,0 +1,42 @@ +{% extends "layout.html" %} + +{% block title %}{{ page.title }}{% endblock %} +{% block description %}{{ page.description }}{% endblock %} + +{% block style %} + {### Include theme css before plugins css ###} + {% if not fileExists(config.styles.print) %} + {% if options.format %} + + {% else %} + + {% endif %} + {% endif %} + + {{ super() }} + + {### Custom stylesheets for the book ###} + + {% for type, style in config.styles %} + {% if fileExists(style) and (type =3D=3D "ebook" or type =3D=3D "p= rint" or type =3D=3D options.format) %} + + {% endif %} + {% endfor %} +{% endblock %} + +{% block body %} +
+ {% block page %} +

{{ page.t= itle }}

+ {% if options.format =3D=3D "mobi" %} +
+ {{ page.content|safe }} +
+ {% else %} +
+ {{ page.content|safe }} +
+ {% endif %} + {% endblock %} +
+{% endblock %} diff --git a/_layouts/ebook/pdf_footer.html b/_layouts/ebook/pdf_footer.html new file mode 100644 index 0000000..709fa57 --- /dev/null +++ b/_layouts/ebook/pdf_footer.html @@ -0,0 +1,17 @@ +{% extends "./page.html" %} + +{% block body %} +
+ {% if book.draft %} +

+

DRAFT FOR REVIEW [{= { gitbook.time|date('MM/DD/YYYY hh:mm:ss') }}]
+
{{ page.num }}
+

=20 + {% else %} +

+

{{ book.version }}<= /div> +
{{ page.num }}
+

=20 + {% endif %} +
+{% endblock %} diff --git a/_layouts/ebook/pdf_header.html b/_layouts/ebook/pdf_header.html new file mode 100644 index 0000000..05c7450 --- /dev/null +++ b/_layouts/ebook/pdf_header.html @@ -0,0 +1,14 @@ +{% extends "./page.html" %} + +{% block body %} +
+

+ {% if book.draft %} +

{{ book.title }}[DR= AFT]
+ {% else %} +
{{ book.title }} + {% endif %} +
{{ page.title }}
+

=20 +
+{% endblock %} diff --git a/_layouts/ebook/summary.html b/_layouts/ebook/summary.html new file mode 100644 index 0000000..946e8cb --- /dev/null +++ b/_layouts/ebook/summary.html @@ -0,0 +1,98 @@ +{% extends "./page.html" %} + +{% block title %}{{ "SUMMARY"|t }}{% endblock %} + +{% macro articles(_articles) %} + {% for article in _articles %} + {% if options.format =3D=3D "mobi" %} +
+ {% else %} +
  • + {% endif %} + + {% if article.path or article.url %} + {% if article.path %} + {{ article.title }} + {% else %} + {{= article.title }} + {% endif %} + {% else %} + {{ article.title }} + {% endif %} + {% if 0 %} + {{ article.level }} + {% endif %} + + {% if article.articles.length > 0 %} + {% if options.format =3D=3D "mobi" %} +
    + {{ articles(article.articles) }} +
    + {% else %} +
      + {{ articles(article.articles) }} +
    + {% endif %} + {% endif %} + {% if options.format =3D=3D "mobi" %} +
    • + {% else %} + + {% endif %} + {% endfor %} +{% endmacro %} + +{% block page %} +{% if options.format =3D=3D "mobi" %} +
    +{% else %} +
    +{% endif %} +

    {{ "SUMMARY"|t }}

    + {% if options.format =3D=3D "mobi" %} +
    + {% else %} +
      + {% endif %} + {% for part in summary.parts %} + {% if part.title %} + {% if options.format =3D=3D "mobi" %} +
      + {{ part.title }} +
      + {% else %} +
    1. + {{ part.title }} +
      2. + {% endif %} + {% endif %} + {{ articles(part.articles) }} + + {% if not loop.last and not options.format =3D=3D "mobi" %} +
    2. + {% endif %} + {% endfor %} + + {% if glossary.path %} + {% if options.format =3D=3D "mobi" %} +
      + + {{ "GLOSSARY"|t }} + +
      + {% else %} +
    3. + + {{ "GLOSSARY"|t }} + +
      4. + {% endif %} + {% endif %} + {% if options.format =3D=3D "mobi" %} +
    + {% else %} + + {% endif %} +
    +{% endblock %} + diff --git a/_layouts/layout.html b/_layouts/layout.html new file mode 100644 index 0000000..884574c --- /dev/null +++ b/_layouts/layout.html @@ -0,0 +1,27 @@ + + + + + + {% block title %}{{ config.title|d("GitBook", true) }}{% en= dblock %} + + + + {% if config.author %}{% endif %} + {% if config.isbn %}{% endif %} + {% block style %} + {% for resource in plugins.resources.css %} + {% if resource.url %} + + {% else %} + + {% endif %} + {% endfor %} + {% endblock %} + {% block head %}{% endblock %} + + + {% block body %}{% endblock %} + {% block javascript %}{% endblock %} + + diff --git a/_layouts/website/footer.html b/_layouts/website/footer.html new file mode 100644 index 0000000..c37da01 --- /dev/null +++ b/_layouts/website/footer.html @@ -0,0 +1,17 @@ +{% block book_footer %} +
    +
    + {% if book.draft %} +

    +
    {{ book.title }}<= /div> +
    DRAF= T [{{ gitbook.time|date('MM/DD/YYYY hh:mm:ss') }}]
    +
    {{ book.version }}
    +

    =20 + {% else %} +

    +
    {{ book.title }}<= /div> +
    {{ book.version }}
    +

    =20 + {% endif %} +
    +{% endblock %} diff --git a/_layouts/website/header.html b/_layouts/website/header.html new file mode 100644 index 0000000..2e5971c --- /dev/null +++ b/_layouts/website/header.html @@ -0,0 +1,31 @@ +{% block book_header %} +
    + {% if glossary.path %} + + {% endif %} + + +

    + + {{ page.title }} +

    +
    +
    + + {% if book.draft %} +

    +
    {{ book.title }}<= /div> +
    DRAF= T [{{ gitbook.time|date('MM/DD/YYYY hh:mm:ss') }}]
    +
    {{ book.version }}
    +

    =20 + {% else %} +

    +
    {{ book.title }}<= /div> +
    {{ book.version }}
    +

    =20 + {% endif %} +
    +
    +{% endblock %} diff --git a/_layouts/website/languages.html b/_layouts/website/languages.h= tml new file mode 100644 index 0000000..a9d43be --- /dev/null +++ b/_layouts/website/languages.html @@ -0,0 +1,19 @@ +{% extends "./layout.html" %} + +{% block title %}{{ "LANGS_CHOOSE"|t }} =C2=B7 {{ super() }}{% endblock %} + +{% block body %} +
    +
    +

    {{ "LANGS_CHOOSE"|t }}

    + + +
    +
    +{% endblock %} diff --git a/_layouts/website/layout.html b/_layouts/website/layout.html new file mode 100644 index 0000000..5fa7fe8 --- /dev/null +++ b/_layouts/website/layout.html @@ -0,0 +1,28 @@ +{% extends "layout.html" %} + +{% block head %} + {{ super() }} + + + + + + +{% endblock %} + +{% block style %} + {### Include theme css before plugins css ###} + + + {{ super() }} + + {### Custom stylesheets for the book ###} + + {% for type, style in config.styles %} + {% if fileExists(style) and type =3D=3D "website" %} + + {% endif %} + {% endfor %} +{% endblock %} + +{% block body %}{% endblock %} diff --git a/_layouts/website/page.html b/_layouts/website/page.html new file mode 100644 index 0000000..d78a348 --- /dev/null +++ b/_layouts/website/page.html @@ -0,0 +1,86 @@ +{% extends "./layout.html" %} + +{% block title %}{{ page.title }} =C2=B7 {{ super() }}{% endblock %} + +{% block description %}{{ page.description }}{% endblock %} + +{% block head %} + {{ super() }} + {% if page.next and page.next.path %} + + {% endif %} + {% if page.previous and page.previous.path %} + + {% endif %} +{% endblock %} + +{% block javascript %} + + + {% for resource in plugins.resources.js %} + {% if resource.url %} + + {% else %} + + {% endif %} + {% endfor %} +{% endblock %} + +{% block body %} +
    +
    + {% block book_sidebar %} + {% block search_input %}{% endblock %} + {% block book_summary %} + + {% endblock %} + {% endblock %} +
    + +
    + {% block book_body %} +
    + {% block book_inner %} + {% include "website/header.html" %} + +
    +
    + {% block search_results %} +
    + {% block page %} + {{ page.content|safe }} + {% endblock %} +
    + {% endblock %} +
    +
    + =20 + {% include "website/footer.html" %} + {% endblock %} +
    + + {% block book_navigation %} + {% if page.previous and page.previous.path %} + + + + {% endif %} + {% if page.next and page.next.path %} + + + + {% endif %} + {% endblock %} + {% endblock %} +
    + + +
    +{% endblock %} diff --git a/_layouts/website/summary.html b/_layouts/website/summary.html new file mode 100644 index 0000000..e43c954 --- /dev/null +++ b/_layouts/website/summary.html @@ -0,0 +1,61 @@ +{% macro articles(_articles) %} + {% for article in _articles %} +
  • + {% if article.path and getPageByPath(article.path) %} + + {% elif article.url %} + + {% else %} + + {% endif %} + {% if article.level !=3D "0" and config.pluginsConfig[= 'theme-default'].showLevel %} + {{ article.level }}. + {% endif %} + {{ article.title }} + {% if article.path or article.url %} + + {% else %} + + {% endif %} + + {% if article.articles.length > 0 %} +
      + {{ articles(article.articles, file, config) }} +
    + {% endif %} +
    • + {% endfor %} +{% endmacro %} + +
      + {% set _divider =3D false %} + {% if config.links.sidebar %} + {% for linkTitle, link in config.links.sidebar %} + {% set _divider =3D true %} +
    • + {{ linkTitle }} +
      • + {% endfor %} + {% endif %} + + {% if _divider %} +
    • + {% endif %} + + {% for part in summary.parts %} + {% if part.title %} +
    • {{ part.title }}
      • + {% elif not loop.first %} +
    • + {% endif %} + {{ articles(part.articles, file, config) }} + {% endfor %} + +
    • + +
    • + + {{ "GITBOOK_LINK"|t }} + +
      • +
    diff --git a/styles/epub.css b/styles/epub.css index b9729f1..56f8394 100644 --- a/styles/epub.css +++ b/styles/epub.css @@ -1,235 +1,48 @@ -/* CSS for pdf */ - -body { - background: #f1f1f1; - border-top: 10px solid #999999; - font-size: 12pt; -} - -#mainbody { - margin-left: auto; - margin-right: auto; - width: 60em; -} - -#topbar { - top: 0; - left: 0; - bottom: 0; - width: 60em; - background: url("../images/header-bg.jpg") no-repeat; - border-top: 10px solid #ff6600; - margin-top: -10px; - float: left; -} - -#topbar.front-page { - height: 13em; -} - -#topbar #logo { - position: relative; - top: 85px; - left: 20px; -} - -#topbar #small-logo { - position: relative; - left: 20px; - padding: 0.1em 0 0.1em 0; - height: 3em; -} - -#sidebar { - float: left; - z-index: 1; - top: 0; - left: 0; - bottom: 0; - padding: 2em 0.5em 0 0.5em; - width: 9em; -} - -div.main-page.content { - float: left; - width: 35em; -} - -div.main-page.news { - float: right; - width: 20em; -} - -div.main-page.news h2 { - border-top: 10px solid #365f91; - border-bottom: 1px solid #333333; - color: #333333; - padding: 0.5em; - margin: 0; -} - -div.main-page.news ul { - margin: 0; - list-style: none; - list-style-image: none; -} - -div.main-page.news ul li { - border-bottom: 1px solid #333333; - padding: 0.5em; - color: #777777; -} - -div.main-page.news ul li a { - font-weight: bold; -} - -div.news-page.news-item { - border-top: 1px solid #777777; - width: 100%; - padding: 0; - margin: 0; -} - -#content { - margin: 0px; - padding: 2em 1em; - font-family: Helvetica; - color: #40494d; - background-color: #fff; - width: 100%; - max-width: 60em; - display: block; - float: left; -} - -#content #buttons a { - background: #ff6600; - color: #333333; - font-family: "Helvetica"; - text-transform: uppercase; - font-size: 15px; - display: inline-block; - padding: 8px 25px; - margin: 10px 20px 10px 0; -} - -#footer { - background: #999999; - margin-bottom: 60px; - width: 100%; - float: left; - padding: 0.5em 1em; -} -#footer #footer-inner { - height: 2em; - background: url("../images/footer-icon.svg") no-repeat right center; -} -#footer #footer-inner a { - color: white; - font-size: 14px; -} -@media (min-width: 0em) and (max-width: 63.9375em) { - #footer #footer-inner { - padding: 10px 20px; - background-position: right 20px center; - } -} -@media (min-width: 64em) { - #page-wrapper #page #footer-inner { - -sgs-span-settings: ("span": 3, "location": 2, "grid": 20px 630px 20px= 310px 20px, "gutter": 0.25, "style": "opposite", "start row": false, "end = row": false, "fixed gutter": true, "split gutter": false, "gutter property"= : "padding", "options": (("both": null))); - width: 96%; - float: left; - margin-right: -100%; - margin-left: 2%; - clear: none; - padding-right: 0.25; - } -} -@media (min-width: 0em) and (max-width: 63.9375em) { - #page-wrapper #page #footer-inner { - -sgs-span-settings: ("span": 1, "location": 1, "grid": 1, "gutter": 0.= 25, "style": "opposite", "start row": true, "end row": true, "fixed gutter"= : false, "split gutter": false, "gutter property": "margin", "options": ((n= ull: null))); - width: 100%; - float: right; - margin-left: 0; - margin-right: 0; - clear: none; - } -} - -ul { - font-family: sans-serif; - list-style-type: square; - padding: 0 0 0 0; - margin: 0.3em 0 0 1.5em; -} - -.site-menu { - color: #a0a0a0; -} - -a.site-menu:hover { - color: #4048c0; -} - -a { - color: #0860A8; - text-decoration: none; -} - -a:hover { - color: #0860A8; - text-decoration: underline; +p { + font-family: sans, sans-serif, Arial; } =20 -p { - margin: .4em 0 .5em 0; - line-height: 1.5em; +body { + font-family: sans, sans-serif, Arial; } =20 h1 { color: #0860A8; - font-family: "Helvetica"; font-weight: normal; font-size: 190%; text-transform: uppercase; - margin-top: 0; - margin-bottom: 0; } =20 h2 { color: #0860A8; - font-family: "Helvetica"; font-size: 130% } =20 h3 { color: #0860A8; font-weight: bold; - font-size: 90% + font-size: 100% } =20 h4 { color: #0860A8; - font-weight: bold; font-size: 90% } =20 -.t_projects th { - background-color: #DBEBFF; +h5 { + color: #0860A8; + font-weight: bold; + font-size: 90%; } =20 -.t_projects table, th, td { - border: 1px solid #ccc; - font-size: 80%; +h6 { + font-weight: bold; + font-size: 90%; + text-align: center; } =20 -.section.toc { - display: none; +img { + max-width: 100%; + height: auto; } - -/* TODO: Consider css for - * - * .posts .site .header .title .meta .footer .contact .rss .post - */ -=20 \ No newline at end of file + =20 diff --git a/styles/mobi.css b/styles/mobi.css new file mode 100644 index 0000000..efa36c5 --- /dev/null +++ b/styles/mobi.css @@ -0,0 +1,50 @@ +p { + font-family: sans, sans-serif, Arial; +} + +body { + font-family: sans, sans-serif, Arial; +} + +h1 { + color: #0860A8; + font-weight: bold; + font-size: 170%; + text-transform: uppercase; +} + +h2 { + color: #0860A8; + font-weight: bold; + font-size: 160% +} + +h3 { + color: #0860A8; + font-weight: bold; + font-size: 150% +} + +h4 { + color: #0860A8; + font-weight: bold; + font-size: 140% +} + +h5 { + color: #0860A8; + font-weight: bold; + font-size: 130%; +} + +h6 { + font-weight: bold; + font-size: 100%; + text-align: center; +} + +img { + max-width: 100%; + height: auto; +} + =20 diff --git a/styles/pdf.css b/styles/pdf.css index 56f3448..56f8394 100644 --- a/styles/pdf.css +++ b/styles/pdf.css @@ -1,233 +1,48 @@ -/* CSS for pdf */ - -body { - background: #f1f1f1; - border-top: 10px solid #999999; - font-size: 12pt; -} - -#mainbody { - margin-left: auto; - margin-right: auto; - width: 60em; -} - -#topbar { - top: 0; - left: 0; - bottom: 0; - width: 60em; - background: url("../images/header-bg.jpg") no-repeat; - border-top: 10px solid #ff6600; - margin-top: -10px; - float: left; -} - -#topbar.front-page { - height: 13em; -} - -#topbar #logo { - position: relative; - top: 85px; - left: 20px; -} - -#topbar #small-logo { - position: relative; - left: 20px; - padding: 0.1em 0 0.1em 0; - height: 3em; -} - -#sidebar { - float: left; - z-index: 1; - top: 0; - left: 0; - bottom: 0; - padding: 2em 0.5em 0 0.5em; - width: 9em; -} - -div.main-page.content { - float: left; - width: 35em; -} - -div.main-page.news { - float: right; - width: 20em; -} - -div.main-page.news h2 { - border-top: 10px solid #365f91; - border-bottom: 1px solid #333333; - color: #333333; - padding: 0.5em; - margin: 0; -} - -div.main-page.news ul { - margin: 0; - list-style: none; - list-style-image: none; -} - -div.main-page.news ul li { - border-bottom: 1px solid #333333; - padding: 0.5em; - color: #777777; -} - -div.main-page.news ul li a { - font-weight: bold; -} - -div.news-page.news-item { - border-top: 1px solid #777777; - width: 100%; - padding: 0; - margin: 0; -} - -#content { - margin: 0px; - padding: 2em 1em; - font-family: Helvetica; - color: #40494d; - background-color: #fff; - width: 100%; - max-width: 60em; - display: block; - float: left; -} - -#content #buttons a { - background: #ff6600; - color: #333333; - font-family: "Helvetica"; - text-transform: uppercase; - font-size: 15px; - display: inline-block; - padding: 8px 25px; - margin: 10px 20px 10px 0; -} - -#footer { - background: #999999; - margin-bottom: 60px; - width: 100%; - float: left; - padding: 0.5em 1em; -} -#footer #footer-inner { - height: 2em; - background: url("../images/footer-icon.svg") no-repeat right center; -} -#footer #footer-inner a { - color: white; - font-size: 14px; -} -@media (min-width: 0em) and (max-width: 63.9375em) { - #footer #footer-inner { - padding: 10px 20px; - background-position: right 20px center; - } -} -@media (min-width: 64em) { - #page-wrapper #page #footer-inner { - -sgs-span-settings: ("span": 3, "location": 2, "grid": 20px 630px 20px= 310px 20px, "gutter": 0.25, "style": "opposite", "start row": false, "end = row": false, "fixed gutter": true, "split gutter": false, "gutter property"= : "padding", "options": (("both": null))); - width: 96%; - float: left; - margin-right: -100%; - margin-left: 2%; - clear: none; - padding-right: 0.25; - } -} -@media (min-width: 0em) and (max-width: 63.9375em) { - #page-wrapper #page #footer-inner { - -sgs-span-settings: ("span": 1, "location": 1, "grid": 1, "gutter": 0.= 25, "style": "opposite", "start row": true, "end row": true, "fixed gutter"= : false, "split gutter": false, "gutter property": "margin", "options": ((n= ull: null))); - width: 100%; - float: right; - margin-left: 0; - margin-right: 0; - clear: none; - } -} - -ul { - font-family: sans-serif; - list-style-type: square; - padding: 0 0 0 0; - margin: 0.3em 0 0 1.5em; -} - -.site-menu { - color: #a0a0a0; -} - -a.site-menu:hover { - color: #4048c0; -} - -a { - color: #0860A8; - text-decoration: none; -} - -a:hover { - color: #0860A8; - text-decoration: underline; +p { + font-family: sans, sans-serif, Arial; } =20 -p { - margin: .4em 0 .5em 0; - line-height: 1.5em; +body { + font-family: sans, sans-serif, Arial; } =20 h1 { color: #0860A8; - font-family: "Helvetica"; font-weight: normal; font-size: 190%; text-transform: uppercase; - margin-top: 0; - margin-bottom: 0; } =20 h2 { color: #0860A8; - font-family: "Helvetica"; font-size: 130% } =20 h3 { color: #0860A8; font-weight: bold; - font-size: 90% + font-size: 100% } =20 h4 { color: #0860A8; - font-weight: bold; font-size: 90% } =20 - -.t_projects th { - background-color: #DBEBFF; +h5 { + color: #0860A8; + font-weight: bold; + font-size: 90%; } =20 -.t_projects table, th, td { - border: 1px solid #ccc; - font-size: 80%; +h6 { + font-weight: bold; + font-size: 90%; + text-align: center; } =20 - -/* TODO: Consider css for - * - * .posts .site .header .title .meta .footer .contact .rss .post - */ -=20 \ No newline at end of file +img { + max-width: 100%; + height: auto; +} + =20 diff --git a/styles/website.css b/styles/website.css index a0df36a..56f8394 100644 --- a/styles/website.css +++ b/styles/website.css @@ -1,233 +1,48 @@ -/* CSS for website */ -/* CSS for website */ - -body { - background: #f1f1f1; - border-top: 10px solid #999999; - font-size: 12pt; -} - -#mainbody { - margin-left: auto; - margin-right: auto; - width: 60em; -} - -#topbar { - top: 0; - left: 0; - bottom: 0; - width: 60em; - background: url("../images/header-bg.jpg") no-repeat; - border-top: 10px solid #ff6600; - margin-top: -10px; - float: left; -} - -#topbar.front-page { - height: 13em; -} - -#topbar #logo { - position: relative; - top: 85px; - left: 20px; -} - -#topbar #small-logo { - position: relative; - left: 20px; - padding: 0.1em 0 0.1em 0; - height: 3em; -} - -#sidebar { - float: left; - z-index: 1; - top: 0; - left: 0; - bottom: 0; - padding: 2em 0.5em 0 0.5em; - width: 9em; -} - -div.main-page.content { - float: left; - width: 35em; -} - -div.main-page.news { - float: right; - width: 20em; -} - -div.main-page.news h2 { - border-top: 10px solid #365f91; - border-bottom: 1px solid #333333; - color: #333333; - padding: 0.5em; - margin: 0; -} - -div.main-page.news ul { - margin: 0; - list-style: none; - list-style-image: none; -} - -div.main-page.news ul li { - border-bottom: 1px solid #333333; - padding: 0.5em; - color: #777777; -} - -div.main-page.news ul li a { - font-weight: bold; -} - -div.news-page.news-item { - border-top: 1px solid #777777; - width: 100%; - padding: 0; - margin: 0; -} - -#content { - margin: 0px; - padding: 2em 1em; - font-family: Helvetica; - color: #40494d; - background-color: #fff; - width: 100%; - max-width: 60em; - display: block; - float: left; -} - -#content #buttons a { - background: #ff6600; - color: #333333; - font-family: "Helvetica"; - text-transform: uppercase; - font-size: 15px; - display: inline-block; - padding: 8px 25px; - margin: 10px 20px 10px 0; -} - -#footer { - background: #999999; - margin-bottom: 60px; - width: 100%; - float: left; - padding: 0.5em 1em; -} -#footer #footer-inner { - height: 2em; - background: url("../images/footer-icon.svg") no-repeat right center; -} -#footer #footer-inner a { - color: white; - font-size: 14px; -} -@media (min-width: 0em) and (max-width: 63.9375em) { - #footer #footer-inner { - padding: 10px 20px; - background-position: right 20px center; - } -} -@media (min-width: 64em) { - #page-wrapper #page #footer-inner { - -sgs-span-settings: ("span": 3, "location": 2, "grid": 20px 630px 20px= 310px 20px, "gutter": 0.25, "style": "opposite", "start row": false, "end = row": false, "fixed gutter": true, "split gutter": false, "gutter property"= : "padding", "options": (("both": null))); - width: 96%; - float: left; - margin-right: -100%; - margin-left: 2%; - clear: none; - padding-right: 0.25; - } -} -@media (min-width: 0em) and (max-width: 63.9375em) { - #page-wrapper #page #footer-inner { - -sgs-span-settings: ("span": 1, "location": 1, "grid": 1, "gutter": 0.= 25, "style": "opposite", "start row": true, "end row": true, "fixed gutter"= : false, "split gutter": false, "gutter property": "margin", "options": ((n= ull: null))); - width: 100%; - float: right; - margin-left: 0; - margin-right: 0; - clear: none; - } -} - -ul { - font-family: sans-serif; - list-style-type: square; - padding: 0 0 0 0; - margin: 0.3em 0 0 1.5em; -} - -.site-menu { - color: #a0a0a0; -} - -a.site-menu:hover { - color: #4048c0; -} - -a { - color: #0860A8; - text-decoration: none; -} - -a:hover { - color: #0860A8; - text-decoration: underline; +p { + font-family: sans, sans-serif, Arial; } =20 -p { - margin: .4em 0 .5em 0; - line-height: 1.5em; +body { + font-family: sans, sans-serif, Arial; } =20 h1 { color: #0860A8; - font-family: "Helvetica"; font-weight: normal; font-size: 190%; text-transform: uppercase; - margin-top: 0; - margin-bottom: 0; } =20 h2 { color: #0860A8; - font-family: "Helvetica"; font-size: 130% } =20 h3 { color: #0860A8; font-weight: bold; - font-size: 90% + font-size: 100% } + h4 { color: #0860A8; - font-weight: bold; font-size: 90% } =20 - -.t_projects th { - background-color: #DBEBFF; +h5 { + color: #0860A8; + font-weight: bold; + font-size: 90%; } =20 -.t_projects table, th, td { - border: 1px solid #ccc; - font-size: 80%; +h6 { + font-weight: bold; + font-size: 90%; + text-align: center; } =20 - -/* TODO: Consider css for - * - * .posts .site .header .title .meta .footer .contact .rss .post - */ -=20 +img { + max-width: 100%; + height: auto; +} + =20 --=20 2.29.2.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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