From nobody Mon Feb 9 18:18:38 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+68262+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+68262+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1607019508; cv=none; d=zohomail.com; s=zohoarc; b=iEADu3q14HQJBZETOyK3jjq2yL4ROuvhPS+TQNdDoKzBpLBYmAKhcAXAYwTLv4H1Os+gLcujPfcoFHFmMt0rXFi7zNlV0PY1x55bzW6tH1sLn/6JinGvR7nIld8CeEUnaN9suYLdkCPjT5AFbFI8TKDhQO8GyHh9z//YpDSCdD4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1607019508; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=8quqSFWlTB6kKlqVNlS+EgA5lZlR4Re+6komEZrxEvY=; b=Wcw0h3+uJinL3uIaNjv5vYfMd5bt+2SrOa4olpAXzFChKJounKTFkcAZITz0pNic0sY8G3zl2+DTmL8aLSdFLx62ex2IXYjizfCMq7E7fH5nDKAhKTH7WWN6zFEEwO9ZNqHjBL5DN3FQMWUCOvhTpP0xMIfX5yMMPkWirYyXff8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+68262+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1607019508869488.6870604616315; Thu, 3 Dec 2020 10:18:28 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id CUShYY1788612xDG7bV5PKNK; Thu, 03 Dec 2020 10:18:27 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.830.1607019502092071576 for ; Thu, 03 Dec 2020 10:18:22 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C0E8D11D4; Thu, 3 Dec 2020 10:18:21 -0800 (PST) X-Received: from e120189.home (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 97E803F575; Thu, 3 Dec 2020 10:18:20 -0800 (PST) From: "PierreGondois" To: leif@nuviainc.com, ard.biesheuvel@arm.com, thomas.abraham@arm.com, devel@edk2.groups.io Cc: sami.mujawar@arm.com Subject: [edk2-devel] [PATCH edk2-platforms v1 2/2] Platform/ARM: Fix Ecc error 8005 Date: Thu, 3 Dec 2020 18:17:54 +0000 Message-Id: <20201203181754.10693-3-Pierre.Gondois@arm.com> In-Reply-To: <20201203181754.10693-1-Pierre.Gondois@arm.com> References: <20201203181754.10693-1-Pierre.Gondois@arm.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pierre.gondois@arm.com X-Gm-Message-State: YJSngLraEZcrdwUiiITwUXmIx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1607019507; bh=LayfKE5rtUaM/xiNXN4Ttjx+KqZaqXH0LpyS8uq6uHE=; h=Cc:Date:From:Reply-To:Subject:To; b=PqB1H1zJb9tKwP5vDXZBFPn4kYxbfPNSSTomKEtoDrsrB3mW0J4V/P6xBbK+7HqVF89 p76xegTgqGl+XBSrDxq1dJ662oDG0I9dWvc2OZZn1LGBpIrJufnv3CgYtVxrTeohe/TnK SWWgJmsEhr1YY5USQ2fqDQ1bMNLPqVsPmgM= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Pierre Gondois Following the Ecc reported error in the edk2 repository, an enum and its elements have been renamed in: ArmPlatformPkg/Include/Library/LcdPlatformLib.h The Ecc error reported in edk2 is: Variable name does not follow the rules: 1. First character should be upper case 2. Must contain lower case characters 3. No white space characters 4. Global variable name must start with a 'g' Indeed, according to the EDK II C Coding Standards Specification, s5.6.2.2 "Enumerated Types" and s4.3.4 Function and Data Names, elements of an enumerated type "shoud be a mixed upper- and lower-case text". Signed-off-by: Pierre Gondois --- The changes can be seen at: https://github.com/PierreARM/edk2-platforms/tr= ee/1537_Ecc_ArmPlatformPkg_v1 Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c = | 6 ++-- Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgi.c = | 6 ++-- Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c = | 8 ++--- Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c = | 6 ++-- Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpres= s.c | 38 ++++++++++---------- 5 files changed, 32 insertions(+), 32 deletions(-) diff --git a/Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c b/= Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c index 4b961b7a9f7fa372861bd0e7ad5e9d7d0c3faaea..bc64b0af522953c3d18e44c80b4= 7e23f794e900e 100644 --- a/Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c +++ b/Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c @@ -1,6 +1,6 @@ /** @file - Copyright (c) 2013-2018, ARM Ltd. All rights reserved. + Copyright (c) 2013 - 2020, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -532,7 +532,7 @@ LcdPlatformGetTimings ( EFI_STATUS LcdPlatformGetBpp ( IN UINT32 ModeNumber, - OUT LCD_BPP * Bpp + OUT ELCD_BPP * Bpp ) { if (ModeNumber >=3D mMaxMode) { @@ -543,7 +543,7 @@ LcdPlatformGetBpp ( ASSERT (Bpp !=3D NULL); - *Bpp =3D LCD_BITS_PER_PIXEL_24; + *Bpp =3D ELcdBitsPerPixel_24; return EFI_SUCCESS; } diff --git a/Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgi.c b/Pla= tform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgi.c index 6f747d2545dbe4ec27bc7608815c81ef4d0d466f..33234e0f50343bc92e72ef502ee= dcab9d129df74 100644 --- a/Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgi.c +++ b/Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgi.c @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2018, ARM Limited. All rights reserved. +* Copyright (c) 2018 - 2020, Arm Limited. All rights reserved.
* * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -236,7 +236,7 @@ LcdPlatformGetTimings ( EFI_STATUS LcdPlatformGetBpp ( IN UINT32 ModeNumber, - OUT LCD_BPP *Bpp + OUT ELCD_BPP *Bpp ) { if (ModeNumber >=3D mMaxMode) { @@ -245,7 +245,7 @@ LcdPlatformGetBpp ( ASSERT (Bpp !=3D NULL); - *Bpp =3D LCD_BITS_PER_PIXEL_24; + *Bpp =3D ELcdBitsPerPixel_24; return EFI_SUCCESS; } diff --git a/Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c b= /Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c index aa55bc2e5beefd02af190b89f933f5ba5498a2ed..38b638a5a19288a40cd10f1ba71= 0ca24a897f384 100644 --- a/Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c +++ b/Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c @@ -2,7 +2,7 @@ The file contains Arm Mali DP platform specific implementation. - Copyright (c) 2017-2018, Arm Limited. All rights reserved. + Copyright (c) 2017 - 2020, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -364,8 +364,8 @@ LcdPlatformGetTimings ( **/ EFI_STATUS LcdPlatformGetBpp ( - IN UINT32 ModeNumber, - OUT LCD_BPP * Bpp + IN UINT32 ModeNumber, + OUT ELCD_BPP * Bpp ) { ASSERT (Bpp !=3D NULL); @@ -375,7 +375,7 @@ LcdPlatformGetBpp ( return EFI_INVALID_PARAMETER; } - *Bpp =3D LCD_BITS_PER_PIXEL_24; + *Bpp =3D ELcdBitsPerPixel_24; return EFI_SUCCESS; } diff --git a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmV= Express.c b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVE= xpress.c index c4b163d35f181a83569907460084b32772fd0271..f0f1e0cfd77ff87576b6f061eb3= 915e39c162717 100644 --- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress= .c +++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress= .c @@ -1,6 +1,6 @@ /** @file - Copyright (c) 2012-2018, ARM Ltd. All rights reserved. + Copyright (c) 2012 - 2020, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -353,7 +353,7 @@ LcdPlatformGetTimings ( EFI_STATUS LcdPlatformGetBpp ( IN UINT32 ModeNumber, - OUT LCD_BPP * Bpp + OUT ELCD_BPP * Bpp ) { if (ModeNumber >=3D LcdPlatformGetMaxMode ()) { @@ -361,7 +361,7 @@ LcdPlatformGetBpp ( return EFI_INVALID_PARAMETER; } - *Bpp =3D LCD_BITS_PER_PIXEL_24; + *Bpp =3D ELcdBitsPerPixel_24; return EFI_SUCCESS; } diff --git a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111L= cdArmVExpress.c b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/P= L111LcdArmVExpress.c index b7396a87bd056b1d23729dcab556a38dbf4d3d1d..4bf9ba400987d8cfa9bcc8d25df= a070032f67c91 100644 --- a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVE= xpress.c +++ b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVE= xpress.c @@ -1,6 +1,6 @@ /** @file - Copyright (c) 2011-2018, ARM Ltd. All rights reserved.
+ Copyright (c) 2011 - 2020, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -22,7 +22,7 @@ typedef struct { UINT32 Mode; - LCD_BPP Bpp; + ELCD_BPP Bpp; UINT32 OscFreq; SCAN_TIMINGS Horizontal; @@ -33,97 +33,97 @@ typedef struct { **/ STATIC DISPLAY_MODE mDisplayModes[] =3D { { // Mode 0 : VGA : 640 x 480 x 24 bpp - VGA, LCD_BITS_PER_PIXEL_24, + VGA, ELcdBitsPerPixel_24, VGA_OSC_FREQUENCY, {VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH}, {VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH} }, { // Mode 1 : SVGA : 800 x 600 x 24 bpp - SVGA, LCD_BITS_PER_PIXEL_24, + SVGA, ELcdBitsPerPixel_24, SVGA_OSC_FREQUENCY, {SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH= }, {SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH} }, { // Mode 2 : XGA : 1024 x 768 x 24 bpp - XGA, LCD_BITS_PER_PIXEL_24, + XGA, ELcdBitsPerPixel_24, XGA_OSC_FREQUENCY, {XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH}, {XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH} }, { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp - SXGA, LCD_BITS_PER_PIXEL_24, + SXGA, ELcdBitsPerPixel_24, (SXGA_OSC_FREQUENCY/2), {SXGA_H_RES_PIXELS, SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH= }, {SXGA_V_RES_PIXELS, SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH} }, { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp - UXGA, LCD_BITS_PER_PIXEL_24, + UXGA, ELcdBitsPerPixel_24, (UXGA_OSC_FREQUENCY/2), {UXGA_H_RES_PIXELS, UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH= }, {UXGA_V_RES_PIXELS, UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH} }, { // Mode 5 : HD : 1920 x 1080 x 24 bpp - HD, LCD_BITS_PER_PIXEL_24, + HD, ELcdBitsPerPixel_24, (HD_OSC_FREQUENCY/2), {HD_H_RES_PIXELS, HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH}, {HD_V_RES_PIXELS, HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH} }, { // Mode 6 : VGA : 640 x 480 x 16 bpp (565 Mode) - VGA, LCD_BITS_PER_PIXEL_16_565, + VGA, ELcdBitsPerPixel_16_565, VGA_OSC_FREQUENCY, {VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH}, {VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH} }, { // Mode 7 : SVGA : 800 x 600 x 16 bpp (565 Mode) - SVGA, LCD_BITS_PER_PIXEL_16_565, + SVGA, ELcdBitsPerPixel_16_565, SVGA_OSC_FREQUENCY, {SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH= }, {SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH} }, { // Mode 8 : XGA : 1024 x 768 x 16 bpp (565 Mode) - XGA, LCD_BITS_PER_PIXEL_16_565, + XGA, ELcdBitsPerPixel_16_565, XGA_OSC_FREQUENCY, {XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH}, {XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH} }, { // Mode 9 : VGA : 640 x 480 x 15 bpp - VGA, LCD_BITS_PER_PIXEL_16_555, + VGA, ELcdBitsPerPixel_16_555, VGA_OSC_FREQUENCY, {VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH}, {VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH} }, { // Mode 10 : SVGA : 800 x 600 x 15 bpp - SVGA, LCD_BITS_PER_PIXEL_16_555, + SVGA, ELcdBitsPerPixel_16_555, SVGA_OSC_FREQUENCY, {SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH= }, {SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH} }, { // Mode 11 : XGA : 1024 x 768 x 15 bpp - XGA, LCD_BITS_PER_PIXEL_16_555, + XGA, ELcdBitsPerPixel_16_555, XGA_OSC_FREQUENCY, {XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH}, {XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH} }, { // Mode 12 : XGA : 1024 x 768 x 15 bpp - All the timing info is derive= d from Linux Kernel Driver Settings - XGA, LCD_BITS_PER_PIXEL_16_555, + XGA, ELcdBitsPerPixel_16_555, 63500000, {XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH}, {XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH} }, { // Mode 13 : VGA : 640 x 480 x 12 bpp (444 Mode) - VGA, LCD_BITS_PER_PIXEL_12_444, + VGA, ELcdBitsPerPixel_12_444, VGA_OSC_FREQUENCY, {VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH}, {VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH} }, { // Mode 14 : SVGA : 800 x 600 x 12 bpp (444 Mode) - SVGA, LCD_BITS_PER_PIXEL_12_444, + SVGA, ELcdBitsPerPixel_12_444, SVGA_OSC_FREQUENCY, {SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH= }, {SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH} }, { // Mode 15 : XGA : 1024 x 768 x 12 bpp (444 Mode) - XGA, LCD_BITS_PER_PIXEL_12_444, + XGA, ELcdBitsPerPixel_12_444, XGA_OSC_FREQUENCY, {XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH}, {XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH} @@ -445,7 +445,7 @@ LcdPlatformGetTimings ( EFI_STATUS LcdPlatformGetBpp ( IN UINT32 ModeNumber, - OUT LCD_BPP * Bpp + OUT ELCD_BPP * Bpp ) { ASSERT (Bpp !=3D NULL); -- 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#68262): https://edk2.groups.io/g/devel/message/68262 Mute This Topic: https://groups.io/mt/78690900/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-