From nobody Mon Feb 9 18:19:35 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+67719+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+67719+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1605797917; cv=none; d=zohomail.com; s=zohoarc; b=gHLfMQ7Mm2hvUvHFHvWhOKvmEt1yjM8e2HOc8r3CFLp6FBr0cHQVpuEeUMzvMoZmM1wOV+70wVI45RN6w51ezFoYQyCT3DPyjGVFU4CiZvMxKDRc/6gYMTyv5MOmheDNa170rmzRqy/2BNHVsBxbTKxIilkXHrRO0XixZXgpDaI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1605797917; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=csGedX0RWuyTNpIDyvgvVy82yiwp/7IoMzYGv7QZxLY=; b=eq90PWeGPcsk2PNLsZy+NyeFfb7KkCfMNCXsjyz8eGAD4lzD3ZZ9buj9YhJuAJlyZX/9VVJqZcZ8mkDvnJIvk59nC4Q2ouz8CblP+ygVDlU74ITol4LQKJQXZ1fbzPVIVmFFGhRM6RTGr0CDf99wdFiWsIsw6EasY62eXorFC/0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+67719+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1605797917008261.19211069820017; Thu, 19 Nov 2020 06:58:37 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 08uGYY1788612x8qFgqt425w; Thu, 19 Nov 2020 06:58:36 -0800 X-Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) by mx.groups.io with SMTP id smtpd.web11.10578.1605797915966291758 for ; Thu, 19 Nov 2020 06:58:36 -0800 X-Received: by mail-wm1-f48.google.com with SMTP id w24so7032314wmi.0 for ; Thu, 19 Nov 2020 06:58:35 -0800 (PST) X-Gm-Message-State: r441asAykeA4nOF1l0pcsxYLx1787277AA= X-Google-Smtp-Source: ABdhPJy7zcJSNQusGZUzwreGaw3gMj3J+1rDsittFKdaZ6sfqtNUCM/rBriJG2pOtSVV3I3ulMw6rw== X-Received: by 2002:a1c:a752:: with SMTP id q79mr4885710wme.24.1605797914201; Thu, 19 Nov 2020 06:58:34 -0800 (PST) X-Received: from white-rabbit.sw.nuviainc.com ([2.30.51.167]) by smtp.gmail.com with ESMTPSA id y20sm173156wma.15.2020.11.19.06.58.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Nov 2020 06:58:33 -0800 (PST) From: "Tomas Pilar (tpilar)" To: devel@edk2.groups.io Cc: Leif Lindholm , Ard Biesheuvel , Tanmay Jagdale Subject: [edk2-devel] [edk2-platform][PATCH 2/3] Silicon/Qemu: Add PCD for Serial port GSI Date: Thu, 19 Nov 2020 14:58:29 +0000 Message-Id: <20201119145830.1725478-3-tomas@nuviainc.com> In-Reply-To: <20201119145830.1725478-1-tomas@nuviainc.com> References: <20201119145830.1725478-1-tomas@nuviainc.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,tomas@nuviainc.com Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1605797916; bh=vEtCGo5L3uQr/Q2bD2+r90jpz6TfUJKNX9mbcliXfa4=; h=Cc:Date:From:Reply-To:Subject:To; b=itwHPbvpL1oPkQQsQXKVj9vbdUPD1U6UzWMSz8oc8TQGL53GIRG2EcUeXBThztpXc/w ibO3v0syBpqk/jAfS7/050EwOVBo2IXqaQJvE0JTVom3WWf8aOOE+I9TuyTrj7pylQDV8 U2sy/Nhy/HPr+0p+PM3YXniZdcCVOWwR5W4= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The UART specified in the SPCR table needs a GSI assigned to it. The EDK2 will not use it because it does not use interrupts, but it is necessary for OS boot. Parametrize the value of the GSI assigned to the UART using a PCD so that it might be specified in the platform DSC file. Cc: Leif Lindholm Cc: Ard Biesheuvel Cc: Tanmay Jagdale Signed-off-by: Tomas Pilar --- Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 1 + Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 2 +- Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc | 2 +- Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 3 +++ 4 files changed, 6 insertions(+), 2 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu= /SbsaQemu/AcpiTables/AcpiTables.inf index 1ce7e12890..10ece22d9d 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf @@ -68,6 +68,7 @@ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarSize gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarLimit + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSerialGlobalSystemInterrupt =20 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase =20 diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl b/Silicon/Qemu/SbsaQ= emu/AcpiTables/Dsdt.asl index 307e031a7b..f5a709083e 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl @@ -36,7 +36,7 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "LINARO", "S= BSAQEMU", Memory32Fixed (ReadWrite, FixedPcdGet32 (PcdSerialRegisterBase), 0x00001000) - Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 33 } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { Fixed= PcdGet32 (PcdSerialGlobalSystemInterrupt) } }) } =20 diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc b/Silicon/Qemu/Sbsa= Qemu/AcpiTables/Spcr.aslc index 0c3b627fc7..ff787bd8bf 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc @@ -29,7 +29,7 @@ STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spc= r =3D { }, EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC, 0, /* Irq */ - 33, /* GlobalSystemInterrupt */ + FixedPcdGet32 (PcdSerialGlobalSystemInterrupt), EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200, EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY, EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1, diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/Sbs= aQemu.dec index 2831781c4e..b53c5b82e9 100644 --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec @@ -47,6 +47,9 @@ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarSize|0x10000000|U= INT64|0x00000009 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarLimit|0xFFFFFFFF|= UINT64|0x000000a =20 + # GSI for the UART. Recall that GSIs are offset by 32. + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSerialGlobalSystemInterrupt|33= |UINT32|0x0000000b + [PcdsDynamic.common] gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount|0x1|UINT32|0x00000100 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount|0x1|UINT32|0x0000= 0101 --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#67719): https://edk2.groups.io/g/devel/message/67719 Mute This Topic: https://groups.io/mt/78366555/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-