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Mon, 9 Nov 2020 16:18:04 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id S1kb-54g63mf; Mon, 9 Nov 2020 16:18:01 +0100 (CET) X-Received: from puchatek.local (89-67-26-161.dynamic.chello.pl [89.67.26.161]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id D9D842600B6; Mon, 9 Nov 2020 16:18:00 +0100 (CET) From: "Marcin Juszkiewicz" To: devel@edk2.groups.io Cc: Leif Lindholm , Ard Biesheuvel , Graeme Gregory , =?UTF-8?q?Rados=C5=82aw=20Biernacki?= , Tanmay Jagdale , Marcin Juszkiewicz Subject: [edk2-devel] [PATCH] SbsaQemu: add SMBIOS information Date: Mon, 9 Nov 2020 16:17:42 +0100 Message-Id: <20201109151742.321652-1-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org X-Gm-Message-State: jA0zee8zKjOGUiKZVPGfgxUhx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1604939341; bh=+F/O4NH7QPcAe6nPPgZNo+ETe8FfEaemBxIH6KPvaS0=; h=Cc:Date:From:Reply-To:Subject:To; b=Yy+hsll9bkasjlM5u1tRi+ObdMMFcUNdjEqdkrGvHNVkytUopkUvlbwBOlDOy0O/JEg b+N2k5WB219OTxMspw8Axl0qRgAsGuzS/uDEBStPOQajKEjybt3Qsuh2fxrN/DaLpMBQS unXtmAZFJvzoETxtGDLl9NUu48NV7ZDL8oA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Marcin Juszkiewicz Mostly copied from EmulatorPkg, type 4 table taken from Raspberry/Pi. =20 Signed-off-by: Marcin Juszkiewicz --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 10 + Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 4 + .../PlatformSmbiosDxe/PlatformSmbiosDxe.c | 131 ++++++ .../PlatformSmbiosDxe/PlatformSmbiosDxe.inf | 51 +++ .../Drivers/PlatformSmbiosDxe/SmbiosTable.c | 408 ++++++++++++++++++ 5 files changed, 604 insertions(+) create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/Platfor= mSmbiosDxe.c create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/Platfor= mSmbiosDxe.inf create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/SmbiosT= able.c diff --git Platform/Qemu/SbsaQemu/SbsaQemu.dsc Platform/Qemu/SbsaQemu/SbsaQ= emu.dsc index 49bc5033f4..b255715ed6 100644 --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -67,6 +67,7 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE =3D FALSE UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBoo= tServicesTableLib.inf DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableL= ib.inf DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + SmbiosLib|EmulatorPkg/Library/SmbiosLib/SmbiosLib.inf UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntry= Point.inf UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiA= pplicationEntryPoint.inf HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf @@ -480,6 +481,11 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE =3D FALSE # enumeration to complete before installing ACPI tables. gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|FALSE =20 + # SMBIOS/DMI + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0 + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2 + gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0302 + [PcdsDynamicDefault.common] gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3 =20 @@ -615,6 +621,10 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE =3D FALSE ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf =20 + # SMBIOS Support + + Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf + MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf # # FAT filesystem + GPT/MBR partitioning # diff --git Platform/Qemu/SbsaQemu/SbsaQemu.fdf Platform/Qemu/SbsaQemu/SbsaQ= emu.fdf index 3bcf0bf004..078f824049 100644 --- Platform/Qemu/SbsaQemu/SbsaQemu.fdf +++ Platform/Qemu/SbsaQemu/SbsaQemu.fdf @@ -263,6 +263,10 @@ READ_LOCK_STATUS =3D TRUE # INF MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf =20 + # SMBIOS/DMI + INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf + INF Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf + [FV.FVMAIN_COMPACT] FvAlignment =3D 16 ERASE_POLARITY =3D 1 diff --git Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/PlatformSmbiosDx= e.c Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c new file mode 100644 index 0000000000..8b5bfc93e2 --- /dev/null +++ Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c @@ -0,0 +1,131 @@ +/** @file + Static SMBIOS Table for platform + + + * Copyright (c) 2020, Linaro.org + * Copyright (c) 2012, Apple Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include + +#include +#include +#include +#include +#include + +extern SMBIOS_TEMPLATE_ENTRY gSmbiosTemplate[]; + + + +SMBIOS_TABLE_TYPE19 gSmbiosType19Template =3D { + { EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, sizeof (SMBIOS_TABLE_TYPE= 19), 0 }, + 0xffffffff, // StartingAddress; + 0xffffffff, // EndingAddress; + 0, // MemoryArrayHandle; + 1, // PartitionWidth; + 0, // ExtendedStartingAddress; + 0, // ExtendedEndingAddress; +}; + +VOID +CreatePlatformSmbiosMemoryRecords ( + VOID + ) +{ + EFI_PEI_HOB_POINTERS HobPtr; + SMBIOS_STRUCTURE_POINTER Smbios16; + SMBIOS_STRUCTURE_POINTER Smbios17; + EFI_SMBIOS_HANDLE PhyscialMemoryArrayHandle; + EFI_SMBIOS_HANDLE SmbiosHandle; + + Smbios16.Hdr =3D SmbiosLibGetRecord (EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARR= AY, 0, &PhyscialMemoryArrayHandle); + if (Smbios16.Hdr =3D=3D NULL) { + // Only make a Type19 entry if a Type16 entry exists. + return; + } + + Smbios17.Hdr =3D SmbiosLibGetRecord (EFI_SMBIOS_TYPE_MEMORY_DEVICE, 0, &= SmbiosHandle); + if (Smbios17.Hdr =3D=3D NULL) { + // if type17 exits update with type16 Smbios handle + Smbios17.Type17->MemoryArrayHandle =3D PhyscialMemoryArrayHandle; + } + + // Generate Type16 records + gSmbiosType19Template.MemoryArrayHandle =3D PhyscialMemoryArrayHandle; + HobPtr.Raw =3D GetHobList (); + while ((HobPtr.Raw =3D GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, Hob= Ptr.Raw)) !=3D NULL) { + if (HobPtr.ResourceDescriptor->ResourceType =3D=3D EFI_RESOURCE_SYSTEM= _MEMORY) { + gSmbiosType19Template.ExtendedStartingAddress =3D HobPtr.ResourceDes= criptor->PhysicalStart; + gSmbiosType19Template.ExtendedEndingAddress =3D + HobPtr.ResourceDescriptor->PhysicalStart + + HobPtr.ResourceDescriptor->ResourceLength - 1; + + SmbiosLibCreateEntry ((SMBIOS_STRUCTURE *)&gSmbiosType19Template, NU= LL); + } + HobPtr.Raw =3D GET_NEXT_HOB (HobPtr); + } +} + + +/** + Main entry for this driver. + + @param ImageHandle Image handle this driver. + @param SystemTable Pointer to SystemTable. + + @retval EFI_SUCESS This function always complete successfully. + +**/ +EFI_STATUS +EFIAPI +PlatformSmbiosDriverEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_SMBIOS_HANDLE SmbiosHandle; + SMBIOS_STRUCTURE_POINTER Smbios; + + // Phase 0 - Patch table to make SMBIOS 2.7 structures smaller to conform + // to an early version of the specification. + + // Phase 1 - Initialize SMBIOS tables from template + Status =3D SmbiosLibInitializeFromTemplate (gSmbiosTemplate); + ASSERT_EFI_ERROR (Status); + + // Phase 2 - Patch SMBIOS table entries + + Smbios.Hdr =3D SmbiosLibGetRecord (EFI_SMBIOS_TYPE_BIOS_INFORMATION, 0, = &SmbiosHandle); + if (Smbios.Type0 !=3D NULL) { + // 64K * (n+1) bytes + Smbios.Type0->BiosSize =3D (UINT8)DivU64x32 (FixedPcdGet64 (PcdEmuFirm= wareFdSize), 256*1024) - 1; + + SmbiosLibUpdateUnicodeString ( + SmbiosHandle, + Smbios.Type0->BiosVersion, + (CHAR16 *) PcdGetPtr (PcdFirmwareVersionString) + ); + SmbiosLibUpdateUnicodeString ( + SmbiosHandle, + Smbios.Type0->BiosReleaseDate, + (CHAR16 *) PcdGetPtr (PcdFirmwareReleaseDateString) + ); + } + + // Phase 3 - Create tables from scratch + + // Create Type 13 record from EFI Variables + // Do we need this record for EFI as the info is available from EFI vara= ibles + // Also language types don't always match between EFI and SMBIOS + // CreateSmbiosLanguageInformation (1, gSmbiosLangToEfiLang); + + CreatePlatformSmbiosMemoryRecords (); + + return EFI_SUCCESS; +} diff --git Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/PlatformSmbiosDx= e.inf Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf new file mode 100644 index 0000000000..a3a1a8ea2f --- /dev/null +++ Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf @@ -0,0 +1,51 @@ +## @file +# Platform SMBIOS driver that fills in SMBIOS table entries. +# +# Copyright (c) 2020, Linaro.org +# Copyright (c) 2012, Apple Inc. All rights reserved. +# Portions copyright (c) 2006 - 2010, Intel Corporation. All rights reserv= ed.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D PlatformSmbiosDxe + FILE_GUID =3D 67FA951E-4FA2-9F4E-A658-4DBD954AC22E + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D PlatformSmbiosDriverEntryPoint + + +[Sources] + SmbiosTable.c + PlatformSmbiosDxe.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + EmulatorPkg/EmulatorPkg.dec + +[LibraryClasses] + UefiDriverEntryPoint + BaseLib + BaseMemoryLib + DebugLib + PcdLib + MemoryAllocationLib + UefiBootServicesTableLib + UefiLib + HobLib + SmbiosLib + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareReleaseDateString + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString + gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLang + gEmulatorPkgTokenSpaceGuid.PcdEmuMemorySize + gEmulatorPkgTokenSpaceGuid.PcdEmuFirmwareFdSize + +[Depex] + TRUE diff --git Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/SmbiosTable.c Si= licon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/SmbiosTable.c new file mode 100644 index 0000000000..716bedbea6 --- /dev/null +++ Silicon/Qemu/SbsaQemu/Drivers/PlatformSmbiosDxe/SmbiosTable.c @@ -0,0 +1,408 @@ +/** @file + Static SMBIOS Table for platform + + Note SMBIOS 2.7.1 Required structures: + BIOS Information (Type 0) + System Information (Type 1) + System Enclosure (Type 3) + Processor Information (Type 4) - CPU Driver + Cache Information (Type 7) - For cache that is external to processor + System Slots (Type 9) - If system has slots + Physical Memory Array (Type 16) + Memory Device (Type 17) - For each socketed system-memory Device + Memory Array Mapped Address (Type 19) - One per contiguous block per P= hysical Memroy Array + System Boot Information (Type 32) + + * Copyright (c) 2020, Linaro.org + * Copyright (c) 2012, Apple Inc. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include + + +SMBIOS_TABLE_TYPE0 gSmbiosType0Template =3D { + { EFI_SMBIOS_TYPE_BIOS_INFORMATION, sizeof (SMBIOS_TABLE_TYPE0), 0 }, + 1, // Vendor String + 2, // BiosVersion String + 0xE000, // BiosSegment + 3, // BiosReleaseDate String + 0x7F, // BiosSize + { // BiosCharacteristics + 0, // Reserved :2; ///< Bits 0-1. + 0, // Unknown :1; + 0, // BiosCharacteristicsNotSupported :1; + 0, // IsaIsSupported :1; + 0, // McaIsSupported :1; + 0, // EisaIsSupported :1; + 1, // PciIsSupported :1; + 0, // PcmciaIsSupported :1; + 0, // PlugAndPlayIsSupported :1; + 0, // ApmIsSupported :1; + 1, // BiosIsUpgradable :1; + 1, // BiosShadowingAllowed :1; + 0, // VlVesaIsSupported :1; + 0, // EscdSupportIsAvailable :1; + 0, // BootFromCdIsSupported :1; + 1, // SelectableBootIsSupported :1; + 0, // RomBiosIsSocketed :1; + 0, // BootFromPcmciaIsSupported :1; + 0, // EDDSpecificationIsSupported :1; + 0, // JapaneseNecFloppyIsSupported :1; + 0, // JapaneseToshibaFloppyIsSupported :1; + 0, // Floppy525_360IsSupported :1; + 0, // Floppy525_12IsSupported :1; + 0, // Floppy35_720IsSupported :1; + 0, // Floppy35_288IsSupported :1; + 0, // PrintScreenIsSupported :1; + 0, // Keyboard8042IsSupported :1; + 0, // SerialIsSupported :1; + 0, // PrinterIsSupported :1; + 0, // CgaMonoIsSupported :1; + 0, // NecPc98 :1; + 0 // ReservedForVendor :32; ///< Bits 32-63. Bits= 32-47 reserved for BIOS vendor + ///< and bits 48-63 reser= ved for System Vendor. + }, + { // BIOSCharacteristicsExtensionBytes[] + 0x81, // AcpiIsSupported :1; + // UsbLegacyIsSupported :1; + // AgpIsSupported :1; + // I2OBootIsSupported :1; + // Ls120BootIsSupported :1; + // AtapiZipDriveBootIsSupported :1; + // Boot1394IsSupported :1; + // SmartBatteryIsSupported :1; + // BIOSCharacteristicsExtensionBytes[1] + 0x0a, // BiosBootSpecIsSupported :1; + // FunctionKeyNetworkBootIsSupported :1; + // TargetContentDistributionEnabled :1; + // UefiSpecificationSupported :1; + // VirtualMachineSupported :1; + // ExtensionByte2Reserved :3; + }, + 0x00, // SystemBiosMajorRelease + 0x01, // SystemBiosMinorRelease + 0xFF, // EmbeddedControllerFirmwareMajorRelease + 0xFF, // EmbeddedControllerFirmwareMinorRelease +}; +CHAR8 *gSmbiosType0Strings[] =3D { + "http://www.tianocore.org/edk2/", // Vendor String + __TIME__, // BiosVersion String + __DATE__, // BiosReleaseDate String + NULL +}; + +SMBIOS_TABLE_TYPE1 gSmbiosType1Template =3D { + { EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, sizeof (SMBIOS_TABLE_TYPE1), 0 }, + 1, // Manufacturer String + 2, // ProductName String + 3, // Version String + 4, // SerialNumber String + { 0x25EF0280, 0xEC82, 0x42B0, { 0x8F, 0xB6, 0x10, 0xAD, 0xCC, 0xC6, 0x7C= , 0x02 } }, + SystemWakeupTypePowerSwitch, + 5, // SKUNumber String + 6, // Family String +}; +CHAR8 *gSmbiosType1Strings[] =3D { + "http://www.tianocore.org/edk2/", + "SbsaQemu", + "1.0", + "System Serial#", + "System SKU#", + "edk2", + NULL +}; + +SMBIOS_TABLE_TYPE2 gSmbiosType2Template =3D { + { EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, sizeof (SMBIOS_TABLE_TYPE2), 0 = }, + 1, // Manufacturer String + 2, // ProductName String + 3, // Version String + 4, // SerialNumber String + 5, // AssetTag String + { // FeatureFlag + 1, // Motherboard :1; + 0, // RequiresDaughterCard :1; + 0, // Removable :1; + 0, // Replaceable :1; + 0, // HotSwappable :1; + 0, // Reserved :3; + }, + 6, // LocationInChassis String + 0, // ChassisHandle; + BaseBoardTypeMotherBoard, // BoardType; + 0, // NumberOfContainedObjectHandles; + { 0 } // ContainedObjectHandles[1]; +}; +CHAR8 *gSmbiosType2Strings[] =3D { + "http://www.tianocore.org/edk2/", + "SbsaQemu", + "1.0", + "Base Board Serial#", + "Base Board Asset Tag#", + "Part Component", + NULL +}; + +SMBIOS_TABLE_TYPE3 gSmbiosType3Template =3D { + { EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, sizeof (SMBIOS_TABLE_TYPE3), 0 }, + 1, // Manufacturer String + MiscChassisTypeLapTop, // Type; + 2, // Version String + 3, // SerialNumber String + 4, // AssetTag String + ChassisStateSafe, // BootupState; + ChassisStateSafe, // PowerSupplyState; + ChassisStateSafe, // ThermalState; + ChassisSecurityStatusNone,// SecurityStatus; + { 0, 0, 0, 0 }, // OemDefined[4]; + 0, // Height; + 0, // NumberofPowerCords; + 0, // ContainedElementCount; + 0, // ContainedElementRecordLength; + { { 0 } }, // ContainedElements[1]; +}; +CHAR8 *gSmbiosType3Strings[] =3D { + "http://www.tianocore.org/edk2/", + "SbsaQemu", + "Chassis Board Serial#", + "Chassis Board Asset Tag#", + NULL +}; + +SMBIOS_TABLE_TYPE4 gSmbiosType4Template =3D { + { EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, sizeof (SMBIOS_TABLE_TYPE4), 0}, + 1, // Socket String + CentralProcessor, // ProcessorType; ///< The enu= meration value from PROCESSOR_TYPE_DATA. + ProcessorFamilyIndicatorFamily2, // ProcessorFamily; ///< The enu= meration value from PROCESSOR_FAMILY2_DATA. + 2, // ProcessorManufacture String; + { // ProcessorId; + { 0x00, 0x00, 0x00, 0x00 }, + { 0x00, 0x00, 0x00, 0x00 } + }, + 3, // ProcessorVersion String; + { // Voltage; + 0, // ProcessorVoltageCapability5V :1; + 1, // ProcessorVoltageCapability3_3V :1; + 0, // ProcessorVoltageCapability2_9V :1; + 0, // ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zer= o. + 0, // ProcessorVoltageReserved :3; ///< Bits 4-6, must be = zero. + 0 // ProcessorVoltageIndicateLegacy :1; + }, + 0, // ExternalClock; + 0, // MaxSpeed; + 0, // CurrentSpeed; + 0x41, // Status; + ProcessorUpgradeNone, // ProcessorUpgrade; ///< The enumeratio= n value from PROCESSOR_UPGRADE. + 0xFFFF, // L1CacheHandle; + 0xFFFF, // L2CacheHandle; + 0xFFFF, // L3CacheHandle; + 0, // SerialNumber; + 0, // AssetTag; + 0, // PartNumber; + 4, // CoreCount; + 4, // EnabledCoreCount; + 4, // ThreadCount; + 0x6C, // ProcessorCharacteristics; ///< The enumeratio= n value from PROCESSOR_CHARACTERISTIC_FLAGS + // ProcessorReserved1 :1; + // ProcessorUnknown :1; + // Processor64BitCapble :1; + // ProcessorMultiCore :1; + // ProcessorHardwareThread :1; + // ProcessorExecuteProtection :1; + // ProcessorEnhancedVirtualization :1; + // ProcessorPowerPerformanceCtrl :1; + // Processor128bitCapble :1; + // ProcessorReserved2 :7; + ProcessorFamilyARM, // ARM Processor Family; + 0, // CoreCount2; + 0, // EnabledCoreCount2; + 0, // ThreadCount2; +}; + +CHAR8 mCpuName[128] =3D "Unknown ARM CPU"; + +CHAR8 *gSmbiosType4Strings[] =3D { + "Socket", + "QEMU", + "Unknown ARM CPU", + NULL +}; + +SMBIOS_TABLE_TYPE8 gSmbiosType8Template1 =3D { + { EFI_SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION, sizeof (SMBIOS_TABLE_TYPE8= ), 0 }, + 0, // InternalReferenceDesignator String + PortConnectorTypeNone, // InternalConnectorType; ///< Th= e enumeration value from MISC_PORT_CONNECTOR_TYPE. + 1, // ExternalReferenceDesignator String + PortConnectorTypeRJ45, // ExternalConnectorType; ///< Th= e enumeration value from MISC_PORT_CONNECTOR_TYPE. + PortTypeNetworkPort, // PortType; ///< Th= e enumeration value from MISC_PORT_TYPE. +}; +CHAR8 *gSmbiosType8Strings1[] =3D { + "Ethernet", + NULL +}; + +SMBIOS_TABLE_TYPE8 gSmbiosType8Template2 =3D { + { EFI_SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION, sizeof (SMBIOS_TABLE_TYPE8= ), 0 }, + 0, // InternalReferenceDesignator String + PortConnectorTypeNone, // InternalConnectorType; ///< Th= e enumeration value from MISC_PORT_CONNECTOR_TYPE. + 1, // ExternalReferenceDesignator String + PortConnectorTypeUsb, // ExternalConnectorType; ///< Th= e enumeration value from MISC_PORT_CONNECTOR_TYPE. + PortTypeUsb, // PortType; ///< Th= e enumeration value from MISC_PORT_TYPE. +}; +CHAR8 *gSmbiosType8Strings2[] =3D { + "USB0", + NULL +}; + +SMBIOS_TABLE_TYPE8 gSmbiosType8Template3 =3D { + { EFI_SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION, sizeof (SMBIOS_TABLE_TYPE8= ), 0 }, + 0, // InternalReferenceDesignator String + PortConnectorTypeNone, // InternalConnectorType; ///< Th= e enumeration value from MISC_PORT_CONNECTOR_TYPE. + 1, // ExternalReferenceDesignator String + PortConnectorTypeUsb, // ExternalConnectorType; ///< Th= e enumeration value from MISC_PORT_CONNECTOR_TYPE. + PortTypeUsb, // PortType; ///< Th= e enumeration value from MISC_PORT_TYPE. +}; +CHAR8 *gSmbiosType8Strings3[] =3D { + "USB1", + NULL +}; + +SMBIOS_TABLE_TYPE9 gSmbiosType9Template =3D { + { EFI_SMBIOS_TYPE_SYSTEM_SLOTS, sizeof (SMBIOS_TABLE_TYPE9), 0 }, + 1, // SlotDesignation String + SlotTypeOther, // SlotType; ///< The enumeratio= n value from MISC_SLOT_TYPE. + SlotDataBusWidthOther, // SlotDataBusWidth; ///< The enumeratio= n value from MISC_SLOT_DATA_BUS_WIDTH. + SlotUsageAvailable, // CurrentUsage; ///< The enumeration= value from MISC_SLOT_USAGE. + SlotLengthOther, // SlotLength; ///< The enumeration va= lue from MISC_SLOT_LENGTH. + 0, // SlotID; + { // SlotCharacteristics1; + 1, // CharacteristicsUnknown :1; + 0, // Provides50Volts :1; + 0, // Provides33Volts :1; + 0, // SharedSlot :1; + 0, // PcCard16Supported :1; + 0, // CardBusSupported :1; + 0, // ZoomVideoSupported :1; + 0, // ModemRingResumeSupported:1; + }, + { // SlotCharacteristics2; + 0, // PmeSignalSupported :1; + 0, // HotPlugDevicesSupported :1; + 0, // SmbusSignalSupported :1; + 0, // Reserved :5; ///< Set to 0. + }, + 0, // SegmentGroupNum; + 0, // BusNum; + 0, // DevFuncNum; +}; +CHAR8 *gSmbiosType9Strings[] =3D { + "SD Card", + NULL +}; + +SMBIOS_TABLE_TYPE11 gSmbiosType11Template =3D { + { EFI_SMBIOS_TYPE_OEM_STRINGS, sizeof (SMBIOS_TABLE_TYPE11), 0 }, + 1 // StringCount +}; +CHAR8 *gSmbiosType11Strings[] =3D { + "https://github/tianocore/edk2-platforms/Platform/Qemu/SbsaQemu/", + NULL +}; + + +SMBIOS_TABLE_TYPE12 gSmbiosType12Template =3D { + { EFI_SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS, sizeof (SMBIOS_TABLE_TYP= E12), 0 }, + 1 // StringCount +}; +CHAR8 *gSmbiosType12Strings[] =3D { + "https://github/tianocore/edk2-platforms/Platform/Qemu/SbsaQemu/SbsaQemu= .dsc", + NULL +}; + +SMBIOS_TABLE_TYPE16 gSmbiosType16Template =3D { + { EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, sizeof (SMBIOS_TABLE_TYPE16), 0= }, + MemoryArrayLocationSystemBoard, // Location; ///< = The enumeration value from MEMORY_ARRAY_LOCATION. + MemoryArrayUseSystemMemory, // Use; ///< = The enumeration value from MEMORY_ARRAY_USE. + MemoryErrorCorrectionUnknown, // MemoryErrorCorrection; ///< = The enumeration value from MEMORY_ERROR_CORRECTION. + 0x80000000, // MaximumCapacity; + 0xFFFE, // MemoryErrorInformationHandle; + 1, // NumberOfMemoryDevices; + 0x3fffffffffffffffULL, // ExtendedMaximumCapacity; +}; + +SMBIOS_TABLE_TYPE17 gSmbiosType17Template =3D { + { EFI_SMBIOS_TYPE_MEMORY_DEVICE, sizeof (SMBIOS_TABLE_TYPE17), 0 }, + 0, // MemoryArrayHandle; + 0xFFFE, // MemoryErrorInformationHandle; + 0xFFFF, // TotalWidth; + 0xFFFF, // DataWidth; + 0xFFFF, // Size; + MemoryFormFactorUnknown, // FormFactor; ///< The enu= meration value from MEMORY_FORM_FACTOR. + 0xff, // DeviceSet; + 1, // DeviceLocator String + 2, // BankLocator String + MemoryTypeDram, // MemoryType; ///< The enum= eration value from MEMORY_DEVICE_TYPE. + { // TypeDetail; + 0, // Reserved :1; + 0, // Other :1; + 1, // Unknown :1; + 0, // FastPaged :1; + 0, // StaticColumn :1; + 0, // PseudoStatic :1; + 0, // Rambus :1; + 0, // Synchronous :1; + 0, // Cmos :1; + 0, // Edo :1; + 0, // WindowDram :1; + 0, // CacheDram :1; + 0, // Nonvolatile :1; + 0, // Registered :1; + 0, // Unbuffered :1; + 0, // Reserved1 :1; + }, + 0, // Speed; + 3, // Manufacturer String + 0, // SerialNumber String + 0, // AssetTag String + 0, // PartNumber String + 0, // Attributes; + 0, // ExtendedSize; + 0, // ConfiguredMemoryClockSpeed; +}; +CHAR8 *gSmbiosType17Strings[] =3D { + "OS Virtual Memory", + "malloc", + "OSV", + NULL +}; + +SMBIOS_TABLE_TYPE32 gSmbiosType32Template =3D { + { EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, sizeof (SMBIOS_TABLE_TYPE32),= 0 }, + { 0, 0, 0, 0, 0, 0 }, // Reserved[6]; + BootInformationStatusNoError // BootStatus +}; + + + +SMBIOS_TEMPLATE_ENTRY gSmbiosTemplate[] =3D { + { (SMBIOS_STRUCTURE *)&gSmbiosType0Template, gSmbiosType0Strings }, + { (SMBIOS_STRUCTURE *)&gSmbiosType1Template, gSmbiosType1Strings }, + { (SMBIOS_STRUCTURE *)&gSmbiosType2Template, gSmbiosType2Strings }, + { (SMBIOS_STRUCTURE *)&gSmbiosType3Template, gSmbiosType3Strings }, + { (SMBIOS_STRUCTURE *)&gSmbiosType4Template, gSmbiosType4Strings }, + { (SMBIOS_STRUCTURE *)&gSmbiosType8Template1, gSmbiosType8Strings1 }, + { (SMBIOS_STRUCTURE *)&gSmbiosType8Template2, gSmbiosType8Strings2 }, + { (SMBIOS_STRUCTURE *)&gSmbiosType8Template3, gSmbiosType8Strings3 }, + { (SMBIOS_STRUCTURE *)&gSmbiosType9Template, gSmbiosType9Strings }, + { (SMBIOS_STRUCTURE *)&gSmbiosType11Template, gSmbiosType11Strings }, + { (SMBIOS_STRUCTURE *)&gSmbiosType12Template, gSmbiosType12Strings }, + { (SMBIOS_STRUCTURE *)&gSmbiosType16Template, NULL }, + { (SMBIOS_STRUCTURE *)&gSmbiosType17Template, gSmbiosType17Strings }, + { (SMBIOS_STRUCTURE *)&gSmbiosType32Template, NULL }, + { NULL, NULL } +}; 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