From nobody Fri May 10 13:24:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+66827+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+66827+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1604070055; cv=none; d=zohomail.com; s=zohoarc; b=Ni0orLSEK6qRZ1v/7CZ3Dpj/gwoMTpLsZbSnkN9s1Gwoed8bDasp9FZ6ygRzCrC0x8k/iVHaXFlXrbv2RcunyQlCnkjyymKlIjAdHqLpJDHpGXCbgvDXRy09jQiM/4bXQSZ4xdKKnR77HWRPwqHtlRs6/N3SQrizdwrUrtfr9zU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1604070055; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=ZLttwr7AUTDYT6/PK5tlYVbp2S37I2qJTL/ZrZfZ3Bc=; b=c7ywbk4KFs4CQWyEbG9rjA28PeWEhdXmAo6BlvYfs+Rq989e4xAG1TzPUuVL/VsEjvGBeFrDXAWbTWgymMSfH4ZcGv7MCboRqNeLw01/1cHXJvPaD0+qh1mLmUK7gmkFHp0xObaqb6yurVHRUv4ONWMalYvkn0TRFc5EXi7RQeg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+66827+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1604070055546314.0156097663895; Fri, 30 Oct 2020 08:00:55 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id PHrhYY1788612xvuE29TsVm0; Fri, 30 Oct 2020 08:00:53 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.10636.1604047326714500214 for ; Fri, 30 Oct 2020 01:42:06 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 56A69143D; Fri, 30 Oct 2020 01:42:06 -0700 (PDT) X-Received: from usa.arm.com (a076764.blr.arm.com [10.162.16.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3C37F3F719; Fri, 30 Oct 2020 01:42:04 -0700 (PDT) From: "Omkar Anand Kulkarni" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar , Jiewen Yao Subject: [edk2-devel] [edk2-platforms][PATCH 1/6] Platform/ARM: Add DMC-620 RAS error handling driver Date: Fri, 30 Oct 2020 14:11:51 +0530 Message-Id: <20201030084156.8291-2-omkar.kulkarni@arm.com> In-Reply-To: <20201030084156.8291-1-omkar.kulkarni@arm.com> References: <20201030084156.8291-1-omkar.kulkarni@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,omkar.kulkarni@arm.com X-Gm-Message-State: TchlMCLTUqxBgmCYhywISj8ox1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1604070053; bh=k3x11nhlUZXFlKkZykg6uxnwgxFC0WRCRat8q3SdfLM=; h=Cc:Date:From:Reply-To:Subject:To; b=kOCk7bQQQa3TzXW+Jxp00p3qwFFIdE5NYgi3eezDr52FZSklForgM3A84XkGb2onugA Iv5VFZi1qxkAd28KlQ3znYAe19c3oPDqF4jovbEDnLvXHwEELQa8//XU9isik8i4ae8Ub 6/IGmtXxZ422OcneyGrzi+BYQ1jMBS8qvJE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" DMC-620 memory controller improves system reliability by generating interrupts on detecting ECC errors on the data. Add a initial DMC-620 MM driver that implements a MMI handler for handling single-bit ECC error events originating from the DRAM. The driver implements the HEST error source descriptor protocol in order to publish the GHES error source descriptor for single-bit DRAM errors. The GHES error source descriptor that is published is of type 'memory error'. A GHES error source descriptor is pub;lished for each instances if the DMC-620 controller in the system. The driver registers a MMI handler for handling 1-bit DRAM ECC error events. The MMI handler, when invoked, reads the DMC-620 error record registers and populates the EFI_PLATFORM_MEMORY_ERROR_DATA type error section information structure with the corresponding information read from the error record registers. Co-authored-by: Thomas Abraham Signed-off-by: Omkar Anand Kulkarni --- Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec | 28 ++ Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf | 59 +++ Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h | 209 +++++++++++ Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c | 379 ++++++++++++= ++++++++ Platform/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c | 191 ++++++++++ 5 files changed, 866 insertions(+) diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec b/Platform/ARM/Driv= ers/Dmc620Mm/Dmc620Mm.dec new file mode 100644 index 000000000000..2caa28879c35 --- /dev/null +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec @@ -0,0 +1,28 @@ +#/** @file +# +# Copyright (c) 2020, ARM Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + DEC_SPECIFICATION =3D 0x0001001A + PACKAGE_NAME =3D Dmc620Mm + PACKAGE_GUID =3D 94110B10-8E72-42A0-8963-D2B57FCF0F38 + PACKAGE_VERSION =3D 0.1 + +[Guids] + gDmc620MmTokenSpaceGuid =3D {0xc305f72a, 0xd10d, 0x45e8, { 0x81, 0x78, 0= x51, 0x8b, 0x78, 0x62, 0x77, 0x79 } } + gArmDmcEventHandlerGuid =3D { 0x5ef0afd5, 0xe01a, 0x4c30, { 0x86, 0x19, = 0x45, 0x46, 0x26, 0x91, 0x80, 0x98 }} + +[PcdsFixedAtBuild.common] + gDmc620MmTokenSpaceGuid.PcdDmc620NumCtrl|2|UINT32|0x00000001 + gDmc620MmTokenSpaceGuid.PcdDmc620RegisterBase|0x4E000000|UINT64|0x000000= 02 + gDmc620MmTokenSpaceGuid.PcdDmc620CtrlSize|0x100000|UINT32|0x00000003 + gDmc620MmTokenSpaceGuid.PcdDmc620CorrectableErrorThreshold|10|UINT32|0x0= 0000004 + gDmc620MmTokenSpaceGuid.PcdDmc620ErrSourceCount|1|UINT32|0x00000005 + gDmc620MmTokenSpaceGuid.PcdDmc620DramErrorSdeiEventBase|0|UINT32|0x00000= 006 + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataBase|0|UINT64|0x0000= 0007 + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataSize|0|UINT64|0x0000= 0008 + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorSourceId|0|UINT16|0x0000= 0009 diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf b/Platform/ARM/Driv= ers/Dmc620Mm/Dmc620Mm.inf new file mode 100644 index 000000000000..02c8107467aa --- /dev/null +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf @@ -0,0 +1,59 @@ +## @file +# StandaloneMM driver for the DMC620 Memory Controller. +# +# Copyright (c) 2020, ARM Limited. All rights reserved. +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D StandaloneMmDmc620Driver + FILE_GUID =3D CB53ACD9-A1A1-43B3-A638-AC74DA5D9DA2 + MODULE_TYPE =3D MM_STANDALONE + VERSION_STRING =3D 1.0 + PI_SPECIFICATION_VERSION =3D 0x00010032 + ENTRY_POINT =3D Dmc620MmDriverInitialize + +[Sources] + Dmc620Mm.c + Dmc620MmErrorSourceInfo.c + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + edk2-platforms/Platform/ARM/ARM.dec + Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + StandaloneMmPkg/StandaloneMmPkg.dec + +[LibraryClasses] + StandaloneMmDriverEntryPoint + DebugLib + ArmSvcLib + ArmLib + BaseMemoryLib + +[Protocols] + gMmHestErrorSourceDescProtocolGuid ##PRODUCES + +[FixedPcd] + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferBase + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize + + gDmc620MmTokenSpaceGuid.PcdDmc620NumCtrl + gDmc620MmTokenSpaceGuid.PcdDmc620RegisterBase + gDmc620MmTokenSpaceGuid.PcdDmc620CtrlSize + gDmc620MmTokenSpaceGuid.PcdDmc620CorrectableErrorThreshold + gDmc620MmTokenSpaceGuid.PcdDmc620ErrSourceCount + gDmc620MmTokenSpaceGuid.PcdDmc620DramErrorSdeiEventBase + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataBase + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataSize + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorSourceId + +[Guids] + gArmDmcEventHandlerGuid + +[Depex] + TRUE diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h b/Platform/ARM/Driver= s/Dmc620Mm/Dmc620Mm.h new file mode 100644 index 000000000000..36d4b5c6be0b --- /dev/null +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.h @@ -0,0 +1,209 @@ +/** @file + DMC-620 memory controller register defines, macros and structres used by + the DMC-620 StandaloneMM driver. + + Copyright (c) 2020, ARM Limited. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef DMC620_MM_DRIVER_H_ +#define DMC620_MM_DRIVER_H_ + +#include +#include +#include + +#include +#include +#include +#include + +#include + +// DMC-620 memory controller status register field values and masks +#define DMC620_MEMC_STATUS_MEMC_STATUS_MASK (0x00000007) +#define DMC620_MEMC_STATUS_MEMC_STATUS_READY (0x3) + +// DMC-620 memory controller command register +#define DMC620_MEMC_CMD_MEMC_CMD_EXECUTE_DRAIN (0x5) + +// DMC-620 memory controller Err Record 1/2 Status register bit masks +#define DMC620_ERR_STATUS_MV (0x04000000) +#define DMC620_ERR_STATUS_AV (0x80000000) + +// DMC-620 memory controller DRAM error record (Err1/2) Misc 0 register fi= elds +#define DMC620_ERR_MISC0_COLUMN_MASK (0x000003FF) +#define DMC620_ERR_MISC0_ROW_MASK (0x0FFFFC00) +#define DMC620_ERR_MISC0_ROW_SHIFT (10) +#define DMC620_ERR_MISC0_RANK_MASK (0x70000000) +#define DMC620_ERR_MISC0_RANK_SHIFT (28) +#define DMC620_ERR_MISC0_VAILD (0x80000000) + +// DMC-620 memory controller DRAM error record (Err1/2) Misc 1 register fi= elds +#define DMC620_ERR_MISC1_VAILD (0x80000000) +#define DMC620_ERR_MISC1_BANK_MASK (0x0000000F) + +// DMC-620 memory controller ErrGsr register bit masks +#define DMC620_DRAM_ECC_CORRECTED_FH (BIT0 << 1) + +// +// Macro to initialize the HEST GHESv2 Notification structure. +// +#define ARM_PLATFORM_ACPI_6_3_GHES_NOTIFICATION_STRUCT_INIT(Type, \ + PollInterval, EventId) { \ + Type, \ + sizeof (EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_STRUCTURE), \ + {0, 0, 0, 0, 0, 0, 0}, /* ConfigurationWriteEnable */ \ + PollInterval, \ + EventId, \ + 0, /* Poll Interval Threshold Value */ \ + 0, /* Poll Interval Threshold Window */ \ + 0, /* Error Threshold Value */ \ + 0 /* Error Threshold Window */ \ +} + +// +// Macro to initialize the HEST GHESv2 Error Status and Read Ack register. +// +#define ARM_PLATFORM_ACPI_6_3_GHES_GENERIC_ADDRESS_STRUCT_INIT(Address) { = \ + 0, /* UINT8 Address Space ID */ \ + 64, /* Register Bit Width */ \ + 0, /* Register Bit Offset */ \ + 4, /* Access Size */ \ + Address /* CPER/Read Ack Addr */ \ +} + +//#pragma pack(1) + +// +// DMC-620 memory controller register definitions +// +typedef struct { + UINT32 MemcStatus; + UINT32 MemcConfig; + UINT32 MemcCmd; + UINT32 Reserved [0x1BD]; + UINT32 Err0Fr; + UINT32 Reserved1; + UINT32 Err0Ctlr0; + UINT32 Err0Ctlr1; + UINT32 Err0Status; + UINT8 Reserved2[0x740 - 0x714]; + UINT32 Err1Fr; + UINT32 Reserved3; + UINT32 Err1Ctlr; + UINT32 Reserved4; + UINT32 Err1Status; + UINT32 Reserved5; + UINT32 Err1Addr0; + UINT32 Err1Addr1; + UINT32 Err1Misc0; + UINT32 Err1Misc1; + UINT32 Err1Misc2; + UINT32 Err1Misc3; + UINT32 Err1Misc4; + UINT32 Err1Misc5; + UINT8 Reserved6[0x780 - 0x778]; + UINT32 Err2Fr; + UINT32 Reserved7; + UINT32 Err2Ctlr; + UINT32 Reserved8; + UINT32 Err2Status; + UINT32 Reserved9; + UINT32 Err2Addr0; + UINT32 Err2Addr1; + UINT32 Err2Misc0; + UINT32 Err2Misc1; + UINT32 Err2Misc2; + UINT32 Err2Misc3; + UINT32 Err2Misc4; + UINT32 Err2Misc5; + UINT8 Reserved10[0x7c0 - 0x7b8]; + //UINT32 Reserved11[0x58]; + UINT32 Reserved15[0x14];//hack + UINT32 Err4Status; + UINT32 Reserved16[0x43];//hack + UINT32 Errgsr; +} DMC620_REGS_TYPE; + +// +// DMC-620 memory controller error record register definition +// +typedef struct { + UINT32 ErrFr; + UINT32 Reserved; + UINT32 ErrCtlr; + UINT32 Reserved1; + UINT32 ErrStatus; + UINT32 Reserved2; + UINT32 ErrAddr0; + UINT32 ErrAddr1; + UINT32 ErrMisc0; + UINT32 ErrMisc1; + UINT32 ErrMisc2; + UINT32 ErrMisc3; + UINT32 ErrMisc4; + UINT32 ErrMisc5; + UINT8 Reserved3[0x780 - 0x778]; +} DMC620_ERR_REGS_TYPE; + +//#pragma pack() + +// +// List of supported error sources by DMC-620 memory controller +// +typedef enum { + DramEccCfh =3D 0, + DramEccFh, + ChiFh, + SramEccCfh, + SramEccFh, + DmcErrRecovery +} DMC_ERR_SOURCES; + +/** + MMI handler implementing the HEST error source desc protocol. + + Returns the error source descriptor information for all DMC(s) error sou= rces and + also returns its count and length. + + @param[in] This Pointer for this protocol + + @param[out] Buffer HEST error source descriptor Information + buffer. + @param[out] ErrorSourcesLength Total length of Error Source Descriptors + @param[out] ErrorSourceCount Total number of supported error sources. + + @retval EFI_SUCCESS Buffer has valid Error Source descriptor i= nformation. + @retval EFI_INVALID_PARAMETER Buffer is NULL. + +**/ +EFI_STATUS +EFIAPI +DmcErrorSourceDescInfoGet ( + IN MM_HEST_ERROR_SOURCE_DESC_PROTOCOL *This, + OUT VOID **Buffer, + OUT UINTN *ErrorSourcesLength, + OUT UINTN *ErrorSourcesCount + ); + +/** + Allow reporting of supported DMC-620 error sources + + Install the Hest Error Source Descriptor protocol handler to allow publi= shing + of the supported DMC-620 memory controller error sources. + + @param[in] MmSystemTable Pointer to System table. + + @retval EFI_SUCCESS Protocol installation successful. + @retval EFI_INVALID_PARAMETER Invalid system table parameter. + +**/ + +EFI_STATUS +Dmc620InstallErrorSourceDescProtocol ( + IN EFI_MM_SYSTEM_TABLE *MmSystemTable + ); + +#endif // DMC620_MM_DRIVER_H_ diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c b/Platform/ARM/Driver= s/Dmc620Mm/Dmc620Mm.c new file mode 100644 index 000000000000..ee669085abea --- /dev/null +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.c @@ -0,0 +1,379 @@ +/** @file + DMC 620 Memory Controller error handling (Standalone MM) driver + + Supports Single Bit DRAM error handling for multiple DMC 620 instances. + On a error event, publishes the CPER error record of Memory type. + + Copyright (c) 2020, ARM Limited. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include + +/** + Drain DMC-620 controller of any transactions. + + Performs pending direct_command operations and updates the register valu= es + with the next (new) values. The new values will be considered when the + DMC moves to ready state. + + @param [in] DmcCtrl Pointer to DMC620_x control registers + + @retval NONE. + +**/ +STATIC +VOID +Dmc620DrainController ( + IN DMC620_REGS_TYPE *DmcCtrl + ) +{ + UINT32 MemcStatus; + + MmioWrite32 ((UINTN)&DmcCtrl->MemcCmd, DMC620_MEMC_CMD_MEMC_CMD_EXECUTE_= DRAIN); + + do { + MemcStatus =3D MmioRead32 ((UINTN)&DmcCtrl->MemcStatus); + } while ((MemcStatus & DMC620_MEMC_STATUS_MEMC_STATUS_MASK) !=3D + DMC620_MEMC_STATUS_MEMC_STATUS_READY); +} + +/** + Helper function to handle the DMC-620 DRAM errors. + + Reads the DRAM error record registers. Creates a CPER error record of ty= pe + 'Memory Error' and populates it with DRAM error record registers. + + @param[in] DmcCtrl A pointer to DMC620 control registers. + @param[in] DmcInstance DMC instance which raised the RAS event. + @param[in] ErrRecType A type of the DMC error record. + @param[in] ErrorBlockBaseAddress Unique address for populating the error= block + status for given DMC error source. + + @return NONE. + +**/ +STATIC +VOID +Dmc620HandleDramError ( + IN DMC620_REGS_TYPE *DmcCtrl, + IN UINTN DmcInstance, + IN UINTN ErrRecType, + IN UINTN ErrorBlockBaseAddress + ) +{ + EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE *ErrBlockSectionDesc; + EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE *ErrBlockStatusHeaderDat= a; + EFI_PLATFORM_MEMORY_ERROR_DATA MemorySectionInfo =3D {0= }; + DMC620_ERR_REGS_TYPE *ErrRecord; + EFI_GUID SectionType; + UINT32 ResetReg; + VOID *ErrBlockSectionData; + UINTN *ErrorStatusRegister; + UINTN *ReadAckRegister; + UINTN *ErrStatusBlock; + UINTN ErrStatus; + UINTN ErrAddr0; + UINTN ErrAddr1; + UINTN ErrMisc0; + UINTN ErrMisc1; + UINT8 CorrectedError; + + // + // Check the type of DRAM error (1-bit or 2-bit) and accordingly select + // error record to use. + // + if (ErrRecType =3D=3D DMC620_DRAM_ECC_CORRECTED_FH) { + DEBUG ((DEBUG_INFO, "DRAM ECC Corrected Fault (1-Bit ECC error) \n")); + ErrRecord =3D (DMC620_ERR_REGS_TYPE *)&DmcCtrl->Err1Fr; + CorrectedError =3D 1; + } + else { + DEBUG ((DEBUG_INFO, "DRAM ECC Fault Handling (2-bit ECC error)\n")); + ErrRecord =3D (DMC620_ERR_REGS_TYPE *)&DmcCtrl->Err2Fr; + CorrectedError =3D 0; + } + + // Read most recent DRAM error record registers. + do { + ErrStatus =3D MmioRead32 ((UINTN)&ErrRecord->ErrStatus); + ErrAddr0 =3D MmioRead32 ((UINTN)&ErrRecord->ErrAddr0); + ErrAddr1 =3D MmioRead32 ((UINTN)&ErrRecord->ErrAddr1); + ErrMisc0 =3D MmioRead32 ((UINTN)&ErrRecord->ErrMisc0); + ErrMisc1 =3D MmioRead32 ((UINTN)&ErrRecord->ErrMisc1); + + // Clear the status register so that new error records are populated. + ResetReg =3D MmioRead32 ((UINTN)&ErrRecord->ErrStatus); + MmioWrite32 ((UINTN)&ErrRecord->ErrStatus, ResetReg); + Dmc620DrainController (DmcCtrl); + } while (MmioRead32 ((UINTN)&ErrRecord->ErrStatus)); + + ErrStatus =3D MmioRead32 ((UINTN)&DmcCtrl->Err4Status);//hack + + //=20 + // Get Physical address of DRAM error from Address register and populate + // Memory Error Section. + // + if (ErrStatus & DMC620_ERR_STATUS_AV) { + DEBUG ((DEBUG_INFO, "DRAM Error: Address_0 : 0x%x Address_1 : 0x%x\n", + ErrAddr0, ErrAddr1)); + //=20 + // Populate Memory CPER section with DRAM error address (48 bits) and + // address mask fields. + // + MemorySectionInfo.ValidFields |=3D EFI_PLATFORM_MEMORY_PHY_ADDRESS_MAS= K_VALID; + MemorySectionInfo.PhysicalAddressMask =3D 0xFFFFFFFFFFFF; + MemorySectionInfo.ValidFields |=3D EFI_PLATFORM_MEMORY_PHY_ADDRESS_VAL= ID; + MemorySectionInfo.PhysicalAddress =3D (ErrAddr1 << 32) | ErrAddr0; + } + + // + // Read the Error Record Misc registers and populate relevant fields in + // Memory error section. + // + // Read DRAM MISC0 register and populate the Memory Error Section. + if ((ErrStatus & DMC620_ERR_STATUS_MV) + && (ErrMisc0 & DMC620_ERR_MISC0_VAILD)) + { + // Populate Memory Error Section wih DRAM column information. + MemorySectionInfo.ValidFields |=3D EFI_PLATFORM_MEMORY_COLUMN_VALID; + MemorySectionInfo.Column =3D ErrMisc0 & DMC620_ERR_MISC0_COLUMN_MASK; + + // + // Populate Memory Error Section with DRAM row information. + // Row bits (bit 16 and 17) are to be filled as extended. + // + MemorySectionInfo.ValidFields |=3D + EFI_PLATFORM_MEMORY_ERROR_EXTENDED_ROW_BIT_16_17_VALID; + MemorySectionInfo.Row =3D + (ErrMisc0 & DMC620_ERR_MISC0_ROW_MASK) >> DMC620_ERR_MISC0_ROW_SHIFT; + MemorySectionInfo.Extended =3D + (ErrMisc0 & DMC620_ERR_MISC0_ROW_MASK) >> (DMC620_ERR_MISC0_ROW_SHIF= T + 16); + + // Populate Memory Error Section wih DRAM rank information. + MemorySectionInfo.ValidFields |=3D EFI_PLATFORM_MEMORY_ERROR_RANK_NUM_= VALID; + MemorySectionInfo.RankNum =3D (ErrMisc0 & DMC620_ERR_MISC0_RANK_MASK) = >> + DMC620_ERR_MISC0_RANK_SHIFT; + } + + // Read DRAM MISC1 register and populate the Memory Error Section. + if ((ErrStatus & DMC620_ERR_STATUS_MV) + && (ErrMisc1 & DMC620_ERR_MISC1_VAILD)) + { + MemorySectionInfo.ValidFields |=3D EFI_PLATFORM_MEMORY_BANK_VALID; + MemorySectionInfo.Bank =3D (ErrMisc1 & DMC620_ERR_MISC1_BANK_MASK); + } + + // + // Misc registers 2..5 are not used and convey only the error counter + // information. They are cleared as they do not contribute in Error + // Record creation. + // + if (ErrStatus & DMC620_ERR_STATUS_MV) { + ResetReg =3D 0x0; + MmioWrite32 ((UINTN)&ErrRecord->ErrMisc2, ResetReg); + MmioWrite32 ((UINTN)&ErrRecord->ErrMisc3, ResetReg); + MmioWrite32 ((UINTN)&ErrRecord->ErrMisc4, ResetReg); + MmioWrite32 ((UINTN)&ErrRecord->ErrMisc5, ResetReg); + } + + // + // Reset error records Status register for recording new DRAM error synd= rome + // information. + // + ResetReg =3D MmioRead32 ((UINTN)&ErrRecord->ErrStatus); + MmioWrite32 ((UINTN)&ErrRecord->ErrStatus, ResetReg); + Dmc620DrainController (DmcCtrl); + + ErrStatus =3D 0;//hack + ResetReg =3D MmioRead32 ((UINTN)&DmcCtrl->Err4Status); + MmioWrite32 ((UINTN)&DmcCtrl->Err4Status, ResetReg); + Dmc620DrainController (DmcCtrl); + + // + // Allocate memory for Error Acknowledge register, Error Status register= and + // Error status block data. + // + ReadAckRegister =3D (UINTN *)ErrorBlockBaseAddress; + ErrorStatusRegister =3D (UINTN *)ErrorBlockBaseAddress + 1; + ErrStatusBlock =3D (UINTN *)ErrorStatusRegister + 1; + + // Initialize Error Status Register with Error Status Block address. + *ErrorStatusRegister =3D (UINTN)ErrStatusBlock; + + // + // Locate Block Status Header base address and populate it with Error St= atus + // Block Header information. + // + ErrBlockStatusHeaderData =3D (EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTUR= E *) + ErrStatusBlock; + *ErrBlockStatusHeaderData =3D + (EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE) { + .BlockStatus =3D { + .UncorrectableErrorValid =3D ((CorrectedError =3D=3D 0) ? 0:1), + .CorrectableErrorValid =3D ((CorrectedError =3D=3D 1) ? 1:0), + .MultipleUncorrectableErrors =3D 0x0, + .MultipleCorrectableErrors =3D 0x0, + .ErrorDataEntryCount =3D 0x1 + }, + .RawDataOffset =3D (sizeof(EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTU= RE) + + sizeof(EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCT= URE)), + .RawDataLength =3D 0, + .DataLength =3D (sizeof(EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCT= URE) + + sizeof(EFI_PLATFORM_MEMORY_ERROR_DATA)), + .ErrorSeverity =3D ((CorrectedError =3D=3D 1) ? + EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTED: + EFI_ACPI_6_3_ERROR_SEVERITY_FATAL= ), + }; + + // + // Locate Section Descriptor base address and populate Error Status Sect= ion + // Descriptor data. + // + ErrBlockSectionDesc =3D (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE= *) + (ErrBlockStatusHeaderData + 1); + *ErrBlockSectionDesc =3D + (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE) { + .ErrorSeverity =3D ((CorrectedError =3D=3D 1) ? + EFI_ACPI_6_3_ERROR_SEVERITY_CORRECTED: + EFI_ACPI_6_3_ERROR_SEVERITY_FATAL), + .Revision =3D EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_REVISION, + .ValidationBits =3D 0, + .Flags =3D 0, + .ErrorDataLength =3D sizeof (EFI_PLATFORM_MEMORY_ERROR_DATA), + .FruId =3D {0}, + .FruText =3D {0}, + .Timestamp =3D {0}, + }; + SectionType =3D (EFI_GUID) EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID; + CopyGuid ((EFI_GUID *)ErrBlockSectionDesc->SectionType, &SectionType); + + // Locate Section base address and populate Memory Error Section data. + ErrBlockSectionData =3D (VOID *)(ErrBlockSectionDesc + 1); + CopyMem ( + ErrBlockSectionData, + (VOID *)&MemorySectionInfo, + sizeof (EFI_PLATFORM_MEMORY_ERROR_DATA) + ); +} + +/** + DMC620 RAS event handler. + + Mutiple DMC error processing support. Current implementation handles the= DRAM + ECC errors. + + @param[in] DispatchHandle The unique handle assigned to this handle= r by + MmiHandlerRegister(). + @param[in] Context Points to an optional handler context whi= ch + was specified when the handler was regist= ered. + @param[in, out] CommBuffer A pointer to a collection of data in memo= ry that + will be conveyed from a non-MM environmen= t into + an MM environment. + @param[in, out] CommBufferSize The size of the CommBuffer. + + @retval EFI_SUCCESS Event handler successful. + @retval Other Failure of event handler. + +**/ +STATIC +EFI_STATUS +EFIAPI +Dmc620ErrorEventHandler ( + IN EFI_HANDLE DispatchHandle, + IN CONST VOID *Context, OPTIONAL + IN OUT VOID *CommBuffer, OPTIONAL + IN OUT UINTN *CommBufferSize OPTIONAL + ) +{ + DMC620_REGS_TYPE *DmcCtrl; + UINTN DmcIdx; + UINTN ErrGsr; + + // DMC instance which raised RAS error event. + DmcIdx =3D *(UINTN *)CommBuffer; + // Base address of the DMC instance. + DmcCtrl =3D (DMC620_REGS_TYPE *)(FixedPcdGet64 (PcdDmc620RegisterBase) + + (FixedPcdGet64 (PcdDmc620CtrlSize) * DmcIdx)); + + DEBUG (( + DEBUG_INFO, + "DMC error event raised for DMC: %d with DmcBaseAddr: 0x%x \n", + DmcIdx, (UINTN)DmcCtrl + )); + + ErrGsr =3D MmioRead32 ((UINTN)&DmcCtrl->Errgsr); + ErrGsr =3D 0x2; //HACK + + if (ErrGsr & DMC620_DRAM_ECC_CORRECTED_FH) { + // Handle corrected 1-bit DRAM ECC error. + Dmc620HandleDramError ( + DmcCtrl, + DmcIdx, + DMC620_DRAM_ECC_CORRECTED_FH, + FixedPcdGet64 (PcdDmc620DramOneBitErrorDataBase) + + (FixedPcdGet64 (PcdDmc620DramOneBitErrorDataSize) * DmcIdx)); + } else { + // ToDo: Add support for other DMC620 error sources. + DEBUG ((DEBUG_ERROR, "Unsupported DMC-620 error reported, ignoring\n")= ); + } + + // No data to send using the MM communication buffer so clear the comm b= uffer + // size. + *CommBufferSize =3D 0; + + return EFI_SUCCESS; +} + +/** + Initialize function for the driver. + + Registers MMI handlers to process RAS events on DMC and installs required + protocols to publish the error source descriptors. + + @param[in] ImageHandle Handle to image. + @param[in] SystemTable Pointer to System table. + + @retval EFI_SUCCESS On successful installation of RAS handlers for DMC. + @retval Other Failure in installing RAS handlers for DMC. + +**/ +EFI_STATUS +EFIAPI +Dmc620MmDriverInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_MM_SYSTEM_TABLE *SystemTable + ) +{ + EFI_MM_SYSTEM_TABLE *mMmst; + EFI_STATUS Status; + EFI_HANDLE DispatchHandle; + + ASSERT (SystemTable !=3D NULL); + mMmst =3D SystemTable; + + // Register RAS event MMI handlers. + Status =3D mMmst->MmiHandlerRegister ( + Dmc620ErrorEventHandler, + &gArmDmcEventHandlerGuid, + &DispatchHandle + ); + if (EFI_ERROR(Status)) { + DEBUG (( + DEBUG_ERROR, + "Registration failed for DMC RAS event handler, Status:%r\n", + Status + )); + + return Status; + } + + // Installs the HEST error source descriptor protocol. + Status =3D Dmc620InstallErrorSourceDescProtocol (SystemTable); + if (EFI_ERROR(Status)) { + mMmst->MmiHandlerUnRegister (DispatchHandle); + } + + return Status; +} diff --git a/Platform/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c b/Plat= form/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c new file mode 100644 index 000000000000..b7cc6368a2a4 --- /dev/null +++ b/Platform/ARM/Drivers/Dmc620Mm/Dmc620MmErrorSourceInfo.c @@ -0,0 +1,191 @@ +/** @file + DMC-620 Memory Controller HEST error source descriptors + + Implements the HEST Error Source Descriptor protocol. Publishes the Error + Sources supported using the GHESv2 type error source descriptor. + + Copyright (c) 2020, ARM Limited. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include + +/** + Populate the DRAM Error Source Descriptor. + + Populate DMC-620 DRAM error source descriptor as a GHESv2 type in the HE= ST + table. The error source descriptor is populate with appropriate values + based on the instance number of DMC-620. + + @param[in] DmcIdx Instance number of the DMC-620. + @param[in] ErrorDesc HEST error source descriptor Information + +**/ +STATIC +VOID +EFIAPI +Dmc620SetupDramErrorDescriptor ( + IN EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *Erro= rDesc, + IN UINTN DmcIdx + ) +{ + UINTN ErrorBlockData; +=20 + // + // Address of reserved memory for the error status block that will be us= ed + // to hold the information about the DRAM error. + // + ErrorBlockData =3D FixedPcdGet64 (PcdDmc620DramOneBitErrorDataBase) + + (FixedPcdGet64 (PcdDmc620DramOneBitErrorDataSize) * D= mcIdx); + + // Populate the DRAM error descriptor. + *ErrorDesc =3D + (EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE) { + .Type =3D EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_VERSION_2, + .SourceId =3D FixedPcdGet16 (PcdDmc620DramOneBitErrorSourceId) + Dmc= Idx, + .RelatedSourceId =3D 0xFFFF, + .Flags =3D 0, + .Enabled =3D 1, + .NumberOfRecordsToPreAllocate =3D 1, + .MaxSectionsPerRecord =3D 1, + .MaxRawDataLength =3D sizeof (EFI_PLATFORM_MEMORY_ERROR_DATA), + .ErrorStatusAddress =3D + ARM_PLATFORM_ACPI_6_3_GHES_GENERIC_ADDRESS_STRUCT_INIT ( + (ErrorBlockData + 8) + ), + .NotificationStructure =3D + ARM_PLATFORM_ACPI_6_3_GHES_NOTIFICATION_STRUCT_INIT ( + EFI_ACPI_6_3_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCE= PTION, + 0, + FixedPcdGet32 (PcdDmc620DramErrorSdeiEventBase) + DmcIdx + ), + .ErrorStatusBlockLength =3D + sizeof (EFI_ACPI_6_3_GENERIC_ERROR_STATUS_STRUCTURE) + + sizeof (EFI_ACPI_6_3_GENERIC_ERROR_DATA_ENTRY_STRUCTURE) + + sizeof (EFI_PLATFORM_MEMORY_ERROR_DATA), + .ReadAckRegister =3D + ARM_PLATFORM_ACPI_6_3_GHES_GENERIC_ADDRESS_STRUCT_INIT (ErrorBlock= Data), + .ReadAckPreserve =3D 0, + .ReadAckWrite =3D 0 + }; +} + +/** + MMI handler implementing the HEST error source descriptor protocol. + + Returns the error source descriptor information for all DMC(s) error sou= rces + and also returns its count and length. Computes base addresses for each + supported error source and populate the global context with the base add= ress + information. + + @param[in] This Pointer for this protocol. + @param[out] Buffer HEST error source descriptor Information + buffer. + @param[out] ErrorSourcesLength Total length of Error Source Descriptors + @param[out] ErrorSourceCount Total number of supported error spurces. + + @retval EFI_SUCCESS Buffer has valid Error Source descriptor + information. + @retval EFI_INVALID_PARAMETER Buffer is NULL. + +**/ +STATIC +EFI_STATUS +EFIAPI +Dmc620ErrorSourceDescInfoGet ( + IN MM_HEST_ERROR_SOURCE_DESC_PROTOCOL *This, + OUT VOID **Buffer, + OUT UINTN *ErrorSourcesLength, + OUT UINTN *ErrorSourcesCount + ) +{ + EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *ErrorDes= criptor; + UINTN DmcIdx; + + // + // Update the error source length and error source count for error sourc= es + // supported by all DMCs. + // + *ErrorSourcesLength =3D + FixedPcdGet64 (PcdDmc620NumCtrl) * + FixedPcdGet64 (PcdDmc620ErrSourceCount) * + sizeof(EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE); + *ErrorSourcesCount =3D FixedPcdGet64 (PcdDmc620NumCtrl) * + FixedPcdGet64 (PcdDmc620ErrSourceCount); + + // + // If 'Buffer' is NULL, this invocation of the protocol handler is to + // determine the total size of all the error source descriptor instances. + // + if (Buffer =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + // Buffer to be updated with error source descriptor(s) information. + ErrorDescriptor =3D + (EFI_ACPI_6_3_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE *)*Buf= fer; + + // + // Populate the available error source descriptor for all the DMC-620 + // instances. + // + for (DmcIdx =3D 0; DmcIdx < FixedPcdGet64 (PcdDmc620NumCtrl); DmcIdx++) + { + // Add the one-bit DRAM error source descriptor.=20 + Dmc620SetupDramErrorDescriptor(ErrorDescriptor, DmcIdx); + ErrorDescriptor++; + } + + return EFI_SUCCESS; +} + +// +// DMC-620 MM_HEST_ERROR_SOURCE_DESC_PROTOCOL protocol instance. +// +STATIC MM_HEST_ERROR_SOURCE_DESC_PROTOCOL mDmc620ErrorSourceDesc =3D { + Dmc620ErrorSourceDescInfoGet +}; + +/** + Allow reporting of supported DMC-620 error sources + + Install the Hest Error Source Descriptor protocol handler to allow publi= shing + of the supported DMC-620 memory controller error sources. + + @param[in] MmSystemTable Pointer to System table. + + @retval EFI_SUCCESS Protocol installation successful. + @retval EFI_INVALID_PARAMETER Invalid system table parameter. + +**/ +EFI_STATUS +Dmc620InstallErrorSourceDescProtocol ( + IN EFI_MM_SYSTEM_TABLE *MmSystemTable + ) +{ + EFI_HANDLE mDmcHandle =3D NULL; + EFI_STATUS Status; + + // Check if the MmSystemTable is initialized. + if (MmSystemTable =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + // Install HEST error source descriptor protocol for DMC(s). + Status =3D MmSystemTable->MmInstallProtocolInterface ( + &mDmcHandle, + &gMmHestErrorSourceDescProtocolGuid, + EFI_NATIVE_INTERFACE, + &mDmc620ErrorSourceDesc + ); + if (EFI_ERROR(Status)) { + DEBUG (( + DEBUG_ERROR, + "Failed installing HEST error source descriptor protocol, status: %r= \n", + Status + )); + } + + return Status; +} --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#66827): https://edk2.groups.io/g/devel/message/66827 Mute This Topic: https://groups.io/mt/77913845/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 10 13:24:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+66828+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+66828+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1604070059; cv=none; d=zohomail.com; s=zohoarc; b=F7tTYaZe5N85LI/piuKeq8+UjrLQ3Hzk/d6z82f1HkZpR/0ZiLkLpog/sHzuwfXw6EvkU0B9UThQWS5g67hiH8ttdHlXeI5nbL6MYPz7VQuNsnHXb9iVQ3VE297Z9Vch4issre+kH/VxTBbdWtRsCtXUWBVsfGD6OT8jmchhYhQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1604070059; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=y0I7HsfQvFyTGhLr20yq4C2IbksJYAAEFgZSouG46co=; b=arBCzpMtTF3BF5Oo//ZdgpxXcqhhCdvwE+feWQGsRsI50tbhMJhpqSlJXD81pjmrLZ8RWFE4AsbhljyRD1CK9393o1KeNRW5YRP1yN3jLIMG2yOL0q6EtivIbALJ4Z1vgUIG9lW+gC2wG/lbvpf16mGidNh5+cWCmCqo/wJs0OI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+66828+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 16040700589431004.7184675803761; Fri, 30 Oct 2020 08:00:58 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id NnfeYY1788612xZCGduvVAiC; Fri, 30 Oct 2020 08:00:56 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.10538.1604047328816555511 for ; Fri, 30 Oct 2020 01:42:08 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6D935D6E; Fri, 30 Oct 2020 01:42:08 -0700 (PDT) X-Received: from usa.arm.com (a076764.blr.arm.com [10.162.16.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C559A3F719; Fri, 30 Oct 2020 01:42:06 -0700 (PDT) From: "Omkar Anand Kulkarni" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar , Jiewen Yao Subject: [edk2-devel] [edk2-platforms][PATCH 2/6] Platform/ARM/Sgi: Install SDEI ACPI table Date: Fri, 30 Oct 2020 14:11:52 +0530 Message-Id: <20201030084156.8291-3-omkar.kulkarni@arm.com> In-Reply-To: <20201030084156.8291-1-omkar.kulkarni@arm.com> References: <20201030084156.8291-1-omkar.kulkarni@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,omkar.kulkarni@arm.com X-Gm-Message-State: DxHWTKFZCGRF1h1oc2KwLOm3x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1604070056; bh=JcgT5ypaTanhNiWJcIWmWmUuGO/vEC9w8GdBerAT1zQ=; h=Cc:Date:From:Reply-To:Subject:To; b=WLQnP5ZTD4bqeRwDTqaROaNvJgTN3HfSdquhJLy78FV5lSY6MA1ho9nUF08dumgglS0 xcAt3Gc2rIFEh77F581Csk1jEh4lglQEjYbKVS4HOVJWSJIPG142lyS97qGaOEMWznvZ3 etVCkN7BDMfW0Ia8A6kh7/f2sJXpwt6OznM= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" On SGI/RD platforms that require SDEI mechanism to let OS know about a high priority system event, such as a RAS event, create and install the SDEI ACPI table. Co-authored-by: Thomas Abraham Signed-off-by: Omkar Anand Kulkarni --- Platform/ARM/SgiPkg/SgiPlatform.dec | 1 + Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 1 + Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 79 +++++++++++++= +++++++ 3 files changed, 81 insertions(+) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiP= latform.dec index dac7fdc308b1..f139b90d81e3 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -31,6 +31,7 @@ [PcdsFeatureFlag.common] gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|FALSE|BOOLEAN|0x00000001 gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|FALSE|BOOLEAN|0x00000010 + gArmSgiTokenSpaceGuid.PcdSdeiSupported|FALSE|BOOLEAN|0x0000000D =20 [PcdsFixedAtBuild] gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0|UINT64|0x00000002 diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Plat= form/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf index 9d89314a594e..2ea2c09e3920 100644 --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf @@ -33,6 +33,7 @@ gArmSgiAcpiTablesGuid =20 [FeaturePcd] + gArmSgiTokenSpaceGuid.PcdSdeiSupported gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported gArmSgiTokenSpaceGuid.PcdVirtioNetSupported =20 diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platfo= rm/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c index 2f72e7152ff3..9250243decb8 100644 --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c @@ -6,9 +6,16 @@ * **/ =20 +#include + #include +#include #include #include +#include + +#include + #include =20 VOID @@ -16,6 +23,71 @@ InitVirtioDevices ( VOID ); =20 +/** + Build and install the SDEI ACPI table. + + For platforms that allow firmware-first platform error handling, SDEI is= used + as the notification mechanism for those errors. Build and install the SD= EI + table to enable support for SDEI. + + @retval EFI_SUCCESS SDEI table installed successfully. + @retval Other For any error during installation. + +**/ +STATIC +EFI_STATUS +InstallSdeiTable (VOID) +{ + EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol =3D NULL; + EFI_ACPI_DESCRIPTION_HEADER Header; + EFI_STATUS Status; + UINTN AcpiTableHandle; + + Header =3D + (EFI_ACPI_DESCRIPTION_HEADER) { + EFI_ACPI_6_3_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE, + sizeof (EFI_ACPI_DESCRIPTION_HEADER), // Length + 0x01, // Revision + 0x00, // Checksum + {'A', 'R', 'M', 'L', 'T', 'D'}, // OemId + 0x4152464e49464552, // OemTableId:"REFINFRA" + 0x20201027, // OemRevision + 0x204d5241, // CreatorId:"ARM " + 0x00000001, // CreatorRevision + }; + + Header.Checksum =3D CalculateCheckSum8 ((UINT8 *)&Header, Header.Length); + Status =3D gBS->LocateProtocol ( + &gEfiAcpiTableProtocolGuid, + NULL, + (VOID **)&mAcpiTableProtocol + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "Failed to locate ACPI table protocol, status: %r\n", + Status + )); + return Status; + } + + Status =3D mAcpiTableProtocol->InstallAcpiTable ( + mAcpiTableProtocol, + &Header, + Header.Length, + &AcpiTableHandle + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "Failed to install SDEI ACPI table, status: %r\n", + Status + )); + } + + return Status; +} + EFI_STATUS EFIAPI ArmSgiPkgEntryPoint ( @@ -31,6 +103,13 @@ ArmSgiPkgEntryPoint ( return Status; } =20 + if (FeaturePcdGet (PcdSdeiSupported)) { + Status =3D InstallSdeiTable (); + if (EFI_ERROR (Status)) { + return Status; + } + } + InitVirtioDevices (); =20 return Status; --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#66828): https://edk2.groups.io/g/devel/message/66828 Mute This Topic: https://groups.io/mt/77913846/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 10 13:24:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+66829+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+66829+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1604070064; cv=none; d=zohomail.com; s=zohoarc; b=IEiT9iuK8dfgBa985hBB2R1WL3o5Y/Ssbp/fGYRgGE4oohYGsQASYBfgOqCMEh/9VUoF6Pr9GbCLdiirvMLOKb8F3RTLpgx5xJ7Ln5Ps3U9tehtydOAR0s+WPN29tqUu1JSo5/EUT+PlnGEafW5oVugQlJI/bTmuSHNBkgoVn1M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1604070064; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=UdVFbBLLv5LViMz6PuBjTo8AEhGnHiVPiNV2/qehAXE=; b=gUTRHcQ7sfShQS3d6WwfCiGYTGbIKC0u9ZxZaOOSVExTEHb8TuQnIf5qnqkygA9eQzNLJfw5JYquHvLcmsCNBKwSD09E+3xSmm6CV3UhD1qEvMljQ94UYB3enrV4/DsByBDoInlZjcLxeKlaktQh861aORpDczCTqzu14nYiNbQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+66829+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1604070064702841.9486134633736; Fri, 30 Oct 2020 08:01:04 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id hbghYY1788612xwFdhHQxqhg; Fri, 30 Oct 2020 08:01:01 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web08.10539.1604047330937049439 for ; Fri, 30 Oct 2020 01:42:11 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 845BB143D; Fri, 30 Oct 2020 01:42:10 -0700 (PDT) X-Received: from usa.arm.com (a076764.blr.arm.com [10.162.16.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DC2633F719; Fri, 30 Oct 2020 01:42:08 -0700 (PDT) From: "Omkar Anand Kulkarni" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar , Jiewen Yao Subject: [edk2-devel] [edk2-platforms][PATCH 3/6] Platform/Arm/Sgi: Install HEST ACPI table Date: Fri, 30 Oct 2020 14:11:53 +0530 Message-Id: <20201030084156.8291-4-omkar.kulkarni@arm.com> In-Reply-To: <20201030084156.8291-1-omkar.kulkarni@arm.com> References: <20201030084156.8291-1-omkar.kulkarni@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,omkar.kulkarni@arm.com X-Gm-Message-State: GrVQ5KxggNUAi4UBSL2GSOLcx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1604070061; bh=fYh/1n6bSHNr9j0NRn1WekqByVRk8+iAWdVUV0J3NgM=; h=Cc:Date:From:Reply-To:Subject:To; b=eF8xjVR175lj7cVFkiT0RELMUkw8Zzse70C//LFVduZgbaoexY4QxSPFQT29yC/DhCF 5vGepi9jM9iWL6mv3Rj7nmZQ1FeNE2gQMIs1rcEwSSYU07enn3PszFTrm6i+j5Pg/fcFS GZlSbofXnEi4pBBGjX7Svjbh9fiyNbTitLI= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" On SGI/RD platforms that publish the platform error source descriptors using the HEST table generation protocol, install the dynamically created HEST table. Co-authored-by: Thomas Abraham Signed-off-by: Omkar Anand Kulkarni --- Platform/ARM/SgiPkg/SgiPlatform.dec = | 1 + Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf = | 2 + Platform/ARM/SgiPkg/Drivers/PlatformDxe/{PlatformDxe.inf =3D> PlatformDxeM= m.inf} | 10 +++- Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c = | 52 ++++++++++++++++++++ 4 files changed, 63 insertions(+), 2 deletions(-) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiP= latform.dec index f139b90d81e3..099652734c0e 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -31,6 +31,7 @@ [PcdsFeatureFlag.common] gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|FALSE|BOOLEAN|0x00000001 gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|FALSE|BOOLEAN|0x00000010 + gArmSgiTokenSpaceGuid.PcdHestSupported|FALSE|BOOLEAN|0x0000000C gArmSgiTokenSpaceGuid.PcdSdeiSupported|FALSE|BOOLEAN|0x0000000D =20 [PcdsFixedAtBuild] diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Plat= form/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf index 2ea2c09e3920..448a22672a17 100644 --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf @@ -17,6 +17,7 @@ VirtioDevices.c =20 [Packages] + ArmPlatformPkg/ArmPlatformPkg.dec EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec OvmfPkg/OvmfPkg.dec @@ -33,6 +34,7 @@ gArmSgiAcpiTablesGuid =20 [FeaturePcd] + gArmSgiTokenSpaceGuid.PcdHestSupported gArmSgiTokenSpaceGuid.PcdSdeiSupported gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported gArmSgiTokenSpaceGuid.PcdVirtioNetSupported diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Plat= form/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxeMm.inf similarity index 77% copy from Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf copy to Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxeMm.inf index 2ea2c09e3920..980a4047aa37 100644 --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxeMm.inf @@ -1,5 +1,5 @@ # -# Copyright (c) 2018, ARM Limited. All rights reserved. +# Copyright (c) 2018-2020, ARM Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -17,6 +17,7 @@ VirtioDevices.c =20 [Packages] + ArmPlatformPkg/ArmPlatformPkg.dec EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec OvmfPkg/OvmfPkg.dec @@ -32,7 +33,12 @@ gArmSgiPlatformIdDescriptorGuid gArmSgiAcpiTablesGuid =20 +[Protocols] + gEfiAcpiTableProtocolGuid + gHestTableProtocolGuid + [FeaturePcd] + gArmSgiTokenSpaceGuid.PcdHestSupported gArmSgiTokenSpaceGuid.PcdSdeiSupported gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported gArmSgiTokenSpaceGuid.PcdVirtioNetSupported @@ -44,4 +50,4 @@ gArmSgiTokenSpaceGuid.PcdVirtioNetSize =20 [Depex] - TRUE + AFTER gArmPlatformHestErrorSourcesGuid diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platfo= rm/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c index 9250243decb8..9ea20357b87e 100644 --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c @@ -15,6 +15,7 @@ #include =20 #include +#include =20 #include =20 @@ -88,6 +89,50 @@ InstallSdeiTable (VOID) return Status; } =20 +/** + Install the HEST ACPI table. + + HEST ACPI table is used to list the platform errors for which the error + handling has been supported. Use the HEST table generation protocol to + install the HEST table. + + @retval EFI_SUCCESS SDEI table installed successfully. + @retval Other For any error during installation. + +**/ +STATIC +EFI_STATUS +InstallHestTable (VOID) +{ + HEST_TABLE_PROTOCOL *HestProtocol; + EFI_STATUS Status; + + Status =3D gBS->LocateProtocol ( + &gHestTableProtocolGuid, + NULL, + (VOID **)&HestProtocol + ); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "Failed to locate Hest Dxe Protocol, status: %r\n", + Status + )); + return Status; + } + + Status =3D HestProtocol->InstallHestTable (); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "Failed to install HEST table, status: %r\n", + Status + )); + } + + return Status; +} + EFI_STATUS EFIAPI ArmSgiPkgEntryPoint ( @@ -110,6 +155,13 @@ ArmSgiPkgEntryPoint ( } } =20 + if (FeaturePcdGet (PcdHestSupported)) { + Status =3D InstallHestTable (); + if (EFI_ERROR (Status)) { + return Status; + } + } + InitVirtioDevices (); =20 return Status; --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#66829): https://edk2.groups.io/g/devel/message/66829 Mute This Topic: https://groups.io/mt/77913847/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 10 13:24:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+66830+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+66830+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1604070068; cv=none; d=zohomail.com; s=zohoarc; b=dI3hwvuOZydHv4LdF2VE+aNjITdm9V4x6Qba7Jxdk6siBv49CJRFKaPbWKjZod0hPq66iz/iL9cfucTiJgs7u78VZUErkigAWpPuwWLlIprusXZubXL3D6E0G85kNJHn80HAyzMdrtMM0kB50heLtig9qDnDs2uUWDmeK0Lm53o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1604070068; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=CCTFpGTTSMiV+m/tbXmMjz7c4iZ8+uYLVo6UlgUHN44=; b=K94CoRGw9Ny80ZKOAPQT9ZQDmrQduHjrl4JPyUkmJ7mn+COrO3VT0VRhkjvftS57aS/N6bZax6GvmvsHlaYG1r+EwY4Uty+O4Trx5L2P3d+0SLVtVFhzMKZ5BqyhmdFuZTB1+bBb2mdbYPQYHI8TaO9b+b5ObNgSLD4NKApaJpk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+66830+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1604070068131598.832460779075; Fri, 30 Oct 2020 08:01:08 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id wwQ6YY1788612xUrhgnNC78Z; Fri, 30 Oct 2020 08:01:06 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web09.10734.1604047332925842277 for ; Fri, 30 Oct 2020 01:42:13 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9C436D6E; Fri, 30 Oct 2020 01:42:12 -0700 (PDT) X-Received: from usa.arm.com (a076764.blr.arm.com [10.162.16.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id F30E33F719; Fri, 30 Oct 2020 01:42:10 -0700 (PDT) From: "Omkar Anand Kulkarni" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar , Jiewen Yao Subject: [edk2-devel] [edk2-platforms][PATCH 4/6] Platform/Arm/Sgi: define memory region for GHES error status block Date: Fri, 30 Oct 2020 14:11:54 +0530 Message-Id: <20201030084156.8291-5-omkar.kulkarni@arm.com> In-Reply-To: <20201030084156.8291-1-omkar.kulkarni@arm.com> References: <20201030084156.8291-1-omkar.kulkarni@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,omkar.kulkarni@arm.com X-Gm-Message-State: F6Nzzdg84tMyk7nxZEuCHM3Hx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1604070066; bh=QlNJQdwI6E818bY5pKfYROK7pZ8pRyia9K9y2rAF6P4=; h=Cc:Date:From:Reply-To:Subject:To; b=UNjVAnDpzihsKjXP7oM9x4cZeSNhl8Vji5YZmu5rtU2SlvSyzdFlP836jvFg/3Ux+Zv avF4KqiIVfeIALdcTSvl0ONisVCp+ThOMTpn2Bzqpsrws37Uj+a/UzyG9QfK7Fz/fI/fv sFCSSNBQb9+oL2jlUvmD1lXvL4iFqvMhuCk= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Allow platforms to define the base address and size of the memory region that is reserved for MM drivers to populate the GHES generic error status block with information about the platform error. Co-authored-by: Thomas Abraham Signed-off-by: Omkar Anand Kulkarni --- Platform/ARM/SgiPkg/SgiPlatform.dec | 1 + Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 5 +++++ Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 11 ++++++++++- 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiP= latform.dec index 099652734c0e..5dd27c40d1e9 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -33,6 +33,7 @@ gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|FALSE|BOOLEAN|0x00000010 gArmSgiTokenSpaceGuid.PcdHestSupported|FALSE|BOOLEAN|0x0000000C gArmSgiTokenSpaceGuid.PcdSdeiSupported|FALSE|BOOLEAN|0x0000000D + gArmSgiTokenSpaceGuid.PcdGhesMmSupported|FALSE|BOOLEAN|0x0000000E =20 [PcdsFixedAtBuild] gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0|UINT64|0x00000002 diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Plat= form/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf index 464a7cde4513..f62dd1a1f00b 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf @@ -63,9 +63,14 @@ =20 gArmTokenSpaceGuid.PcdMmBufferBase gArmTokenSpaceGuid.PcdMmBufferSize + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferBase + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize =20 gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress =20 +[FeaturePcd] + gArmSgiTokenSpaceGuid.PcdGhesMmSupported + [Guids] gArmSgiPlatformIdDescriptorGuid gEfiHobListGuid ## CONSUMES ## SystemTable diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Pla= tform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c index e30819c5cd55..216b0de3522a 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c @@ -17,7 +17,8 @@ =20 // Total number of descriptors, including the final "end-of-table" descrip= tor. #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS \ - (11 + (FixedPcdGet32 (PcdChipCount) * 2)) + (11 + (FixedPcdGet32 (PcdChipCount) * 2)) + \ + (FeaturePcdGet (PcdGhesMmSupported)) =20 /** Returns the Virtual Memory Map of the platform. @@ -221,6 +222,14 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdMmBufferSize); VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_UNCACHED_UNBUFFERED; =20 +#if (FeaturePcdGet (PcdGhesMmSupported)) + // GHESv2 Generic Error Memory Space + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdGhesGenericEr= rorDataMmBufferBase); + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdGhesGenericEr= rorDataMmBufferBase); + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdGhesGenericEr= rorDataMmBufferSize); + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE; +#endif + // End of Table VirtualMemoryTable[++Index].PhysicalBase =3D 0; VirtualMemoryTable[Index].VirtualBase =3D 0; --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#66830): https://edk2.groups.io/g/devel/message/66830 Mute This Topic: https://groups.io/mt/77913848/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 10 13:24:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+66831+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+66831+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1604070071; cv=none; d=zohomail.com; s=zohoarc; b=grwoGl/3ijezieCRiUwhTGp5a3tHlEbbJ2tYscQU55rEdiAZsrSDa8EysKJz4FMxloxJGd3gG3NiKH4efu2BYywAtwPJwP7e+pDBzxVZifpq6HuLjvE89bYP5jQg/qJGFtoLN4asMzJkGMHMGg5uT4zMJ3amKyYk3znDUjZhW08= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1604070071; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=0Rgh7kWBnAsAAGPrHaMYEOoLBRVdMx4tDNDSoSaEY00=; b=CjGTPvjzGfaNmLMg4mJrxcK8yIHZkuA+xnmFzEIfydPKZ8g8nPBzHRjtrTZuFcql2WlCSX+Qx/iwL4aGjaKslIQ9V3trPEIXUeYKaK40bcLOjeGdGZRQeJQ2s4IQ3xmnUt0IR2fCKBaDMusJzn3iDc6WrK0EelO+IUp51/mvakI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+66831+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1604070071443104.36103536091593; Fri, 30 Oct 2020 08:01:11 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id vFQVYY1788612x2uMcibdHTu; Fri, 30 Oct 2020 08:01:09 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.10840.1604047335029405932 for ; Fri, 30 Oct 2020 01:42:15 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B2F59143D; Fri, 30 Oct 2020 01:42:14 -0700 (PDT) X-Received: from usa.arm.com (a076764.blr.arm.com [10.162.16.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 16B713F719; Fri, 30 Oct 2020 01:42:12 -0700 (PDT) From: "Omkar Anand Kulkarni" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar , Jiewen Yao Subject: [edk2-devel] [edk2-platforms][PATCH 5/6] Platform/Arm/Sgi: dmc-620 firmware-first error handling Date: Fri, 30 Oct 2020 14:11:55 +0530 Message-Id: <20201030084156.8291-6-omkar.kulkarni@arm.com> In-Reply-To: <20201030084156.8291-1-omkar.kulkarni@arm.com> References: <20201030084156.8291-1-omkar.kulkarni@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,omkar.kulkarni@arm.com X-Gm-Message-State: jpbo9EJWaW5VJiwuv8KHCfDhx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1604070069; bh=r/X0S8CKlZ3vQvPU/myokL3bqPWoCrBrQ+SLzSgBojo=; h=Cc:Date:From:Reply-To:Subject:To; b=RGw2tBezQx8WeiNc+bnkiN206r+37VHtgcQah91vNkU/c4DYJXwrd0ITqBe8AggpMLm F8cd3bcoMxaDM9prBoebaWvVOr9ElDQEjUAS40TRYkjP7OHJ72X+dkD9MSSom+fY2qjok kYcOf0gQ+XuKBJGo4ktO0A/6C1u5aLLp574= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Enable the use of HEST table generation protocol, GHES error source descriptor protocol and DMC-620 MM driver on SGI/RD platforms. This allows firmware-first error handling and reporting of DMC-620 memory controller's 1-bit DRAM ECC errors. Co-authored-by: Thomas Abraham Signed-off-by: Omkar Anand Kulkarni --- Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 34 ++++++++++++++++++++ Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc | 25 ++++++++++++++ Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf | 6 ++++ Platform/ARM/SgiPkg/SgiPlatform.fdf | 12 +++++++ 4 files changed, 77 insertions(+) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/= SgiPlatform.dsc.inc index f5f9f144eee9..1861beef57ef 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc @@ -84,6 +84,19 @@ gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|TRUE gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|TRUE =20 +!ifdef EDK2_ENABLE_HEST + gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE + gArmSgiTokenSpaceGuid.PcdHestSupported|TRUE +!endif + +!ifdef EDK2_ENABLE_SDEI + gArmSgiTokenSpaceGuid.PcdSdeiSupported|TRUE +!endif + +!ifdef EDK2_ENABLE_GHES_MM + gArmSgiTokenSpaceGuid.PcdGhesMmSupported|TRUE +!endif + [PcdsFixedAtBuild.common] gArmTokenSpaceGuid.PcdVFPEnabled|1 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 @@ -181,6 +194,12 @@ gArmTokenSpaceGuid.PcdMmBufferBase|0xFF600000 gArmTokenSpaceGuid.PcdMmBufferSize|0x10000 =20 +!ifdef EDK2_ENABLE_GHES_MM + ## GHESv2 Generic Error memory space + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferBase|0xFF610000 + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize|0x20000 +!endif + ##########################################################################= ###### # # Components Section - list of all EDK II Modules needed by this Platform @@ -257,7 +276,11 @@ # # platform driver # +!ifdef EDK2_ENABLE_GHES_MM + Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxeMm.inf +!else Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf +!endif =20 # # FAT filesystem + GPT/MBR partitioning @@ -314,3 +337,14 @@ MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf =20 ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf + + + # + # GHESv2 HEST error sources support + # +!ifdef EDK2_ENABLE_HEST + ArmPlatformPkg/Drivers/Apei/HestDxe/HestDxe.inf +!endif +!ifdef EDK2_ENABLE_GHES_MM + ArmPlatformPkg/Drivers/HestMmErrorSources/HestErrorSourceDxe.inf +!endif diff --git a/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc b/Platform/ARM/Sg= iPkg/PlatformStandaloneMm.dsc index 38bf6020ba4c..b9c8c386be12 100644 --- a/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc +++ b/Platform/ARM/SgiPkg/PlatformStandaloneMm.dsc @@ -94,6 +94,25 @@ =20 gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x2 =20 +!ifdef EDK2_ENABLE_GHES_MM + ## GHESv2 Generic Error Memory Space + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferBase|0xFF610000 + gArmPlatformTokenSpaceGuid.PcdGhesGenericErrorDataMmBufferSize|0x20000 +!endif + +!ifdef EDK2_ENABLE_DMC620_MM + ## DMC620 + gDmc620MmTokenSpaceGuid.PcdDmc620NumCtrl|2 + gDmc620MmTokenSpaceGuid.PcdDmc620RegisterBase|0x4E000000 + gDmc620MmTokenSpaceGuid.PcdDmc620CtrlSize|0x100000 + gDmc620MmTokenSpaceGuid.PcdDmc620CorrectableErrorThreshold|10 + gDmc620MmTokenSpaceGuid.PcdDmc620ErrSourceCount|1 + gDmc620MmTokenSpaceGuid.PcdDmc620DramErrorSdeiEventBase|804 + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataBase|0xFF610000 + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorDataSize|0x100 + gDmc620MmTokenSpaceGuid.PcdDmc620DramOneBitErrorSourceId|0 +!endif + ##########################################################################= ######################### # # Components Section - list of the modules and components that will be pro= cessed by compilation @@ -119,6 +138,12 @@ StandaloneMmPkg/Core/StandaloneMmCore.inf =20 [Components.AARCH64] +!ifdef EDK2_ENABLE_GHES_MM + ArmPlatformPkg/Drivers/HestMmErrorSources/HestErrorSourceStandaloneMm.inf +!endif +!ifdef EDK2_ENABLE_DMC620_MM + Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf +!endif StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf =20 ##########################################################################= ######################### diff --git a/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf b/Platform/ARM/Sg= iPkg/PlatformStandaloneMm.fdf index 5a0772cd8522..8eab45e35a8a 100644 --- a/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf +++ b/Platform/ARM/SgiPkg/PlatformStandaloneMm.fdf @@ -48,6 +48,12 @@ READ_STATUS =3D TRUE READ_LOCK_CAP =3D TRUE READ_LOCK_STATUS =3D TRUE =20 +!ifdef EDK2_ENABLE_GHES_MM + INF ArmPlatformPkg/Drivers/HestMmErrorSources/HestErrorSourceStandaloneM= m.inf +!endif +!ifdef EDK2_ENABLE_DMC620_MM + INF Platform/ARM/Drivers/Dmc620Mm/Dmc620Mm.inf +!endif INF StandaloneMmPkg/Core/StandaloneMmCore.inf INF StandaloneMmPkg/Drivers/StandaloneMmCpu/AArch64/StandaloneMmCpu.inf =20 diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiP= latform.fdf index 546021a8bf33..42dfdd06b003 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf @@ -164,10 +164,22 @@ READ_LOCK_STATUS =3D TRUE # MM Communicate INF ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.inf =20 + # Hest Error Source Support +!ifdef EDK2_ENABLE_HEST + INF ArmPlatformPkg/Drivers/Apei/HestDxe/HestDxe.inf +!endif +!ifdef EDK2_ENABLE_GHES_MM + INF ArmPlatformPkg/Drivers/HestMmErrorSources/HestErrorSourceDxe.inf +!endif + # # Platform driver # +!ifdef EDK2_ENABLE_GHES_MM + INF Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxeMm.inf +!else INF Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf +!endif =20 # # Bds --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#66831): https://edk2.groups.io/g/devel/message/66831 Mute This Topic: https://groups.io/mt/77913849/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 10 13:24:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+66832+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+66832+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=arm.com ARC-Seal: i=1; a=rsa-sha256; t=1604070080; cv=none; d=zohomail.com; s=zohoarc; b=fOrpC5YNKJq6CwbBdTo+C0qYH+l+EmrDc2puV6UUysgah6xJy/1g7TopAB6S0ijNsllkT8Klcmg3/1C60li7uJd6eTaxKvE8n1orbrJi5691miPsfvyznxDN5NQLH6ARus/HJxTC3hsJCG0VpeSQBWeZrq3jgsBFoZ6AgtPQI98= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1604070080; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=p2Lj8PEq9ZqAL1x6F4prR8NPCVYEaXrEmC9mWJST5+w=; b=GAVzj4nJ0ELbJ5xqQ+7aPzw2x3dcLT7h/8L3V3TwejX07pbQnUOqfzrYiOIYNSTYtvMB+JRVo+rpyRfHfagNHOKj2OULy/fQ02TBxQOrd9Ng8omeYEkZosec+WrWxHEOYDyHjMDF0sYEJLixj+oOAoXDlQcH5ZR40H1GMhHMMTM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+66832+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1604070080115138.51901874319094; Fri, 30 Oct 2020 08:01:20 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id LYHAYY1788612xUhrqnztXUS; Fri, 30 Oct 2020 08:01:18 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.10638.1604047337305469786 for ; Fri, 30 Oct 2020 01:42:17 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D3BA5D6E; Fri, 30 Oct 2020 01:42:16 -0700 (PDT) X-Received: from usa.arm.com (a076764.blr.arm.com [10.162.16.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2D8D83F719; Fri, 30 Oct 2020 01:42:14 -0700 (PDT) From: "Omkar Anand Kulkarni" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar , Jiewen Yao Subject: [edk2-devel] [edk2-platforms][PATCH 6/6] Platform/Arm/Sgi575: Define values for ACPI table header Date: Fri, 30 Oct 2020 14:11:56 +0530 Message-Id: <20201030084156.8291-7-omkar.kulkarni@arm.com> In-Reply-To: <20201030084156.8291-1-omkar.kulkarni@arm.com> References: <20201030084156.8291-1-omkar.kulkarni@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,omkar.kulkarni@arm.com X-Gm-Message-State: 9uBg2sJvpkGm4olpbulCf02jx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1604070078; bh=COJIQ0dAvo4/EFG5E9GRcqyf1SaxlUnVtzMrlnpo/dc=; h=Cc:Date:From:Reply-To:Subject:To; b=tUzC9UupckSmZyDGODxKRyJusJYN1V73hTVJPWjLc9ov/0Y+IY+ge2UBoqLE89ckQPT 7knG7lazkQH1MzCje2oI/3p/44dGbdpWXb688neHfq5k0xGo/Bndb8O8vREhwT8CC9IrP uGTOLPMKLTIe7PbZloFAygeTrN0yE4WbIa0= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" For ACPI tables that are generated dynamically, define the ACPI table header values that have to be used to build the table header. Co-authored-by: Thomas Abraham Signed-off-by: Omkar Anand Kulkarni --- Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc b/Platform/ARM/SgiPkg/Sg= i575/Sgi575.dsc index 60e2a88bb591..7d7e6ed151ef 100644 --- a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc +++ b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc @@ -41,6 +41,13 @@ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000 gArmSgiTokenSpaceGuid.PcdGicSize|0x100000 =20 + # ACPI Table Header IDs + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"ARMLTD" + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x4152464e494645= 52 # REFINFRA + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision|0x20200831 + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x204d5241 # ARM + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1 + ##########################################################################= ###### # # Components Section - list of all EDK II Modules needed by this Platform --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#66832): https://edk2.groups.io/g/devel/message/66832 Mute This Topic: https://groups.io/mt/77913850/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-