[edk2-devel] [PATCH] IntelFsp2Pkg/FspSecCore: LoadMicrocodeDefault() failed with padding in FV.

Cosmo Lai posted 1 patch 3 years, 5 months ago
Failed in applying to current master (apply log)
IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
[edk2-devel] [PATCH] IntelFsp2Pkg/FspSecCore: LoadMicrocodeDefault() failed with padding in FV.
Posted by Cosmo Lai 3 years, 5 months ago
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3017

Platform microcode FV may have padding between each version of microcode
binary, and current FSP-T/LoadMicrocodeDefault() cannot handle this case
and return not_found unexpectedly.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Cosmo Lai <cosmo.lai@intel.com>
---
 IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
index 7934eab6d7..7fd3d6d843 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
@@ -307,10 +307,6 @@ AdvanceFixedSize:
    add   esi, dword  1024
 
 CheckAddress:
-   ; Is valid Microcode start point ?
-   cmp   dword [esi + MicrocodeHdr.MicrocodeHdrVersion], 0ffffffffh
-   jz    Done
-
    ; Check UPD header revision
    cmp    byte [esp + LoadMicrocodeParamsFsp22.FspUpdHeaderRevision], 2
    jae    Fsp22UpdHeader1
@@ -341,6 +337,10 @@ Fsp22UpdHeader1:
    jmp   CheckMainHeader
 
 LoadMicrocodeDefault4:
+   ; Is valid Microcode start point ?
+   cmp   dword [esi + MicrocodeHdr.MicrocodeHdrVersion], 0ffffffffh
+   jz    Done
+
 LoadCheck:
    ; Get the revision of the current microcode update loaded
    mov   ecx, MSR_IA32_BIOS_SIGN_ID
-- 
2.16.2.windows.1



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Re: [edk2-devel] [PATCH] IntelFsp2Pkg/FspSecCore: LoadMicrocodeDefault() failed with padding in FV.
Posted by Chiu, Chasel 3 years, 5 months ago
Change pushed: 31e97bdae2c66e28c5c7df1340757304e1b76d41


> -----Original Message-----
> From: Cosmo Lai <cosmo.lai@intel.com>
> Sent: Thursday, October 22, 2020 10:51 AM
> To: devel@edk2.groups.io
> Cc: Lai, Cosmo <cosmo.lai@intel.com>; Ma, Maurice <maurice.ma@intel.com>;
> Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Zeng, Star
> <star.zeng@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>
> Subject: [PATCH] IntelFsp2Pkg/FspSecCore: LoadMicrocodeDefault() failed with
> padding in FV.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3017
> 
> Platform microcode FV may have padding between each version of microcode
> binary, and current FSP-T/LoadMicrocodeDefault() cannot handle this case and
> return not_found unexpectedly.
> 
> Cc: Maurice Ma <maurice.ma@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Signed-off-by: Cosmo Lai <cosmo.lai@intel.com>
> ---
>  IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> index 7934eab6d7..7fd3d6d843 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> @@ -307,10 +307,6 @@ AdvanceFixedSize:
>     add   esi, dword  1024
> 
>  CheckAddress:
> -   ; Is valid Microcode start point ?
> -   cmp   dword [esi + MicrocodeHdr.MicrocodeHdrVersion], 0ffffffffh
> -   jz    Done
> -
>     ; Check UPD header revision
>     cmp    byte [esp + LoadMicrocodeParamsFsp22.FspUpdHeaderRevision], 2
>     jae    Fsp22UpdHeader1
> @@ -341,6 +337,10 @@ Fsp22UpdHeader1:
>     jmp   CheckMainHeader
> 
>  LoadMicrocodeDefault4:
> +   ; Is valid Microcode start point ?
> +   cmp   dword [esi + MicrocodeHdr.MicrocodeHdrVersion], 0ffffffffh
> +   jz    Done
> +
>  LoadCheck:
>     ; Get the revision of the current microcode update loaded
>     mov   ecx, MSR_IA32_BIOS_SIGN_ID
> --
> 2.16.2.windows.1



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Re: [edk2-devel] [PATCH] IntelFsp2Pkg/FspSecCore: LoadMicrocodeDefault() failed with padding in FV.
Posted by Nate DeSimone 3 years, 5 months ago
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

> -----Original Message-----
> From: Cosmo Lai <cosmo.lai@intel.com>
> Sent: Wednesday, October 21, 2020 7:51 PM
> To: devel@edk2.groups.io
> Cc: Lai, Cosmo <cosmo.lai@intel.com>; Ma, Maurice
> <maurice.ma@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Zeng, Star <star.zeng@intel.com>; Chiu,
> Chasel <chasel.chiu@intel.com>
> Subject: [PATCH] IntelFsp2Pkg/FspSecCore: LoadMicrocodeDefault() failed
> with padding in FV.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3017
> 
> Platform microcode FV may have padding between each version of
> microcode binary, and current FSP-T/LoadMicrocodeDefault() cannot handle
> this case and return not_found unexpectedly.
> 
> Cc: Maurice Ma <maurice.ma@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Signed-off-by: Cosmo Lai <cosmo.lai@intel.com>
> ---
>  IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> index 7934eab6d7..7fd3d6d843 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> @@ -307,10 +307,6 @@ AdvanceFixedSize:
>     add   esi, dword  1024
> 
>  CheckAddress:
> -   ; Is valid Microcode start point ?
> -   cmp   dword [esi + MicrocodeHdr.MicrocodeHdrVersion], 0ffffffffh
> -   jz    Done
> -
>     ; Check UPD header revision
>     cmp    byte [esp + LoadMicrocodeParamsFsp22.FspUpdHeaderRevision], 2
>     jae    Fsp22UpdHeader1
> @@ -341,6 +337,10 @@ Fsp22UpdHeader1:
>     jmp   CheckMainHeader
> 
>  LoadMicrocodeDefault4:
> +   ; Is valid Microcode start point ?
> +   cmp   dword [esi + MicrocodeHdr.MicrocodeHdrVersion], 0ffffffffh
> +   jz    Done
> +
>  LoadCheck:
>     ; Get the revision of the current microcode update loaded
>     mov   ecx, MSR_IA32_BIOS_SIGN_ID
> --
> 2.16.2.windows.1



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Re: [edk2-devel] [PATCH] IntelFsp2Pkg/FspSecCore: LoadMicrocodeDefault() failed with padding in FV.
Posted by Chiu, Chasel 3 years, 5 months ago
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

> -----Original Message-----
> From: Cosmo Lai <cosmo.lai@intel.com>
> Sent: Thursday, October 22, 2020 10:51 AM
> To: devel@edk2.groups.io
> Cc: Lai, Cosmo <cosmo.lai@intel.com>; Ma, Maurice <maurice.ma@intel.com>;
> Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Zeng, Star
> <star.zeng@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>
> Subject: [PATCH] IntelFsp2Pkg/FspSecCore: LoadMicrocodeDefault() failed with
> padding in FV.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3017
> 
> Platform microcode FV may have padding between each version of microcode
> binary, and current FSP-T/LoadMicrocodeDefault() cannot handle this case and
> return not_found unexpectedly.
> 
> Cc: Maurice Ma <maurice.ma@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Signed-off-by: Cosmo Lai <cosmo.lai@intel.com>
> ---
>  IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> index 7934eab6d7..7fd3d6d843 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> @@ -307,10 +307,6 @@ AdvanceFixedSize:
>     add   esi, dword  1024
> 
>  CheckAddress:
> -   ; Is valid Microcode start point ?
> -   cmp   dword [esi + MicrocodeHdr.MicrocodeHdrVersion], 0ffffffffh
> -   jz    Done
> -
>     ; Check UPD header revision
>     cmp    byte [esp + LoadMicrocodeParamsFsp22.FspUpdHeaderRevision], 2
>     jae    Fsp22UpdHeader1
> @@ -341,6 +337,10 @@ Fsp22UpdHeader1:
>     jmp   CheckMainHeader
> 
>  LoadMicrocodeDefault4:
> +   ; Is valid Microcode start point ?
> +   cmp   dword [esi + MicrocodeHdr.MicrocodeHdrVersion], 0ffffffffh
> +   jz    Done
> +
>  LoadCheck:
>     ; Get the revision of the current microcode update loaded
>     mov   ecx, MSR_IA32_BIOS_SIGN_ID
> --
> 2.16.2.windows.1



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