From nobody Tue Feb 10 10:20:36 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+64616+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+64616+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1598362870; cv=none; d=zohomail.com; s=zohoarc; b=STwQB17+GbESTCBckY/6x0u7R78maxJz8oGwr3fbabNkDcqlEcH86Zfm/k42DkV1EPE7uIKVbgmA6+oR31AB7l3QWnSyZDoCpr54Z9b+v0cSNZy40OEttYaGhDQ3MbdyBUKGvYtMRnN2t0xE9tUihS2BHzZMMy/cadgos4F8C/s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1598362870; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=QPIw2t8f3gtTMDR1h9VSCEbHY5FctUT7iCs2ZqXupvs=; b=PBvEFbV5wCy2cVCBZFzQEhp06p5HzK925Zki9RzcROr9igjnNLFQbbdDhVP0X7RZnPf/tb84otTWxE/GosXoDG0VpyVKpPoS25cvofjDpl+j/rR+8LSmR2LqGIIWgIJS5enGGEM2Z1jiY6RmmRi10QUCx4uXF9/0m0vjNNFw+3g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+64616+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1598362870101430.5065682378457; Tue, 25 Aug 2020 06:41:10 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id eujbYY1788612xQaM2ZqUYUS; Tue, 25 Aug 2020 06:41:09 -0700 X-Received: from mail-pg1-f193.google.com (mail-pg1-f193.google.com [209.85.215.193]) by mx.groups.io with SMTP id smtpd.web10.13848.1598362869210990708 for ; Tue, 25 Aug 2020 06:41:09 -0700 X-Received: by mail-pg1-f193.google.com with SMTP id 31so4598942pgy.13 for ; Tue, 25 Aug 2020 06:41:09 -0700 (PDT) X-Gm-Message-State: 0IHFUYwt5MPKEcdsrzkWYnRax1787277AA= X-Google-Smtp-Source: ABdhPJwY8G/XWJSoIieyRUoUuZlDg/DockhD5YDz7O8ayAjE511RyD9Vqf/fmzt6PxfHAhK8Bd0txQ== X-Received: by 2002:a17:902:7596:: with SMTP id j22mr7641790pll.309.1598362868753; Tue, 25 Aug 2020 06:41:08 -0700 (PDT) X-Received: from bean-canyon.localdomain ([106.51.140.68]) by smtp.googlemail.com with ESMTPSA id z186sm3913768pfb.199.2020.08.25.06.41.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Aug 2020 06:41:08 -0700 (PDT) From: "Tanmay Jagdale" To: leif@nuviainc.com, graeme@nuviainc.com, devel@edk2.groups.io Cc: shashi.mallela@linaro.org, Tanmay Jagdale Subject: [edk2-devel] [PATCH v3 edk2-platforms 5/8] SbsaQemu: AcpiDxe: Create MADT table at runtime Date: Tue, 25 Aug 2020 19:09:55 +0530 Message-Id: <20200825133958.17372-6-tanmay.jagdale@linaro.org> In-Reply-To: <20200825133958.17372-1-tanmay.jagdale@linaro.org> References: <20200825133958.17372-1-tanmay.jagdale@linaro.org> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,tanmay.jagdale@linaro.org Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1598362869; bh=C7r6dX4MjOkuW0J0fYa/jyR48zkMqViEbXHSgNbE4m4=; h=Cc:Date:From:Reply-To:Subject:To; b=vlmHk4GLK+KDuVU1bxZgbuuy5a6Ua1JZezwqQbt/iNpRkFc3vRrK4Z0hZKBAoR6P/dQ ij0/cpEXrxYihV+CG1CpdIEpPgsrU8zF5ABsjHI4kCnJ0I2X9c4zVmkJbrUwSRNfIO5dV Oeid6aQtzhqOdiN+Bi6BTV3vrtB7Ip3BIOA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" - Add support to create MADT table at runtime. - Included a macro for GIC Redistributor structure initialisation. Signed-off-by: Tanmay Jagdale --- Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 20 ++- Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h | 15 ++ Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 156 ++= ++++++++++++++++++ 3 files changed, 190 insertions(+), 1 deletion(-) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index 3795a7e11639..8125e8ba7553 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -41,9 +41,27 @@ [LibraryClasses] UefiRuntimeServicesTableLib =20 [Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress =20 [Depex] - TRUE + gEfiAcpiTableProtocolGuid ## CONSUMES + +[Guids] + gEdkiiPlatformHasAcpiGuid + +[Protocols] + gEfiAcpiTableProtocolGuid ## CONSUMES + +[FixedPcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision + gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicRedistributorsBase + + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h = b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h index eac195b0585c..7a9a0061675f 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h @@ -22,6 +22,21 @@ FixedPcdGet32 (PcdAcpiDefaultCreatorRevision)/* UINT32 CreatorRevisio= n */ \ } =20 +// Defines for MADT +#define SBSAQEMU_MADT_GIC_VBASE 0x2c020000 +#define SBSAQEMU_MADT_GIC_HBASE 0x2c010000 +#define SBSAQEMU_MADT_GIC_PMU_IRQ 23 +#define SBSAQEMU_MADT_GICR_SIZE 0x4000000 + +// Macro for MADT GIC Redistributor Structure +#define SBSAQEMU_MADT_GICR_INIT() { = \ + EFI_ACPI_6_0_GICR, /* Type */ = \ + sizeof (EFI_ACPI_6_0_GICR_STRUCTURE), /* Length */ = \ + EFI_ACPI_RESERVED_WORD, /* Reserved */ = \ + FixedPcdGet32 (PcdGicRedistributorsBase), /* DiscoveryRangeBaseAddress = */ \ + SBSAQEMU_MADT_GICR_SIZE /* DiscoveryRangeLength */ = \ + } + #define SBSAQEMU_UART0_BASE 0x60000000 =20 #define SBSAQEMU_PCI_SEG0_CONFIG_BASE 0xf0000000 diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index 75abdae3b8ce..16cb4e904e6f 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -6,11 +6,17 @@ * SPDX-License-Identifier: BSD-2-Clause-Patent * **/ +#include +#include +#include +#include #include +#include #include #include #include #include +#include #include #include =20 @@ -61,6 +67,137 @@ CountCpusFromFdt ( ASSERT_RETURN_ERROR (PcdStatus); } =20 +/* + * A Function to Compute the ACPI Table Checksum + */ +VOID +AcpiPlatformChecksum ( + IN UINT8 *Buffer, + IN UINTN Size + ) +{ + UINTN ChecksumOffset; + + ChecksumOffset =3D OFFSET_OF (EFI_ACPI_DESCRIPTION_HEADER, Checksum); + + // Set checksum field to 0 since it is used as part of the calculation + Buffer[ChecksumOffset] =3D 0; + + Buffer[ChecksumOffset] =3D CalculateCheckSum8(Buffer, Size); +} + +/* + * A function that add the MADT ACPI table. + IN EFI_ACPI_COMMON_HEADER *CurrentTable + */ +EFI_STATUS +AddMadtTable ( + IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable + ) +{ + EFI_STATUS Status; + UINTN TableHandle; + UINT32 TableSize; + EFI_PHYSICAL_ADDRESS PageAddress; + UINT8 *New; + UINT32 NumCores; + + // Initialize MADT ACPI Header + EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header =3D { + SBSAQEMU_ACPI_HEADER (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SI= GNATURE, + EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HE= ADER, + EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_RE= VISION), + 0, 0 }; + + // Initialize GICC Structure + EFI_ACPI_6_0_GIC_STRUCTURE Gicc =3D EFI_ACPI_6_0_GICC_STRUCTURE_INIT ( + 0, /* GicID */ + 0, /* AcpiCpuUid */ + 0, /* Mpidr */ + EFI_ACPI_6_0_GIC_ENABLED, /* Flags */ + SBSAQEMU_MADT_GIC_PMU_IRQ, /* PMU Irq */ + FixedPcdGet32 (PcdGicDistributorBase), /* PhysicalBaseAddress */ + SBSAQEMU_MADT_GIC_VBASE, /* GicVBase */ + SBSAQEMU_MADT_GIC_HBASE, /* GicHBase */ + 25, /* GsivId */ + 0, /* GicRBase */ + 0 /* Efficiency */ + ); + + // Initialize GIC Distributor Structure + EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE Gicd =3D + EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT ( + 0, + FixedPcdGet32 (PcdGicDistributorBase), + 0, + 3 /* GicVersion */ + ); + + // Initialize GIC Redistributor Structure + EFI_ACPI_6_0_GICR_STRUCTURE Gicr =3D SBSAQEMU_MADT_GICR_INIT(); + + // Get CoreCount which was determined eariler after parsing device tree + NumCores =3D PcdGet32 (PcdCoreCount); + + // Calculate the new table size based on the number of cores + TableSize =3D sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADE= R) + + (sizeof (EFI_ACPI_6_0_GIC_STRUCTURE) * NumCores) + + sizeof (EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE) + + sizeof (EFI_ACPI_6_0_GICR_STRUCTURE); + + Status =3D gBS->AllocatePages ( + AllocateAnyPages, + EfiACPIReclaimMemory, + EFI_SIZE_TO_PAGES (TableSize), + &PageAddress + ); + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "Failed to allocate pages for MADT table\n")); + return EFI_OUT_OF_RESOURCES; + } + + New =3D (UINT8 *)(UINTN) PageAddress; + ZeroMem (New, TableSize); + + // Add the ACPI Description table header + CopyMem (New, &Header, sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TA= BLE_HEADER)); + ((EFI_ACPI_DESCRIPTION_HEADER*) New)->Length =3D TableSize; + New +=3D sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER); + + // Add new GICC structures for the Cores + for (NumCores =3D 0; NumCores < PcdGet32 (PcdCoreCount); NumCores++) { + EFI_ACPI_6_0_GIC_STRUCTURE *GiccPtr; + + CopyMem (New, &Gicc, sizeof (EFI_ACPI_6_0_GIC_STRUCTURE)); + GiccPtr =3D (EFI_ACPI_6_0_GIC_STRUCTURE *) New; + GiccPtr->AcpiProcessorUid =3D NumCores; + GiccPtr->MPIDR =3D NumCores; + New +=3D sizeof (EFI_ACPI_6_0_GIC_STRUCTURE); + } + + // GIC Distributor Structure + CopyMem (New, &Gicd, sizeof (EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE)); + New +=3D sizeof (EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE); + + // GIC ReDistributor Structure + CopyMem (New, &Gicr, sizeof (EFI_ACPI_6_0_GICR_STRUCTURE)); + New +=3D sizeof (EFI_ACPI_6_0_GICR_STRUCTURE); + + AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize); + + Status =3D AcpiTable->InstallAcpiTable ( + AcpiTable, + (EFI_ACPI_COMMON_HEADER *)PageAddress, + TableSize, + &TableHandle + ); + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "Failed to install MADT table\n")); + } + + return Status; +} + EFI_STATUS EFIAPI InitializeSbsaQemuAcpiDxe ( @@ -68,8 +205,27 @@ InitializeSbsaQemuAcpiDxe ( IN EFI_SYSTEM_TABLE *SystemTable ) { + EFI_STATUS Status; + EFI_ACPI_TABLE_PROTOCOL *AcpiTable; + // Parse the device tree and get the number of CPUs CountCpusFromFdt (); =20 + // Check if ACPI Table Protocol has been installed + Status =3D gBS->LocateProtocol ( + &gEfiAcpiTableProtocolGuid, + NULL, + (VOID **)&AcpiTable + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Failed to locate ACPI Table Protocol\n")); + return Status; + } + + Status =3D AddMadtTable (AcpiTable); + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "Failed to add MADT table\n")); + } + return EFI_SUCCESS; } --=20 2.28.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#64616): https://edk2.groups.io/g/devel/message/64616 Mute This Topic: https://groups.io/mt/76406685/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-