From nobody Tue Nov 26 01:44:03 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+61943+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+61943+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1593666937; cv=none; d=zohomail.com; s=zohoarc; b=mJZ+1AzLDXVMG8SL7HMZf0Dt8nyGTjOd2LxH9H46us3UDiBZ8ETlnuWmpsCVtQFT87R2c/i4sPy/eb9Ry6H6AOKQMesWn5oNiDRN9kBqku/O1e8pMcsSdEGiDoNrJ5DnZeZsiN7TX67XKY4b1RhWYBCTf5eKE4HMZfXEAlklPvc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1593666937; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=tPCWsCaIHLC/uo/BGPudCQUBjO4Tg7XX+b+7YltrwRk=; b=B8STXYGzXyPawGmvez81Rx7KfEzLBVewoUZD93fLcrtAi1XnLIEKcY4gD2YbLgyRWaS5XW3l5qtGFBv+CoK1pKDO+AGz3yBFWQiDMlhgZYtmu5Eo5WpHB8XPag/sbt3YTVpjZGaCfZJafe9c6RHrgMBeN28Lib7J1Avp1E3EpuM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+61943+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1593666937635279.51838264386345; Wed, 1 Jul 2020 22:15:37 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id tBe8YY1788612x8tRB1AVQpd; Wed, 01 Jul 2020 22:15:37 -0700 X-Received: from mga06.intel.com (mga06.intel.com []) by mx.groups.io with SMTP id smtpd.web10.360.1593666932487247443 for ; Wed, 01 Jul 2020 22:15:36 -0700 IronPort-SDR: a4F0kTU3kQ7V9bRsXmdrBK1Hkra399tgw9/R65lvG/1welMLjsGDY01HjIEZbcC7zbLf0pFsGq R+WfJANK4Rwg== X-IronPort-AV: E=McAfee;i="6000,8403,9669"; a="208319024" X-IronPort-AV: E=Sophos;i="5.75,302,1589266800"; d="scan'208";a="208319024" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jul 2020 22:15:36 -0700 IronPort-SDR: 4b+RuCQGaqwfRwxJwEDCf9/cb9W5w0ExlZ5xynTaJ2QhycNvu98TJweA4RZARK+2qtEp5+8XZP enV6WrS+F7Pw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,302,1589266800"; d="scan'208";a="455384873" X-Received: from guominji-mobl.ccr.corp.intel.com ([10.238.4.95]) by orsmga005.jf.intel.com with ESMTP; 01 Jul 2020 22:15:34 -0700 From: "Guomin Jiang" To: devel@edk2.groups.io Cc: Michael Kubacki , Eric Dong , Ray Ni , Laszlo Ersek , Rahul Kumar Subject: [edk2-devel] [PATCH v2 2/9] UefiCpuPkg/CpuMpPei: Add GDT and IDT migration support (CVE-2019-11098) Date: Thu, 2 Jul 2020 13:15:18 +0800 Message-Id: <20200702051525.1102-3-guomin.jiang@intel.com> In-Reply-To: <20200702051525.1102-1-guomin.jiang@intel.com> References: <20200702051525.1102-1-guomin.jiang@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,guomin.jiang@intel.com X-Gm-Message-State: 2RxO9yIsiwXFv4abongD5YQax1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1593666937; bh=SBPZPee7Vd+W2NgFpxOCsK/W3gknCXxvM88sm2mQp44=; h=Cc:Date:From:Reply-To:Subject:To; b=ewWe2+OFQ8jSi9E5wI91u8NvnVxSjGIGml+2ZHs0rfO/udQdrYBmgVCiTMVe8j/sYgY K/EfoMBC/iEF3ex6iKC68cYOPdTtIoXguLKTGeXTomRpslNXbKAaDLE/Oq9hicpHz+vAd HDWM6Ux03rX2srIrMaCHB6CT2gB8Go7bxj8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D1614 Moves the GDT and IDT to permanent memory in a memory discovered callback. This is done to ensure the GDT and IDT authenticated in pre-memory is not fetched from outside a verified location after the permanent memory transition. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Rahul Kumar Signed-off-by: Michael Kubacki --- UefiCpuPkg/CpuMpPei/CpuMpPei.c | 40 ++++++++++++++++++- UefiCpuPkg/CpuMpPei/CpuMpPei.h | 13 ++++++ UefiCpuPkg/CpuMpPei/CpuPaging.c | 14 +++++-- .../Ia32/ArchExceptionHandler.c | 4 +- .../SecPeiCpuException.c | 2 +- 5 files changed, 65 insertions(+), 8 deletions(-) diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.c b/UefiCpuPkg/CpuMpPei/CpuMpPei.c index 07ccbe7c6a91..2d6f1bc98851 100644 --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.c +++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.c @@ -429,6 +429,44 @@ GetGdtr ( AsmReadGdtr ((IA32_DESCRIPTOR *)Buffer); } =20 +/** + Migrates the Global Descriptor Table (GDT) to permanent memory. + + @retval EFI_SUCCESS The GDT was migrated successfully. + @retval EFI_OUT_OF_RESOURCES The GDT could not be migrated due to lac= k of available memory. + +**/ +EFI_STATUS +EFIAPI +MigrateGdt ( + VOID + ) +{ + EFI_STATUS Status; + UINTN GdtBufferSize; + IA32_DESCRIPTOR Gdtr; + UINT8 *GdtBuffer; + + AsmReadGdtr ((IA32_DESCRIPTOR *) &Gdtr); + GdtBufferSize =3D sizeof (IA32_TSS_DESCRIPTOR) + Gdtr.Limit + 1; + + Status =3D PeiServicesAllocatePool ( + GdtBufferSize, + (VOID **) &GdtBuffer + ); + ASSERT (GdtBuffer !=3D NULL); + if (EFI_ERROR (Status)) { + return EFI_OUT_OF_RESOURCES; + } + + GdtBuffer =3D ALIGN_POINTER (GdtBuffer, sizeof (IA32_TSS_DESCRIPTOR)); + CopyMem ((VOID *) (UINTN) GdtBuffer, (VOID *) Gdtr.Base, Gdtr.Limit + 1); + Gdtr.Base =3D (UINT32)(UINTN) GdtBuffer; + AsmWriteGdtr (&Gdtr); + + return EFI_SUCCESS; +} + /** Initializes CPU exceptions handlers for the sake of stack switch require= ment. =20 @@ -644,7 +682,7 @@ InitializeCpuMpWorker ( &gEfiVectorHandoffInfoPpiGuid, 0, NULL, - (VOID **)&VectorHandoffInfoPpi + (VOID **) &VectorHandoffInfoPpi ); if (Status =3D=3D EFI_SUCCESS) { VectorInfo =3D VectorHandoffInfoPpi->Info; diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.h b/UefiCpuPkg/CpuMpPei/CpuMpPei.h index 7d5c527d6006..5dc956409594 100644 --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.h +++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.h @@ -397,6 +397,19 @@ SecPlatformInformation2 ( OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2 ); =20 +/** + Migrates the Global Descriptor Table (GDT) to permanent memory. + + @retval EFI_SUCCESS The GDT was migrated successfully. + @retval EFI_OUT_OF_RESOURCES The GDT could not be migrated due to lac= k of available memory. + +**/ +EFI_STATUS +EFIAPI +MigrateGdt ( + VOID + ); + /** Initializes MP and exceptions handlers. =20 diff --git a/UefiCpuPkg/CpuMpPei/CpuPaging.c b/UefiCpuPkg/CpuMpPei/CpuPagin= g.c index a462e7ee1e38..d0cbebf70bbf 100644 --- a/UefiCpuPkg/CpuMpPei/CpuPaging.c +++ b/UefiCpuPkg/CpuMpPei/CpuPaging.c @@ -152,7 +152,7 @@ GetPhysicalAddressWidth ( Get the type of top level page table. =20 @retval Page512G PML4 paging. - @retval Page1G PAE paing. + @retval Page1G PAE paging. =20 **/ PAGE_ATTRIBUTE @@ -582,7 +582,7 @@ SetupStackGuardPage ( } =20 /** - Enabl/setup stack guard for each processor if PcdCpuStackGuard is set to= TRUE. + Enable/setup stack guard for each processor if PcdCpuStackGuard is set t= o TRUE. =20 Doing this in the memory-discovered callback is to make sure the Stack G= uard feature to cover as most PEI code as possible. @@ -602,8 +602,14 @@ MemoryDiscoveredPpiNotifyCallback ( IN VOID *Ppi ) { - EFI_STATUS Status; - BOOLEAN InitStackGuard; + EFI_STATUS Status; + BOOLEAN InitStackGuard; + BOOLEAN InterruptState; + + InterruptState =3D SaveAndDisableInterrupts (); + Status =3D MigrateGdt (); + ASSERT_EFI_ERROR (Status); + SetInterruptState (InterruptState); =20 // // Paging must be setup first. Otherwise the exception TSS setup during = MP diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHa= ndler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandl= er.c index 1aafb7dac139..903449e0daa9 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c @@ -18,8 +18,8 @@ **/ VOID ArchUpdateIdtEntry ( - IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry, - IN UINTN InterruptHandler + OUT IA32_IDT_GATE_DESCRIPTOR *IdtEntry, + IN UINTN InterruptHandler ) { IdtEntry->Bits.OffsetLow =3D (UINT16)(UINTN)InterruptHandler; diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c= b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c index 20148db74cf8..d4ae153c5742 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c @@ -87,7 +87,7 @@ InitializeCpuExceptionHandlers ( IdtEntryCount =3D (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESC= RIPTOR); if (IdtEntryCount > CPU_EXCEPTION_NUM) { // - // CPU exeption library only setup CPU_EXCEPTION_NUM exception handler= at most + // CPU exception library only setup CPU_EXCEPTION_NUM exception handle= r at most // IdtEntryCount =3D CPU_EXCEPTION_NUM; } --=20 2.25.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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