From nobody Mon May 6 02:02:55 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+60714+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+60714+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1591256639; cv=none; d=zohomail.com; s=zohoarc; b=ODj53P8hgV79XLrIlJMzGgNfaDqhherNRq7NT/COcSEkLns8iWGlimUYaq1lU4glxr8uUcnZaq7AqYqldBRip5C7D4Vkfy3WihJ9L6dbX93u+VXtnJS8a1LubIppbodZwfv6+aw08Cd6TQZgGZxFSQhsX8YRlUBS0pPvGS5ibPk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591256639; h=Cc:Date:From:List-Id:List-Unsubscribe:Message-ID:Reply-To:Sender:Subject:To; bh=j8Buu37BRZPCZ7KxY0tkZOYGBPXNV+gTEZ8CiF8UE8E=; b=QZE8mRLNYlTa1ZsJNXAeGOBty6F8xWBocee/1UTJdG1Ad831UxNS6G2DZ60qX2MYawailftPfvKUPYfLeH9+u2FAnc4gH+qCdp7D4mhFuunD1jaFvfnQYqkHKwUUTqIjmi6jmVE+PWRqkkpUNzsC4zYmRbCmI9ySpwNUfu1LUS0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+60714+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1591256639937231.65897944964706; Thu, 4 Jun 2020 00:43:59 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id OtnBYY1788612xGqSYuhfRVV; Thu, 04 Jun 2020 00:43:59 -0700 X-Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web12.8943.1591256638549957522 for ; Thu, 04 Jun 2020 00:43:58 -0700 IronPort-SDR: cy6Wnduns+wvLqQSug5IMpYCEL6KLGpjz3raunOpLx1UvvuDWdFJp1efKelK91q1sI22Po/aoa rYetw6x27V9w== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jun 2020 00:43:56 -0700 IronPort-SDR: VGg0pTYG0jyoyygZQT+d1L+TbpushskPX3KphaTUkefW4+V4i+nu/KNyNaXfdbD9b1aii6HAFY eTNB8Hmu/j2w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,471,1583222400"; d="scan'208";a="304839658" X-Received: from cchiu4-mobl1.gar.corp.intel.com ([10.254.103.13]) by orsmga008.jf.intel.com with ESMTP; 04 Jun 2020 00:43:50 -0700 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Maurice Ma , Nate DeSimone , Star Zeng Subject: [edk2-devel] [PATCH] IntelFsp2Pkg: Add FSP*_ARCH_UPD. Date: Thu, 4 Jun 2020 15:43:22 +0800 Message-Id: <20200604074322.17336-1-chasel.chiu@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,chasel.chiu@intel.com X-Gm-Message-State: B2cP7CNjQiFTBXvkpZ0gBo1Wx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1591256639; bh=+YO6b2+/vCOhqoqXndLa01yLXM7FH+yROGahXVUk1EE=; h=Cc:Date:From:Reply-To:Subject:To; b=PCp7OAVeISzAWCyyhQSjvhO03JZoIrYsFWNPXh4O48DbdDJdBpggE7kBzsampPiZN6t YBW/LsUcUPjQhrsJvMvleXSPddRyujhv8u7+3f/jM6QRfoJyE/+yYXWfVOj7CRkLhS74z BgLi0puBDdTBwQQk4VXAH5DYqoVin+q4dJc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2781 Introduce FSPT_ARCH_UPD and FSPS_ARCH_UPD to support debug events and multi-phase silicon initialization. Cc: Maurice Ma Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu --- IntelFsp2Pkg/Include/FspEas/FspApi.h | 55 ++++++++++++++++++++++++++++++++= +++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h b/IntelFsp2Pkg/Include/Fs= pEas/FspApi.h index ed40f9538c..88c5b49e61 100644 --- a/IntelFsp2Pkg/Include/FspEas/FspApi.h +++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h @@ -106,6 +106,27 @@ typedef struct { } FSP_UPD_HEADER; =20 /// +/// FSPT_ARCH_UPD Configuration. +/// +typedef struct { + /// + /// Revision Revision of the structure is 1 for this version of the spec= ification. + /// + UINT8 Revision; + UINT8 Reserved[3]; + /// + /// Length Length of the structure in bytes. The current value for this = field is 32. + /// + UINT32 Length; + /// + /// FspDebugHandler Optional debug handler for the bootloader to receive= debug messages + /// occurring during FSP execution. + /// + FSP_DEBUG_HANDLER FspDebugHandler; + UINT8 Reserved1[20]; +} FSPT_ARCH_UPD; + +/// /// FSPM_ARCH_UPD Configuration. /// typedef struct { @@ -146,6 +167,32 @@ typedef struct { UINT8 Reserved1[4]; } FSPM_ARCH_UPD; =20 +typedef struct { + /// + /// Revision Revision of the structure is 1 for this version of the spec= ification. + /// + UINT8 Revision; + UINT8 Reserved[3]; + /// + /// Length Length of the structure in bytes. The current value for this = field is 32. + /// + UINT32 Length; + /// + /// FspEventHandler Optional event handler for the bootloader to be info= rmed of events + /// occurring during FSP execution. + /// + FSP_EVENT_HANDLER FspEventHandler; + /// + /// A FSP binary may optionally implement multi-phase silicon initializa= tion, + /// This is only supported if the FspMultiPhaseSiInitEntryOffset field i= n FSP_INFO_HEADER + /// is non-zero. + /// To enable multi-phase silicon initialization, the bootloader must set + /// EnableMultiPhaseSiliconInit to a non-zero value. + /// + UINT8 EnableMultiPhaseSiliconInit; + UINT8 Reserved1[19]; +} FSPS_ARCH_UPD; + /// /// FSPT_UPD_COMMON Configuration. /// @@ -154,6 +201,10 @@ typedef struct { /// FSP_UPD_HEADER Configuration. /// FSP_UPD_HEADER FspUpdHeader; + /// + /// FSPT_ARCH_UPD Configuration. + /// + FSPT_ARCH_UPD FsptArchUpd; } FSPT_UPD_COMMON; =20 /// @@ -178,6 +229,10 @@ typedef struct { /// FSP_UPD_HEADER Configuration. /// FSP_UPD_HEADER FspUpdHeader; + /// + /// FSPS_ARCH_UPD Configuration. + /// + FSPS_ARCH_UPD FspsArchUpd; } FSPS_UPD_COMMON; =20 /// --=20 2.13.3.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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