From nobody Sat May 4 19:23:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+59051+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+59051+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1589180827; cv=none; d=zohomail.com; s=zohoarc; b=M4CJfdzS8UJDRrj5JITr1Fl1eyCw1QDngz0Nq/bs8mrwNdRIeT3IPirDeeAmiPejwB0956ggbLWK3oQZH2Vuk+dZa+vzMwxLFru2G3LAtpVuilBm2MQl7QKOFDhSWLnvRTbZ6/brWF11Q4UQg1MpqnIo4IeOD7CFSNeMJMEwAn0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589180827; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=5rdboxpiwytCFGa/xg1qqX/4YF/CuE2k1bHNhXl65p8=; b=ejeFXIsFoaYOtLxaYZwKFHWR7mhYGHJwStsHm8Srjidkuf/gxkBALzFnbaJbmEsUwnsT8IlZ8v5W233yF+hHRd5gb5wciYT+wKXQlvDDC9JALwVSBdjqu4Ba7H/4Rx+a4/wKGZQ6bwMaGbj10Cs+QmeaBLDX+f/82aInUf0psgU= ARC-Authentication-Results: i=1; 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ard.biesheuvel@arm.com X-Gm-Message-State: iLcavHgmlNKNWDkU9HDSUpgEx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1589180826; bh=sUPDdkvoNEdnaa0VSyJm6SlqoWJToLi2NngbJTuuvgA=; h=Cc:Date:From:Reply-To:Subject:To; b=GpdsLqbRD4+HQGskFBmQfJwISC64lukGG73rM8KjXV5jXhqqugq9B3w5m9mX0NlaoDE L3NCMJhLoedl5eyRSXwzV+O8apFPkeC3WnN+nwThoctUNPAIinMliJDF8sNuTEiXuAXjZ Pg+s5IEGpZt1LxVkZ2J9CJ3tgj4NkfEcuTo= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Ard Biesheuvel --- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c | 672 ++++++++++-----= ----- 1 file changed, 340 insertions(+), 332 deletions(-) diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon= /Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c index d471b1cadadc..af7c06656433 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c @@ -31,13 +31,13 @@ STATIC UINT32 GenetMmioRead ( - IN GENET_PRIVATE_DATA *Genet, - IN UINT32 Offset - ) + IN GENET_PRIVATE_DATA *Genet, + IN UINT32 Offset + ) { - ASSERT((Offset & 3) =3D=3D 0); + ASSERT ((Offset & 3) =3D=3D 0); =20 - return MmioRead32 (Genet->RegBase + Offset); + return MmioRead32 (Genet->RegBase + Offset); } =20 /** @@ -53,15 +53,15 @@ GenetMmioRead ( STATIC VOID GenetMmioWrite ( - IN GENET_PRIVATE_DATA *Genet, - IN UINT32 Offset, - IN UINT32 Data - ) + IN GENET_PRIVATE_DATA *Genet, + IN UINT32 Offset, + IN UINT32 Data + ) { - ASSERT((Offset & 3) =3D=3D 0); + ASSERT ((Offset & 3) =3D=3D 0); =20 - ArmDataSynchronizationBarrier (); - MmioWrite32 (Genet->RegBase + Offset, Data); + ArmDataSynchronizationBarrier (); + MmioWrite32 (Genet->RegBase + Offset, Data); } =20 /** @@ -79,37 +79,38 @@ GenetMmioWrite ( EFI_STATUS EFIAPI GenetPhyRead ( - IN VOID *Priv, - IN UINT8 PhyAddr, - IN UINT8 Reg, - OUT UINT16 *Data - ) + IN VOID *Priv, + IN UINT8 PhyAddr, + IN UINT8 Reg, + OUT UINT16 *Data + ) { - GENET_PRIVATE_DATA *Genet =3D Priv; - UINTN Retry; - UINT32 Value; + GENET_PRIVATE_DATA *Genet =3D Priv; + UINTN Retry; + UINT32 Value; =20 - Value =3D GENET_MDIO_READ | - GENET_MDIO_START_BUSY | - __SHIFTIN(PhyAddr, GENET_MDIO_PMD) | - __SHIFTIN(Reg, GENET_MDIO_REG); - GenetMmioWrite (Genet, GENET_MDIO_CMD, Value); + Value =3D GENET_MDIO_READ | + GENET_MDIO_START_BUSY | + __SHIFTIN(PhyAddr, GENET_MDIO_PMD) | + __SHIFTIN(Reg, GENET_MDIO_REG); + GenetMmioWrite (Genet, GENET_MDIO_CMD, Value); =20 - for (Retry =3D GENET_PHY_RETRY; Retry > 0; Retry--) { - Value =3D GenetMmioRead (Genet, GENET_MDIO_CMD); - if ((Value & GENET_MDIO_START_BUSY) =3D=3D 0) { - *Data =3D Value & 0xffff; - break; - } - gBS->Stall (10); + for (Retry =3D GENET_PHY_RETRY; Retry > 0; Retry--) { + Value =3D GenetMmioRead (Genet, GENET_MDIO_CMD); + if ((Value & GENET_MDIO_START_BUSY) =3D=3D 0) { + *Data =3D Value & 0xffff; + break; } + gBS->Stall (10); + } =20 - if (Retry =3D=3D 0) { - DEBUG ((DEBUG_ERROR, "GenetPhyRead: Timeout reading PhyAddr %d, Re= g %d\n", PhyAddr, Reg)); - return EFI_DEVICE_ERROR; - } + if (Retry =3D=3D 0) { + DEBUG ((DEBUG_ERROR, + "GenetPhyRead: Timeout reading PhyAddr %d, Reg %d\n", PhyAddr, Reg)); + return EFI_DEVICE_ERROR; + } =20 - return EFI_SUCCESS; + return EFI_SUCCESS; } =20 /** @@ -127,36 +128,37 @@ GenetPhyRead ( EFI_STATUS EFIAPI GenetPhyWrite ( - IN VOID *Priv, - IN UINT8 PhyAddr, - IN UINT8 Reg, - IN UINT16 Data - ) + IN VOID *Priv, + IN UINT8 PhyAddr, + IN UINT8 Reg, + IN UINT16 Data + ) { - GENET_PRIVATE_DATA *Genet =3D Priv; - UINTN Retry; - UINT32 Value; + GENET_PRIVATE_DATA *Genet =3D Priv; + UINTN Retry; + UINT32 Value; =20 - Value =3D GENET_MDIO_WRITE | - GENET_MDIO_START_BUSY | - __SHIFTIN(PhyAddr, GENET_MDIO_PMD) | - __SHIFTIN(Reg, GENET_MDIO_REG); - GenetMmioWrite (Genet, GENET_MDIO_CMD, Value | Data); + Value =3D GENET_MDIO_WRITE | + GENET_MDIO_START_BUSY | + __SHIFTIN(PhyAddr, GENET_MDIO_PMD) | + __SHIFTIN(Reg, GENET_MDIO_REG); + GenetMmioWrite (Genet, GENET_MDIO_CMD, Value | Data); =20 - for (Retry =3D GENET_PHY_RETRY; Retry > 0; Retry--) { - Value =3D GenetMmioRead (Genet, GENET_MDIO_CMD); - if ((Value & GENET_MDIO_START_BUSY) =3D=3D 0) { - break; - } - gBS->Stall (10); + for (Retry =3D GENET_PHY_RETRY; Retry > 0; Retry--) { + Value =3D GenetMmioRead (Genet, GENET_MDIO_CMD); + if ((Value & GENET_MDIO_START_BUSY) =3D=3D 0) { + break; } + gBS->Stall (10); + } =20 - if (Retry =3D=3D 0) { - DEBUG ((DEBUG_ERROR, "GenetPhyRead: Timeout writing PhyAddr %d, Re= g %d\n", PhyAddr, Reg)); - return EFI_DEVICE_ERROR; - } + if (Retry =3D=3D 0) { + DEBUG ((DEBUG_ERROR, + "GenetPhyRead: Timeout writing PhyAddr %d, Reg %d\n", PhyAddr, Reg)); + return EFI_DEVICE_ERROR; + } =20 - return EFI_SUCCESS; + return EFI_SUCCESS; } =20 /** @@ -170,13 +172,13 @@ GenetPhyWrite ( VOID EFIAPI GenetPhyConfigure ( - IN VOID *Priv, - IN GENERIC_PHY_SPEED Speed, - IN GENERIC_PHY_DUPLEX Duplex - ) + IN VOID *Priv, + IN GENERIC_PHY_SPEED Speed, + IN GENERIC_PHY_DUPLEX Duplex + ) { - GENET_PRIVATE_DATA *Genet =3D Priv; - UINT32 Value; + GENET_PRIVATE_DATA *Genet =3D Priv; + UINT32 Value; =20 Value =3D GenetMmioRead (Genet, GENET_EXT_RGMII_OOB_CTRL); Value &=3D ~GENET_EXT_RGMII_OOB_OOB_DISABLE; @@ -293,38 +295,40 @@ GenetPhyResetAction ( **/ VOID GenetReset ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINT32 Value; + UINT32 Value; =20 - Value =3D GenetMmioRead (Genet, GENET_SYS_RBUF_FLUSH_CTRL); - Value |=3D GENET_SYS_RBUF_FLUSH_RESET; - GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value); - gBS->Stall (10); + Value =3D GenetMmioRead (Genet, GENET_SYS_RBUF_FLUSH_CTRL); + Value |=3D GENET_SYS_RBUF_FLUSH_RESET; + GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value); + gBS->Stall (10); =20 - Value &=3D ~GENET_SYS_RBUF_FLUSH_RESET; - GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value); - gBS->Stall (10); + Value &=3D ~GENET_SYS_RBUF_FLUSH_RESET; + GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value); + gBS->Stall (10); =20 - GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, 0); - gBS->Stall (10); + GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, 0); + gBS->Stall (10); =20 - GenetMmioWrite (Genet, GENET_UMAC_CMD, 0); - GenetMmioWrite (Genet, GENET_UMAC_CMD, GENET_UMAC_CMD_LCL_LOOP_EN | GE= NET_UMAC_CMD_SW_RESET); - gBS->Stall (10); - GenetMmioWrite (Genet, GENET_UMAC_CMD, 0); + GenetMmioWrite (Genet, GENET_UMAC_CMD, 0); + GenetMmioWrite (Genet, GENET_UMAC_CMD, + GENET_UMAC_CMD_LCL_LOOP_EN | GENET_UMAC_CMD_SW_RESET); + gBS->Stall (10); + GenetMmioWrite (Genet, GENET_UMAC_CMD, 0); =20 - GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, GENET_UMAC_MIB_RESET_RUNT = | GENET_UMAC_MIB_RESET_RX | GENET_UMAC_MIB_RESET_TX); - GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, 0); + GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, + GENET_UMAC_MIB_RESET_RUNT | GENET_UMAC_MIB_RESET_RX | GENET_UMAC_MIB_R= ESET_TX); + GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, 0); =20 - GenetMmioWrite (Genet, GENET_UMAC_MAX_FRAME_LEN, 1536); + GenetMmioWrite (Genet, GENET_UMAC_MAX_FRAME_LEN, 1536); =20 - Value =3D GenetMmioRead (Genet, GENET_RBUF_CTRL); - Value |=3D GENET_RBUF_ALIGN_2B; - GenetMmioWrite (Genet, GENET_RBUF_CTRL, Value); + Value =3D GenetMmioRead (Genet, GENET_RBUF_CTRL); + Value |=3D GENET_RBUF_ALIGN_2B; + GenetMmioWrite (Genet, GENET_RBUF_CTRL, Value); =20 - GenetMmioWrite (Genet, GENET_RBUF_TBUF_SIZE_CTRL, 1); + GenetMmioWrite (Genet, GENET_RBUF_TBUF_SIZE_CTRL, 1); } =20 /** @@ -337,20 +341,20 @@ GenetReset ( VOID EFIAPI GenetSetMacAddress ( - IN GENET_PRIVATE_DATA *Genet, - IN EFI_MAC_ADDRESS *MacAddr - ) + IN GENET_PRIVATE_DATA *Genet, + IN EFI_MAC_ADDRESS *MacAddr + ) { - UINT32 Value; + UINT32 Value; =20 - Value =3D MacAddr->Addr[3] | - MacAddr->Addr[2] << 8 | - MacAddr->Addr[1] << 16 | - MacAddr->Addr[0] << 24; - GenetMmioWrite (Genet, GENET_UMAC_MAC0, Value); - Value =3D MacAddr->Addr[5] | - MacAddr->Addr[4] << 8; - GenetMmioWrite (Genet, GENET_UMAC_MAC1, Value); + Value =3D MacAddr->Addr[3] | + MacAddr->Addr[2] << 8 | + MacAddr->Addr[1] << 16 | + MacAddr->Addr[0] << 24; + GenetMmioWrite (Genet, GENET_UMAC_MAC0, Value); + Value =3D MacAddr->Addr[5] | + MacAddr->Addr[4] << 8; + GenetMmioWrite (Genet, GENET_UMAC_MAC1, Value); } =20 /** @@ -362,24 +366,24 @@ GenetSetMacAddress ( **/ VOID GenetSetPhyMode ( - IN GENET_PRIVATE_DATA *Genet, - IN GENET_PHY_MODE PhyMode - ) + IN GENET_PRIVATE_DATA *Genet, + IN GENET_PHY_MODE PhyMode + ) { - UINT32 Value; + UINT32 Value; =20 - switch (PhyMode) { - case GENET_PHY_MODE_RGMII: - case GENET_PHY_MODE_RGMII_RXID: - case GENET_PHY_MODE_RGMII_TXID: - case GENET_PHY_MODE_RGMII_ID: - Value =3D GENET_SYS_PORT_MODE_EXT_GPHY; - break; - default: - Value =3D 0; - break; - } - GenetMmioWrite (Genet, GENET_SYS_PORT_CTRL, Value); + switch (PhyMode) { + case GENET_PHY_MODE_RGMII: + case GENET_PHY_MODE_RGMII_RXID: + case GENET_PHY_MODE_RGMII_TXID: + case GENET_PHY_MODE_RGMII_ID: + Value =3D GENET_SYS_PORT_MODE_EXT_GPHY; + break; + default: + Value =3D 0; + break; + } + GenetMmioWrite (Genet, GENET_SYS_PORT_CTRL, Value); } =20 /** @@ -390,31 +394,32 @@ GenetSetPhyMode ( **/ VOID GenetEnableTxRx ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINT32 Value; - UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; + UINT32 Value; + UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; =20 - // Start TX DMA on default queue - Value =3D GenetMmioRead (Genet, GENET_TX_DMA_CTRL); - Value |=3D GENET_TX_DMA_CTRL_EN; - Value |=3D GENET_TX_DMA_CTRL_RBUF_EN(Qid); - GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value); + // Start TX DMA on default queue + Value =3D GenetMmioRead (Genet, GENET_TX_DMA_CTRL); + Value |=3D GENET_TX_DMA_CTRL_EN; + Value |=3D GENET_TX_DMA_CTRL_RBUF_EN (Qid); + GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value); =20 - // Start RX DMA on default queue - Value =3D GenetMmioRead (Genet, GENET_RX_DMA_CTRL); - Value |=3D GENET_RX_DMA_CTRL_EN; - Value |=3D GENET_RX_DMA_CTRL_RBUF_EN(Qid); - GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value); + // Start RX DMA on default queue + Value =3D GenetMmioRead (Genet, GENET_RX_DMA_CTRL); + Value |=3D GENET_RX_DMA_CTRL_EN; + Value |=3D GENET_RX_DMA_CTRL_RBUF_EN (Qid); + GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value); =20 - // Enable transmitter and receiver - Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); - Value |=3D GENET_UMAC_CMD_TXEN | GENET_UMAC_CMD_RXEN; - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); + // Enable transmitter and receiver + Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); + Value |=3D GENET_UMAC_CMD_TXEN | GENET_UMAC_CMD_RXEN; + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); =20 - // Enable interrupts - GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR_MASK, GENET_IRQ_TXDMA_DO= NE | GENET_IRQ_RXDMA_DONE); + // Enable interrupts + GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR_MASK, + GENET_IRQ_TXDMA_DONE | GENET_IRQ_RXDMA_DONE); } =20 /** @@ -425,42 +430,42 @@ GenetEnableTxRx ( **/ VOID GenetDisableTxRx ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINT32 Value; - UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; + UINT32 Value; + UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; =20 - // Disable interrupts - GenetMmioWrite (Genet, GENET_INTRL2_CPU_SET_MASK, 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR, 0xFFFFFFFF); + // Disable interrupts + GenetMmioWrite (Genet, GENET_INTRL2_CPU_SET_MASK, 0xFFFFFFFF); + GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR, 0xFFFFFFFF); =20 - // Disable receiver - Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); - Value &=3D ~GENET_UMAC_CMD_RXEN; - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); + // Disable receiver + Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); + Value &=3D ~GENET_UMAC_CMD_RXEN; + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); =20 - // Stop RX DMA - Value =3D GenetMmioRead (Genet, GENET_RX_DMA_CTRL); - Value &=3D ~GENET_RX_DMA_CTRL_EN; - Value &=3D ~GENET_RX_DMA_CTRL_RBUF_EN(Qid); - GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value); + // Stop RX DMA + Value =3D GenetMmioRead (Genet, GENET_RX_DMA_CTRL); + Value &=3D ~GENET_RX_DMA_CTRL_EN; + Value &=3D ~GENET_RX_DMA_CTRL_RBUF_EN (Qid); + GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value); =20 - // Stop TX DMA - Value =3D GenetMmioRead (Genet, GENET_TX_DMA_CTRL); - Value &=3D ~GENET_TX_DMA_CTRL_EN; - Value &=3D ~GENET_TX_DMA_CTRL_RBUF_EN(Qid); - GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value); + // Stop TX DMA + Value =3D GenetMmioRead (Genet, GENET_TX_DMA_CTRL); + Value &=3D ~GENET_TX_DMA_CTRL_EN; + Value &=3D ~GENET_TX_DMA_CTRL_RBUF_EN (Qid); + GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value); =20 - // Flush data in the TX FIFO - GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 1); - gBS->Stall (10); - GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 0); + // Flush data in the TX FIFO + GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 1); + gBS->Stall (10); + GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 0); =20 - // Disable transmitter - Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); - Value &=3D ~GENET_UMAC_CMD_TXEN; - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); + // Disable transmitter + Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); + Value &=3D ~GENET_UMAC_CMD_TXEN; + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); } =20 /** @@ -472,19 +477,19 @@ GenetDisableTxRx ( **/ VOID GenetSetPromisc ( - IN GENET_PRIVATE_DATA *Genet, - IN BOOLEAN Enable - ) + IN GENET_PRIVATE_DATA *Genet, + IN BOOLEAN Enable + ) { - UINT32 Value; + UINT32 Value; =20 - Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); - if (Enable) { - Value |=3D GENET_UMAC_CMD_PROMISC; - } else { - Value &=3D ~GENET_UMAC_CMD_PROMISC; - } - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); + Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); + if (Enable) { + Value |=3D GENET_UMAC_CMD_PROMISC; + } else { + Value &=3D ~GENET_UMAC_CMD_PROMISC; + } + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); } =20 /** @@ -495,63 +500,63 @@ GenetSetPromisc ( **/ VOID GenetDmaInitRings ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; + UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; =20 - Genet->TxQueued =3D 0; - Genet->TxNext =3D 0; - Genet->TxConsIndex =3D 0; - Genet->TxProdIndex =3D 0; + Genet->TxQueued =3D 0; + Genet->TxNext =3D 0; + Genet->TxConsIndex =3D 0; + Genet->TxProdIndex =3D 0; =20 - Genet->RxConsIndex =3D 0; - Genet->RxProdIndex =3D 0; + Genet->RxConsIndex =3D 0; + Genet->RxProdIndex =3D 0; =20 - // Configure TX queue - GenetMmioWrite (Genet, GENET_TX_SCB_BURST_SIZE, 0x08); - GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_CONS_INDEX(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_RING_BUF_SIZE(Qid), - __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_TX_DMA_RING_BUF_= SIZE_DESC_COUNT) | - __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_TX_DMA_RING_BUF= _SIZE_BUF_LENGTH)); - GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_LO(Qid), - GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1); - GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_MBUF_DONE_THRES(Qid), 1); - GenetMmioWrite (Genet, GENET_TX_DMA_FLOW_PERIOD(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_HI(Qid), 0); + // Configure TX queue + GenetMmioWrite (Genet, GENET_TX_SCB_BURST_SIZE, 0x08); + GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_CONS_INDEX (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_RING_BUF_SIZE (Qid), + __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_TX_DMA_RING_BUF_SIZE_DESC_COUNT)= | + __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_TX_DMA_RING_BUF_SIZE_BUF_LENGTH= )); + GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_LO (Qid), + GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1); + GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_MBUF_DONE_THRES (Qid), 1); + GenetMmioWrite (Genet, GENET_TX_DMA_FLOW_PERIOD (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_HI (Qid), 0); =20 - // Enable TX queue - GenetMmioWrite (Genet, GENET_TX_DMA_RING_CFG, (1U << Qid)); + // Enable TX queue + GenetMmioWrite (Genet, GENET_TX_DMA_RING_CFG, (1U << Qid)); =20 - // Configure RX queue - GenetMmioWrite (Genet, GENET_RX_SCB_BURST_SIZE, 0x08); - GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_PROD_INDEX(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_RING_BUF_SIZE(Qid), - __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_RX_DMA_RING_BUF_= SIZE_DESC_COUNT) | - __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_RX_DMA_RING_BUF= _SIZE_BUF_LENGTH)); - GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_LO(Qid), - GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1); - GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_XON_XOFF_THRES(Qid), - __SHIFTIN(5, GENET_RX_DMA_XON_XOFF_THRES_LO) | - __SHIFTIN(GENET_DMA_DESC_COUNT >> 4, GENET_RX_DMA_XON_= XOFF_THRES_HI)); - GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_HI(Qid), 0); + // Configure RX queue + GenetMmioWrite (Genet, GENET_RX_SCB_BURST_SIZE, 0x08); + GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_PROD_INDEX (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_RING_BUF_SIZE (Qid), + __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_RX_DMA_RING_BUF_SIZE_DESC_COUNT)= | + __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_RX_DMA_RING_BUF_SIZE_BUF_LENGTH= )); + GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_LO (Qid), + GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1); + GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_XON_XOFF_THRES (Qid), + __SHIFTIN(5, GENET_RX_DMA_XON_XOFF_THRES_LO) | + __SHIFTIN(GENET_DMA_DESC_COUNT >> 4, GENET_RX_DMA_XON_XOFF_THRES_HI)); + GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_HI (Qid), 0); =20 - // Enable RX queue - GenetMmioWrite (Genet, GENET_RX_DMA_RING_CFG, (1U << Qid)); + // Enable RX queue + GenetMmioWrite (Genet, GENET_RX_DMA_RING_CFG, (1U << Qid)); } =20 /** @@ -564,22 +569,22 @@ GenetDmaInitRings ( **/ EFI_STATUS GenetDmaAlloc ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - EFI_STATUS Status; - UINTN n; + EFI_STATUS Status; + UINTN Idx; =20 - for (n =3D 0; n < GENET_DMA_DESC_COUNT; n++) { - Status =3D DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAG= ES (GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[n]); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "GenetDmaAlloc: Failed to allocate RX buf= fer: %r\n", Status)); - GenetDmaFree (Genet); - return Status; - } + for (Idx =3D 0; Idx < GENET_DMA_DESC_COUNT; Idx++) { + Status =3D DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (= GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[Idx]); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "GenetDmaAlloc: Failed to allocate RX buffer: %= r\n", Status)); + GenetDmaFree (Genet); + return Status; } + } =20 - return EFI_SUCCESS; + return EFI_SUCCESS; } =20 /** @@ -594,33 +599,34 @@ GenetDmaAlloc ( **/ EFI_STATUS GenetDmaMapRxDescriptor ( - IN GENET_PRIVATE_DATA * Genet, - IN UINT8 DescIndex - ) + IN GENET_PRIVATE_DATA * Genet, + IN UINT8 DescIndex + ) { - EFI_STATUS Status; - UINTN DmaNumberOfBytes; + EFI_STATUS Status; + UINTN DmaNumberOfBytes; =20 - ASSERT (Genet->RxBufferMap[DescIndex].Mapping =3D=3D NULL); - ASSERT (Genet->RxBuffer[DescIndex] !=3D NULL); + ASSERT (Genet->RxBufferMap[DescIndex].Mapping =3D=3D NULL); + ASSERT (Genet->RxBuffer[DescIndex] !=3D NULL); =20 - DmaNumberOfBytes =3D GENET_MAX_PACKET_SIZE; - Status =3D DmaMap (MapOperationBusMasterWrite, - (VOID *)Genet->RxBuffer[DescIndex], - &DmaNumberOfBytes, - &Genet->RxBufferMap[DescIndex].Pa, - &Genet->RxBufferMap[DescIndex].Mapping); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "GenetDmaMapRxDescriptor: Failed to map RX bu= ffer: %r\n", Status)); - return Status; - } + DmaNumberOfBytes =3D GENET_MAX_PACKET_SIZE; + Status =3D DmaMap (MapOperationBusMasterWrite, + (VOID *)Genet->RxBuffer[DescIndex], + &DmaNumberOfBytes, + &Genet->RxBufferMap[DescIndex].Pa, + &Genet->RxBufferMap[DescIndex].Mapping); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "GenetDmaMapRxDescriptor: Failed to map RX buffer: %r\n", Status)); + return Status; + } =20 - //DEBUG ((DEBUG_INFO, "GenetDmaMapRxDescriptor: Desc 0x%X mapped to 0x= %X\n", DescIndex, Genet->RxBufferMap[DescIndex].Pa)); + GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_LO (DescIndex), + Genet->RxBufferMap[DescIndex].Pa & 0xFFFFFFFF); + GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_HI (DescIndex), + (Genet->RxBufferMap[DescIndex].Pa >> 32) & 0xFFFFFFFF); =20 - GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_LO (DescIndex), Genet->Rx= BufferMap[DescIndex].Pa & 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_HI (DescIndex), (Genet->R= xBufferMap[DescIndex].Pa >> 32) & 0xFFFFFFFF); - - return EFI_SUCCESS; + return EFI_SUCCESS; } =20 /** @@ -632,14 +638,14 @@ GenetDmaMapRxDescriptor ( **/ VOID GenetDmaUnmapRxDescriptor ( - IN GENET_PRIVATE_DATA * Genet, - IN UINT8 DescIndex - ) + IN GENET_PRIVATE_DATA * Genet, + IN UINT8 DescIndex + ) { - if (Genet->RxBufferMap[DescIndex].Mapping !=3D NULL) { - DmaUnmap (Genet->RxBufferMap[DescIndex].Mapping); - Genet->RxBufferMap[DescIndex].Mapping =3D NULL; - } + if (Genet->RxBufferMap[DescIndex].Mapping !=3D NULL) { + DmaUnmap (Genet->RxBufferMap[DescIndex].Mapping); + Genet->RxBufferMap[DescIndex].Mapping =3D NULL; + } } =20 /** @@ -651,19 +657,20 @@ GenetDmaUnmapRxDescriptor ( **/ VOID GenetDmaFree ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINTN n; + UINTN Idx; =20 - for (n =3D 0; n < GENET_DMA_DESC_COUNT; n++) { - GenetDmaUnmapRxDescriptor (Genet, n); + for (Idx =3D 0; Idx < GENET_DMA_DESC_COUNT; Idx++) { + GenetDmaUnmapRxDescriptor (Genet, Idx); =20 - if (Genet->RxBuffer[n] !=3D NULL) { - DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), Gene= t->RxBuffer[n]); - Genet->RxBuffer[n] =3D NULL; - } + if (Genet->RxBuffer[Idx] !=3D NULL) { + DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), + Genet->RxBuffer[Idx]); + Genet->RxBuffer[Idx] =3D NULL; } + } } =20 /** @@ -677,26 +684,29 @@ GenetDmaFree ( **/ VOID GenetDmaTriggerTx ( - IN GENET_PRIVATE_DATA * Genet, - IN UINT8 DescIndex, - IN EFI_PHYSICAL_ADDRESS PhysAddr, - IN UINTN NumberOfBytes - ) + IN GENET_PRIVATE_DATA * Genet, + IN UINT8 DescIndex, + IN EFI_PHYSICAL_ADDRESS PhysAddr, + IN UINTN NumberOfBytes + ) { - UINT32 DescStatus; - UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; + UINT32 DescStatus; + UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; =20 - DescStatus =3D GENET_TX_DESC_STATUS_SOP | - GENET_TX_DESC_STATUS_EOP | - GENET_TX_DESC_STATUS_CRC | - GENET_TX_DESC_STATUS_QTAG | - __SHIFTIN(NumberOfBytes, GENET_TX_DESC_STATUS_BUFLEN); + DescStatus =3D GENET_TX_DESC_STATUS_SOP | + GENET_TX_DESC_STATUS_EOP | + GENET_TX_DESC_STATUS_CRC | + GENET_TX_DESC_STATUS_QTAG | + __SHIFTIN(NumberOfBytes, GENET_TX_DESC_STATUS_BUFLEN); =20 - GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_LO(DescIndex), PhysAddr &= 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_HI(DescIndex), (PhysAddr = >> 32) & 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_TX_DESC_STATUS(DescIndex), DescStatus); + GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_LO(DescIndex), + PhysAddr & 0xFFFFFFFF); + GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_HI(DescIndex), + (PhysAddr >> 32) & 0xFFFFFFFF); + GenetMmioWrite (Genet, GENET_TX_DESC_STATUS(DescIndex), DescStatus); =20 - GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), (DescIndex + 1) = & 0xFFFF); + GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), + (DescIndex + 1) & 0xFFFF); } =20 /** @@ -708,24 +718,24 @@ GenetDmaTriggerTx ( **/ VOID GenetTxIntr ( - IN GENET_PRIVATE_DATA *Genet, - OUT VOID **TxBuf - ) + IN GENET_PRIVATE_DATA *Genet, + OUT VOID **TxBuf + ) { - UINT32 ConsIndex, Total; - UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; + UINT32 ConsIndex, Total; + UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; =20 - ConsIndex =3D GenetMmioRead (Genet, GENET_TX_DMA_CONS_INDEX (Qid)) & 0= xFFFF; + ConsIndex =3D GenetMmioRead (Genet, GENET_TX_DMA_CONS_INDEX (Qid)) & 0xF= FFF; =20 - Total =3D (ConsIndex - Genet->TxConsIndex) & 0xFFFF; - if (Genet->TxQueued > 0 && Total > 0) { - *TxBuf =3D Genet->TxBuffer[Genet->TxNext]; - Genet->TxQueued--; - Genet->TxNext =3D (Genet->TxNext + 1) % GENET_DMA_DESC_COUNT; - Genet->TxConsIndex++; - } else { - *TxBuf =3D NULL; - } + Total =3D (ConsIndex - Genet->TxConsIndex) & 0xFFFF; + if (Genet->TxQueued > 0 && Total > 0) { + *TxBuf =3D Genet->TxBuffer[Genet->TxNext]; + Genet->TxQueued--; + Genet->TxNext =3D (Genet->TxNext + 1) % GENET_DMA_DESC_COUNT; + Genet->TxConsIndex++; + } else { + *TxBuf =3D NULL; + } } =20 /** @@ -742,32 +752,30 @@ GenetTxIntr ( **/ EFI_STATUS GenetRxIntr ( - IN GENET_PRIVATE_DATA *Genet, - OUT UINT8 *DescIndex, - OUT UINTN *FrameLength - ) + IN GENET_PRIVATE_DATA *Genet, + OUT UINT8 *DescIndex, + OUT UINTN *FrameLength + ) { - EFI_STATUS Status; - UINT32 ProdIndex, Total; - UINT32 DescStatus; - UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; + EFI_STATUS Status; + UINT32 ProdIndex, Total; + UINT32 DescStatus; + UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; =20 - ProdIndex =3D GenetMmioRead (Genet, GENET_RX_DMA_PROD_INDEX (Qid)) & 0= xFFFF; + ProdIndex =3D GenetMmioRead (Genet, GENET_RX_DMA_PROD_INDEX (Qid)) & 0xF= FFF; =20 - Total =3D (ProdIndex - Genet->RxConsIndex) & 0xFFFF; - if (Total > 0) { - *DescIndex =3D Genet->RxConsIndex % GENET_DMA_DESC_COUNT; - DescStatus =3D GenetMmioRead (Genet, GENET_RX_DESC_STATUS (*DescIn= dex)); - *FrameLength =3D __SHIFTOUT (DescStatus, GENET_RX_DESC_STATUS_BUFL= EN); + Total =3D (ProdIndex - Genet->RxConsIndex) & 0xFFFF; + if (Total > 0) { + *DescIndex =3D Genet->RxConsIndex % GENET_DMA_DESC_COUNT; + DescStatus =3D GenetMmioRead (Genet, GENET_RX_DESC_STATUS (*DescIndex)= ); + *FrameLength =3D __SHIFTOUT (DescStatus, GENET_RX_DESC_STATUS_BUFLEN); =20 - //DEBUG ((DEBUG_INFO, "GenetRxIntr: DescIndex=3D0x%X FrameLength= =3D0x%X\n", *DescIndex, *FrameLength)); + Genet->RxConsIndex =3D (Genet->RxConsIndex + 1) & 0xFFFF; + GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), Genet->RxConsInd= ex); + Status =3D EFI_SUCCESS; + } else { + Status =3D EFI_NOT_READY; + } =20 - Genet->RxConsIndex =3D (Genet->RxConsIndex + 1) & 0xFFFF; - GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), Genet->RxCon= sIndex); - Status =3D EFI_SUCCESS; - } else { - Status =3D EFI_NOT_READY; - } - - return Status; + return Status; } --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#59051): https://edk2.groups.io/g/devel/message/59051 Mute This Topic: https://groups.io/mt/74130973/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 4 19:23:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+59052+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+59052+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1589180828; cv=none; d=zohomail.com; s=zohoarc; b=BaAougQXqpkW2hliCh/vSJMdMhaCjrNMoHKZ2Q+RAtoOqzQ8NfNI7sulzNFR+rSrTXqEr41GmO51QWAu3eXucubGgpGhw0H+eQoloSu2K7E/lLEd8WRs1omNnHPVZSPYkJAFue05WJk3Q78NK4c4nich/zGbZmPU51t0qSCRGxE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589180828; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=teogFpK9b3vSdCh2yvN4Yemcl6tIL1X2p69Fr/wJ5t0=; b=Ro10PnDS6k3su2Ad9gO2bPeZGkrTyOAnHQd53gi9L9oCF2LCL/kjy9GCTPbT/ONtBh5MUxc7ihnidhyX9ItpHyOQRQmDHPqfcPVP4RGhbxOx05OHPg2m5uxI3JVuwh/qvf+quUjZMcqIpbzJqLAx11QCvCMUiuSYKlLQUOYyGf0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+59052+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1589180828922855.3610992340456; Mon, 11 May 2020 00:07:08 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id FZePYY1788612xUDgpIE7Iix; Mon, 11 May 2020 00:07:08 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.7635.1589180828065552903 for ; Mon, 11 May 2020 00:07:08 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A67BDD6E; Mon, 11 May 2020 00:07:07 -0700 (PDT) X-Received: from e123331-lin.nice.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 077CA3F68F; Mon, 11 May 2020 00:07:05 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Pete Batard , Jared McNeill , Andrei Warkentin , Samer El-Haj-Mahmoud Subject: [edk2-devel] [PATCH edk2-platforms v3 2/5] Silicon/Broadcom/BcmGenetDxe: add support for broadcast filtering Date: Mon, 11 May 2020 09:06:53 +0200 Message-Id: <20200511070656.32141-3-ard.biesheuvel@arm.com> In-Reply-To: <20200511070656.32141-1-ard.biesheuvel@arm.com> References: <20200511070656.32141-1-ard.biesheuvel@arm.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ard.biesheuvel@arm.com X-Gm-Message-State: adSLOZGnOQUDbBxzVnJ9zRFcx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1589180828; bh=e9dhvYgqjEw/B+wZ9IHgFKspihmri9LUnA/VlL39Trk=; h=Cc:Date:From:Reply-To:Subject:To; b=ObpZpNiXtq5nI0KdgF//Y+mLbvVfF25IzjtmXvvQZzveP8uriSEHl4cgKeIskQ8hMk5 h16Jc03rK4QReWzcbCxNdubvODFjujDOHPNVystELCDrYmWa1JdTJPoM4bL3iM1o+ERvZ vRwm/CJQxKo4WdGHd5pjbMPSqvKbNtQsUh8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add a helper to configure the first MDF filter for filtering the broadcast Ethernet address. Signed-off-by: Ard Biesheuvel --- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h | 7 ++++++ Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c | 24 ++++++++++++++++= ++++ 2 files changed, 31 insertions(+) diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h b/Silicon= /Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h index 2e7b78322bcd..1dc7a51a1ca6 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h @@ -107,6 +107,7 @@ #define GENET_UMAC_MDF_CTRL 0xe50 #define GENET_UMAC_MDF_ADDR0(n) (0xe54 + (n) * 0x8) #define GENET_UMAC_MDF_ADDR1(n) (0xe58 + (n) * 0x8) +#define GENET_MAX_MDF_FILTER 17 =20 #define GENET_DMA_DESC_COUNT 256 #define GENET_DMA_DESC_SIZE 12 @@ -300,6 +301,12 @@ GenetSetPromisc ( IN BOOLEAN Enable ); =20 +VOID +GenetEnableBroadcastFilter ( + IN GENET_PRIVATE_DATA *Genet, + IN BOOLEAN Enable + ); + VOID GenetDmaInitRings ( IN GENET_PRIVATE_DATA *Genet diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon= /Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c index af7c06656433..2176bb451e7d 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c @@ -492,6 +492,30 @@ GenetSetPromisc ( GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); } =20 +/** + Enable the MAC filter for the Ethernet broadcast address + + @param Genet[in] Pointer to GENET_PRIVATE_DATA. + @param Enable[in] Promiscuous mode state. + +**/ +VOID +GenetEnableBroadcastFilter ( + IN GENET_PRIVATE_DATA *Genet, + IN BOOLEAN Enable + ) +{ + UINT32 Value; + + Value =3D (1U << GENET_MAX_MDF_FILTER) - 1; + if (Enable) { + GenetMmioWrite (Genet, GENET_UMAC_MDF_ADDR0 (0), 0xffff); + GenetMmioWrite (Genet, GENET_UMAC_MDF_ADDR1 (0), 0xffffffff); + Value &=3D ~BIT0; + } + GenetMmioWrite (Genet, GENET_UMAC_MDF_CTRL, Value); +} + /** Configure DMA TX and RX queues, enabling them. =20 --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#59052): https://edk2.groups.io/g/devel/message/59052 Mute This Topic: https://groups.io/mt/74130975/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 4 19:23:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+59053+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+59053+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1589180830; cv=none; d=zohomail.com; s=zohoarc; b=WAcdIkIAnntDURkGWuqZgeHaVqwj/DXd5OstRcsn6+qryWQTmS0u7rhuOO5USSbH8BGrL4F9YjDjXO82nQ3DAUXh9AKDOZPuHoTKa0WWBgutY8eb0nbXs3YBCQFdzywZ+rM8uXWdMpcdjR4SSo4pY6Z5U80BUqs+rntT3VpPiUg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589180830; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=soECcINP35QHsZIfkVayNc0DKHLNckjhggR9AWP2MUw=; b=iBynVM7gzLGJMTekagiGmxLmxp6MHZRjQn+eKNb/4Sd/VZr+Y02F0zvgYMXFmkJMapQAaDjjitZXRauzwTp6d/PF5292m72tDZlrOIa+BhPhyH3oW3vd6zvNrQX1boIUrPiPUCDGYMZnDcXDGTWNfD6YHnzdT8+9YUJOZ01O//Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+59053+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1589180830598384.28056055491743; Mon, 11 May 2020 00:07:10 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id vGx1YY1788612xuWCiGeRoNX; Mon, 11 May 2020 00:07:10 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.7679.1589180829676458717 for ; Mon, 11 May 2020 00:07:09 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 675A8D6E; Mon, 11 May 2020 00:07:09 -0700 (PDT) X-Received: from e123331-lin.nice.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F208B3F68F; Mon, 11 May 2020 00:07:07 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Pete Batard , Jared McNeill , Andrei Warkentin , Samer El-Haj-Mahmoud Subject: [edk2-devel] [PATCH edk2-platforms v3 3/5] Silicon/Broadcom/BcmGenetDxe: fix multicast/broadcast handling Date: Mon, 11 May 2020 09:06:54 +0200 Message-Id: <20200511070656.32141-4-ard.biesheuvel@arm.com> In-Reply-To: <20200511070656.32141-1-ard.biesheuvel@arm.com> References: <20200511070656.32141-1-ard.biesheuvel@arm.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ard.biesheuvel@arm.com X-Gm-Message-State: gstiTLyhrnxgo7hMB04TVCX7x1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1589180830; bh=5/fi13Pkl31t/85ikvJAOBj671iWM6nmis5NGJq1lIk=; h=Cc:Date:From:Reply-To:Subject:To; b=tEjDWQPgEJKKK5bfrxuteajxpoCmbPFu0QMz4q+Psgh1dxMNt54ViPixqCY4W2KxM4Z h7nwKZXHYdq+xAictiTl2NHHKdepDXvE0GeWPME+4dPncjp/euQR43CssjIMlbTKqIhJs ryuFNhgy/6AVh8eqVH+hsK/d+nBxYQlxaAc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Move the handling of the promiscuous receive control to the SNP ReceiveFilters() method where it belongs. Given that we do not support multicast filtering, only minimal handling is required to test the promiscuous bit and program the MAC accordingly. Any multicast handling will be done by the MNP layer above it. For reception of broadcast frames, wire up the new helper that programs the MDF filter bank accordingly. Signed-off-by: Ard Biesheuvel --- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c | 7 +++---- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c | 19 ++++++++++++= ++----- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c | 20 +++++++++---= -------- 3 files changed, 26 insertions(+), 20 deletions(-) diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c b/Sil= icon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c index e3d015dd0820..a6102421cc26 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c @@ -154,11 +154,10 @@ GenetDriverBindingStart ( Genet->SnpMode.NvRamSize =3D 0; Genet->SnpMode.NvRamAccessSize =3D 0; Genet->SnpMode.ReceiveFilterMask =3D EFI_SIMPLE_NETWORK_RECEIVE_UNI= CAST | - EFI_SIMPLE_NETWORK_RECEIVE_MULTI= CAST | EFI_SIMPLE_NETWORK_RECEIVE_BROAD= CAST | - EFI_SIMPLE_NETWORK_RECEIVE_PROMI= SCUOUS | - EFI_SIMPLE_NETWORK_RECEIVE_PROMI= SCUOUS_MULTICAST; - Genet->SnpMode.ReceiveFilterSetting =3D Genet->SnpMode.ReceiveFilterMa= sk; + EFI_SIMPLE_NETWORK_RECEIVE_PROMI= SCUOUS; + Genet->SnpMode.ReceiveFilterSetting =3D EFI_SIMPLE_NETWORK_RECEIVE_UNI= CAST | + EFI_SIMPLE_NETWORK_RECEIVE_BROAD= CAST; Genet->SnpMode.MaxMCastFilterCount =3D 0; Genet->SnpMode.MCastFilterCount =3D 0; Genet->SnpMode.IfType =3D NET_IFTYPE_ETHERNET; diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon= /Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c index 2176bb451e7d..746fbfe51b1d 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c @@ -505,13 +505,22 @@ GenetEnableBroadcastFilter ( IN BOOLEAN Enable ) { - UINT32 Value; + CONST EFI_MAC_ADDRESS *MacAddr =3D &Genet->SnpMode.CurrentAddress; + UINT32 Value; =20 - Value =3D (1U << GENET_MAX_MDF_FILTER) - 1; if (Enable) { - GenetMmioWrite (Genet, GENET_UMAC_MDF_ADDR0 (0), 0xffff); - GenetMmioWrite (Genet, GENET_UMAC_MDF_ADDR1 (0), 0xffffffff); - Value &=3D ~BIT0; + GenetMmioWrite (Genet, GENET_UMAC_MDF_ADDR0 (0), + MacAddr->Addr[1] | MacAddr->Addr[0] << 8); + GenetMmioWrite (Genet, GENET_UMAC_MDF_ADDR1 (0), + MacAddr->Addr[5] | MacAddr->Addr[4] << 8 | + MacAddr->Addr[3] << 16 | MacAddr->Addr[2] << 24); + + GenetMmioWrite (Genet, GENET_UMAC_MDF_ADDR0 (1), 0xffff); + GenetMmioWrite (Genet, GENET_UMAC_MDF_ADDR1 (1), 0xffffffff); + + Value =3D (1U << GENET_MAX_MDF_FILTER) & ~(BIT1 | BIT0); + } else { + Value =3D 0; } GenetMmioWrite (Genet, GENET_UMAC_MDF_CTRL, Value); } diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c b/Sil= icon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c index bf28448445d1..e6de4653cde9 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c @@ -148,10 +148,6 @@ GenetSimpleNetworkInitialize ( } =20 GenetSetMacAddress (Genet, &Genet->SnpMode.CurrentAddress); - /* - * TODO: this belongs in GenetSimpleNetworkReceiveFilters, not here. - */ - GenetSetPromisc (Genet, TRUE); =20 GenetDmaInitRings (Genet); =20 @@ -306,6 +302,10 @@ GenetSimpleNetworkReceiveFilters ( } =20 Genet =3D GENET_PRIVATE_DATA_FROM_SNP_THIS (This); + if (((Enable | Disable) & ~Genet->SnpMode.ReceiveFilterMask) !=3D 0 || + (!ResetMCastFilter && MCastFilterCnt > Genet->SnpMode.MaxMCastFilter= Count)) { + return EFI_INVALID_PARAMETER; + } if (Genet->SnpMode.State =3D=3D EfiSimpleNetworkStopped) { return EFI_NOT_STARTED; } @@ -313,13 +313,11 @@ GenetSimpleNetworkReceiveFilters ( return EFI_DEVICE_ERROR; } =20 - // - // Can't actually return EFI_UNSUPPORTED, so just ignore the filters - // (we set promiscuous mode ON inside GenetSimpleNetworkInitialize). - // - // TODO: move promisc handling here. - // TODO 2: support multicast/broadcast. - // + GenetEnableBroadcastFilter (Genet, + (Enable & ~Disable & EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST) !=3D 0); + + GenetSetPromisc (Genet, + (Enable & ~Disable & EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS) !=3D 0); =20 return EFI_SUCCESS; } --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#59053): https://edk2.groups.io/g/devel/message/59053 Mute This Topic: https://groups.io/mt/74130976/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 4 19:23:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+59054+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+59054+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1589180832; cv=none; d=zohomail.com; s=zohoarc; b=g84nUGVf+58q0OgK9fHVlt+r8hJoV3lXbdxb0uL3zoINbtyIX37M8F2bJX5C5vR7MSFPEUHECB8mssFCJ4gvhcCmiC7MoZKOoqUSjOj93wQJwuPIVGEooZnUONwNeqQXMtrxOGgg+j+h6h65tvDGrpkBKpF8jTV1Q16gGhr5UuY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589180832; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=GBDruQExOb/BfvvaytIdNr2MGYXGNrt05SXuUgyRuJA=; b=koszoqscpJ7llJlQcJod8t8r4W6NY+NMZyudv+EdYwI8TF48GXvGXurXpDhbwbZ+TW+GyimzngsRq9BPJaju5GTwTU2qfpp4XMFAmqt/l1nloLIm0GW4Y4eXSp2ozOzQTmM76cE/ES4R4uWlZX/L4gctLI7B9pucvZ8/Bbjx/1E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+59054+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1589180832714299.9453710369419; Mon, 11 May 2020 00:07:12 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id jtgnYY1788612xG7hQwRrgGK; Mon, 11 May 2020 00:07:12 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.7680.1589180831668011398 for ; Mon, 11 May 2020 00:07:11 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5A1EAD6E; Mon, 11 May 2020 00:07:11 -0700 (PDT) X-Received: from e123331-lin.nice.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B7B763F68F; Mon, 11 May 2020 00:07:09 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Pete Batard , Jared McNeill , Andrei Warkentin , Samer El-Haj-Mahmoud Subject: [edk2-devel] [PATCH edk2-platforms v3 4/5] Silicon/Broadcom/BcmGenetDxe: avoid uncached memory for streaming DMA Date: Mon, 11 May 2020 09:06:55 +0200 Message-Id: <20200511070656.32141-5-ard.biesheuvel@arm.com> In-Reply-To: <20200511070656.32141-1-ard.biesheuvel@arm.com> References: <20200511070656.32141-1-ard.biesheuvel@arm.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ard.biesheuvel@arm.com X-Gm-Message-State: hX167oRgQFAqt60vvwOliwMJx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1589180832; bh=NYLP5EUcGT4p1JSac84byjuoekw/bdVmQpUB/JU06MQ=; h=Cc:Date:From:Reply-To:Subject:To; b=vR+EJpRlFZfhanz6gkmd2zxMXuaYuzfexYvts6ht6rxyqfGES5Ve2jv2yvgKINKKLLI BGKMX3hjs2PpShiv84ZUxjP0xBphXb856jruYoVYvWIty4qkoMKgSRXs5dwW5GX2ogCmj NGrn3YbwaTHejwXhXmMpSdgP+p9XDrsfAr4= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The non-coherent version of DmaAllocateBuffer () returns uncached memory, to ensure that the CPU and the device see the same data, even we they are accessing the buffer at the same time. This is not really necessary for our RX ring: the CPU never accesses the buffer while it is mapped for writing by the device, and so we can simply use the streaming DMA model, which uses ordinary cached buffers, but issues a cache invalidate at DMA unmap time. Signed-off-by: Ard Biesheuvel --- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf | 4 ++++ Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c | 18 ++++++++++++= +----- 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf b/Sil= icon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf index e74fa02ad209..3cabc5936562 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf @@ -49,3 +49,7 @@ [Protocols] gBcmGenetPlatformDeviceProtocolGuid ## TO_START gEfiDevicePathProtocolGuid ## BY_START gEfiSimpleNetworkProtocolGuid ## BY_START + +[Pcd] + gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset + gEmbeddedTokenSpaceGuid.PcdDmaDeviceLimit diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon= /Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c index 746fbfe51b1d..23bd1c1d2baa 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c @@ -19,6 +19,10 @@ =20 #define GENET_PHY_RETRY 1000 =20 +STATIC CONST +EFI_PHYSICAL_ADDRESS mDmaAddressLimit =3D FixedPcdGet64 (PcdDmaDeviceLim= it) - + FixedPcdGet64 (PcdDmaDeviceOffse= t); + /** Read a memory-mapped device CSR. =20 @@ -605,16 +609,20 @@ GenetDmaAlloc ( IN GENET_PRIVATE_DATA *Genet ) { - EFI_STATUS Status; - UINTN Idx; + EFI_PHYSICAL_ADDRESS Address; + EFI_STATUS Status; + UINTN Idx; =20 for (Idx =3D 0; Idx < GENET_DMA_DESC_COUNT; Idx++) { - Status =3D DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (= GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[Idx]); + Address =3D mDmaAddressLimit; + Status =3D gBS->AllocatePages (AllocateMaxAddress, EfiBootServicesData, + EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), &Address); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "GenetDmaAlloc: Failed to allocate RX buffer: %= r\n", Status)); GenetDmaFree (Genet); return Status; } + Genet->RxBuffer[Idx] =3D (UINT8 *)(UINTN)Address; } =20 return EFI_SUCCESS; @@ -699,8 +707,8 @@ GenetDmaFree ( GenetDmaUnmapRxDescriptor (Genet, Idx); =20 if (Genet->RxBuffer[Idx] !=3D NULL) { - DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), - Genet->RxBuffer[Idx]); + gBS->FreePages ((UINTN)Genet->RxBuffer[Idx], + EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE)); Genet->RxBuffer[Idx] =3D NULL; } } --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#59054): https://edk2.groups.io/g/devel/message/59054 Mute This Topic: https://groups.io/mt/74130978/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 4 19:23:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+59055+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+59055+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1589180834; cv=none; d=zohomail.com; s=zohoarc; b=KvRf9dQw7ZK8Onlzi7tOk7gB8lqBJJzF31DjeDJg6c1NTxL/4jvnHVLuz6RlUTc+lfKG8qM15IhNRHRYh1McrSiyq6nfJbLQoshrho80KNp2EzE3rMbVFsZ/Vqv22F6nksw2jdklQh9tXKrA4nh7ThcKXD4OwHksY0CGME4cA1A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589180834; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=fudFCtH8iX8FuJkj8C6SD/Y2EbgHYyrSZ3sXFbYI6eM=; b=bKhuK3Mv69kztsaAQJ64UVBnvcCp8d2XTKbwJL4kQocThz7kcuGBv5a4vZh4YqSVj3nBJ8Unw1R9eH+AqAEiZ25xvz9Y5NqkzLrnlYJ8JimuLZbBswsBcF0ihzW2+JtcTYLEKRFV1DCsTdE9rV0ohhQbCjO5u9XHUa2ukcpzqak= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+59055+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1589180834381669.0740920234433; Mon, 11 May 2020 00:07:14 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id aDaUYY1788612x5Lq2h1UBKX; Mon, 11 May 2020 00:07:13 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.7681.1589180833333018341 for ; Mon, 11 May 2020 00:07:13 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0216A101E; Mon, 11 May 2020 00:07:13 -0700 (PDT) X-Received: from e123331-lin.nice.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BADD23F68F; Mon, 11 May 2020 00:07:11 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Pete Batard , Jared McNeill , Andrei Warkentin , Samer El-Haj-Mahmoud Subject: [edk2-devel] [PATCH edk2-platforms v3 5/5] Silicon/Broadcom/BcmGenetDxe: shut down devices on ExitBootServices() Date: Mon, 11 May 2020 09:06:56 +0200 Message-Id: <20200511070656.32141-6-ard.biesheuvel@arm.com> In-Reply-To: <20200511070656.32141-1-ard.biesheuvel@arm.com> References: <20200511070656.32141-1-ard.biesheuvel@arm.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ard.biesheuvel@arm.com X-Gm-Message-State: Uw1PytLnjBWYQ4ZWPmpl4knMx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1589180833; bh=LbMQHJRbYCjUAPcBXZ+ZaF3o4vtz59SkjYymOU9DchM=; h=Cc:Date:From:Reply-To:Subject:To; b=o8DXCDB3CT/xDkajzjPYMvVeZJ8eUfgfEH8Uay3Tgl6T5MNwtmUh+952LvQ5w6kWU3B LrHT0+TkBdbIr7BPzCfmaA6Af9A9cUvvmcGlU1ebd7L2ks9WJMS5B+3YRaCJ2itR6NPGk bCVDPJv37zv/gFUMBPXAJNRq8Rh+CC7t++I= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" When the OS takes over the machine, it calls ExitBootServices() in order to shut down all resident services and event notifications so that all asynchronous activity is stopped. At this point, any DMA masters that are still active should be shut down. This is especially important for network controllers, since any activity on the network will trigger DMA writes into memory, which will no longer be reserved for this purpose once the OS takes over. So register for the ExitBootServices event, and shut down the controller at this point if it was started before. Signed-off-by: Ard Biesheuvel --- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf | 4 +++ Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h | 1 + Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c | 31 ++++++++++++= ++++++++ 3 files changed, 36 insertions(+) diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf b/Sil= icon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf index 3cabc5936562..a287f0495ff9 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf @@ -42,6 +42,7 @@ [LibraryClasses] IoLib MemoryAllocationLib NetLib + UefiBootServicesTableLib UefiDriverEntryPoint UefiLib =20 @@ -50,6 +51,9 @@ [Protocols] gEfiDevicePathProtocolGuid ## BY_START gEfiSimpleNetworkProtocolGuid ## BY_START =20 +[Guids] + gEfiEventExitBootServicesGuid + [Pcd] gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset gEmbeddedTokenSpaceGuid.PcdDmaDeviceLimit diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h b/Silicon= /Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h index 1dc7a51a1ca6..d03bf8daed58 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h @@ -203,6 +203,7 @@ typedef struct { EFI_HANDLE ControllerHandle; =20 EFI_LOCK Lock; + EFI_EVENT ExitBootServicesEvent; =20 EFI_SIMPLE_NETWORK_PROTOCOL Snp; EFI_SIMPLE_NETWORK_MODE SnpMode; diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c b/Sil= icon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c index a6102421cc26..29753d8ac754 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c @@ -76,6 +76,23 @@ GenetDriverBindingSupported ( return Status; } =20 +/** + Callback function to shut down the network device at ExitBootServices + + @param Event Pointer to this event + @param Context Event handler private data + +**/ +STATIC +VOID +EFIAPI +GenetNotifyExitBootServices ( + EFI_EVENT Event, + VOID *Context + ) +{ + GenetDisableTxRx ((GENET_PRIVATE_DATA *)Context); +} =20 /** Starts a device controller or a bus controller. @@ -173,6 +190,17 @@ GenetDriverBindingStart ( CopyMem (&Genet->SnpMode.CurrentAddress, &Genet->Dev->MacAddress, sizeof(EFI_MAC_ADDRESS)); =20 + Status =3D gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, TPL_CALLBACK, + GenetNotifyExitBootServices, Genet, + &gEfiEventExitBootServicesGuid, + &Genet->ExitBootServicesEvent); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, + "GenetDriverBindingStart: failed to register for ExitBootServices ev= ent - %r\n", + Status)); + goto FreeDevice; + } + Status =3D gBS->InstallMultipleProtocolInterfaces (&ControllerHandle, &gEfiSimpleNetworkProtocolGuid, &Genet->Snp, NULL); @@ -251,6 +279,9 @@ GenetDriverBindingStop ( return Status; } =20 + Status =3D gBS->CloseEvent (Genet->ExitBootServicesEvent); + ASSERT_EFI_ERROR (Status); + GenetDmaFree (Genet); =20 Status =3D gBS->CloseProtocol (ControllerHandle, --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#59055): https://edk2.groups.io/g/devel/message/59055 Mute This Topic: https://groups.io/mt/74130979/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-