From nobody Wed May 8 05:08:12 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+58982+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+58982+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1589107404; cv=none; d=zohomail.com; s=zohoarc; b=ZgF8L5w8Lj7z/hqQvvLfuPZeN88t8ZL15QnVooKCKWOdsxOp5skrAHcma5EzcMpnI4PiqDF0GspcqbE+tEv2B6vPcdkaR9xo2hZsQuuOea9cs0Iq9OBPG4E7PuriqIp4prQJ18FOnxkPuLhcJjEQIpE2lcj1Ze3qJgULn1voOVo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589107404; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=BlzWONFIbK8OjPeK1NjndINZbw77EfHEoLIJw/Nk4/s=; b=WQiH6BycybuKCDjaAWy60TjWOhyo5XuUNTuSkjjrGh7rmWxABrKYUKoimVQtedANEPNOn+gLTos1bZBHTQCJ47rVLPPSrj6lal5IzLsFUvKvhnCVhQc6esinGe06K0EB5M9nunXiCHMMw6AFMlpIODCCj8/pxJcVxANGY/gjtj0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+58982+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1589107404199970.0228069805215; Sun, 10 May 2020 03:43:24 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 4gC7YY1788612xUWzSTWoqQg; Sun, 10 May 2020 03:43:23 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.12627.1589107403238038305 for ; Sun, 10 May 2020 03:43:23 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D2E2A101E; Sun, 10 May 2020 03:43:22 -0700 (PDT) X-Received: from e123331-lin.nice.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0540F3F68F; Sun, 10 May 2020 03:43:20 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Pete Batard , Jared McNeill , Andrei Warkentin , Samer El-Haj-Mahmoud Subject: [edk2-devel] [PATCH edk2-platforms v2 1/4] Silicon/Broadcom/BcmGenetDxe: whitespace/cosmetic cleanup Date: Sun, 10 May 2020 12:42:56 +0200 Message-Id: <20200510104259.23739-2-ard.biesheuvel@arm.com> In-Reply-To: <20200510104259.23739-1-ard.biesheuvel@arm.com> References: <20200510104259.23739-1-ard.biesheuvel@arm.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ard.biesheuvel@arm.com X-Gm-Message-State: jkBHZ0TipQdZECoTB0IVtHxBx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1589107403; bh=qD/heBaT61+aRAzMwSkvj+Z1VSg96X2JZkWPAzqeuuY=; h=Cc:Date:From:Reply-To:Subject:To; b=tNP5DLnyZ+iTexd6IuVtBYrjQZCxka+4RBSom/cnvyMHNelIjiHQ2Gy2uW/ZqLQ1t4L oPMwzapCsaiAINSqiPJA+S058yDv7tGh509zhBRMP0FUyGD5X0ORpVXwyneAohMw+GOPW 8O6XDMI6tmsv4zlLwqX57PTpKiR7KwS9N3Q= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Ard Biesheuvel --- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c | 672 ++++++++++-----= ----- 1 file changed, 340 insertions(+), 332 deletions(-) diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon= /Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c index d471b1cadadc..af7c06656433 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c @@ -31,13 +31,13 @@ STATIC UINT32 GenetMmioRead ( - IN GENET_PRIVATE_DATA *Genet, - IN UINT32 Offset - ) + IN GENET_PRIVATE_DATA *Genet, + IN UINT32 Offset + ) { - ASSERT((Offset & 3) =3D=3D 0); + ASSERT ((Offset & 3) =3D=3D 0); =20 - return MmioRead32 (Genet->RegBase + Offset); + return MmioRead32 (Genet->RegBase + Offset); } =20 /** @@ -53,15 +53,15 @@ GenetMmioRead ( STATIC VOID GenetMmioWrite ( - IN GENET_PRIVATE_DATA *Genet, - IN UINT32 Offset, - IN UINT32 Data - ) + IN GENET_PRIVATE_DATA *Genet, + IN UINT32 Offset, + IN UINT32 Data + ) { - ASSERT((Offset & 3) =3D=3D 0); + ASSERT ((Offset & 3) =3D=3D 0); =20 - ArmDataSynchronizationBarrier (); - MmioWrite32 (Genet->RegBase + Offset, Data); + ArmDataSynchronizationBarrier (); + MmioWrite32 (Genet->RegBase + Offset, Data); } =20 /** @@ -79,37 +79,38 @@ GenetMmioWrite ( EFI_STATUS EFIAPI GenetPhyRead ( - IN VOID *Priv, - IN UINT8 PhyAddr, - IN UINT8 Reg, - OUT UINT16 *Data - ) + IN VOID *Priv, + IN UINT8 PhyAddr, + IN UINT8 Reg, + OUT UINT16 *Data + ) { - GENET_PRIVATE_DATA *Genet =3D Priv; - UINTN Retry; - UINT32 Value; + GENET_PRIVATE_DATA *Genet =3D Priv; + UINTN Retry; + UINT32 Value; =20 - Value =3D GENET_MDIO_READ | - GENET_MDIO_START_BUSY | - __SHIFTIN(PhyAddr, GENET_MDIO_PMD) | - __SHIFTIN(Reg, GENET_MDIO_REG); - GenetMmioWrite (Genet, GENET_MDIO_CMD, Value); + Value =3D GENET_MDIO_READ | + GENET_MDIO_START_BUSY | + __SHIFTIN(PhyAddr, GENET_MDIO_PMD) | + __SHIFTIN(Reg, GENET_MDIO_REG); + GenetMmioWrite (Genet, GENET_MDIO_CMD, Value); =20 - for (Retry =3D GENET_PHY_RETRY; Retry > 0; Retry--) { - Value =3D GenetMmioRead (Genet, GENET_MDIO_CMD); - if ((Value & GENET_MDIO_START_BUSY) =3D=3D 0) { - *Data =3D Value & 0xffff; - break; - } - gBS->Stall (10); + for (Retry =3D GENET_PHY_RETRY; Retry > 0; Retry--) { + Value =3D GenetMmioRead (Genet, GENET_MDIO_CMD); + if ((Value & GENET_MDIO_START_BUSY) =3D=3D 0) { + *Data =3D Value & 0xffff; + break; } + gBS->Stall (10); + } =20 - if (Retry =3D=3D 0) { - DEBUG ((DEBUG_ERROR, "GenetPhyRead: Timeout reading PhyAddr %d, Re= g %d\n", PhyAddr, Reg)); - return EFI_DEVICE_ERROR; - } + if (Retry =3D=3D 0) { + DEBUG ((DEBUG_ERROR, + "GenetPhyRead: Timeout reading PhyAddr %d, Reg %d\n", PhyAddr, Reg)); + return EFI_DEVICE_ERROR; + } =20 - return EFI_SUCCESS; + return EFI_SUCCESS; } =20 /** @@ -127,36 +128,37 @@ GenetPhyRead ( EFI_STATUS EFIAPI GenetPhyWrite ( - IN VOID *Priv, - IN UINT8 PhyAddr, - IN UINT8 Reg, - IN UINT16 Data - ) + IN VOID *Priv, + IN UINT8 PhyAddr, + IN UINT8 Reg, + IN UINT16 Data + ) { - GENET_PRIVATE_DATA *Genet =3D Priv; - UINTN Retry; - UINT32 Value; + GENET_PRIVATE_DATA *Genet =3D Priv; + UINTN Retry; + UINT32 Value; =20 - Value =3D GENET_MDIO_WRITE | - GENET_MDIO_START_BUSY | - __SHIFTIN(PhyAddr, GENET_MDIO_PMD) | - __SHIFTIN(Reg, GENET_MDIO_REG); - GenetMmioWrite (Genet, GENET_MDIO_CMD, Value | Data); + Value =3D GENET_MDIO_WRITE | + GENET_MDIO_START_BUSY | + __SHIFTIN(PhyAddr, GENET_MDIO_PMD) | + __SHIFTIN(Reg, GENET_MDIO_REG); + GenetMmioWrite (Genet, GENET_MDIO_CMD, Value | Data); =20 - for (Retry =3D GENET_PHY_RETRY; Retry > 0; Retry--) { - Value =3D GenetMmioRead (Genet, GENET_MDIO_CMD); - if ((Value & GENET_MDIO_START_BUSY) =3D=3D 0) { - break; - } - gBS->Stall (10); + for (Retry =3D GENET_PHY_RETRY; Retry > 0; Retry--) { + Value =3D GenetMmioRead (Genet, GENET_MDIO_CMD); + if ((Value & GENET_MDIO_START_BUSY) =3D=3D 0) { + break; } + gBS->Stall (10); + } =20 - if (Retry =3D=3D 0) { - DEBUG ((DEBUG_ERROR, "GenetPhyRead: Timeout writing PhyAddr %d, Re= g %d\n", PhyAddr, Reg)); - return EFI_DEVICE_ERROR; - } + if (Retry =3D=3D 0) { + DEBUG ((DEBUG_ERROR, + "GenetPhyRead: Timeout writing PhyAddr %d, Reg %d\n", PhyAddr, Reg)); + return EFI_DEVICE_ERROR; + } =20 - return EFI_SUCCESS; + return EFI_SUCCESS; } =20 /** @@ -170,13 +172,13 @@ GenetPhyWrite ( VOID EFIAPI GenetPhyConfigure ( - IN VOID *Priv, - IN GENERIC_PHY_SPEED Speed, - IN GENERIC_PHY_DUPLEX Duplex - ) + IN VOID *Priv, + IN GENERIC_PHY_SPEED Speed, + IN GENERIC_PHY_DUPLEX Duplex + ) { - GENET_PRIVATE_DATA *Genet =3D Priv; - UINT32 Value; + GENET_PRIVATE_DATA *Genet =3D Priv; + UINT32 Value; =20 Value =3D GenetMmioRead (Genet, GENET_EXT_RGMII_OOB_CTRL); Value &=3D ~GENET_EXT_RGMII_OOB_OOB_DISABLE; @@ -293,38 +295,40 @@ GenetPhyResetAction ( **/ VOID GenetReset ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINT32 Value; + UINT32 Value; =20 - Value =3D GenetMmioRead (Genet, GENET_SYS_RBUF_FLUSH_CTRL); - Value |=3D GENET_SYS_RBUF_FLUSH_RESET; - GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value); - gBS->Stall (10); + Value =3D GenetMmioRead (Genet, GENET_SYS_RBUF_FLUSH_CTRL); + Value |=3D GENET_SYS_RBUF_FLUSH_RESET; + GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value); + gBS->Stall (10); =20 - Value &=3D ~GENET_SYS_RBUF_FLUSH_RESET; - GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value); - gBS->Stall (10); + Value &=3D ~GENET_SYS_RBUF_FLUSH_RESET; + GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value); + gBS->Stall (10); =20 - GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, 0); - gBS->Stall (10); + GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, 0); + gBS->Stall (10); =20 - GenetMmioWrite (Genet, GENET_UMAC_CMD, 0); - GenetMmioWrite (Genet, GENET_UMAC_CMD, GENET_UMAC_CMD_LCL_LOOP_EN | GE= NET_UMAC_CMD_SW_RESET); - gBS->Stall (10); - GenetMmioWrite (Genet, GENET_UMAC_CMD, 0); + GenetMmioWrite (Genet, GENET_UMAC_CMD, 0); + GenetMmioWrite (Genet, GENET_UMAC_CMD, + GENET_UMAC_CMD_LCL_LOOP_EN | GENET_UMAC_CMD_SW_RESET); + gBS->Stall (10); + GenetMmioWrite (Genet, GENET_UMAC_CMD, 0); =20 - GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, GENET_UMAC_MIB_RESET_RUNT = | GENET_UMAC_MIB_RESET_RX | GENET_UMAC_MIB_RESET_TX); - GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, 0); + GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, + GENET_UMAC_MIB_RESET_RUNT | GENET_UMAC_MIB_RESET_RX | GENET_UMAC_MIB_R= ESET_TX); + GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, 0); =20 - GenetMmioWrite (Genet, GENET_UMAC_MAX_FRAME_LEN, 1536); + GenetMmioWrite (Genet, GENET_UMAC_MAX_FRAME_LEN, 1536); =20 - Value =3D GenetMmioRead (Genet, GENET_RBUF_CTRL); - Value |=3D GENET_RBUF_ALIGN_2B; - GenetMmioWrite (Genet, GENET_RBUF_CTRL, Value); + Value =3D GenetMmioRead (Genet, GENET_RBUF_CTRL); + Value |=3D GENET_RBUF_ALIGN_2B; + GenetMmioWrite (Genet, GENET_RBUF_CTRL, Value); =20 - GenetMmioWrite (Genet, GENET_RBUF_TBUF_SIZE_CTRL, 1); + GenetMmioWrite (Genet, GENET_RBUF_TBUF_SIZE_CTRL, 1); } =20 /** @@ -337,20 +341,20 @@ GenetReset ( VOID EFIAPI GenetSetMacAddress ( - IN GENET_PRIVATE_DATA *Genet, - IN EFI_MAC_ADDRESS *MacAddr - ) + IN GENET_PRIVATE_DATA *Genet, + IN EFI_MAC_ADDRESS *MacAddr + ) { - UINT32 Value; + UINT32 Value; =20 - Value =3D MacAddr->Addr[3] | - MacAddr->Addr[2] << 8 | - MacAddr->Addr[1] << 16 | - MacAddr->Addr[0] << 24; - GenetMmioWrite (Genet, GENET_UMAC_MAC0, Value); - Value =3D MacAddr->Addr[5] | - MacAddr->Addr[4] << 8; - GenetMmioWrite (Genet, GENET_UMAC_MAC1, Value); + Value =3D MacAddr->Addr[3] | + MacAddr->Addr[2] << 8 | + MacAddr->Addr[1] << 16 | + MacAddr->Addr[0] << 24; + GenetMmioWrite (Genet, GENET_UMAC_MAC0, Value); + Value =3D MacAddr->Addr[5] | + MacAddr->Addr[4] << 8; + GenetMmioWrite (Genet, GENET_UMAC_MAC1, Value); } =20 /** @@ -362,24 +366,24 @@ GenetSetMacAddress ( **/ VOID GenetSetPhyMode ( - IN GENET_PRIVATE_DATA *Genet, - IN GENET_PHY_MODE PhyMode - ) + IN GENET_PRIVATE_DATA *Genet, + IN GENET_PHY_MODE PhyMode + ) { - UINT32 Value; + UINT32 Value; =20 - switch (PhyMode) { - case GENET_PHY_MODE_RGMII: - case GENET_PHY_MODE_RGMII_RXID: - case GENET_PHY_MODE_RGMII_TXID: - case GENET_PHY_MODE_RGMII_ID: - Value =3D GENET_SYS_PORT_MODE_EXT_GPHY; - break; - default: - Value =3D 0; - break; - } - GenetMmioWrite (Genet, GENET_SYS_PORT_CTRL, Value); + switch (PhyMode) { + case GENET_PHY_MODE_RGMII: + case GENET_PHY_MODE_RGMII_RXID: + case GENET_PHY_MODE_RGMII_TXID: + case GENET_PHY_MODE_RGMII_ID: + Value =3D GENET_SYS_PORT_MODE_EXT_GPHY; + break; + default: + Value =3D 0; + break; + } + GenetMmioWrite (Genet, GENET_SYS_PORT_CTRL, Value); } =20 /** @@ -390,31 +394,32 @@ GenetSetPhyMode ( **/ VOID GenetEnableTxRx ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINT32 Value; - UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; + UINT32 Value; + UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; =20 - // Start TX DMA on default queue - Value =3D GenetMmioRead (Genet, GENET_TX_DMA_CTRL); - Value |=3D GENET_TX_DMA_CTRL_EN; - Value |=3D GENET_TX_DMA_CTRL_RBUF_EN(Qid); - GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value); + // Start TX DMA on default queue + Value =3D GenetMmioRead (Genet, GENET_TX_DMA_CTRL); + Value |=3D GENET_TX_DMA_CTRL_EN; + Value |=3D GENET_TX_DMA_CTRL_RBUF_EN (Qid); + GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value); =20 - // Start RX DMA on default queue - Value =3D GenetMmioRead (Genet, GENET_RX_DMA_CTRL); - Value |=3D GENET_RX_DMA_CTRL_EN; - Value |=3D GENET_RX_DMA_CTRL_RBUF_EN(Qid); - GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value); + // Start RX DMA on default queue + Value =3D GenetMmioRead (Genet, GENET_RX_DMA_CTRL); + Value |=3D GENET_RX_DMA_CTRL_EN; + Value |=3D GENET_RX_DMA_CTRL_RBUF_EN (Qid); + GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value); =20 - // Enable transmitter and receiver - Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); - Value |=3D GENET_UMAC_CMD_TXEN | GENET_UMAC_CMD_RXEN; - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); + // Enable transmitter and receiver + Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); + Value |=3D GENET_UMAC_CMD_TXEN | GENET_UMAC_CMD_RXEN; + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); =20 - // Enable interrupts - GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR_MASK, GENET_IRQ_TXDMA_DO= NE | GENET_IRQ_RXDMA_DONE); + // Enable interrupts + GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR_MASK, + GENET_IRQ_TXDMA_DONE | GENET_IRQ_RXDMA_DONE); } =20 /** @@ -425,42 +430,42 @@ GenetEnableTxRx ( **/ VOID GenetDisableTxRx ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINT32 Value; - UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; + UINT32 Value; + UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; =20 - // Disable interrupts - GenetMmioWrite (Genet, GENET_INTRL2_CPU_SET_MASK, 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR, 0xFFFFFFFF); + // Disable interrupts + GenetMmioWrite (Genet, GENET_INTRL2_CPU_SET_MASK, 0xFFFFFFFF); + GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR, 0xFFFFFFFF); =20 - // Disable receiver - Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); - Value &=3D ~GENET_UMAC_CMD_RXEN; - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); + // Disable receiver + Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); + Value &=3D ~GENET_UMAC_CMD_RXEN; + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); =20 - // Stop RX DMA - Value =3D GenetMmioRead (Genet, GENET_RX_DMA_CTRL); - Value &=3D ~GENET_RX_DMA_CTRL_EN; - Value &=3D ~GENET_RX_DMA_CTRL_RBUF_EN(Qid); - GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value); + // Stop RX DMA + Value =3D GenetMmioRead (Genet, GENET_RX_DMA_CTRL); + Value &=3D ~GENET_RX_DMA_CTRL_EN; + Value &=3D ~GENET_RX_DMA_CTRL_RBUF_EN (Qid); + GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value); =20 - // Stop TX DMA - Value =3D GenetMmioRead (Genet, GENET_TX_DMA_CTRL); - Value &=3D ~GENET_TX_DMA_CTRL_EN; - Value &=3D ~GENET_TX_DMA_CTRL_RBUF_EN(Qid); - GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value); + // Stop TX DMA + Value =3D GenetMmioRead (Genet, GENET_TX_DMA_CTRL); + Value &=3D ~GENET_TX_DMA_CTRL_EN; + Value &=3D ~GENET_TX_DMA_CTRL_RBUF_EN (Qid); + GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value); =20 - // Flush data in the TX FIFO - GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 1); - gBS->Stall (10); - GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 0); + // Flush data in the TX FIFO + GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 1); + gBS->Stall (10); + GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 0); =20 - // Disable transmitter - Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); - Value &=3D ~GENET_UMAC_CMD_TXEN; - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); + // Disable transmitter + Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); + Value &=3D ~GENET_UMAC_CMD_TXEN; + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); } =20 /** @@ -472,19 +477,19 @@ GenetDisableTxRx ( **/ VOID GenetSetPromisc ( - IN GENET_PRIVATE_DATA *Genet, - IN BOOLEAN Enable - ) + IN GENET_PRIVATE_DATA *Genet, + IN BOOLEAN Enable + ) { - UINT32 Value; + UINT32 Value; =20 - Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); - if (Enable) { - Value |=3D GENET_UMAC_CMD_PROMISC; - } else { - Value &=3D ~GENET_UMAC_CMD_PROMISC; - } - GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); + Value =3D GenetMmioRead (Genet, GENET_UMAC_CMD); + if (Enable) { + Value |=3D GENET_UMAC_CMD_PROMISC; + } else { + Value &=3D ~GENET_UMAC_CMD_PROMISC; + } + GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); } =20 /** @@ -495,63 +500,63 @@ GenetSetPromisc ( **/ VOID GenetDmaInitRings ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; + UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; =20 - Genet->TxQueued =3D 0; - Genet->TxNext =3D 0; - Genet->TxConsIndex =3D 0; - Genet->TxProdIndex =3D 0; + Genet->TxQueued =3D 0; + Genet->TxNext =3D 0; + Genet->TxConsIndex =3D 0; + Genet->TxProdIndex =3D 0; =20 - Genet->RxConsIndex =3D 0; - Genet->RxProdIndex =3D 0; + Genet->RxConsIndex =3D 0; + Genet->RxProdIndex =3D 0; =20 - // Configure TX queue - GenetMmioWrite (Genet, GENET_TX_SCB_BURST_SIZE, 0x08); - GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_CONS_INDEX(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_RING_BUF_SIZE(Qid), - __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_TX_DMA_RING_BUF_= SIZE_DESC_COUNT) | - __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_TX_DMA_RING_BUF= _SIZE_BUF_LENGTH)); - GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_LO(Qid), - GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1); - GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_MBUF_DONE_THRES(Qid), 1); - GenetMmioWrite (Genet, GENET_TX_DMA_FLOW_PERIOD(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_HI(Qid), 0); + // Configure TX queue + GenetMmioWrite (Genet, GENET_TX_SCB_BURST_SIZE, 0x08); + GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_CONS_INDEX (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_RING_BUF_SIZE (Qid), + __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_TX_DMA_RING_BUF_SIZE_DESC_COUNT)= | + __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_TX_DMA_RING_BUF_SIZE_BUF_LENGTH= )); + GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_LO (Qid), + GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1); + GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_MBUF_DONE_THRES (Qid), 1); + GenetMmioWrite (Genet, GENET_TX_DMA_FLOW_PERIOD (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_HI (Qid), 0); =20 - // Enable TX queue - GenetMmioWrite (Genet, GENET_TX_DMA_RING_CFG, (1U << Qid)); + // Enable TX queue + GenetMmioWrite (Genet, GENET_TX_DMA_RING_CFG, (1U << Qid)); =20 - // Configure RX queue - GenetMmioWrite (Genet, GENET_RX_SCB_BURST_SIZE, 0x08); - GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_PROD_INDEX(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_RING_BUF_SIZE(Qid), - __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_RX_DMA_RING_BUF_= SIZE_DESC_COUNT) | - __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_RX_DMA_RING_BUF= _SIZE_BUF_LENGTH)); - GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_LO(Qid), - GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1); - GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_HI(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_XON_XOFF_THRES(Qid), - __SHIFTIN(5, GENET_RX_DMA_XON_XOFF_THRES_LO) | - __SHIFTIN(GENET_DMA_DESC_COUNT >> 4, GENET_RX_DMA_XON_= XOFF_THRES_HI)); - GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_LO(Qid), 0); - GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_HI(Qid), 0); + // Configure RX queue + GenetMmioWrite (Genet, GENET_RX_SCB_BURST_SIZE, 0x08); + GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_PROD_INDEX (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_RING_BUF_SIZE (Qid), + __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_RX_DMA_RING_BUF_SIZE_DESC_COUNT)= | + __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_RX_DMA_RING_BUF_SIZE_BUF_LENGTH= )); + GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_LO (Qid), + GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1); + GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_HI (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_XON_XOFF_THRES (Qid), + __SHIFTIN(5, GENET_RX_DMA_XON_XOFF_THRES_LO) | + __SHIFTIN(GENET_DMA_DESC_COUNT >> 4, GENET_RX_DMA_XON_XOFF_THRES_HI)); + GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_LO (Qid), 0); + GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_HI (Qid), 0); =20 - // Enable RX queue - GenetMmioWrite (Genet, GENET_RX_DMA_RING_CFG, (1U << Qid)); + // Enable RX queue + GenetMmioWrite (Genet, GENET_RX_DMA_RING_CFG, (1U << Qid)); } =20 /** @@ -564,22 +569,22 @@ GenetDmaInitRings ( **/ EFI_STATUS GenetDmaAlloc ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - EFI_STATUS Status; - UINTN n; + EFI_STATUS Status; + UINTN Idx; =20 - for (n =3D 0; n < GENET_DMA_DESC_COUNT; n++) { - Status =3D DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAG= ES (GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[n]); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "GenetDmaAlloc: Failed to allocate RX buf= fer: %r\n", Status)); - GenetDmaFree (Genet); - return Status; - } + for (Idx =3D 0; Idx < GENET_DMA_DESC_COUNT; Idx++) { + Status =3D DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (= GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[Idx]); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "GenetDmaAlloc: Failed to allocate RX buffer: %= r\n", Status)); + GenetDmaFree (Genet); + return Status; } + } =20 - return EFI_SUCCESS; + return EFI_SUCCESS; } =20 /** @@ -594,33 +599,34 @@ GenetDmaAlloc ( **/ EFI_STATUS GenetDmaMapRxDescriptor ( - IN GENET_PRIVATE_DATA * Genet, - IN UINT8 DescIndex - ) + IN GENET_PRIVATE_DATA * Genet, + IN UINT8 DescIndex + ) { - EFI_STATUS Status; - UINTN DmaNumberOfBytes; + EFI_STATUS Status; + UINTN DmaNumberOfBytes; =20 - ASSERT (Genet->RxBufferMap[DescIndex].Mapping =3D=3D NULL); - ASSERT (Genet->RxBuffer[DescIndex] !=3D NULL); + ASSERT (Genet->RxBufferMap[DescIndex].Mapping =3D=3D NULL); + ASSERT (Genet->RxBuffer[DescIndex] !=3D NULL); =20 - DmaNumberOfBytes =3D GENET_MAX_PACKET_SIZE; - Status =3D DmaMap (MapOperationBusMasterWrite, - (VOID *)Genet->RxBuffer[DescIndex], - &DmaNumberOfBytes, - &Genet->RxBufferMap[DescIndex].Pa, - &Genet->RxBufferMap[DescIndex].Mapping); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "GenetDmaMapRxDescriptor: Failed to map RX bu= ffer: %r\n", Status)); - return Status; - } + DmaNumberOfBytes =3D GENET_MAX_PACKET_SIZE; + Status =3D DmaMap (MapOperationBusMasterWrite, + (VOID *)Genet->RxBuffer[DescIndex], + &DmaNumberOfBytes, + &Genet->RxBufferMap[DescIndex].Pa, + &Genet->RxBufferMap[DescIndex].Mapping); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "GenetDmaMapRxDescriptor: Failed to map RX buffer: %r\n", Status)); + return Status; + } =20 - //DEBUG ((DEBUG_INFO, "GenetDmaMapRxDescriptor: Desc 0x%X mapped to 0x= %X\n", DescIndex, Genet->RxBufferMap[DescIndex].Pa)); + GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_LO (DescIndex), + Genet->RxBufferMap[DescIndex].Pa & 0xFFFFFFFF); + GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_HI (DescIndex), + (Genet->RxBufferMap[DescIndex].Pa >> 32) & 0xFFFFFFFF); =20 - GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_LO (DescIndex), Genet->Rx= BufferMap[DescIndex].Pa & 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_HI (DescIndex), (Genet->R= xBufferMap[DescIndex].Pa >> 32) & 0xFFFFFFFF); - - return EFI_SUCCESS; + return EFI_SUCCESS; } =20 /** @@ -632,14 +638,14 @@ GenetDmaMapRxDescriptor ( **/ VOID GenetDmaUnmapRxDescriptor ( - IN GENET_PRIVATE_DATA * Genet, - IN UINT8 DescIndex - ) + IN GENET_PRIVATE_DATA * Genet, + IN UINT8 DescIndex + ) { - if (Genet->RxBufferMap[DescIndex].Mapping !=3D NULL) { - DmaUnmap (Genet->RxBufferMap[DescIndex].Mapping); - Genet->RxBufferMap[DescIndex].Mapping =3D NULL; - } + if (Genet->RxBufferMap[DescIndex].Mapping !=3D NULL) { + DmaUnmap (Genet->RxBufferMap[DescIndex].Mapping); + Genet->RxBufferMap[DescIndex].Mapping =3D NULL; + } } =20 /** @@ -651,19 +657,20 @@ GenetDmaUnmapRxDescriptor ( **/ VOID GenetDmaFree ( - IN GENET_PRIVATE_DATA *Genet - ) + IN GENET_PRIVATE_DATA *Genet + ) { - UINTN n; + UINTN Idx; =20 - for (n =3D 0; n < GENET_DMA_DESC_COUNT; n++) { - GenetDmaUnmapRxDescriptor (Genet, n); + for (Idx =3D 0; Idx < GENET_DMA_DESC_COUNT; Idx++) { + GenetDmaUnmapRxDescriptor (Genet, Idx); =20 - if (Genet->RxBuffer[n] !=3D NULL) { - DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), Gene= t->RxBuffer[n]); - Genet->RxBuffer[n] =3D NULL; - } + if (Genet->RxBuffer[Idx] !=3D NULL) { + DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), + Genet->RxBuffer[Idx]); + Genet->RxBuffer[Idx] =3D NULL; } + } } =20 /** @@ -677,26 +684,29 @@ GenetDmaFree ( **/ VOID GenetDmaTriggerTx ( - IN GENET_PRIVATE_DATA * Genet, - IN UINT8 DescIndex, - IN EFI_PHYSICAL_ADDRESS PhysAddr, - IN UINTN NumberOfBytes - ) + IN GENET_PRIVATE_DATA * Genet, + IN UINT8 DescIndex, + IN EFI_PHYSICAL_ADDRESS PhysAddr, + IN UINTN NumberOfBytes + ) { - UINT32 DescStatus; - UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; + UINT32 DescStatus; + UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; =20 - DescStatus =3D GENET_TX_DESC_STATUS_SOP | - GENET_TX_DESC_STATUS_EOP | - GENET_TX_DESC_STATUS_CRC | - GENET_TX_DESC_STATUS_QTAG | - __SHIFTIN(NumberOfBytes, GENET_TX_DESC_STATUS_BUFLEN); + DescStatus =3D GENET_TX_DESC_STATUS_SOP | + GENET_TX_DESC_STATUS_EOP | + GENET_TX_DESC_STATUS_CRC | + GENET_TX_DESC_STATUS_QTAG | + __SHIFTIN(NumberOfBytes, GENET_TX_DESC_STATUS_BUFLEN); =20 - GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_LO(DescIndex), PhysAddr &= 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_HI(DescIndex), (PhysAddr = >> 32) & 0xFFFFFFFF); - GenetMmioWrite (Genet, GENET_TX_DESC_STATUS(DescIndex), DescStatus); + GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_LO(DescIndex), + PhysAddr & 0xFFFFFFFF); + GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_HI(DescIndex), + (PhysAddr >> 32) & 0xFFFFFFFF); + GenetMmioWrite (Genet, GENET_TX_DESC_STATUS(DescIndex), DescStatus); =20 - GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), (DescIndex + 1) = & 0xFFFF); + GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), + (DescIndex + 1) & 0xFFFF); } =20 /** @@ -708,24 +718,24 @@ GenetDmaTriggerTx ( **/ VOID GenetTxIntr ( - IN GENET_PRIVATE_DATA *Genet, - OUT VOID **TxBuf - ) + IN GENET_PRIVATE_DATA *Genet, + OUT VOID **TxBuf + ) { - UINT32 ConsIndex, Total; - UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; + UINT32 ConsIndex, Total; + UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; =20 - ConsIndex =3D GenetMmioRead (Genet, GENET_TX_DMA_CONS_INDEX (Qid)) & 0= xFFFF; + ConsIndex =3D GenetMmioRead (Genet, GENET_TX_DMA_CONS_INDEX (Qid)) & 0xF= FFF; =20 - Total =3D (ConsIndex - Genet->TxConsIndex) & 0xFFFF; - if (Genet->TxQueued > 0 && Total > 0) { - *TxBuf =3D Genet->TxBuffer[Genet->TxNext]; - Genet->TxQueued--; - Genet->TxNext =3D (Genet->TxNext + 1) % GENET_DMA_DESC_COUNT; - Genet->TxConsIndex++; - } else { - *TxBuf =3D NULL; - } + Total =3D (ConsIndex - Genet->TxConsIndex) & 0xFFFF; + if (Genet->TxQueued > 0 && Total > 0) { + *TxBuf =3D Genet->TxBuffer[Genet->TxNext]; + Genet->TxQueued--; + Genet->TxNext =3D (Genet->TxNext + 1) % GENET_DMA_DESC_COUNT; + Genet->TxConsIndex++; + } else { + *TxBuf =3D NULL; + } } =20 /** @@ -742,32 +752,30 @@ GenetTxIntr ( **/ EFI_STATUS GenetRxIntr ( - IN GENET_PRIVATE_DATA *Genet, - OUT UINT8 *DescIndex, - OUT UINTN *FrameLength - ) + IN GENET_PRIVATE_DATA *Genet, + OUT UINT8 *DescIndex, + OUT UINTN *FrameLength + ) { - EFI_STATUS Status; - UINT32 ProdIndex, Total; - UINT32 DescStatus; - UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; + EFI_STATUS Status; + UINT32 ProdIndex, Total; + UINT32 DescStatus; + UINT8 Qid =3D GENET_DMA_DEFAULT_QUEUE; =20 - ProdIndex =3D GenetMmioRead (Genet, GENET_RX_DMA_PROD_INDEX (Qid)) & 0= xFFFF; + ProdIndex =3D GenetMmioRead (Genet, GENET_RX_DMA_PROD_INDEX (Qid)) & 0xF= FFF; =20 - Total =3D (ProdIndex - Genet->RxConsIndex) & 0xFFFF; - if (Total > 0) { - *DescIndex =3D Genet->RxConsIndex % GENET_DMA_DESC_COUNT; - DescStatus =3D GenetMmioRead (Genet, GENET_RX_DESC_STATUS (*DescIn= dex)); - *FrameLength =3D __SHIFTOUT (DescStatus, GENET_RX_DESC_STATUS_BUFL= EN); + Total =3D (ProdIndex - Genet->RxConsIndex) & 0xFFFF; + if (Total > 0) { + *DescIndex =3D Genet->RxConsIndex % GENET_DMA_DESC_COUNT; + DescStatus =3D GenetMmioRead (Genet, GENET_RX_DESC_STATUS (*DescIndex)= ); + *FrameLength =3D __SHIFTOUT (DescStatus, GENET_RX_DESC_STATUS_BUFLEN); =20 - //DEBUG ((DEBUG_INFO, "GenetRxIntr: DescIndex=3D0x%X FrameLength= =3D0x%X\n", *DescIndex, *FrameLength)); + Genet->RxConsIndex =3D (Genet->RxConsIndex + 1) & 0xFFFF; + GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), Genet->RxConsInd= ex); + Status =3D EFI_SUCCESS; + } else { + Status =3D EFI_NOT_READY; + } =20 - Genet->RxConsIndex =3D (Genet->RxConsIndex + 1) & 0xFFFF; - GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), Genet->RxCon= sIndex); - Status =3D EFI_SUCCESS; - } else { - Status =3D EFI_NOT_READY; - } - - return Status; + return Status; } --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#58982): https://edk2.groups.io/g/devel/message/58982 Mute This Topic: https://groups.io/mt/74112946/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Wed May 8 05:08:12 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+58983+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+58983+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1589107407; cv=none; d=zohomail.com; s=zohoarc; b=FAJg4H/uPBsvHgYuK8mHh1qyfwRMW55rRjky5yvkf3BacLaFhZTmkIYMVZ9X/tA+AAhOjQPUnmhTEY41WPGaWXrzNx/88d3Fz+dPZnmIdRc0uWLUvhPR+PqK0/yS0Q0PgoJ16QbNFHdKx9Nv2hZvVhtZqLV+LC/ghrD2gmcCdMA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589107407; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=WbSqDA3f7MPCpRlWZsMEI1eFggWSIqvOtIW6FwPS6O0=; b=YXtkRDNrZOnCPAx+KSxjd3+1yPcDcVpATJkpVFM6xAGHUbBX8AMDjOyMIGgfXCrMciW6VsMmG+bRUrzdY+dcZiiRyWrWpFL6b/x/a+Fi5LSeUJvf/V3fBZp5/TPMgzeSGt+/eRQSFwkb/9fw/pzVDVuWqhvDdOhB90yKdanL294= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+58983+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 15891074070061020.1192132118886; Sun, 10 May 2020 03:43:27 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id S1vuYY1788612xZbGaXdfnyt; Sun, 10 May 2020 03:43:26 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.12424.1589107406016144566 for ; Sun, 10 May 2020 03:43:26 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C900B1FB; Sun, 10 May 2020 03:43:24 -0700 (PDT) X-Received: from e123331-lin.nice.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 29C193F68F; Sun, 10 May 2020 03:43:22 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Pete Batard , Jared McNeill , Andrei Warkentin , Samer El-Haj-Mahmoud Subject: [edk2-devel] [PATCH edk2-platforms v2 2/4] Silicon/Broadcom/BcmGenetDxe: add support for broadcast filtering Date: Sun, 10 May 2020 12:42:57 +0200 Message-Id: <20200510104259.23739-3-ard.biesheuvel@arm.com> In-Reply-To: <20200510104259.23739-1-ard.biesheuvel@arm.com> References: <20200510104259.23739-1-ard.biesheuvel@arm.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ard.biesheuvel@arm.com X-Gm-Message-State: vElSIddczy2WctPE4EASTzFZx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1589107406; bh=qJ5s9PeRuYg/FkpHpZYs29pcGJLmctfpiBzMi8/6i2g=; h=Cc:Date:From:Reply-To:Subject:To; b=N7D2xdcUB5AeFVvmtupI91Xy2vD9aICB6slXPWx/nfUj9w39vwn/NeN1k3GG8RhuHjD U5OvcqjRnSO2VwSzjx2C8/1Wb05Z5/m92Y3MVpo76IRvsygQKEeuPcMWOWBWthA8/QJhM OZGdPbu0flwJRQotJxMbBbRV/9JKOOM3fd4= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add a helper to configure the first MDF filter for filtering the broadcast Ethernet address. Signed-off-by: Ard Biesheuvel --- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h | 7 ++++++ Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c | 24 ++++++++++++++++= ++++ 2 files changed, 31 insertions(+) diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h b/Silicon= /Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h index 2e7b78322bcd..1dc7a51a1ca6 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h @@ -107,6 +107,7 @@ #define GENET_UMAC_MDF_CTRL 0xe50 #define GENET_UMAC_MDF_ADDR0(n) (0xe54 + (n) * 0x8) #define GENET_UMAC_MDF_ADDR1(n) (0xe58 + (n) * 0x8) +#define GENET_MAX_MDF_FILTER 17 =20 #define GENET_DMA_DESC_COUNT 256 #define GENET_DMA_DESC_SIZE 12 @@ -300,6 +301,12 @@ GenetSetPromisc ( IN BOOLEAN Enable ); =20 +VOID +GenetEnableBroadcastFilter ( + IN GENET_PRIVATE_DATA *Genet, + IN BOOLEAN Enable + ); + VOID GenetDmaInitRings ( IN GENET_PRIVATE_DATA *Genet diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon= /Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c index af7c06656433..2176bb451e7d 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c @@ -492,6 +492,30 @@ GenetSetPromisc ( GenetMmioWrite (Genet, GENET_UMAC_CMD, Value); } =20 +/** + Enable the MAC filter for the Ethernet broadcast address + + @param Genet[in] Pointer to GENET_PRIVATE_DATA. + @param Enable[in] Promiscuous mode state. + +**/ +VOID +GenetEnableBroadcastFilter ( + IN GENET_PRIVATE_DATA *Genet, + IN BOOLEAN Enable + ) +{ + UINT32 Value; + + Value =3D (1U << GENET_MAX_MDF_FILTER) - 1; + if (Enable) { + GenetMmioWrite (Genet, GENET_UMAC_MDF_ADDR0 (0), 0xffff); + GenetMmioWrite (Genet, GENET_UMAC_MDF_ADDR1 (0), 0xffffffff); + Value &=3D ~BIT0; + } + GenetMmioWrite (Genet, GENET_UMAC_MDF_CTRL, Value); +} + /** Configure DMA TX and RX queues, enabling them. =20 --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#58983): https://edk2.groups.io/g/devel/message/58983 Mute This Topic: https://groups.io/mt/74112947/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Wed May 8 05:08:12 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+58984+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+58984+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1589107407; cv=none; d=zohomail.com; s=zohoarc; b=e7JUSHEqjt1ujsKeN9VolLqTInTiVQv8oEUJyIaBqZ0iQvB57NfNcK/8WxHcHtgns+9zlWIxFMF0vS5PKCH+2b7+6J6594t7BPpPEZNtCgAYTqLMQj79q+Y1EYrX/CQUnctYwWRN9vpRTnS2ViJxfTLAq5WvRSSp6Wj+3jrer8U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589107407; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=J3zCS0RXTcj0XzIrJ1xRRs8JlrKDPY+a11+IrZXUU8A=; b=UX4Yujev00kKmuL/iDufKwVqr7JBJVDfIWyV/1UbyDfA1mIqkihm5Dr4HIsbu9TqeFjAocbbEnTCqylm1klns33YQi6nqGr0ufZ5NEuyO8vR/NtXVmQZ3XvVinK+GXBCK0TJysvp0Sn8kMGXe2N0LFPS8kLWcPiAOsceYWYKa4k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+58984+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1589107407893981.2554881761049; Sun, 10 May 2020 03:43:27 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id PLpaYY1788612xPS603jOVOK; Sun, 10 May 2020 03:43:27 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.12425.1589107406975511096 for ; Sun, 10 May 2020 03:43:27 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 90CCF1FB; Sun, 10 May 2020 03:43:26 -0700 (PDT) X-Received: from e123331-lin.nice.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 259B73F68F; Sun, 10 May 2020 03:43:25 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Pete Batard , Jared McNeill , Andrei Warkentin , Samer El-Haj-Mahmoud Subject: [edk2-devel] [PATCH edk2-platforms v2 3/4] Silicon/Broadcom/BcmGenetDxe: fix multicast/broadcast handling Date: Sun, 10 May 2020 12:42:58 +0200 Message-Id: <20200510104259.23739-4-ard.biesheuvel@arm.com> In-Reply-To: <20200510104259.23739-1-ard.biesheuvel@arm.com> References: <20200510104259.23739-1-ard.biesheuvel@arm.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ard.biesheuvel@arm.com X-Gm-Message-State: oo63S8m0cRx9NlHMEuwUmnM2x1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1589107407; bh=8z+JoKQzC3IqF06qej2mkEXyIR3uIaE0qKfz9jr7TOY=; h=Cc:Date:From:Reply-To:Subject:To; b=egFjm1HeYI2QzEhAJCp+Tu0U/h4hrQex6wrS1CDEpgO43t+VuERuHfTyUTBV/QtLSPh exg98CzZND3+0kBHhK4EQ2/K45sLzG//3s+2FE8+jAlfnLPtsS8U5rT5JfNyLOBBY+NhD iF8sSuFcbD3Vb8LI4DvnuuRXtKlO8dN0DN4= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Move the handling of the promiscuous receive control to the SNP ReceiveFilters() method where it belongs. Given that we do not support multicast filtering, only minimal handling is required to test the promiscuous bit and program the MAC accordingly. Any multicast handling will be done by the MNP layer above it. For reception of broadcast frames, wire up the new helper that programs the MDF filter bank accordingly. Signed-off-by: Ard Biesheuvel --- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c | 7 +++---- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c | 20 +++++++++---= -------- 2 files changed, 12 insertions(+), 15 deletions(-) diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c b/Sil= icon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c index e3d015dd0820..a6102421cc26 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c @@ -154,11 +154,10 @@ GenetDriverBindingStart ( Genet->SnpMode.NvRamSize =3D 0; Genet->SnpMode.NvRamAccessSize =3D 0; Genet->SnpMode.ReceiveFilterMask =3D EFI_SIMPLE_NETWORK_RECEIVE_UNI= CAST | - EFI_SIMPLE_NETWORK_RECEIVE_MULTI= CAST | EFI_SIMPLE_NETWORK_RECEIVE_BROAD= CAST | - EFI_SIMPLE_NETWORK_RECEIVE_PROMI= SCUOUS | - EFI_SIMPLE_NETWORK_RECEIVE_PROMI= SCUOUS_MULTICAST; - Genet->SnpMode.ReceiveFilterSetting =3D Genet->SnpMode.ReceiveFilterMa= sk; + EFI_SIMPLE_NETWORK_RECEIVE_PROMI= SCUOUS; + Genet->SnpMode.ReceiveFilterSetting =3D EFI_SIMPLE_NETWORK_RECEIVE_UNI= CAST | + EFI_SIMPLE_NETWORK_RECEIVE_BROAD= CAST; Genet->SnpMode.MaxMCastFilterCount =3D 0; Genet->SnpMode.MCastFilterCount =3D 0; Genet->SnpMode.IfType =3D NET_IFTYPE_ETHERNET; diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c b/Sil= icon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c index bf28448445d1..e6de4653cde9 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c @@ -148,10 +148,6 @@ GenetSimpleNetworkInitialize ( } =20 GenetSetMacAddress (Genet, &Genet->SnpMode.CurrentAddress); - /* - * TODO: this belongs in GenetSimpleNetworkReceiveFilters, not here. - */ - GenetSetPromisc (Genet, TRUE); =20 GenetDmaInitRings (Genet); =20 @@ -306,6 +302,10 @@ GenetSimpleNetworkReceiveFilters ( } =20 Genet =3D GENET_PRIVATE_DATA_FROM_SNP_THIS (This); + if (((Enable | Disable) & ~Genet->SnpMode.ReceiveFilterMask) !=3D 0 || + (!ResetMCastFilter && MCastFilterCnt > Genet->SnpMode.MaxMCastFilter= Count)) { + return EFI_INVALID_PARAMETER; + } if (Genet->SnpMode.State =3D=3D EfiSimpleNetworkStopped) { return EFI_NOT_STARTED; } @@ -313,13 +313,11 @@ GenetSimpleNetworkReceiveFilters ( return EFI_DEVICE_ERROR; } =20 - // - // Can't actually return EFI_UNSUPPORTED, so just ignore the filters - // (we set promiscuous mode ON inside GenetSimpleNetworkInitialize). - // - // TODO: move promisc handling here. - // TODO 2: support multicast/broadcast. - // + GenetEnableBroadcastFilter (Genet, + (Enable & ~Disable & EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST) !=3D 0); + + GenetSetPromisc (Genet, + (Enable & ~Disable & EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS) !=3D 0); =20 return EFI_SUCCESS; } --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#58984): https://edk2.groups.io/g/devel/message/58984 Mute This Topic: https://groups.io/mt/74112948/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Wed May 8 05:08:12 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+58985+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+58985+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1589107409; cv=none; d=zohomail.com; s=zohoarc; b=BPGYJUi8XteiBUYVtxs5DpiLHdyGF7IFZwQTjmEgkb7usYhtcWvWjQ/ZrvziCDELMb4c67eYDcKAgh2CrN1D6ODXbPvbwgGvwDevZ//mHDVHCZYA4f0TnF7UApS+DBBuijCeSH/3vdaU+T3HPdSF3NrxowIpdkd0thlpJqjQX3U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1589107409; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=wWZyPeIFlkrUIODmfAn8lDVUC95bGCo0iUJtEf4/zF4=; b=m6Mozg+exCnhUTGvad4HMmNh1BwZjr1O4v6JWInr9uCPNTnhe9KXgmniwKByagMXNLqr4lP0TG5x783c9SABDoEpPd8g/ZOJtdEmX942OX+0wVcnCwxwV5lrsdfdHoNqHE9scjKMPgFISG2bp9wNuoF3t3FPJW+EZWkqXjASzcM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+58985+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1589107409597514.5078018016962; Sun, 10 May 2020 03:43:29 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id aAMjYY1788612xKdS2BR7fCD; Sun, 10 May 2020 03:43:29 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.12629.1589107408600691544 for ; Sun, 10 May 2020 03:43:28 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4ABE6101E; Sun, 10 May 2020 03:43:28 -0700 (PDT) X-Received: from e123331-lin.nice.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D07F33F68F; Sun, 10 May 2020 03:43:26 -0700 (PDT) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Pete Batard , Jared McNeill , Andrei Warkentin , Samer El-Haj-Mahmoud Subject: [edk2-devel] [PATCH edk2-platforms v2 4/4] Silicon/Broadcom/BcmGenetDxe: avoid uncached memory for streaming DMA Date: Sun, 10 May 2020 12:42:59 +0200 Message-Id: <20200510104259.23739-5-ard.biesheuvel@arm.com> In-Reply-To: <20200510104259.23739-1-ard.biesheuvel@arm.com> References: <20200510104259.23739-1-ard.biesheuvel@arm.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ard.biesheuvel@arm.com X-Gm-Message-State: zkdsgXByVtsBPKzyeDj0E8mBx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1589107409; bh=/5zgsyBL+BAjaA7ZPKGmH/S9DDHsVPlrr6+C/xdAHhU=; h=Cc:Date:From:Reply-To:Subject:To; b=gzLugFGleUklLWgrQXsylcoHc82NrYtDJ8eskeixb0rfuPCxNIvco47WarCw0ecoKsh ajcyg1DQ/E5VKqoj3nY+l7+lrZMKbMUvgLyAjZoaGyOUEl2pH7Pxunb/tvnB6CcPhaORq RU++F1D7jgizo7tC5HWlWo4KGKoA+zIKeRQ= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The non-coherent version of DmaAllocateBuffer () returns uncached memory, to ensure that the CPU and the device see the same data, even we they are accessing the buffer at the same time. This is not really necessary for our RX ring: the CPU never accesses the buffer while it is mapped for writing by the device, and so we can simply use the streaming DMA model, which uses ordinary cached buffers, but issues a cache invalidate at DMA unmap time. Signed-off-by: Ard Biesheuvel --- Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf | 4 ++++ Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c | 18 ++++++++++++= +----- 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf b/Sil= icon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf index e74fa02ad209..3cabc5936562 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf @@ -49,3 +49,7 @@ [Protocols] gBcmGenetPlatformDeviceProtocolGuid ## TO_START gEfiDevicePathProtocolGuid ## BY_START gEfiSimpleNetworkProtocolGuid ## BY_START + +[FixedPcd] + gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset + gEmbeddedTokenSpaceGuid.PcdDmaDeviceLimit diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon= /Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c index 2176bb451e7d..4d40a7afd199 100644 --- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c +++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c @@ -19,6 +19,10 @@ =20 #define GENET_PHY_RETRY 1000 =20 +STATIC CONST +EFI_PHYSICAL_ADDRESS mDmaAddressLimit =3D FixedPcdGet64 (PcdDmaDeviceLim= it) - + FixedPcdGet64 (PcdDmaDeviceOffse= t); + /** Read a memory-mapped device CSR. =20 @@ -596,16 +600,20 @@ GenetDmaAlloc ( IN GENET_PRIVATE_DATA *Genet ) { - EFI_STATUS Status; - UINTN Idx; + EFI_PHYSICAL_ADDRESS Address; + EFI_STATUS Status; + UINTN Idx; =20 for (Idx =3D 0; Idx < GENET_DMA_DESC_COUNT; Idx++) { - Status =3D DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (= GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[Idx]); + Address =3D mDmaAddressLimit; + Status =3D gBS->AllocatePages (AllocateMaxAddress, EfiBootServicesData, + EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), &Address); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "GenetDmaAlloc: Failed to allocate RX buffer: %= r\n", Status)); GenetDmaFree (Genet); return Status; } + Genet->RxBuffer[Idx] =3D (UINT8 *)(UINTN)Address; } =20 return EFI_SUCCESS; @@ -690,8 +698,8 @@ GenetDmaFree ( GenetDmaUnmapRxDescriptor (Genet, Idx); =20 if (Genet->RxBuffer[Idx] !=3D NULL) { - DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), - Genet->RxBuffer[Idx]); + gBS->FreePages (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), + (UINTN)Genet->RxBuffer[Idx]); Genet->RxBuffer[Idx] =3D NULL; } } --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#58985): https://edk2.groups.io/g/devel/message/58985 Mute This Topic: https://groups.io/mt/74112949/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-