From nobody Sun Apr 28 14:12:53 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+55593+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+55593+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1583491239; cv=none; d=zohomail.com; s=zohoarc; b=ZSWYq2Z//hNBB92WSp94EVePlZV27muqDiq6iSHPeHSALnlPf+q+jHhDJwgxo7vjQoLaULPSwBJ9D7Kt5ZYJ95ae7BRfmUdLj5zl+fIxc8vXslWc4/AUwV1mSSjgH2eyqImAl+6A8d/OPXxpEOXR6cWMOrCy1YWYZMVkP38JzXQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1583491239; h=Cc:Date:From:List-Id:List-Unsubscribe:Message-ID:Reply-To:Sender:Subject:To; bh=Z3M3tIJYaVZtyhdcbd/NdflautyR+JkUuvu5S8zKZd0=; b=kMNrrgHg7n0X3NSLoDFoxlORR5RcJ18nRKTx5LOFcVLF8wqEVMVd3Qu+NKEEGVm3Rl8uZNzk6zyd8UqQx+DvaLqXZwFmtqltYOkMIHEYmaX+q6C4ItOnzON/jcZ980YsILxtgto8z8/3pgGRnD3PO7/PVVQ5XchFwc4v9HXPtT8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+55593+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1583491238920688.3613101674308; Fri, 6 Mar 2020 02:40:38 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 4S7wYY1788612xyVQbPUQJYO; Fri, 06 Mar 2020 02:40:38 -0800 X-Received: from mail-wr1-f46.google.com (mail-wr1-f46.google.com [209.85.221.46]) by mx.groups.io with SMTP id smtpd.web12.10755.1583491237820036288 for ; Fri, 06 Mar 2020 02:40:38 -0800 X-Received: by mail-wr1-f46.google.com with SMTP id v11so1729920wrm.9 for ; Fri, 06 Mar 2020 02:40:37 -0800 (PST) X-Gm-Message-State: blDoyR91m3NktXmP1Lul8eX2x1787277AA= X-Google-Smtp-Source: ADFU+vupmci7FAmCvXsIzKxtlm5lYoE2DI5isdkukORbu55o8zj0464M1NB3TwDGeqS8yy1y+BPCsg== X-Received: by 2002:a5d:4c52:: with SMTP id n18mr3609398wrt.403.1583491236136; Fri, 06 Mar 2020 02:40:36 -0800 (PST) X-Received: from e123331-lin.home ([2a01:cb1d:112:6f00:816e:ff0d:fb69:f613]) by smtp.gmail.com with ESMTPSA id w8sm14586287wmm.0.2020.03.06.02.40.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Mar 2020 02:40:35 -0800 (PST) From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: leif@nuviainc.com, Ard Biesheuvel Subject: [edk2-devel] [PATCH v2] ArmPkg/ArmMmuLib AARCH64: invalidate page tables before populating them Date: Fri, 6 Mar 2020 11:40:32 +0100 Message-Id: <20200306104032.30708-1-ard.biesheuvel@linaro.org> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ard.biesheuvel@linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1583491238; bh=P/OjIiyyoRuCNuMx7i3hz4Vm+QwRZdRK1c0X37VlFf0=; h=Cc:Date:From:Reply-To:Subject:To; b=Jvmx4W7Ge9QzUtPsB7aRpU/WgDkDjPJCtPiIOPUsZqjHf0MPjGGXwpyyjo9q/ECjzWx 5YyWJ14HWsNa026uXU+R4sLZhKHd+dF52SSInSpll4uBycf2DhWxnDxVWBEF+gsIwXA/c Z9wLCZlipZA9kEU0GHaGOjUVFqM9M5gkXDs= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" As it turns out, ARMv8 also permits accesses made with the MMU and caches off to hit in the caches, so to ensure that any modifications we make before enabling the MMU are visible afterwards as well, we should invalidate page tables right after allocation like we do now on ARM, if the MMU is still disabled at that point. Also, make sure that we don't only invalidate block and page entries when updating the individual entries, but give table entries the same treatment. Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- v2: - drop redundant MMU enabled check when allocating the root table - add dmb+ivac for individual table entries (the change that was merged already only does this on block/page entries) ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 30 ++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Libr= ary/ArmMmuLib/AArch64/ArmMmuLibCore.c index 204e33c75f95..d4d823780a6a 100644 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -129,6 +129,8 @@ ReplaceLiveEntry ( { if (!ArmMmuEnabled ()) { *Entry =3D Value; + ArmDataMemoryBarrier (); + ArmInvalidateDataCacheEntryByMVA ((UINTN)Entry); } else { ArmReplaceLiveTranslationEntry (Entry, Value, RegionStart); } @@ -282,6 +284,15 @@ GetBlockEntryListFromAddress ( return NULL; } =20 + if (!ArmMmuEnabled ()) { + // + // Make sure we are not inadvertently hitting in the caches + // when populating the page tables. + // + InvalidateDataCacheRange (TranslationTable, + TT_ENTRY_COUNT * sizeof(UINT64)); + } + // Populate the newly created lower level table SubTableBlockEntry =3D TranslationTable; for (Index =3D 0; Index < TT_ENTRY_COUNT; Index++) { @@ -306,10 +317,23 @@ GetBlockEntryListFromAddress ( return NULL; } =20 + if (!ArmMmuEnabled ()) { + // + // Make sure we are not inadvertently hitting in the caches + // when populating the page tables. + // + InvalidateDataCacheRange (TranslationTable, + TT_ENTRY_COUNT * sizeof(UINT64)); + } ZeroMem (TranslationTable, TT_ENTRY_COUNT * sizeof(UINT64)); =20 // Fill the new BlockEntry with the TranslationTable *BlockEntry =3D ((UINTN)TranslationTable & TT_ADDRESS_MASK_DESCRIP= TION_TABLE) | TT_TYPE_TABLE_ENTRY; + + if (!ArmMmuEnabled ()) { + ArmDataMemoryBarrier (); + ArmInvalidateDataCacheEntryByMVA ((UINTN)BlockEntry); + } } } } @@ -697,6 +721,12 @@ ArmConfigureMmu ( *TranslationTableSize =3D RootTableEntryCount * sizeof(UINT64); } =20 + // + // Make sure we are not inadvertently hitting in the caches + // when populating the page tables. + // + InvalidateDataCacheRange (TranslationTable, + RootTableEntryCount * sizeof(UINT64)); ZeroMem (TranslationTable, RootTableEntryCount * sizeof(UINT64)); =20 TranslationTableAttribute =3D TT_ATTR_INDX_INVALID; --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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