From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54733+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54733+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478754; cv=none; d=zohomail.com; s=zohoarc; b=JCjZTp8W/QFWZEgcnrYEd4Hgmsq97UCNY8tTBaeMpML0mQEvxC2qXwfWPVnmBT70nCyHCwShykS1FP6I3qAvUujfGxgO/KQNUeXh9xhzDU2VQ6gvRQnaRjOBzEIOnILRWoDCHyJ4RumWviLreStENdMsF1LfTyOv0C/5R/NZPZY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478754; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=jXtuXGi+6PuniHn1cBoM2f2F2IAUQyKZwt4eo+op9sU=; b=D0y/53IRcoBn7eFNodOQyNUEmLSevntHsH4nxY73nPtdsPVONVHuoUhUL6/v4CWBRp2/nUZGok7L+1Bo8jLuFlZknQbcosdVJ0LuvJUNfCtukX3kzlRN5KZKXmklFzPEGi3lnr228XxQn1ZO6727tzyleO1eDRu0GtJhPjSlMPs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54733+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478754981851.1283865894005; Sun, 23 Feb 2020 09:25:54 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id d8rIYY1788612xZrd3U9c63Q; Sun, 23 Feb 2020 09:25:54 -0800 X-Received: from us-smtp-delivery-1.mimecast.com (us-smtp-delivery-1.mimecast.com [205.139.110.61]) by mx.groups.io with SMTP id smtpd.web09.9135.1582478754022591328 for ; Sun, 23 Feb 2020 09:25:54 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-412-GD71feXMOI2X_WKkOc11OA-1; Sun, 23 Feb 2020 12:25:47 -0500 X-MC-Unique: GD71feXMOI2X_WKkOc11OA-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 6BFD5107ACC5; Sun, 23 Feb 2020 17:25:45 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id EA31C5C105; Sun, 23 Feb 2020 17:25:42 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Eric Dong , Hao A Wu , Igor Mammedov , Jian J Wang , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ray Ni Subject: [edk2-devel] [PATCH 01/16] MdeModulePkg/PiSmmCore: log SMM image start failure Date: Sun, 23 Feb 2020 18:25:22 +0100 Message-Id: <20200223172537.28464-2-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: ALkINc2FVBTjTUkJXchW9wbxx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478754; bh=jXtuXGi+6PuniHn1cBoM2f2F2IAUQyKZwt4eo+op9sU=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=drJF1LbcnZpzg3pQxA5Tx4VWE/raIz++oY6aT5c0wVXVrmGUCbAM4/j8JT3NPHbpbxg gR1iHTb/NpQtroTUsY/sNPP6zrfeiCe2v7ivS2EJs3B7bkpPvKEmSac/hbfSO2+lUpaVN mba2rb0hbS48/95KDM0g87mNxz3+dQV0HZA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" In the CoreStartImage() function [MdeModulePkg/Core/Dxe/Image/Image.c], if the image entry point returns a failure code, then the DXE Core logs a helpful DEBUG_ERROR message, with the following format string: "Error: Image at %11p start failed: %r\n" Do similarly in the SMM Core (update the message slightly). Cc: Ard Biesheuvel Cc: Eric Dong Cc: Hao A Wu Cc: Igor Mammedov Cc: Jian J Wang Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Cc: Ray Ni Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- MdeModulePkg/Core/PiSmmCore/Dispatcher.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MdeModulePkg/Core/PiSmmCore/Dispatcher.c b/MdeModulePkg/Core/P= iSmmCore/Dispatcher.c index 9bec731e5312..76ee9e0b89cc 100644 --- a/MdeModulePkg/Core/PiSmmCore/Dispatcher.c +++ b/MdeModulePkg/Core/PiSmmCore/Dispatcher.c @@ -883,44 +883,50 @@ SmmDispatcher ( RemoveEntryList (&DriverEntry->ScheduledLink); =20 REPORT_STATUS_CODE_WITH_EXTENDED_DATA ( EFI_PROGRESS_CODE, EFI_SOFTWARE_SMM_DRIVER | EFI_SW_PC_INIT_BEGIN, &DriverEntry->ImageHandle, sizeof (DriverEntry->ImageHandle) ); =20 // // Cache state of SmmEntryPointRegistered before calling entry point // PreviousSmmEntryPointRegistered =3D gSmmCorePrivate->SmmEntryPointRe= gistered; =20 // // For each SMM driver, pass NULL as ImageHandle // RegisterSmramProfileImage (DriverEntry, TRUE); PERF_START_IMAGE_BEGIN (DriverEntry->ImageHandle); Status =3D ((EFI_IMAGE_ENTRY_POINT)(UINTN)DriverEntry->ImageEntryPoi= nt)(DriverEntry->ImageHandle, gST); PERF_START_IMAGE_END (DriverEntry->ImageHandle); if (EFI_ERROR(Status)){ + DEBUG (( + DEBUG_ERROR, + "Error: SMM image at %11p start failed: %r\n", + DriverEntry->SmmLoadedImage.ImageBase, + Status + )); UnregisterSmramProfileImage (DriverEntry, TRUE); SmmFreePages(DriverEntry->ImageBuffer, DriverEntry->NumberOfPage); // // Uninstall LoadedImage // Status =3D gBS->UninstallProtocolInterface ( DriverEntry->ImageHandle, &gEfiLoadedImageProtocolGuid, DriverEntry->LoadedImage ); if (!EFI_ERROR (Status)) { if (DriverEntry->LoadedImage->FilePath !=3D NULL) { gBS->FreePool (DriverEntry->LoadedImage->FilePath); } gBS->FreePool (DriverEntry->LoadedImage); } Status =3D SmmUninstallProtocolInterface ( DriverEntry->SmmImageHandle, &gEfiLoadedImageProtocolGuid, &DriverEntry->SmmLoadedImage ); if (!EFI_ERROR(Status)) { --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54733): https://edk2.groups.io/g/devel/message/54733 Mute This Topic: https://groups.io/mt/71494208/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54732+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54732+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478753; cv=none; d=zohomail.com; s=zohoarc; b=l8e2dxwAZcUxbaCaTcIDsq/Uqtn1ojLih23DhxU2M4G2aoHYMpsBbIFRd9GjLDDBkrLvWTs1b5d51m+YMy3bpbChqbk/SV2SF1tPue8BcEC1q1HWxN7RhENjW243sRBACsxN7veZ4Yu3y5HdBG6NaMVk/GGLXP2M5/NUbMN7FS4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478753; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=J+p5HwECAR62PMv94mm0vQbecDFyfB3Ly5n0YOwA5To=; b=KMdw/d4WafVmTK+k988EVcNWJ4MrThIfDLekcQ0iD8qPhnWZsRLkC+F5rkYTn9Zi3rZ3ODYwMN0dY6xkpGxLysYopymRLQeaCV3CIRsJ+7E8O3x+/R04Jhrz+epXRVnvytxRRoEgF4j3ADIiySCeD+MYwRtrIebw00mWGLrLbHM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54732+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478753827620.7393792387054; Sun, 23 Feb 2020 09:25:53 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id jvLCYY1788612xLT0R8alXOb; Sun, 23 Feb 2020 09:25:53 -0800 X-Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [205.139.110.120]) by mx.groups.io with SMTP id smtpd.web09.9134.1582478752223783222 for ; Sun, 23 Feb 2020 09:25:52 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-194-GR6C3HGkMTKrebMDhCYeGw-1; Sun, 23 Feb 2020 12:25:49 -0500 X-MC-Unique: GR6C3HGkMTKrebMDhCYeGw-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id E134E801E53; Sun, 23 Feb 2020 17:25:47 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id C433B5C105; Sun, 23 Feb 2020 17:25:45 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Eric Dong , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ray Ni Subject: [edk2-devel] [PATCH 02/16] UefiCpuPkg/PiSmmCpuDxeSmm: fix S3 Resume for CPU hotplug Date: Sun, 23 Feb 2020 18:25:23 +0100 Message-Id: <20200223172537.28464-3-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: nUwv9woVYUWMxssOINUEXTXXx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478753; bh=J+p5HwECAR62PMv94mm0vQbecDFyfB3Ly5n0YOwA5To=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=wWOunbDk8lKsj7hT875QBKN728aId+OwpEY2OwcKUmVk8J8z9MWAvPmWmN4nG2C2STf mxUkri26G+kPynBx4FQhWTpsR7wBwNsqpvxbD9EHh6rHlMGCJSPVQeD08Muyolk8APZcg W3y7wlIUbU6UBMX5h2TphYlaXX64t2Jzu2o= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The "ACPI_CPU_DATA.NumberOfCpus" field is specified as follows, in "UefiCpuPkg/Include/AcpiCpuData.h" (rewrapped for this commit message): // // The number of CPUs. If a platform does not support hot plug CPUs, // then this is the number of CPUs detected when the platform is booted, // regardless of being enabled or disabled. If a platform does support // hot plug CPUs, then this is the maximum number of CPUs that the // platform supports. // The InitializeCpuBeforeRebase() and InitializeCpuAfterRebase() functions in "UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c" try to restore CPU configuration on the S3 Resume path for *all* CPUs accounted for in "ACPI_CPU_DATA.NumberOfCpus". This is wrong, as with CPU hotplug, not all of the possible CPUs may be present at the time of S3 Suspend / Resume. The symptom is an infinite wait. Instead, the "mNumberOfCpus" variable should be used, which is properly maintained through the EFI_SMM_CPU_SERVICE_PROTOCOL implementation (see SmmAddProcessor(), SmmRemoveProcessor(), SmmCpuUpdate() in "UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c"). When CPU hotplug is disabled, "mNumberOfCpus" is constant, and equals "ACPI_CPU_DATA.NumberOfCpus" at all times. Cc: Ard Biesheuvel Cc: Eric Dong Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Cc: Ray Ni Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/= CpuS3.c index ba5cc0194c2d..1e0840119724 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -597,75 +597,85 @@ PrepareApStartupVector ( } =20 /** The function is invoked before SMBASE relocation in S3 path to restores = CPU status. =20 The function is invoked before SMBASE relocation in S3 path. It does fir= st time microcode load and restores MTRRs for both BSP and APs. =20 **/ VOID InitializeCpuBeforeRebase ( VOID ) { LoadMtrrData (mAcpiCpuData.MtrrTable); =20 SetRegister (TRUE); =20 ProgramVirtualWireMode (); =20 PrepareApStartupVector (mAcpiCpuData.StartupVector); =20 - mNumberToFinish =3D mAcpiCpuData.NumberOfCpus - 1; + if (FeaturePcdGet (PcdCpuHotPlugSupport)) { + ASSERT (mNumberOfCpus <=3D mAcpiCpuData.NumberOfCpus); + } else { + ASSERT (mNumberOfCpus =3D=3D mAcpiCpuData.NumberOfCpus); + } + mNumberToFinish =3D mNumberOfCpus - 1; mExchangeInfo->ApFunction =3D (VOID *) (UINTN) InitializeAp; =20 // // Execute code for before SmmBaseReloc. Note: This flag is maintained a= cross S3 boots. // mInitApsAfterSmmBaseReloc =3D FALSE; =20 // // Send INIT IPI - SIPI to all APs // SendInitSipiSipiAllExcludingSelf ((UINT32)mAcpiCpuData.StartupVector); =20 while (mNumberToFinish > 0) { CpuPause (); } } =20 /** The function is invoked after SMBASE relocation in S3 path to restores C= PU status. =20 The function is invoked after SMBASE relocation in S3 path. It restores = configuration according to data saved by normal boot path for both BSP and APs. =20 **/ VOID InitializeCpuAfterRebase ( VOID ) { - mNumberToFinish =3D mAcpiCpuData.NumberOfCpus - 1; + if (FeaturePcdGet (PcdCpuHotPlugSupport)) { + ASSERT (mNumberOfCpus <=3D mAcpiCpuData.NumberOfCpus); + } else { + ASSERT (mNumberOfCpus =3D=3D mAcpiCpuData.NumberOfCpus); + } + mNumberToFinish =3D mNumberOfCpus - 1; =20 // // Signal that SMM base relocation is complete and to continue initializ= ation for all APs. // mInitApsAfterSmmBaseReloc =3D TRUE; =20 // // Must begin set register after all APs have continue their initializat= ion. // This is a requirement to support semaphore mechanism in register tabl= e. // Because if semaphore's dependence type is package type, semaphore wil= l wait // for all Aps in one package finishing their tasks before set next regi= ster // for all APs. If the Aps not begin its task during BSP doing its task,= the // BSP thread will hang because it is waiting for other Aps in the same // package finishing their task. // SetRegister (FALSE); =20 while (mNumberToFinish > 0) { CpuPause (); } } =20 --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54732): https://edk2.groups.io/g/devel/message/54732 Mute This Topic: https://groups.io/mt/71494207/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54735+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54735+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478756; cv=none; d=zohomail.com; s=zohoarc; b=HchRtOQHSkWiLUagIymx7udq8IFKfjbyGIcH8j1fn8u98z7BvTUcXG4n0RHn3ybD6xxWQr4noMpgku6eyyWAgWjlQTQNii6VkCkFWr6JxtuId20LgPtVWZSwECrQSMhMoO21Cn65oLkCR6JoBQdJBdhCofvv71d4gs3XqqiXo+s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478756; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=/AACUUmYPifHBGFQAlTJY9PhsbJXzB1ooOyDUjSqWD4=; b=ejKK1VGqRbbrF6dZxaszaxZYUCAYABYZgKwme0CYl2uzTIkgqaJndITCali32pgPRRgngCTWC9oLBrR56DbXvdd5Xs5Y9bOn/2MEs3xO+0bWwfTsgHNPYxqtFh4J9Y6xum8jKEgW+jENa1h14BeOG5lG9+bmt1Jo0elb9HR7agU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54735+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478756764616.4135342004992; Sun, 23 Feb 2020 09:25:56 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id tpOZYY1788612xzPbSNXXDfn; Sun, 23 Feb 2020 09:25:56 -0800 X-Received: from us-smtp-delivery-1.mimecast.com (us-smtp-delivery-1.mimecast.com [205.139.110.61]) by mx.groups.io with SMTP id smtpd.web10.9245.1582478755760935753 for ; Sun, 23 Feb 2020 09:25:56 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-430-ZqMN-IiQNtqu1vWUShgZKA-1; Sun, 23 Feb 2020 12:25:51 -0500 X-MC-Unique: ZqMN-IiQNtqu1vWUShgZKA-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 283BC1007269; Sun, 23 Feb 2020 17:25:50 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3FD1892D00; Sun, 23 Feb 2020 17:25:48 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 03/16] OvmfPkg: clone SmmCpuPlatformHookLib from UefiCpuPkg Date: Sun, 23 Feb 2020 18:25:24 +0100 Message-Id: <20200223172537.28464-4-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: awp9QesKeP0dAYVbmhfJmcpWx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478756; bh=/AACUUmYPifHBGFQAlTJY9PhsbJXzB1ooOyDUjSqWD4=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=tDLDDS9In2lLliPlNRvxO/3tyBh/r/fe7Nj9bv6LSdS0EyHIREsp3Bo6Di7QOmASgek SJQzIdBtcY7L9jx9s8DWpyNSX44jjDwTGWb6+XgeALD9jifd6oQLiSgefcXjpEwrV+RSk zx9WbpnwnYgInCrFEupPPgPg0bmn2qZbcDs= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Clone the Null instance of SmmCpuPlatformHookLib from UefiCpuPkg to OvmfPkg. In this patch, customize the lib instance only with the following no-op steps: - Replace Null/NULL references in filenames and comments with Qemu/QEMU references. - Update copyright notices. - Clean up and rewrap comment blocks. - Update INF_VERSION to the latest INF spec version (1.29). - Update FILE_GUID. - Drop the UNI file. This patch is best reviewed with: $ git show --find-copies=3D43 --find-copies-harder Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/OvmfPkgIa32.dsc = = | 2 +- OvmfPkg/OvmfPkgIa32X64.dsc = = | 2 +- OvmfPkg/OvmfPkgX64.dsc = = | 2 +- UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf= =3D> OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu.i= nf | 21 +++++------- UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.c = =3D> OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu.c = | 36 ++++++++++++-------- 5 files changed, 32 insertions(+), 31 deletions(-) diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index 19728f20b34e..813995fefad8 100644 --- a/OvmfPkg/OvmfPkgIa32.dsc +++ b/OvmfPkg/OvmfPkgIa32.dsc @@ -858,45 +858,45 @@ [Components] UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf =20 # # SMM Initial Program Load (a DXE_RUNTIME_DRIVER) # MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf =20 # # SMM_CORE # MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf =20 # # Privileged drivers (DXE_SMM_DRIVER modules) # UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf { LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf } UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { - SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/S= mmCpuPlatformHookLibNull.inf + SmmCpuPlatformHookLib|OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmC= puPlatformHookLibQemu.inf SmmCpuFeaturesLib|OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLi= b.inf } =20 # # Variable driver stack (SMM) # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf { NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf } MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf =20 !else =20 # # Variable driver stack (non-SMM) # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf { diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index 3c0c229e3a72..a256c7084a7e 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -872,45 +872,45 @@ [Components.X64] UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf =20 # # SMM Initial Program Load (a DXE_RUNTIME_DRIVER) # MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf =20 # # SMM_CORE # MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf =20 # # Privileged drivers (DXE_SMM_DRIVER modules) # UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf { LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf } UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { - SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/S= mmCpuPlatformHookLibNull.inf + SmmCpuPlatformHookLib|OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmC= puPlatformHookLibQemu.inf SmmCpuFeaturesLib|OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLi= b.inf } =20 # # Variable driver stack (SMM) # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf { NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf } MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf =20 !else =20 # # Variable driver stack (non-SMM) # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf { diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index f6c1d8d228c6..78079b9f8e13 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -870,45 +870,45 @@ [Components] UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf =20 # # SMM Initial Program Load (a DXE_RUNTIME_DRIVER) # MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf =20 # # SMM_CORE # MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf =20 # # Privileged drivers (DXE_SMM_DRIVER modules) # UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf { LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf } UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { - SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/S= mmCpuPlatformHookLibNull.inf + SmmCpuPlatformHookLib|OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmC= puPlatformHookLibQemu.inf SmmCpuFeaturesLib|OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLi= b.inf } =20 # # Variable driver stack (SMM) # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf { NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf } MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf =20 !else =20 # # Variable driver stack (non-SMM) # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf { diff --git a/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHoo= kLibNull.inf b/OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHook= LibQemu.inf similarity index 43% copy from UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLi= bNull.inf copy to OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu= .inf index fab6b30b7a3f..82edeca3d12d 100644 --- a/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNul= l.inf +++ b/OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu.i= nf @@ -1,34 +1,29 @@ ## @file -# SMM CPU Platform Hook NULL library instance. +# SMM CPU Platform Hook library instance for QEMU. # +# Copyright (c) 2020, Red Hat, Inc. # Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent -# ## =20 -##########################################################################= ###### -# -# Defines Section - statements that will be processed to create a Makefile. -# -##########################################################################= ###### [Defines] - INF_VERSION =3D 0x00010005 - BASE_NAME =3D SmmCpuPlatformHookLibNull - MODULE_UNI_FILE =3D SmmCpuPlatformHookLibNull.uni - FILE_GUID =3D D6494E1B-E06F-4ab5-B64D-48B25AA9EB33 + INF_VERSION =3D 1.29 + BASE_NAME =3D SmmCpuPlatformHookLibQemu + FILE_GUID =3D 154D6D26-54B8-45BC-BA3A-CBAA20C02A6A MODULE_TYPE =3D DXE_DRIVER VERSION_STRING =3D 1.0 LIBRARY_CLASS =3D SmmCpuPlatformHookLib =20 # -# The following information is for reference only and not required by the = build tools. +# The following information is for reference only and not required by the = build +# tools. # # VALID_ARCHITECTURES =3D IA32 X64 # =20 [Sources] - SmmCpuPlatformHookLibNull.c + SmmCpuPlatformHookLibQemu.c =20 [Packages] MdePkg/MdePkg.dec UefiCpuPkg/UefiCpuPkg.dec diff --git a/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHoo= kLibNull.c b/OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLi= bQemu.c similarity index 67% copy from UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLi= bNull.c copy to OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu= .c index 6c2010dc0a67..257e1d399cc6 100644 --- a/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNul= l.c +++ b/OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu.c @@ -1,102 +1,108 @@ /** @file -SMM CPU Platform Hook NULL library instance. +SMM CPU Platform Hook library instance for QEMU. =20 +Copyright (c) 2020, Red Hat, Inc. Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ #include #include =20 /** Checks if platform produces a valid SMI. =20 This function checks if platform produces a valid SMI. This function is called at SMM entry to detect if this is a spurious SMI. This function must be implemented in an MP safe way because it is called by multiple C= PU threads. =20 @retval TRUE There is a valid SMI @retval FALSE There is no valid SMI =20 **/ BOOLEAN EFIAPI PlatformValidSmi ( VOID ) { return TRUE; } =20 /** Clears platform top level SMI status bit. =20 This function clears platform top level SMI status bit. =20 @retval TRUE The platform top level SMI status is cleared. - @retval FALSE The platform top level SMI status cannot be cl= eared. + @retval FALSE The platform top level SMI status cannot be + cleared. =20 **/ BOOLEAN EFIAPI ClearTopLevelSmiStatus ( VOID ) { return TRUE; } =20 /** Performs platform specific way of SMM BSP election. =20 This function performs platform specific way of SMM BSP election. =20 - @param IsBsp Output parameter. TRUE: the CPU this function = executes - on is elected to be the SMM BSP. FALSE: the CP= U this - function executes on is to be SMM AP. + @param IsBsp Output parameter. TRUE: the CPU this function + executes on is elected to be the SMM BSP. FALS= E: + the CPU this function executes on is to be SMM= AP. =20 @retval EFI_SUCCESS The function executes successfully. - @retval EFI_NOT_READY The function does not determine whether this C= PU should be - BSP or AP. This may occur if hardware init seq= uence to - enable the determination is yet to be done, or= the function - chooses not to do BSP election and will let SM= M CPU driver to - use its default BSP election process. - @retval EFI_DEVICE_ERROR The function cannot determine whether this CPU= should be - BSP or AP due to hardware error. + @retval EFI_NOT_READY The function does not determine whether this C= PU + should be BSP or AP. This may occur if hardware + init sequence to enable the determination is y= et to + be done, or the function chooses not to do BSP + election and will let SMM CPU driver to use its + default BSP election process. + @retval EFI_DEVICE_ERROR The function cannot determine whether this CPU + should be BSP or AP due to hardware error. =20 **/ EFI_STATUS EFIAPI PlatformSmmBspElection ( OUT BOOLEAN *IsBsp ) { return EFI_NOT_READY; } =20 /** Get platform page table attribute. =20 This function gets page table attribute of platform. =20 - @param Address Input parameter. Obtain the page table entries at= tribute on this address. + @param Address Input parameter. Obtain the page table entries + attribute on this address. @param PageSize Output parameter. The size of the page. @param NumOfPages Output parameter. Number of page. @param PageAttribute Output parameter. Paging Attributes (WB, UC, etc). =20 - @retval EFI_SUCCESS The platform page table attribute from the addr= ess is determined. - @retval EFI_UNSUPPORTED The platform does not support getting page tabl= e attribute for the address. + @retval EFI_SUCCESS The platform page table attribute from the addr= ess + is determined. + @retval EFI_UNSUPPORTED The platform does not support getting page table + attribute for the address. =20 **/ EFI_STATUS EFIAPI GetPlatformPageTableAttribute ( IN UINT64 Address, IN OUT SMM_PAGE_SIZE_TYPE *PageSize, IN OUT UINTN *NumOfPages, IN OUT UINTN *PageAttribute ) { return EFI_UNSUPPORTED; } --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54735): https://edk2.groups.io/g/devel/message/54735 Mute This Topic: https://groups.io/mt/71494210/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54737+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54737+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478762; cv=none; d=zohomail.com; s=zohoarc; b=Q4OZ1mXIrICJRd++HR5jN90E1sbdmesBt+ZHkp0cQwOnRed/L1p0vyNMJB+LspauW66aplzidVjKw+mSZo7P1aKaALNVvp5lPBYhjzzgJozqKwP7DC+z7GfXjiwISkiSC3bBxYRTPriVKj02vt2y7gxsnUpbwkl3BqB5lDDLb3U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478762; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=jtbVCtnbzoAi/NUoSxsPQC9gZ1gzXGeE9cth9yc9pDM=; b=AAn8FtFc64HsNyzBj+cbxfTA0IY2q5dUwg6vf6+5sVmHptrx1FDjdDYne6zUZp59PXdJSRr8VR/6h/DAQ0HQZonVF0ILFQZuudtlNCEnFvos4gLLa1G+kYdGF0wtI9eEIInGaVcuWzUQR68pddtTwkAYUVe1y1twPG+eF8ORFrA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54737+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478762168588.2482240599122; Sun, 23 Feb 2020 09:26:02 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id CLxbYY1788612x864DsadhM5; Sun, 23 Feb 2020 09:26:01 -0800 X-Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [205.139.110.120]) by mx.groups.io with SMTP id smtpd.web12.9298.1582478760927833086 for ; Sun, 23 Feb 2020 09:26:01 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-50-ORI0vY8qPlWpFWeHiDMgfw-1; Sun, 23 Feb 2020 12:25:54 -0500 X-MC-Unique: ORI0vY8qPlWpFWeHiDMgfw-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 39A1713E2; Sun, 23 Feb 2020 17:25:52 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7EC9C90F5B; Sun, 23 Feb 2020 17:25:50 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 04/16] OvmfPkg: enable SMM Monarch Election in PiSmmCpuDxeSmm Date: Sun, 23 Feb 2020 18:25:25 +0100 Message-Id: <20200223172537.28464-5-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: 6HSpKbJyYfua83awVqvbimfJx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478761; bh=jtbVCtnbzoAi/NUoSxsPQC9gZ1gzXGeE9cth9yc9pDM=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=iLuTOIEd16+WGdF+VHV9OYmPKueZzLBH3GfUfhp2fhn0RZstdUUAILL+gfAb+OUlTQ7 lAsaJFMhhZ1uAYl/GcW5pOoLPhIzsJIo7fMdh+fAQLQwUQPlzCXExq/diCQDX8D9JU3IA bePCz8diZfiHN4l0VWLURqsRK8tEAnzSNnA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" With "PcdCpuSmmEnableBspElection" set to FALSE, PiSmmCpuDxeSmm always considers the processor with index 0 to be the SMM Monarch (a.k.a. the SMM BSP). The SMM Monarch handles the SMI for real, while the other CPUs wait in their SMM loops. In a subsequent patch, we want to set "PcdCpuHotPlugSupport" to TRUE. For that, PiCpuSmmEntry() [UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c] forces us with an ASSERT() to set "PcdCpuSmmEnableBspElection" to TRUE as well. To satisfy that expectation, we can simply remove our current "PcdCpuSmmEnableBspElection|FALSE" setting, and inherit the default TRUE value from "UefiCpuPkg.dec". This causes "mSmmMpSyncData->BspIndex" in PiSmmCpuDxeSmm to lose its static zero value (standing for CPU#0); instead it becomes (-1) in general, and the SMM Monarch is elected anew on every SMI. The default SMM Monarch Election is basically a race -- whichever CPU can flip "mSmmMpSyncData->BspIndex" from (-1) to its own index, becomes king, for handling that SMI. Refer to SmiRendezvous() [UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c]. I consider this non-determinism less than ideal on QEMU/KVM; it would be nice to stick with a "mostly permanent" SMM Monarch even with the Election enabled. We can do that by implementing the PlatformSmmBspElection() API in the SmmCpuPlatformHookLibQemu instance: The IA32 APIC Base MSR can be read on each CPU concurrently, and it will report the BSP bit as set only on the current Boot Service Processor. QEMU marks CPU#0 as the BSP, by default. Elect the current BSP, as reported by QEMU, for the SMM Monarch role. (Note that the QEMU commit history is not entirely consistent on whether QEMU/KVM may mark a CPU with nonzero index as the BSP: - At tag v4.2.0, "target/i386/cpu.c" has a comment saying "We hard-wire the BSP to the first CPU". This comment goes back to commit 6cb2996cef5e ("x86: Extend validity of bsp_to_cpu", 2010-03-04). - Compare commit 9cb11fd7539b ("target-i386: clear bsp bit when designating bsp", 2015-04-02) though, especially considering KVM. Either way, this OvmfPkg patch is *not* dependent on CPU index 0; it just takes the race on every SMI out of the game.) One benefit of using a "mostly permanent" SMM Monarch / BSP is that we can continue testing the SMM CPU synchronization by deterministically entering the firmware on the BSP, vs. on an AP, from Linux guests: $ time taskset -c 0 efibootmgr $ time taskset -c 1 efibootmgr (See .) Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Suggested-by: Igor Mammedov Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512#c5 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/OvmfPkgIa32.dsc | = 1 - OvmfPkg/OvmfPkgIa32X64.dsc | = 1 - OvmfPkg/OvmfPkgX64.dsc | = 1 - OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu.inf | = 3 +++ OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu.c | = 9 ++++++++- 5 files changed, 11 insertions(+), 4 deletions(-) diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index 813995fefad8..60d8af185b9c 100644 --- a/OvmfPkg/OvmfPkgIa32.dsc +++ b/OvmfPkg/OvmfPkgIa32.dsc @@ -414,45 +414,44 @@ [LibraryClasses.common.SMM_CORE] !endif PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf =20 ##########################################################################= ###### # # Pcd Section - list of all EDK II PCD Entries defined by this Platform. # ##########################################################################= ###### [PcdsFeatureFlag] gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE !ifdef $(CSM_ENABLE) gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE !endif !if $(SMM_REQUIRE) =3D=3D TRUE gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE - gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE !endif =20 [PcdsFixedAtBuild] gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FAL= SE gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x10 !if ($(FD_SIZE_IN_KB) =3D=3D 1024) || ($(FD_SIZE_IN_KB) =3D=3D 2048) gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800 !if $(NETWORK_TLS_ENABLE) =3D=3D FALSE # match PcdFlashNvStorageVariableSize purely for convenience gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0xe000 !endif !endif !if $(FD_SIZE_IN_KB) =3D=3D 4096 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x8400 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x8400 !if $(NETWORK_TLS_ENABLE) =3D=3D FALSE # match PcdFlashNvStorageVariableSize purely for convenience gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x40000 !endif diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index a256c7084a7e..be6bc7bd88a7 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -419,45 +419,44 @@ [LibraryClasses.common.SMM_CORE] !endif PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf =20 ##########################################################################= ###### # # Pcd Section - list of all EDK II PCD Entries defined by this Platform. # ##########################################################################= ###### [PcdsFeatureFlag] gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE !ifdef $(CSM_ENABLE) gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE !endif !if $(SMM_REQUIRE) =3D=3D TRUE gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE - gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE !endif =20 [PcdsFixedAtBuild] gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FAL= SE gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x10 !if ($(FD_SIZE_IN_KB) =3D=3D 1024) || ($(FD_SIZE_IN_KB) =3D=3D 2048) gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800 !if $(NETWORK_TLS_ENABLE) =3D=3D FALSE # match PcdFlashNvStorageVariableSize purely for convenience gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0xe000 !endif !endif !if $(FD_SIZE_IN_KB) =3D=3D 4096 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x8400 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x8400 !if $(NETWORK_TLS_ENABLE) =3D=3D FALSE # match PcdFlashNvStorageVariableSize purely for convenience gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x40000 !endif diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index 78079b9f8e13..e258c474b60d 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -419,45 +419,44 @@ [LibraryClasses.common.SMM_CORE] !endif PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf =20 ##########################################################################= ###### # # Pcd Section - list of all EDK II PCD Entries defined by this Platform. # ##########################################################################= ###### [PcdsFeatureFlag] gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE !ifdef $(CSM_ENABLE) gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE !endif !if $(SMM_REQUIRE) =3D=3D TRUE gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE - gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE !endif =20 [PcdsFixedAtBuild] gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FAL= SE gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x10 !if ($(FD_SIZE_IN_KB) =3D=3D 1024) || ($(FD_SIZE_IN_KB) =3D=3D 2048) gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800 !if $(NETWORK_TLS_ENABLE) =3D=3D FALSE # match PcdFlashNvStorageVariableSize purely for convenience gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0xe000 !endif !endif !if $(FD_SIZE_IN_KB) =3D=3D 4096 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x8400 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x8400 !if $(NETWORK_TLS_ENABLE) =3D=3D FALSE # match PcdFlashNvStorageVariableSize purely for convenience gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x40000 !endif diff --git a/OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLi= bQemu.inf b/OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLib= Qemu.inf index 82edeca3d12d..413c56fce6e1 100644 --- a/OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu.i= nf +++ b/OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu.i= nf @@ -8,22 +8,25 @@ =20 [Defines] INF_VERSION =3D 1.29 BASE_NAME =3D SmmCpuPlatformHookLibQemu FILE_GUID =3D 154D6D26-54B8-45BC-BA3A-CBAA20C02A6A MODULE_TYPE =3D DXE_DRIVER VERSION_STRING =3D 1.0 LIBRARY_CLASS =3D SmmCpuPlatformHookLib =20 # # The following information is for reference only and not required by the = build # tools. # # VALID_ARCHITECTURES =3D IA32 X64 # =20 [Sources] SmmCpuPlatformHookLibQemu.c =20 [Packages] MdePkg/MdePkg.dec UefiCpuPkg/UefiCpuPkg.dec + +[LibraryClasses] + BaseLib diff --git a/OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLi= bQemu.c b/OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQe= mu.c index 257e1d399cc6..c88a95c6deff 100644 --- a/OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu.c +++ b/OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmCpuPlatformHookLibQemu.c @@ -1,31 +1,34 @@ /** @file SMM CPU Platform Hook library instance for QEMU. =20 Copyright (c) 2020, Red Hat, Inc. Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ +#include // AsmReadMsr64() #include +#include // MSR_IA32_APIC_BASE_REGISTER + #include =20 /** Checks if platform produces a valid SMI. =20 This function checks if platform produces a valid SMI. This function is called at SMM entry to detect if this is a spurious SMI. This function must be implemented in an MP safe way because it is called by multiple C= PU threads. =20 @retval TRUE There is a valid SMI @retval FALSE There is no valid SMI =20 **/ BOOLEAN EFIAPI PlatformValidSmi ( VOID ) { return TRUE; } @@ -56,45 +59,49 @@ ClearTopLevelSmiStatus ( =20 @param IsBsp Output parameter. TRUE: the CPU this function executes on is elected to be the SMM BSP. FALS= E: the CPU this function executes on is to be SMM= AP. =20 @retval EFI_SUCCESS The function executes successfully. @retval EFI_NOT_READY The function does not determine whether this C= PU should be BSP or AP. This may occur if hardware init sequence to enable the determination is y= et to be done, or the function chooses not to do BSP election and will let SMM CPU driver to use its default BSP election process. @retval EFI_DEVICE_ERROR The function cannot determine whether this CPU should be BSP or AP due to hardware error. =20 **/ EFI_STATUS EFIAPI PlatformSmmBspElection ( OUT BOOLEAN *IsBsp ) { - return EFI_NOT_READY; + MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr; + + ApicBaseMsr.Uint64 =3D AsmReadMsr64 (MSR_IA32_APIC_BASE); + *IsBsp =3D (BOOLEAN)(ApicBaseMsr.Bits.BSP =3D=3D 1); + return EFI_SUCCESS; } =20 /** Get platform page table attribute. =20 This function gets page table attribute of platform. =20 @param Address Input parameter. Obtain the page table entries attribute on this address. @param PageSize Output parameter. The size of the page. @param NumOfPages Output parameter. Number of page. @param PageAttribute Output parameter. Paging Attributes (WB, UC, etc). =20 @retval EFI_SUCCESS The platform page table attribute from the addr= ess is determined. @retval EFI_UNSUPPORTED The platform does not support getting page table attribute for the address. =20 **/ EFI_STATUS EFIAPI GetPlatformPageTableAttribute ( --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54737): https://edk2.groups.io/g/devel/message/54737 Mute This Topic: https://groups.io/mt/71494215/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54736+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54736+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478759; cv=none; d=zohomail.com; s=zohoarc; b=BIhxDX7N7OeEnp1GRhVvxuJW4HdFn6inQYXianCKhdCV7YxdaLCpCOIXb/JfoDZRtlH9b6kNT5T7C5sg397XkLMt0D351wBl+qVwDlv/f2vmApTCsUBgAPQ9Hd30+2ZOlWJN8Coi0cngIT1QptAcxRswgiE9aSMEBzaY5TW/l6g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478759; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=QLsfJtZjbf8ixpgQs8eqtdi5LMqJyn12YKYoqXSZ6mQ=; b=LSo8LnhKeSUbd+3zM0k5yGHNyeLGPzMkXP4/7fxsKE9GiTx0AX3WeQih51+9aXTcfwJA8L6zzbYaSJkrfbdpdflaOJ+vjDdrlcR7RaYaN1zjhjXZ8u7z2lX/sbhfwn721bhMFlpokcUBRiJiz7/fNyPNgdGzwKXQnsqniDC/Fhw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54736+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478759638566.3610465813151; Sun, 23 Feb 2020 09:25:59 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id sA1XYY1788612xogOEX7LiAA; Sun, 23 Feb 2020 09:25:59 -0800 X-Received: from us-smtp-delivery-1.mimecast.com (us-smtp-delivery-1.mimecast.com [205.139.110.61]) by mx.groups.io with SMTP id smtpd.web10.9246.1582478758672965125 for ; Sun, 23 Feb 2020 09:25:58 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-72-QbNaqJFuO7WVIEf53b5Nrg-1; Sun, 23 Feb 2020 12:25:55 -0500 X-MC-Unique: QbNaqJFuO7WVIEf53b5Nrg-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 4B4E68017CC; Sun, 23 Feb 2020 17:25:54 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id 910145C105; Sun, 23 Feb 2020 17:25:52 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 05/16] OvmfPkg: enable CPU hotplug support in PiSmmCpuDxeSmm Date: Sun, 23 Feb 2020 18:25:26 +0100 Message-Id: <20200223172537.28464-6-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: Adxwi7zlLl87hl9Iy65VbXOzx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478759; bh=QLsfJtZjbf8ixpgQs8eqtdi5LMqJyn12YKYoqXSZ6mQ=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=AhX/QjdWGp5FIzSbj76F4S/5H2JaqlLZDu5bLh5KhhnaXw0PlOBxRtirhwc8Y0IMtGW h+V1SXXmOGetjKLEyeBzIQWCYuu5cOcNsqlCVon/QHv3Jo3pd46PKdnv/j41T+v653fsF +FkBHImaGMgnfMeTnY/jIjUm0Ta+PAxEjy8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Set "PcdCpuHotPlugSupport" to TRUE, when OVMF is built with SMM_REQUIRE. Consequences: (1) In PiCpuSmmEntry() [UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c], resources are allocated and populated in advance for all possible (i.e., potentially hot-added) processors, rather than only the processors present at boot. The possible count (called "mMaxNumberOfCpus") is set from "PcdCpuMaxLogicalProcessorNumber"; we set the latter in OvmfPkg/PlatformPei. (Refer to commit 83357313dd67, "OvmfPkg/PlatformPei: rewrite MaxCpuCountInitialization() for CPU hotplug", 2020-01-29). (2) The AddProcessor() and RemoveProcessor() member functions of EFI_SMM_CPU_SERVICE_PROTOCOL, implemented in "UefiCpuPkg/PiSmmCpuDxeSmm/CpuService.c", are no longer short-circuited to EFI_UNSUPPORTED. We'll rely on these functions in the CPU hotplug SMI handler, in a subsequent patch. (3) In PiCpuSmmEntry(), the address of the CPU_HOT_PLUG_DATA structure (in SMRAM) is exposed via the dynamic-only "PcdCpuHotPlugDataAddress". This structure is an information channel between the CPU hotplug SMI handler, and EFI_SMM_CPU_SERVICE_PROTOCOL. Namely, at the first "Index" where the following equality holds: CPU_HOT_PLUG_DATA.ApicId[Index] =3D=3D INVALID_APIC_ID a hot-plugged CPU can be accepted, with the steps below: (3.1) The hotplug SMI handler has to overwrite INVALID_APIC_ID with the new CPU's APIC ID. (3.2) The new CPU's SMBASE has to be relocated to: CPU_HOT_PLUG_DATA.SmBase[Index] (which was precomputed in step (1) above). (3.3) The hotplug SMI handler is supposed to call EFI_SMM_CPU_SERVICE_PROTOCOL.AddProcessor(). Note: we need not spell out "PcdCpuHotPlugDataAddress" in the [PcdsDynamicDefault] sections of the OVMF DSC files, just so the PCD become dynamically settable. That's because "UefiCpuPkg.dec" declares this PCD with [PcdsDynamic, PcdsDynamicEx] access methods *only*. Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/OvmfPkgIa32.dsc | 1 + OvmfPkg/OvmfPkgIa32X64.dsc | 1 + OvmfPkg/OvmfPkgX64.dsc | 1 + 3 files changed, 3 insertions(+) diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index 60d8af185b9c..8c065ca7cec9 100644 --- a/OvmfPkg/OvmfPkgIa32.dsc +++ b/OvmfPkg/OvmfPkgIa32.dsc @@ -414,44 +414,45 @@ [LibraryClasses.common.SMM_CORE] !endif PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf =20 ##########################################################################= ###### # # Pcd Section - list of all EDK II PCD Entries defined by this Platform. # ##########################################################################= ###### [PcdsFeatureFlag] gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE !ifdef $(CSM_ENABLE) gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE !endif !if $(SMM_REQUIRE) =3D=3D TRUE gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE + gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE !endif =20 [PcdsFixedAtBuild] gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FAL= SE gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x10 !if ($(FD_SIZE_IN_KB) =3D=3D 1024) || ($(FD_SIZE_IN_KB) =3D=3D 2048) gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800 !if $(NETWORK_TLS_ENABLE) =3D=3D FALSE # match PcdFlashNvStorageVariableSize purely for convenience gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0xe000 !endif !endif !if $(FD_SIZE_IN_KB) =3D=3D 4096 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x8400 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x8400 !if $(NETWORK_TLS_ENABLE) =3D=3D FALSE # match PcdFlashNvStorageVariableSize purely for convenience gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x40000 !endif diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index be6bc7bd88a7..944b785e61a9 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -419,44 +419,45 @@ [LibraryClasses.common.SMM_CORE] !endif PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf =20 ##########################################################################= ###### # # Pcd Section - list of all EDK II PCD Entries defined by this Platform. # ##########################################################################= ###### [PcdsFeatureFlag] gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE !ifdef $(CSM_ENABLE) gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE !endif !if $(SMM_REQUIRE) =3D=3D TRUE gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE + gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE !endif =20 [PcdsFixedAtBuild] gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FAL= SE gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x10 !if ($(FD_SIZE_IN_KB) =3D=3D 1024) || ($(FD_SIZE_IN_KB) =3D=3D 2048) gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800 !if $(NETWORK_TLS_ENABLE) =3D=3D FALSE # match PcdFlashNvStorageVariableSize purely for convenience gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0xe000 !endif !endif !if $(FD_SIZE_IN_KB) =3D=3D 4096 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x8400 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x8400 !if $(NETWORK_TLS_ENABLE) =3D=3D FALSE # match PcdFlashNvStorageVariableSize purely for convenience gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x40000 !endif diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index e258c474b60d..8de0f7179784 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -419,44 +419,45 @@ [LibraryClasses.common.SMM_CORE] !endif PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf =20 ##########################################################################= ###### # # Pcd Section - list of all EDK II PCD Entries defined by this Platform. # ##########################################################################= ###### [PcdsFeatureFlag] gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE !ifdef $(CSM_ENABLE) gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|TRUE !endif !if $(SMM_REQUIRE) =3D=3D TRUE gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE + gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE !endif =20 [PcdsFixedAtBuild] gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FAL= SE gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x10 !if ($(FD_SIZE_IN_KB) =3D=3D 1024) || ($(FD_SIZE_IN_KB) =3D=3D 2048) gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800 !if $(NETWORK_TLS_ENABLE) =3D=3D FALSE # match PcdFlashNvStorageVariableSize purely for convenience gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0xe000 !endif !endif !if $(FD_SIZE_IN_KB) =3D=3D 4096 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x8400 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x8400 !if $(NETWORK_TLS_ENABLE) =3D=3D FALSE # match PcdFlashNvStorageVariableSize purely for convenience gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x40000 !endif --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54736): https://edk2.groups.io/g/devel/message/54736 Mute This Topic: https://groups.io/mt/71494212/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54739+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54739+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478767; cv=none; d=zohomail.com; s=zohoarc; b=mcnZ3j+nsn/aw9vFG8+sZPT0zsQrgqRmj+aXgrj2fZsOBKVZkx0vpe2pq//r/lf8CXwRGFkZ2j51dr1zsN1dahZYHmVdW9abPTGcFR75xn3MSvLrCehX/rc2rAgygE2fuhSn+gX0uajrW9/3jPdfCCVY55/A1V9ITZpP6S4QwRo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478767; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=HMppz7vK8RMZkKAeW18xAfknm5uTQ/RqWExfphSOwok=; b=GAOumMTOnJMx8b5BFR0t368Fn7eOCXpo0/sX0+NRyUwou0dijYkqLscUw1IwpJwsHoMQQanDbVEnQvnzzy51IDG5z5G+LrBOqHtL1xgMVD6jGDRQUUKm4xmSIYxqJ+2sNXnspYvrUMkCeqKAhS97komcU+CVWA0EQjd23arvpmo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54739+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478767239818.0141881928254; Sun, 23 Feb 2020 09:26:07 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id uvecYY1788612xCXjRWIDEsf; Sun, 23 Feb 2020 09:26:06 -0800 X-Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [207.211.31.120]) by mx.groups.io with SMTP id smtpd.web11.9225.1582478765962567881 for ; Sun, 23 Feb 2020 09:26:06 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-221-2LUy5JGOMWmzgcs4DsIf1A-1; Sun, 23 Feb 2020 12:25:57 -0500 X-MC-Unique: 2LUy5JGOMWmzgcs4DsIf1A-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 8B782800D50; Sun, 23 Feb 2020 17:25:56 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id A39305C105; Sun, 23 Feb 2020 17:25:54 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 06/16] OvmfPkg/CpuHotplugSmm: introduce skeleton for CPU Hotplug SMM driver Date: Sun, 23 Feb 2020 18:25:27 +0100 Message-Id: <20200223172537.28464-7-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: j4ZSKeDgyyLKoJnk2O3L2iabx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478766; bh=HMppz7vK8RMZkKAeW18xAfknm5uTQ/RqWExfphSOwok=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=jktcL5Odr98yTFESbr9nerEw3HoxGUUTm1DJIjnC5UOZC3J1NO6vOg77g70bH3FtTP6 znhYNxzcnmGYEuV2CXniuNJ9pS85XV7SJU9UYPWIhtMa5RRICFXg5fa0C5u0vTnepNN72 vo7nkwfogLdZvB/3hrkcOTfNbosaYMYx+lE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Add a new SMM driver skeleton that registers a root SMI handler, and checks if the SMI control value (written to 0xB2) indicates a CPU hotplug SMI. QEMU's ACPI payload will cause the OS to raise a broadcast SMI when a CPU hotplug event occurs, namely by writing value 4 to IO Port 0xB2. In other words, control value 4 is now allocated for this purpose; introduce the ICH9_APM_CNT_CPU_HOTPLUG macro for it. The standard identifiers in this driver use the new MM (Management Mode) terminology from the PI spec, not the earlier SMM (System Management Mode) terms. Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/OvmfPkgIa32.dsc | 1 + OvmfPkg/OvmfPkgIa32X64.dsc | 1 + OvmfPkg/OvmfPkgX64.dsc | 1 + OvmfPkg/OvmfPkgIa32.fdf | 1 + OvmfPkg/OvmfPkgIa32X64.fdf | 1 + OvmfPkg/OvmfPkgX64.fdf | 1 + OvmfPkg/Include/IndustryStandard/Q35MchIch9.h | 5 +- OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf | 48 +++++ OvmfPkg/CpuHotplugSmm/CpuHotplug.c | 191 ++++++++++++++++++++ 9 files changed, 248 insertions(+), 2 deletions(-) diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index 8c065ca7cec9..78310da44a5f 100644 --- a/OvmfPkg/OvmfPkgIa32.dsc +++ b/OvmfPkg/OvmfPkgIa32.dsc @@ -851,44 +851,45 @@ [Components] =20 OvmfPkg/PlatformDxe/Platform.inf OvmfPkg/IoMmuDxe/IoMmuDxe.inf =20 !if $(SMM_REQUIRE) =3D=3D TRUE OvmfPkg/SmmAccess/SmmAccess2Dxe.inf OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf =20 # # SMM Initial Program Load (a DXE_RUNTIME_DRIVER) # MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf =20 # # SMM_CORE # MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf =20 # # Privileged drivers (DXE_SMM_DRIVER modules) # + OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf { LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf } UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { SmmCpuPlatformHookLib|OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmC= puPlatformHookLibQemu.inf SmmCpuFeaturesLib|OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLi= b.inf } =20 # # Variable driver stack (SMM) # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf { NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf } MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf =20 diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index 944b785e61a9..428578a4f839 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -865,44 +865,45 @@ [Components.X64] OvmfPkg/PlatformDxe/Platform.inf OvmfPkg/AmdSevDxe/AmdSevDxe.inf OvmfPkg/IoMmuDxe/IoMmuDxe.inf =20 !if $(SMM_REQUIRE) =3D=3D TRUE OvmfPkg/SmmAccess/SmmAccess2Dxe.inf OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf =20 # # SMM Initial Program Load (a DXE_RUNTIME_DRIVER) # MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf =20 # # SMM_CORE # MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf =20 # # Privileged drivers (DXE_SMM_DRIVER modules) # + OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf { LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf } UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { SmmCpuPlatformHookLib|OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmC= puPlatformHookLibQemu.inf SmmCpuFeaturesLib|OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLi= b.inf } =20 # # Variable driver stack (SMM) # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf { NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf } MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf =20 diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index 8de0f7179784..73b92f259201 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -863,44 +863,45 @@ [Components] OvmfPkg/PlatformDxe/Platform.inf OvmfPkg/AmdSevDxe/AmdSevDxe.inf OvmfPkg/IoMmuDxe/IoMmuDxe.inf =20 !if $(SMM_REQUIRE) =3D=3D TRUE OvmfPkg/SmmAccess/SmmAccess2Dxe.inf OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf =20 # # SMM Initial Program Load (a DXE_RUNTIME_DRIVER) # MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf =20 # # SMM_CORE # MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf =20 # # Privileged drivers (DXE_SMM_DRIVER modules) # + OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf { LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf } UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { SmmCpuPlatformHookLib|OvmfPkg/Library/SmmCpuPlatformHookLibQemu/SmmC= puPlatformHookLibQemu.inf SmmCpuFeaturesLib|OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLi= b.inf } =20 # # Variable driver stack (SMM) # OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf { NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf } MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf =20 diff --git a/OvmfPkg/OvmfPkgIa32.fdf b/OvmfPkg/OvmfPkgIa32.fdf index 63607551ed75..61b891765c56 100644 --- a/OvmfPkg/OvmfPkgIa32.fdf +++ b/OvmfPkg/OvmfPkgIa32.fdf @@ -301,44 +301,45 @@ [FV.DXEFV] INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf =20 !ifdef $(CSM_ENABLE) INF OvmfPkg/Csm/BiosThunk/VideoDxe/VideoDxe.inf INF OvmfPkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf INF RuleOverride=3DCSM OvmfPkg/Csm/Csm16/Csm16.inf !else INF OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf !endif =20 INF OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf INF OvmfPkg/VirtioGpuDxe/VirtioGpu.inf INF OvmfPkg/PlatformDxe/Platform.inf INF OvmfPkg/IoMmuDxe/IoMmuDxe.inf =20 !if $(SMM_REQUIRE) =3D=3D TRUE INF OvmfPkg/SmmAccess/SmmAccess2Dxe.inf INF OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf +INF OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf =20 # # Variable driver stack (SMM) # INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf =20 !else =20 # # Variable driver stack (non-SMM) # INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf !endif diff --git a/OvmfPkg/OvmfPkgIa32X64.fdf b/OvmfPkg/OvmfPkgIa32X64.fdf index 0488e5d95ffe..501b4fcb7b67 100644 --- a/OvmfPkg/OvmfPkgIa32X64.fdf +++ b/OvmfPkg/OvmfPkgIa32X64.fdf @@ -308,44 +308,45 @@ [FV.DXEFV] INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf =20 !ifdef $(CSM_ENABLE) INF OvmfPkg/Csm/BiosThunk/VideoDxe/VideoDxe.inf INF OvmfPkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf INF RuleOverride=3DCSM OvmfPkg/Csm/Csm16/Csm16.inf !else INF OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf !endif =20 INF OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf INF OvmfPkg/VirtioGpuDxe/VirtioGpu.inf INF OvmfPkg/PlatformDxe/Platform.inf INF OvmfPkg/AmdSevDxe/AmdSevDxe.inf INF OvmfPkg/IoMmuDxe/IoMmuDxe.inf =20 !if $(SMM_REQUIRE) =3D=3D TRUE INF OvmfPkg/SmmAccess/SmmAccess2Dxe.inf INF OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf +INF OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf =20 # # Variable driver stack (SMM) # INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf =20 !else =20 # # Variable driver stack (non-SMM) # INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf !endif diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf index 0488e5d95ffe..501b4fcb7b67 100644 --- a/OvmfPkg/OvmfPkgX64.fdf +++ b/OvmfPkg/OvmfPkgX64.fdf @@ -308,44 +308,45 @@ [FV.DXEFV] INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf =20 !ifdef $(CSM_ENABLE) INF OvmfPkg/Csm/BiosThunk/VideoDxe/VideoDxe.inf INF OvmfPkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf INF RuleOverride=3DCSM OvmfPkg/Csm/Csm16/Csm16.inf !else INF OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf !endif =20 INF OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf INF OvmfPkg/VirtioGpuDxe/VirtioGpu.inf INF OvmfPkg/PlatformDxe/Platform.inf INF OvmfPkg/AmdSevDxe/AmdSevDxe.inf INF OvmfPkg/IoMmuDxe/IoMmuDxe.inf =20 !if $(SMM_REQUIRE) =3D=3D TRUE INF OvmfPkg/SmmAccess/SmmAccess2Dxe.inf INF OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf +INF OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf =20 # # Variable driver stack (SMM) # INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf =20 !else =20 # # Variable driver stack (non-SMM) # INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf !endif diff --git a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h b/OvmfPkg/Includ= e/IndustryStandard/Q35MchIch9.h index cb705fee92ca..73db4b59a111 100644 --- a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h +++ b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h @@ -90,37 +90,38 @@ #define POWER_MGMT_REGISTER_Q35(Offset) \ PCI_LIB_ADDRESS (0, 0x1f, 0, (Offset)) =20 #define POWER_MGMT_REGISTER_Q35_EFI_PCI_ADDRESS(Offset) \ EFI_PCI_ADDRESS (0, 0x1f, 0, (Offset)) =20 #define ICH9_PMBASE 0x40 #define ICH9_PMBASE_MASK (BIT15 | BIT14 | BIT13 | BIT12 | BIT11= | \ BIT10 | BIT9 | BIT8 | BIT7) =20 #define ICH9_ACPI_CNTL 0x44 #define ICH9_ACPI_CNTL_ACPI_EN BIT7 =20 #define ICH9_GEN_PMCON_1 0xA0 #define ICH9_GEN_PMCON_1_SMI_LOCK BIT4 =20 #define ICH9_RCBA 0xF0 #define ICH9_RCBA_EN BIT0 =20 // // IO ports // -#define ICH9_APM_CNT 0xB2 -#define ICH9_APM_STS 0xB3 +#define ICH9_APM_CNT 0xB2 +#define ICH9_APM_CNT_CPU_HOTPLUG 0x04 +#define ICH9_APM_STS 0xB3 =20 #define ICH9_CPU_HOTPLUG_BASE 0x0CD8 =20 // // IO ports relative to PMBASE // #define ICH9_PMBASE_OFS_SMI_EN 0x30 #define ICH9_SMI_EN_APMC_EN BIT5 #define ICH9_SMI_EN_GBL_SMI_EN BIT0 =20 #define ICH9_ROOT_COMPLEX_BASE 0xFED1C000 =20 #endif diff --git a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf b/OvmfPkg/CpuHotplugSm= m/CpuHotplugSmm.inf new file mode 100644 index 000000000000..fa70858a8dab --- /dev/null +++ b/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf @@ -0,0 +1,48 @@ +## @file +# Root SMI handler for VCPU hotplug SMIs. +# +# Copyright (c) 2020, Red Hat, Inc. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +## + +[Defines] + INF_VERSION =3D 1.29 + PI_SPECIFICATION_VERSION =3D 0x00010046 # P= I-1.7.0 + BASE_NAME =3D CpuHotplugSmm + FILE_GUID =3D 84EEA114-C6BE-4445-8F90-51D97863E363 + MODULE_TYPE =3D DXE_SMM_DRIVER + ENTRY_POINT =3D CpuHotplugEntry + +# +# The following information is for reference only and not required by the = build +# tools. +# +# VALID_ARCHITECTURES =3D IA32 X64 +# + +[Sources] + CpuHotplug.c + +[Packages] + MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec + +[LibraryClasses] + BaseLib + DebugLib + MmServicesTableLib + PcdLib + UefiDriverEntryPoint + +[Protocols] + gEfiMmCpuIoProtocolGuid ## CON= SUMES + +[Pcd] + gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase ## CON= SUMES + +[FeaturePcd] + gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire ## CON= SUMES + +[Depex] + gEfiMmCpuIoProtocolGuid diff --git a/OvmfPkg/CpuHotplugSmm/CpuHotplug.c b/OvmfPkg/CpuHotplugSmm/Cpu= Hotplug.c new file mode 100644 index 000000000000..fd09403eabf3 --- /dev/null +++ b/OvmfPkg/CpuHotplugSmm/CpuHotplug.c @@ -0,0 +1,191 @@ +/** @file + Root SMI handler for VCPU hotplug SMIs. + + Copyright (c) 2020, Red Hat, Inc. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include // ICH9_APM_CNT +#include // CpuDeadLoop() +#include // ASSERT() +#include // gMmst +#include // PcdGetBool() +#include // EFI_MM_CPU_IO_PROTOCOL +#include // EFI_STATUS + +// +// We use this protocol for accessing IO Ports. +// +STATIC EFI_MM_CPU_IO_PROTOCOL *mMmCpuIo; +// +// Represents the registration of the CPU Hotplug MMI handler. +// +STATIC EFI_HANDLE mDispatchHandle; + + +/** + CPU Hotplug MMI handler function. + + This is a root MMI handler. + + @param[in] DispatchHandle The unique handle assigned to this handle= r by + EFI_MM_SYSTEM_TABLE.MmiHandlerRegister(). + + @param[in] Context Context passed in by + EFI_MM_SYSTEM_TABLE.MmiManage(). Due to + CpuHotplugMmi() being a root MMI handler, + Context is ASSERT()ed to be NULL. + + @param[in,out] CommBuffer Ignored, due to CpuHotplugMmi() being a r= oot + MMI handler. + + @param[in,out] CommBufferSize Ignored, due to CpuHotplugMmi() being a r= oot + MMI handler. + + @retval EFI_SUCCESS The MMI was handled and the MMI + source was quiesced. When retu= rned + by a non-root MMI handler, + EFI_SUCCESS terminates the + processing of MMI handlers in + EFI_MM_SYSTEM_TABLE.MmiManage(= ). + For a root MMI handler (i.e., = for + the present function too), + EFI_SUCCESS behaves identicall= y to + EFI_WARN_INTERRUPT_SOURCE_QUIE= SCED, + as further root MMI handlers a= re + going to be called by + EFI_MM_SYSTEM_TABLE.MmiManage() + anyway. + + @retval EFI_WARN_INTERRUPT_SOURCE_QUIESCED The MMI source has been quie= sced, + but other handlers should st= ill + be called. + + @retval EFI_WARN_INTERRUPT_SOURCE_PENDING The MMI source is still pend= ing, + and other handlers should st= ill + be called. + + @retval EFI_INTERRUPT_PENDING The MMI source could not be + quiesced. +**/ +STATIC +EFI_STATUS +EFIAPI +CpuHotplugMmi ( + IN EFI_HANDLE DispatchHandle, + IN CONST VOID *Context OPTIONAL, + IN OUT VOID *CommBuffer OPTIONAL, + IN OUT UINTN *CommBufferSize OPTIONAL + ) +{ + EFI_STATUS Status; + UINT8 ApmControl; + + // + // Assert that we are entering this function due to our root MMI handler + // registration. + // + ASSERT (DispatchHandle =3D=3D mDispatchHandle); + // + // When MmiManage() is invoked to process root MMI handlers, the caller = (the + // MM Core) is expected to pass in a NULL Context. MmiManage() then pass= es + // the same NULL Context to individual handlers. + // + ASSERT (Context =3D=3D NULL); + // + // Read the MMI command value from the APM Control Port, to see if this = is an + // MMI we should care about. + // + Status =3D mMmCpuIo->Io.Read (mMmCpuIo, MM_IO_UINT8, ICH9_APM_CNT, 1, + &ApmControl); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: failed to read ICH9_APM_CNT: %r\n", __FUNCTI= ON__, + Status)); + // + // We couldn't even determine if the MMI was for us or not. + // + goto Fatal; + } + + if (ApmControl !=3D ICH9_APM_CNT_CPU_HOTPLUG) { + // + // The MMI is not for us. + // + return EFI_WARN_INTERRUPT_SOURCE_QUIESCED; + } + + // + // We've handled this MMI. + // + return EFI_SUCCESS; + +Fatal: + ASSERT (FALSE); + CpuDeadLoop (); + // + // We couldn't handle this MMI. + // + return EFI_INTERRUPT_PENDING; +} + + +// +// Entry point function of this driver. +// +EFI_STATUS +EFIAPI +CpuHotplugEntry ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + // + // This module should only be included when SMM support is required. + // + ASSERT (FeaturePcdGet (PcdSmmSmramRequire)); + // + // This driver depends on the dynamically detected "SMRAM at default SMB= ASE" + // feature. + // + if (!PcdGetBool (PcdQ35SmramAtDefaultSmbase)) { + return EFI_UNSUPPORTED; + } + + // + // Errors from here on are fatal; we cannot allow the boot to proceed if= we + // can't set up this driver to handle CPU hotplug. + // + // First, collect the protocols needed later. All of these protocols are + // listed in our module DEPEX. + // + Status =3D gMmst->MmLocateProtocol (&gEfiMmCpuIoProtocolGuid, + NULL /* Registration */, (VOID **)&mMmCpuIo); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: locate MmCpuIo: %r\n", __FUNCTION__, Status)= ); + goto Fatal; + } + + // + // Register the handler for the CPU Hotplug MMI. + // + Status =3D gMmst->MmiHandlerRegister ( + CpuHotplugMmi, + NULL, // HandlerType: root MMI handler + &mDispatchHandle + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: MmiHandlerRegister(): %r\n", __FUNCTION__, + Status)); + goto Fatal; + } + + return EFI_SUCCESS; + +Fatal: + ASSERT (FALSE); + CpuDeadLoop (); + return Status; +} --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54739): https://edk2.groups.io/g/devel/message/54739 Mute This Topic: https://groups.io/mt/71494217/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54738+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54738+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478767; cv=none; d=zohomail.com; s=zohoarc; b=P+0xle5QHavi95yM/n+SWNpOS22w+j6yvS0XFtJxmEA6uN1TauoqjKDcLM9ZEdFgKHaVEVFXaOJ5AruowcgXIFw/YMWM366WASu3PoifsyOo2WZc1HEl2J0fO96S2ssTLD7QclnPf25bkTh2AemO9m54hAPqASDclfqEOBTaPR8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478767; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=DGjWTAHy3k2egjKcph2M530x0ZJcEBEcg0AhPgIprsI=; b=LLM8ILHysPnOQa5bLQKEr7M5MMewxCoBiBFZVb8+On9jvD95ZKc18Pd42hOOHpNS61JzzNottis4T7H6qfl2zzQaDMjTkb+FGB31bNAnEjdtdVPM+Jh2RgwaaViFK4iCO2QsMbpmuo/M6aZnD97FmNFcMxL3JCsqBl1gVa2J838= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54738+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 158247876702614.314718267270791; Sun, 23 Feb 2020 09:26:07 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id HG59YY1788612xVNaSXAYG0L; Sun, 23 Feb 2020 09:26:05 -0800 X-Received: from us-smtp-delivery-1.mimecast.com (us-smtp-delivery-1.mimecast.com [205.139.110.61]) by mx.groups.io with SMTP id smtpd.web10.9249.1582478765075138375 for ; Sun, 23 Feb 2020 09:26:05 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-242-MuyG-gvoNeefDUYfrwBxIg-1; Sun, 23 Feb 2020 12:26:02 -0500 X-MC-Unique: MuyG-gvoNeefDUYfrwBxIg-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 6BA1D1851FC2; Sun, 23 Feb 2020 17:26:00 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id E31505C105; Sun, 23 Feb 2020 17:25:56 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 07/16] OvmfPkg/CpuHotplugSmm: add hotplug register block helper functions Date: Sun, 23 Feb 2020 18:25:28 +0100 Message-Id: <20200223172537.28464-8-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: t9q6vZIL49oMbQSNlY7Z5rEPx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478765; bh=DGjWTAHy3k2egjKcph2M530x0ZJcEBEcg0AhPgIprsI=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=u11O/0wveWGms75ZQJj1O4erGZza3xaEmAy/N3wmT9qoidFyEjZm/H5yCBdjZL19AU7 mxYMm4kKcYFjJFRgKzvMSfn3R7xLgREAmLwiMDoabMkFqvDot8rCpjZlAvdUwUsI6D9f7 K+YP8+dNRklNC+5D4CLgdoylLBJYtanmHPA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Add a handful of simple functions for accessing QEMU's hotplug registers more conveniently. These functions thinly wrap some of the registers described in "docs/specs/acpi_cpu_hotplug.txt" in the QEMU tree. The functions hang (by design) if they encounter an internal failure. Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf | 2 + OvmfPkg/CpuHotplugSmm/QemuCpuhp.h | 47 +++++++ OvmfPkg/CpuHotplugSmm/QemuCpuhp.c | 136 ++++++++++++++++++++ 3 files changed, 185 insertions(+) diff --git a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf b/OvmfPkg/CpuHotplugSm= m/CpuHotplugSmm.inf index fa70858a8dab..ac4ca4c1f4f2 100644 --- a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf +++ b/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf @@ -4,44 +4,46 @@ # Copyright (c) 2020, Red Hat, Inc. # # SPDX-License-Identifier: BSD-2-Clause-Patent ## =20 [Defines] INF_VERSION =3D 1.29 PI_SPECIFICATION_VERSION =3D 0x00010046 # P= I-1.7.0 BASE_NAME =3D CpuHotplugSmm FILE_GUID =3D 84EEA114-C6BE-4445-8F90-51D97863E363 MODULE_TYPE =3D DXE_SMM_DRIVER ENTRY_POINT =3D CpuHotplugEntry =20 # # The following information is for reference only and not required by the = build # tools. # # VALID_ARCHITECTURES =3D IA32 X64 # =20 [Sources] CpuHotplug.c + QemuCpuhp.c + QemuCpuhp.h =20 [Packages] MdePkg/MdePkg.dec OvmfPkg/OvmfPkg.dec =20 [LibraryClasses] BaseLib DebugLib MmServicesTableLib PcdLib UefiDriverEntryPoint =20 [Protocols] gEfiMmCpuIoProtocolGuid ## CON= SUMES =20 [Pcd] gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase ## CON= SUMES =20 [FeaturePcd] gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire ## CON= SUMES =20 [Depex] diff --git a/OvmfPkg/CpuHotplugSmm/QemuCpuhp.h b/OvmfPkg/CpuHotplugSmm/Qemu= Cpuhp.h new file mode 100644 index 000000000000..82f88f0b73bb --- /dev/null +++ b/OvmfPkg/CpuHotplugSmm/QemuCpuhp.h @@ -0,0 +1,47 @@ +/** @file + Simple wrapper functions that access QEMU's modern CPU hotplug register + block. + + These functions thinly wrap some of the registers described in + "docs/specs/acpi_cpu_hotplug.txt" in the QEMU source. IO Ports are acces= sed + via EFI_MM_CPU_IO_PROTOCOL. If a protocol call fails, these functions do= n't + return. + + Copyright (c) 2020, Red Hat, Inc. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef QEMU_CPUHP_H_ +#define QEMU_CPUHP_H_ + +#include // EFI_MM_CPU_IO_PROTOCOL + +UINT32 +QemuCpuhpReadCommandData2 ( + IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo + ); + +UINT8 +QemuCpuhpReadCpuStatus ( + IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo + ); + +UINT32 +QemuCpuhpReadCommandData ( + IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo + ); + +VOID +QemuCpuhpWriteCpuSelector ( + IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo, + IN UINT32 Selector + ); + +VOID +QemuCpuhpWriteCommand ( + IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo, + IN UINT8 Command + ); + +#endif // QEMU_CPUHP_H_ diff --git a/OvmfPkg/CpuHotplugSmm/QemuCpuhp.c b/OvmfPkg/CpuHotplugSmm/Qemu= Cpuhp.c new file mode 100644 index 000000000000..31e46f51934a --- /dev/null +++ b/OvmfPkg/CpuHotplugSmm/QemuCpuhp.c @@ -0,0 +1,136 @@ +/** @file + Simple wrapper functions that access QEMU's modern CPU hotplug register + block. + + These functions thinly wrap some of the registers described in + "docs/specs/acpi_cpu_hotplug.txt" in the QEMU source. IO Ports are acces= sed + via EFI_MM_CPU_IO_PROTOCOL. If a protocol call fails, these functions do= n't + return. + + Copyright (c) 2020, Red Hat, Inc. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include // ICH9_CPU_HOTPLUG_BASE +#include // QEMU_CPUHP_R_CMD_DATA2 +#include // CpuDeadLoop() +#include // DEBUG() + +#include "QemuCpuhp.h" + +UINT32 +QemuCpuhpReadCommandData2 ( + IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo + ) +{ + UINT32 CommandData2; + EFI_STATUS Status; + + CommandData2 =3D 0; + Status =3D MmCpuIo->Io.Read ( + MmCpuIo, + MM_IO_UINT32, + ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_R_CMD_DATA2, + 1, + &CommandData2 + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, Status)); + ASSERT (FALSE); + CpuDeadLoop (); + } + return CommandData2; +} + +UINT8 +QemuCpuhpReadCpuStatus ( + IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo + ) +{ + UINT8 CpuStatus; + EFI_STATUS Status; + + CpuStatus =3D 0; + Status =3D MmCpuIo->Io.Read ( + MmCpuIo, + MM_IO_UINT8, + ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_R_CPU_STAT, + 1, + &CpuStatus + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, Status)); + ASSERT (FALSE); + CpuDeadLoop (); + } + return CpuStatus; +} + +UINT32 +QemuCpuhpReadCommandData ( + IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo + ) +{ + UINT32 CommandData; + EFI_STATUS Status; + + CommandData =3D 0; + Status =3D MmCpuIo->Io.Read ( + MmCpuIo, + MM_IO_UINT32, + ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_RW_CMD_DATA, + 1, + &CommandData + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, Status)); + ASSERT (FALSE); + CpuDeadLoop (); + } + return CommandData; +} + +VOID +QemuCpuhpWriteCpuSelector ( + IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo, + IN UINT32 Selector + ) +{ + EFI_STATUS Status; + + Status =3D MmCpuIo->Io.Write ( + MmCpuIo, + MM_IO_UINT32, + ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_W_CPU_SEL, + 1, + &Selector + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, Status)); + ASSERT (FALSE); + CpuDeadLoop (); + } +} + +VOID +QemuCpuhpWriteCommand ( + IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo, + IN UINT8 Command + ) +{ + EFI_STATUS Status; + + Status =3D MmCpuIo->Io.Write ( + MmCpuIo, + MM_IO_UINT8, + ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_W_CMD, + 1, + &Command + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, Status)); + ASSERT (FALSE); + CpuDeadLoop (); + } +} --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54738): https://edk2.groups.io/g/devel/message/54738 Mute This Topic: https://groups.io/mt/71494216/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54740+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54740+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478767; cv=none; d=zohomail.com; s=zohoarc; b=oEYCs1qkl4fnY8tl6KCiW0vtdUhkzji/iBZbYvcOrVwnOU/YGqHxpZyMqlPGJvS5q3V1abrW8j6bN4EiD7y0xPxTdXoUY2bVwEzuopKCRz+jdS/h78TFCqxclp+RpTNlS0ueHc60Bfbw1w+F4TbqSD5O/uZ/EnVT/SSOKbfQgEE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478767; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=cRQh/xhFmP8B+hF8FTzr7AU49GwLEqfaDsPK2NXMehY=; b=K9+Ta0vIrZZnSv8DX0c0q4UoJrv0p23xXC5jj6oztlGDmt9iMpfveRGIG7MvnHh3Myor9xZdpN9mnT8BuPXwai+gimf5irfw2IJP8nRJ+siU7/bYkAm4Nki0xZrzn46VEucYXgEN2ew/toAeZzFE9wzCqQO2Av8pzzGJsteq88g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54740+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 15824787675771016.3777857866853; Sun, 23 Feb 2020 09:26:07 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id UTRkYY1788612xDMPeb57eYE; Sun, 23 Feb 2020 09:26:07 -0800 X-Received: from us-smtp-delivery-1.mimecast.com (us-smtp-delivery-1.mimecast.com [207.211.31.81]) by mx.groups.io with SMTP id smtpd.web10.9251.1582478766178973074 for ; Sun, 23 Feb 2020 09:26:06 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-443-9xL3VVQeP66Q5OAcczgRpg-1; Sun, 23 Feb 2020 12:26:03 -0500 X-MC-Unique: 9xL3VVQeP66Q5OAcczgRpg-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 800288017CC; Sun, 23 Feb 2020 17:26:02 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id C20DD5C105; Sun, 23 Feb 2020 17:26:00 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 08/16] OvmfPkg/CpuHotplugSmm: define the QEMU_CPUHP_CMD_GET_ARCH_ID macro Date: Sun, 23 Feb 2020 18:25:29 +0100 Message-Id: <20200223172537.28464-9-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: dxBIYB7AEw01zr130SqrCzUCx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478767; bh=cRQh/xhFmP8B+hF8FTzr7AU49GwLEqfaDsPK2NXMehY=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=GysW7q+631ql4vHoLb8zj3iqlGdJqNj11CbD591a8yxW2hqgoj/Y75ABXkjRH09cdgv EwIYJ+lkNVCKN62F47kHWRjoRKmC2MvKJwjflDPYyerNv18bQPRYEIS1XiYO22RBaBi9f Y0pYAFIvBZzBqNouzpmK1zbRWWhG6BYPAlo= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" QEMU commit 3a61c8db9d25 ("acpi: cpuhp: add CPHP_GET_CPU_ID_CMD command", 2020-01-22) introduced a new command in the modern CPU hotplug register block that lets the firmware query the arch-specific IDs (on IA32/X64: the APIC IDs) of CPUs. Add a macro for this command value, because we'll need it later. At the same time, add a sanity check for the modern hotplug interface to CpuHotplugSmm. Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h | 1 + OvmfPkg/CpuHotplugSmm/CpuHotplug.c | 35 ++++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h b/OvmfPkg/In= clude/IndustryStandard/QemuCpuHotplug.h index cf0745610f2c..3d013633501b 100644 --- a/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h +++ b/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h @@ -20,24 +20,25 @@ #define QEMU_CPU_HOTPLUG_H_ =20 #include =20 // // Each register offset is: // - relative to the board-dependent IO base address of the register block, // - named QEMU_CPUHP_(R|W|RW)_*, according to the possible access modes o= f the // register, // - followed by distinguished bitmasks or values in the register. // #define QEMU_CPUHP_R_CMD_DATA2 0x0 =20 #define QEMU_CPUHP_R_CPU_STAT 0x4 #define QEMU_CPUHP_STAT_ENABLED BIT0 =20 #define QEMU_CPUHP_RW_CMD_DATA 0x8 =20 #define QEMU_CPUHP_W_CPU_SEL 0x0 =20 #define QEMU_CPUHP_W_CMD 0x5 #define QEMU_CPUHP_CMD_GET_PENDING 0x0 +#define QEMU_CPUHP_CMD_GET_ARCH_ID 0x3 =20 #endif // QEMU_CPU_HOTPLUG_H_ diff --git a/OvmfPkg/CpuHotplugSmm/CpuHotplug.c b/OvmfPkg/CpuHotplugSmm/Cpu= Hotplug.c index fd09403eabf3..5df8c689c63a 100644 --- a/OvmfPkg/CpuHotplugSmm/CpuHotplug.c +++ b/OvmfPkg/CpuHotplugSmm/CpuHotplug.c @@ -1,38 +1,41 @@ /** @file Root SMI handler for VCPU hotplug SMIs. =20 Copyright (c) 2020, Red Hat, Inc. =20 SPDX-License-Identifier: BSD-2-Clause-Patent **/ =20 #include // ICH9_APM_CNT +#include // QEMU_CPUHP_CMD_GET_PENDING #include // CpuDeadLoop() #include // ASSERT() #include // gMmst #include // PcdGetBool() #include // EFI_MM_CPU_IO_PROTOCOL #include // EFI_STATUS =20 +#include "QemuCpuhp.h" // QemuCpuhpWriteCpuSelector() + // // We use this protocol for accessing IO Ports. // STATIC EFI_MM_CPU_IO_PROTOCOL *mMmCpuIo; // // Represents the registration of the CPU Hotplug MMI handler. // STATIC EFI_HANDLE mDispatchHandle; =20 =20 /** CPU Hotplug MMI handler function. =20 This is a root MMI handler. =20 @param[in] DispatchHandle The unique handle assigned to this handle= r by EFI_MM_SYSTEM_TABLE.MmiHandlerRegister(). =20 @param[in] Context Context passed in by EFI_MM_SYSTEM_TABLE.MmiManage(). Due to CpuHotplugMmi() being a root MMI handler, Context is ASSERT()ed to be NULL. @@ -149,43 +152,75 @@ CpuHotplugEntry ( // // This driver depends on the dynamically detected "SMRAM at default SMB= ASE" // feature. // if (!PcdGetBool (PcdQ35SmramAtDefaultSmbase)) { return EFI_UNSUPPORTED; } =20 // // Errors from here on are fatal; we cannot allow the boot to proceed if= we // can't set up this driver to handle CPU hotplug. // // First, collect the protocols needed later. All of these protocols are // listed in our module DEPEX. // Status =3D gMmst->MmLocateProtocol (&gEfiMmCpuIoProtocolGuid, NULL /* Registration */, (VOID **)&mMmCpuIo); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "%a: locate MmCpuIo: %r\n", __FUNCTION__, Status)= ); goto Fatal; } =20 + // + // Sanity-check the CPU hotplug interface. + // + // Both of the following features are part of QEMU 5.0, introduced prima= rily + // in commit range 3e08b2b9cb64..3a61c8db9d25: + // + // (a) the QEMU_CPUHP_CMD_GET_ARCH_ID command of the modern CPU hotplug + // interface, + // + // (b) the "SMRAM at default SMBASE" feature. + // + // From these, (b) is restricted to 5.0+ machine type versions, while (a) + // does not depend on machine type version. Because we ensured the stric= ter + // condition (b) through PcdQ35SmramAtDefaultSmbase above, the (a) + // QEMU_CPUHP_CMD_GET_ARCH_ID command must now be available too. While we + // can't verify the presence of precisely that command, we can still ver= ify + // (sanity-check) that the modern interface is active, at least. + // + // Consult the "Typical usecases | Detecting and enabling modern CPU hot= plug + // interface" section in QEMU's "docs/specs/acpi_cpu_hotplug.txt", on the + // following. + // + QemuCpuhpWriteCpuSelector (mMmCpuIo, 0); + QemuCpuhpWriteCpuSelector (mMmCpuIo, 0); + QemuCpuhpWriteCommand (mMmCpuIo, QEMU_CPUHP_CMD_GET_PENDING); + if (QemuCpuhpReadCommandData2 (mMmCpuIo) !=3D 0) { + Status =3D EFI_NOT_FOUND; + DEBUG ((DEBUG_ERROR, "%a: modern CPU hotplug interface: %r\n", + __FUNCTION__, Status)); + goto Fatal; + } + // // Register the handler for the CPU Hotplug MMI. // Status =3D gMmst->MmiHandlerRegister ( CpuHotplugMmi, NULL, // HandlerType: root MMI handler &mDispatchHandle ); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "%a: MmiHandlerRegister(): %r\n", __FUNCTION__, Status)); goto Fatal; } =20 return EFI_SUCCESS; =20 Fatal: ASSERT (FALSE); CpuDeadLoop (); return Status; } --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54740): https://edk2.groups.io/g/devel/message/54740 Mute This Topic: https://groups.io/mt/71494218/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54741+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54741+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478769; cv=none; d=zohomail.com; s=zohoarc; b=c29JxJ4bxxt6SFrw0SW/CZ1ltKM5sA/nxWYvZKebnCWxdDBjtFUaZGBqjQ2/sPZKyCby7O2AJcAnSmtjDY/mq3Cu6sUaaFlcqYEstZgiT1dDi+QCN9WM5DmeeAGyZ+3M7mTOeIkZmhcQJeietwhbJw+N0mB+nPNUMVSj2o5WgR8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478769; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=+AJKPs90LYHMEGU/cqbyTqX/Or/Slmv46h7f8d1dIxc=; b=GKHsYBFM/JIVHeER0o9bOuiQxJyDtVRHeq9npTXk8fXbOosYNX5/rdf4x+1TOMsyZQ+TUtb7JXsSJusW1OYlKGFaCVWJyojELC5wCB/1g+zKA+h277SO/LRJfwFeDCb+7lHuVTxe59MjO/BKpQTm/pooh2RgEhMQZeIh4qMfqyg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54741+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478769194317.3394000909856; Sun, 23 Feb 2020 09:26:09 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id o1ExYY1788612xgt2DWvvagz; Sun, 23 Feb 2020 09:26:08 -0800 X-Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [205.139.110.120]) by mx.groups.io with SMTP id smtpd.web09.9138.1582478768135842250 for ; Sun, 23 Feb 2020 09:26:08 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-292-mo8ahZUIPkyqf8g3_IILZQ-1; Sun, 23 Feb 2020 12:26:05 -0500 X-MC-Unique: mo8ahZUIPkyqf8g3_IILZQ-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 9286F107ACC5; Sun, 23 Feb 2020 17:26:04 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id D66019182B; Sun, 23 Feb 2020 17:26:02 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 09/16] OvmfPkg/CpuHotplugSmm: add function for collecting CPUs with events Date: Sun, 23 Feb 2020 18:25:30 +0100 Message-Id: <20200223172537.28464-10-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: 7NFEqtEkjWW2N9rV0wH2jpxQx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478768; bh=+AJKPs90LYHMEGU/cqbyTqX/Or/Slmv46h7f8d1dIxc=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=ihVochS9eYzGFakKN7blW3PxyRfSz1xbR6mrDAHI8jIPuCQ5fJ/io6R9pPp7mLsBqca mkDsCjjwalp7djzxcyGFQxexUiZ5vl2/IWlL2Nm6w7aI1bSc9PUZ04qK4lg9FiMt1mxpo bqhwdxqSIDb15+TA1QFUSZVyj3e4pjAx9Kc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Add a function that collects the APIC IDs of CPUs that have just been hot-plugged, or are about to be hot-unplugged. Pending events are only located and never cleared; QEMU's AML needs the firmware to leave the status bits intact in the hotplug register block. Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h | 2 + OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf | 1 + OvmfPkg/CpuHotplugSmm/ApicId.h | 23 +++ OvmfPkg/CpuHotplugSmm/QemuCpuhp.h | 20 ++- OvmfPkg/CpuHotplugSmm/QemuCpuhp.c | 171 ++++++++++++++++++= +- 5 files changed, 211 insertions(+), 6 deletions(-) diff --git a/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h b/OvmfPkg/In= clude/IndustryStandard/QemuCpuHotplug.h index 3d013633501b..a34a6d3fae61 100644 --- a/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h +++ b/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h @@ -13,32 +13,34 @@ The new ("modern") hotplug interface appeared in QEMU v2.7.0. =20 The macros in this header file map to the minimal subset of the modern interface that OVMF needs. **/ =20 #ifndef QEMU_CPU_HOTPLUG_H_ #define QEMU_CPU_HOTPLUG_H_ =20 #include =20 // // Each register offset is: // - relative to the board-dependent IO base address of the register block, // - named QEMU_CPUHP_(R|W|RW)_*, according to the possible access modes o= f the // register, // - followed by distinguished bitmasks or values in the register. // #define QEMU_CPUHP_R_CMD_DATA2 0x0 =20 #define QEMU_CPUHP_R_CPU_STAT 0x4 #define QEMU_CPUHP_STAT_ENABLED BIT0 +#define QEMU_CPUHP_STAT_INSERT BIT1 +#define QEMU_CPUHP_STAT_REMOVE BIT2 =20 #define QEMU_CPUHP_RW_CMD_DATA 0x8 =20 #define QEMU_CPUHP_W_CPU_SEL 0x0 =20 #define QEMU_CPUHP_W_CMD 0x5 #define QEMU_CPUHP_CMD_GET_PENDING 0x0 #define QEMU_CPUHP_CMD_GET_ARCH_ID 0x3 =20 #endif // QEMU_CPU_HOTPLUG_H_ diff --git a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf b/OvmfPkg/CpuHotplugSm= m/CpuHotplugSmm.inf index ac4ca4c1f4f2..ab690a9e5e20 100644 --- a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf +++ b/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf @@ -3,44 +3,45 @@ # # Copyright (c) 2020, Red Hat, Inc. # # SPDX-License-Identifier: BSD-2-Clause-Patent ## =20 [Defines] INF_VERSION =3D 1.29 PI_SPECIFICATION_VERSION =3D 0x00010046 # P= I-1.7.0 BASE_NAME =3D CpuHotplugSmm FILE_GUID =3D 84EEA114-C6BE-4445-8F90-51D97863E363 MODULE_TYPE =3D DXE_SMM_DRIVER ENTRY_POINT =3D CpuHotplugEntry =20 # # The following information is for reference only and not required by the = build # tools. # # VALID_ARCHITECTURES =3D IA32 X64 # =20 [Sources] + ApicId.h CpuHotplug.c QemuCpuhp.c QemuCpuhp.h =20 [Packages] MdePkg/MdePkg.dec OvmfPkg/OvmfPkg.dec =20 [LibraryClasses] BaseLib DebugLib MmServicesTableLib PcdLib UefiDriverEntryPoint =20 [Protocols] gEfiMmCpuIoProtocolGuid ## CON= SUMES =20 [Pcd] gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase ## CON= SUMES =20 [FeaturePcd] diff --git a/OvmfPkg/CpuHotplugSmm/ApicId.h b/OvmfPkg/CpuHotplugSmm/ApicId.h new file mode 100644 index 000000000000..3c365148ed02 --- /dev/null +++ b/OvmfPkg/CpuHotplugSmm/ApicId.h @@ -0,0 +1,23 @@ +/** @file + Type and macro definitions for representing and printing APIC IDs, compa= tibly + with the LocalApicLib and PrintLib classes, respectively. + + Copyright (c) 2020, Red Hat, Inc. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef APIC_ID_H_ +#define APIC_ID_H_ + +// +// The type that LocalApicLib represents an APIC ID with. +// +typedef UINT32 APIC_ID; + +// +// The PrintLib conversion specification for formatting an APIC_ID. +// +#define FMT_APIC_ID "0x%08x" + +#endif // APIC_ID_H_ diff --git a/OvmfPkg/CpuHotplugSmm/QemuCpuhp.h b/OvmfPkg/CpuHotplugSmm/Qemu= Cpuhp.h index 82f88f0b73bb..8adaa0ad91f0 100644 --- a/OvmfPkg/CpuHotplugSmm/QemuCpuhp.h +++ b/OvmfPkg/CpuHotplugSmm/QemuCpuhp.h @@ -1,47 +1,61 @@ /** @file - Simple wrapper functions that access QEMU's modern CPU hotplug register - block. + Simple wrapper functions and utility functions that access QEMU's modern= CPU + hotplug register block. =20 - These functions thinly wrap some of the registers described in + These functions manipulate some of the registers described in "docs/specs/acpi_cpu_hotplug.txt" in the QEMU source. IO Ports are acces= sed via EFI_MM_CPU_IO_PROTOCOL. If a protocol call fails, these functions do= n't return. =20 Copyright (c) 2020, Red Hat, Inc. =20 SPDX-License-Identifier: BSD-2-Clause-Patent **/ =20 #ifndef QEMU_CPUHP_H_ #define QEMU_CPUHP_H_ =20 #include // EFI_MM_CPU_IO_PROTOCOL +#include // EFI_STATUS + +#include "ApicId.h" // APIC_ID =20 UINT32 QemuCpuhpReadCommandData2 ( IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo ); =20 UINT8 QemuCpuhpReadCpuStatus ( IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo ); =20 UINT32 QemuCpuhpReadCommandData ( IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo ); =20 VOID QemuCpuhpWriteCpuSelector ( IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo, IN UINT32 Selector ); =20 VOID QemuCpuhpWriteCommand ( IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo, IN UINT8 Command ); =20 +EFI_STATUS +QemuCpuhpCollectApicIds ( + IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo, + IN UINT32 PossibleCpuCount, + IN UINT32 ApicIdCount, + OUT APIC_ID *PluggedApicIds, + OUT UINT32 *PluggedCount, + OUT APIC_ID *ToUnplugApicIds, + OUT UINT32 *ToUnplugCount + ); + #endif // QEMU_CPUHP_H_ diff --git a/OvmfPkg/CpuHotplugSmm/QemuCpuhp.c b/OvmfPkg/CpuHotplugSmm/Qemu= Cpuhp.c index 31e46f51934a..8d4a6693c8d6 100644 --- a/OvmfPkg/CpuHotplugSmm/QemuCpuhp.c +++ b/OvmfPkg/CpuHotplugSmm/QemuCpuhp.c @@ -1,27 +1,27 @@ /** @file - Simple wrapper functions that access QEMU's modern CPU hotplug register - block. + Simple wrapper functions and utility functions that access QEMU's modern= CPU + hotplug register block. =20 - These functions thinly wrap some of the registers described in + These functions manipulate some of the registers described in "docs/specs/acpi_cpu_hotplug.txt" in the QEMU source. IO Ports are acces= sed via EFI_MM_CPU_IO_PROTOCOL. If a protocol call fails, these functions do= n't return. =20 Copyright (c) 2020, Red Hat, Inc. =20 SPDX-License-Identifier: BSD-2-Clause-Patent **/ =20 #include // ICH9_CPU_HOTPLUG_BASE #include // QEMU_CPUHP_R_CMD_DATA2 #include // CpuDeadLoop() #include // DEBUG() =20 #include "QemuCpuhp.h" =20 UINT32 QemuCpuhpReadCommandData2 ( IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo ) { UINT32 CommandData2; @@ -115,22 +115,187 @@ QemuCpuhpWriteCpuSelector ( =20 VOID QemuCpuhpWriteCommand ( IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo, IN UINT8 Command ) { EFI_STATUS Status; =20 Status =3D MmCpuIo->Io.Write ( MmCpuIo, MM_IO_UINT8, ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_W_CMD, 1, &Command ); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, Status)); ASSERT (FALSE); CpuDeadLoop (); } } + +/** + Collect the APIC IDs of + - the CPUs that have been hot-plugged, + - the CPUs that are about to be hot-unplugged. + + This function only scans for events -- it does not modify them -- in the + hotplug registers. + + On error, the contents of the output parameters are undefined. + + @param[in] MmCpuIo The EFI_MM_CPU_IO_PROTOCOL instance for + accessing IO Ports. + + @param[in] PossibleCpuCount The number of possible CPUs in the system. = Must + be positive. + + @param[in] ApicIdCount The number of elements each one of the + PluggedApicIds and ToUnplugApicIds arrays c= an + accommodate. Must be positive. + + @param[out] PluggedApicIds The APIC IDs of the CPUs that have been + hot-plugged. + + @param[out] PluggedCount The number of filled-in APIC IDs in + PluggedApicIds. + + @param[out] ToUnplugApicIds The APIC IDs of the CPUs that are about to = be + hot-unplugged. + + @param[out] ToUnplugCount The number of filled-in APIC IDs in + ToUnplugApicIds. + + @retval EFI_INVALID_PARAMETER PossibleCpuCount is zero, or ApicIdCount = is + zero. + + @retval EFI_PROTOCOL_ERROR Invalid bitmap detected in the + QEMU_CPUHP_R_CPU_STAT register. + + @retval EFI_BUFFER_TOO_SMALL There was an attempt to place more than + ApicIdCount APIC IDs into one of the + PluggedApicIds and ToUnplugApicIds arrays. + + @retval EFI_SUCCESS Output parameters have been set successfu= lly. +**/ +EFI_STATUS +QemuCpuhpCollectApicIds ( + IN CONST EFI_MM_CPU_IO_PROTOCOL *MmCpuIo, + IN UINT32 PossibleCpuCount, + IN UINT32 ApicIdCount, + OUT APIC_ID *PluggedApicIds, + OUT UINT32 *PluggedCount, + OUT APIC_ID *ToUnplugApicIds, + OUT UINT32 *ToUnplugCount + ) +{ + UINT32 CurrentSelector; + + if (PossibleCpuCount =3D=3D 0 || ApicIdCount =3D=3D 0) { + return EFI_INVALID_PARAMETER; + } + + *PluggedCount =3D 0; + *ToUnplugCount =3D 0; + + CurrentSelector =3D 0; + do { + UINT32 PendingSelector; + UINT8 CpuStatus; + APIC_ID *ExtendIds; + UINT32 *ExtendCount; + APIC_ID NewApicId; + + // + // Write CurrentSelector (which is valid) to the CPU selector register. + // Consequences: + // + // - Other register accesses will be permitted. + // + // - The QEMU_CPUHP_CMD_GET_PENDING command will start scanning for a = CPU + // with pending events at CurrentSelector (inclusive). + // + QemuCpuhpWriteCpuSelector (MmCpuIo, CurrentSelector); + // + // Write the QEMU_CPUHP_CMD_GET_PENDING command. Consequences + // (independently of each other): + // + // - If there is a CPU with pending events, starting at CurrentSelector + // (inclusive), the CPU selector will be updated to that CPU. Note t= hat + // the scanning in QEMU may wrap around, because we must never clear= the + // event bits. + // + // - The QEMU_CPUHP_RW_CMD_DATA register will return the (possibly upd= ated) + // CPU selector value. + // + QemuCpuhpWriteCommand (MmCpuIo, QEMU_CPUHP_CMD_GET_PENDING); + PendingSelector =3D QemuCpuhpReadCommandData (MmCpuIo); + if (PendingSelector < CurrentSelector) { + DEBUG ((DEBUG_VERBOSE, "%a: CurrentSelector=3D%u PendingSelector=3D%= u: " + "wrap-around\n", __FUNCTION__, CurrentSelector, PendingSelector)); + break; + } + CurrentSelector =3D PendingSelector; + + // + // Check the known status / event bits for the currently selected CPU. + // + CpuStatus =3D QemuCpuhpReadCpuStatus (MmCpuIo); + if ((CpuStatus & QEMU_CPUHP_STAT_INSERT) !=3D 0) { + // + // The "insert" event guarantees the "enabled" status; plus it exclu= des + // the "remove" event. + // + if ((CpuStatus & QEMU_CPUHP_STAT_ENABLED) =3D=3D 0 || + (CpuStatus & QEMU_CPUHP_STAT_REMOVE) !=3D 0) { + DEBUG ((DEBUG_ERROR, "%a: CurrentSelector=3D%u CpuStatus=3D0x%x: " + "inconsistent CPU status\n", __FUNCTION__, CurrentSelector, + CpuStatus)); + return EFI_PROTOCOL_ERROR; + } + + DEBUG ((DEBUG_VERBOSE, "%a: CurrentSelector=3D%u: insert\n", __FUNCT= ION__, + CurrentSelector)); + + ExtendIds =3D PluggedApicIds; + ExtendCount =3D PluggedCount; + } else if ((CpuStatus & QEMU_CPUHP_STAT_REMOVE) !=3D 0) { + DEBUG ((DEBUG_VERBOSE, "%a: CurrentSelector=3D%u: remove\n", __FUNCT= ION__, + CurrentSelector)); + + ExtendIds =3D ToUnplugApicIds; + ExtendCount =3D ToUnplugCount; + } else { + DEBUG ((DEBUG_VERBOSE, "%a: CurrentSelector=3D%u: no event\n", + __FUNCTION__, CurrentSelector)); + break; + } + + // + // Save the APIC ID of the CPU with the pending event, to the correspo= nding + // APIC ID array. + // + if (*ExtendCount =3D=3D ApicIdCount) { + DEBUG ((DEBUG_ERROR, "%a: APIC ID array too small\n", __FUNCTION__)); + return EFI_BUFFER_TOO_SMALL; + } + QemuCpuhpWriteCommand (MmCpuIo, QEMU_CPUHP_CMD_GET_ARCH_ID); + NewApicId =3D QemuCpuhpReadCommandData (MmCpuIo); + DEBUG ((DEBUG_VERBOSE, "%a: ApicId=3D" FMT_APIC_ID "\n", __FUNCTION__, + NewApicId)); + ExtendIds[(*ExtendCount)++] =3D NewApicId; + + // + // We've processed the CPU with (known) pending events, but we must ne= ver + // clear events. Therefore we need to advance past this CPU manually; + // otherwise, QEMU_CPUHP_CMD_GET_PENDING would stick to the currently + // selected CPU. + // + CurrentSelector++; + } while (CurrentSelector < PossibleCpuCount); + + DEBUG ((DEBUG_VERBOSE, "%a: PluggedCount=3D%u ToUnplugCount=3D%u\n", + __FUNCTION__, *PluggedCount, *ToUnplugCount)); + return EFI_SUCCESS; +} --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54741): https://edk2.groups.io/g/devel/message/54741 Mute This Topic: https://groups.io/mt/71494219/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54743+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54743+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478773; cv=none; d=zohomail.com; s=zohoarc; b=gNnthqbQA+JguW1XHlvA4N0/jh9tqngk5DaG3pgRPWUl2JuOPDEOmuOs9NDrn5zAumTBABlEH6hA3jE6VZ4k9vmmxBBdm84thg0ygVtayWz5JMM8Xt6mhVZtsCXAKYXdBXVZkwh7CD0MLdTry1c6cOtB2NcZmBcm0i+7aou6ERA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478773; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=5utagcxtqx3N+n27TRaNRqCvatfKaEoSL3ff7c00wR0=; b=gr+fC0GaUguay6nH6ONUkyLADSKX/JJjVtV28imSgGluHnitNNl/DlKtpxqmP8dgPPOGKJVRuwHbMOfc8QNgtTrqdHNJwRN2Y9nBY8qYA7SJd1L3uXFVk3+sBR8iX5gGQVeVoCYwFzk8c8wDJO/yPq+nGPn1FJqipdNdGp45xMg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54743+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478773659547.7339121739144; Sun, 23 Feb 2020 09:26:13 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id b8a2YY1788612xSl9ex02Odq; Sun, 23 Feb 2020 09:26:13 -0800 X-Received: from us-smtp-delivery-1.mimecast.com (us-smtp-delivery-1.mimecast.com [205.139.110.61]) by mx.groups.io with SMTP id smtpd.web11.9235.1582478772396705734 for ; Sun, 23 Feb 2020 09:26:12 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-326-dNkwxtCHMx-2epwA7f-u9w-1; Sun, 23 Feb 2020 12:26:07 -0500 X-MC-Unique: dNkwxtCHMx-2epwA7f-u9w-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id A5A021851FC2; Sun, 23 Feb 2020 17:26:06 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id E857D5C105; Sun, 23 Feb 2020 17:26:04 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 10/16] OvmfPkg/CpuHotplugSmm: collect CPUs with events Date: Sun, 23 Feb 2020 18:25:31 +0100 Message-Id: <20200223172537.28464-11-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: jF47uQhQKOL1fVDCCPefaLPfx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478773; bh=5utagcxtqx3N+n27TRaNRqCvatfKaEoSL3ff7c00wR0=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=hP+J+QHjyiE7DlVn9WKayRAT2QqcondhQX9JuWZYKoq9KR3y/BuxUg0QQ0Lk7kDSSQX Snc4PvhZ2hWSgXR1NyVo3j3x8ukKwD0MTOHI2H2VhDoHtY2sUkaYvO1twzE0gx7uP0CnW Is/Kev140W2PLC5kZUuM5F5BEY2Jq59YmYw= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Call QemuCpuhpCollectApicIds() in the root MMI handler. The APIC IDs of the hotplugged CPUs will be used for several purposes in subsequent patches. For calling QemuCpuhpCollectApicIds(), pre-allocate both of its output arrays "PluggedApicIds" and "ToUnplugApicIds" in the driver's entry point function. The allocation size is dictated by the possible CPU count, which we fetch from "CPU_HOT_PLUG_DATA.ArrayLength". The CPU_HOT_PLUG_DATA structure in SMRAM is an out-of-band information channel between this driver and PiSmmCpuDxeSmm, underlying EFI_SMM_CPU_SERVICE_PROTOCOL. In order to consume "CPU_HOT_PLUG_DATA.ArrayLength", extend the driver's DEPEX to EFI_SMM_CPU_SERVICE_PROTOCOL. PiSmmCpuDxeSmm stores the address of CPU_HOT_PLUG_DATA to "PcdCpuHotPlugDataAddress", before it produces EFI_SMM_CPU_SERVICE_PROTOCOL. Stash the protocol at once, as it will be needed later. Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf | 7 +- OvmfPkg/CpuHotplugSmm/CpuHotplug.c | 111 +++++++++++++++++++- 2 files changed, 115 insertions(+), 3 deletions(-) diff --git a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf b/OvmfPkg/CpuHotplugSm= m/CpuHotplugSmm.inf index ab690a9e5e20..31c1ee1c9f6d 100644 --- a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf +++ b/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf @@ -11,41 +11,46 @@ [Defines] PI_SPECIFICATION_VERSION =3D 0x00010046 # P= I-1.7.0 BASE_NAME =3D CpuHotplugSmm FILE_GUID =3D 84EEA114-C6BE-4445-8F90-51D97863E363 MODULE_TYPE =3D DXE_SMM_DRIVER ENTRY_POINT =3D CpuHotplugEntry =20 # # The following information is for reference only and not required by the = build # tools. # # VALID_ARCHITECTURES =3D IA32 X64 # =20 [Sources] ApicId.h CpuHotplug.c QemuCpuhp.c QemuCpuhp.h =20 [Packages] MdePkg/MdePkg.dec OvmfPkg/OvmfPkg.dec + UefiCpuPkg/UefiCpuPkg.dec =20 [LibraryClasses] BaseLib DebugLib MmServicesTableLib PcdLib + SafeIntLib UefiDriverEntryPoint =20 [Protocols] gEfiMmCpuIoProtocolGuid ## CON= SUMES + gEfiSmmCpuServiceProtocolGuid ## CON= SUMES =20 [Pcd] + gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress ## CON= SUMES gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase ## CON= SUMES =20 [FeaturePcd] gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire ## CON= SUMES =20 [Depex] - gEfiMmCpuIoProtocolGuid + gEfiMmCpuIoProtocolGuid AND + gEfiSmmCpuServiceProtocolGuid diff --git a/OvmfPkg/CpuHotplugSmm/CpuHotplug.c b/OvmfPkg/CpuHotplugSmm/Cpu= Hotplug.c index 5df8c689c63a..42e023cb85c0 100644 --- a/OvmfPkg/CpuHotplugSmm/CpuHotplug.c +++ b/OvmfPkg/CpuHotplugSmm/CpuHotplug.c @@ -1,46 +1,76 @@ /** @file Root SMI handler for VCPU hotplug SMIs. =20 Copyright (c) 2020, Red Hat, Inc. =20 SPDX-License-Identifier: BSD-2-Clause-Patent **/ =20 +#include // CPU_HOT_PLUG_DATA #include // ICH9_APM_CNT #include // QEMU_CPUHP_CMD_GET_PENDING #include // CpuDeadLoop() #include // ASSERT() #include // gMmst #include // PcdGetBool() +#include // SafeUintnSub() #include // EFI_MM_CPU_IO_PROTOCOL +#include // EFI_SMM_CPU_SERVICE_PROTOC= OL #include // EFI_STATUS =20 +#include "ApicId.h" // APIC_ID #include "QemuCpuhp.h" // QemuCpuhpWriteCpuSelector() =20 // // We use this protocol for accessing IO Ports. // STATIC EFI_MM_CPU_IO_PROTOCOL *mMmCpuIo; // +// The following protocol is used to report the addition or removal of a C= PU to +// the SMM CPU driver (PiSmmCpuDxeSmm). +// +STATIC EFI_SMM_CPU_SERVICE_PROTOCOL *mMmCpuService; +// +// This structure is a communication side-channel between the +// EFI_SMM_CPU_SERVICE_PROTOCOL consumer (i.e., this driver) and provider +// (i.e., PiSmmCpuDxeSmm). +// +STATIC CPU_HOT_PLUG_DATA *mCpuHotPlugData; +// +// SMRAM arrays for fetching the APIC IDs of processors with pending event= s (of +// known event types), for the time of just one MMI. +// +// The lifetimes of these arrays match that of this driver only because we +// don't want to allocate SMRAM at OS runtime, and potentially fail (or +// fragment the SMRAM map). +// +// These arrays provide room for ("possible CPU count" minus one) APIC IDs +// each, as we don't expect every possible CPU to appear, or disappear, in= a +// single MMI. The numbers of used (populated) elements in the arrays are +// determined on every MMI separately. +// +STATIC APIC_ID *mPluggedApicIds; +STATIC APIC_ID *mToUnplugApicIds; +// // Represents the registration of the CPU Hotplug MMI handler. // STATIC EFI_HANDLE mDispatchHandle; =20 =20 /** CPU Hotplug MMI handler function. =20 This is a root MMI handler. =20 @param[in] DispatchHandle The unique handle assigned to this handle= r by EFI_MM_SYSTEM_TABLE.MmiHandlerRegister(). =20 @param[in] Context Context passed in by EFI_MM_SYSTEM_TABLE.MmiManage(). Due to CpuHotplugMmi() being a root MMI handler, Context is ASSERT()ed to be NULL. =20 @param[in,out] CommBuffer Ignored, due to CpuHotplugMmi() being a r= oot MMI handler. =20 @param[in,out] CommBufferSize Ignored, due to CpuHotplugMmi() being a r= oot @@ -65,162 +95,239 @@ STATIC EFI_HANDLE mDispatchHandle; but other handlers should st= ill be called. =20 @retval EFI_WARN_INTERRUPT_SOURCE_PENDING The MMI source is still pend= ing, and other handlers should st= ill be called. =20 @retval EFI_INTERRUPT_PENDING The MMI source could not be quiesced. **/ STATIC EFI_STATUS EFIAPI CpuHotplugMmi ( IN EFI_HANDLE DispatchHandle, IN CONST VOID *Context OPTIONAL, IN OUT VOID *CommBuffer OPTIONAL, IN OUT UINTN *CommBufferSize OPTIONAL ) { EFI_STATUS Status; UINT8 ApmControl; + UINT32 PluggedCount; + UINT32 ToUnplugCount; =20 // // Assert that we are entering this function due to our root MMI handler // registration. // ASSERT (DispatchHandle =3D=3D mDispatchHandle); // // When MmiManage() is invoked to process root MMI handlers, the caller = (the // MM Core) is expected to pass in a NULL Context. MmiManage() then pass= es // the same NULL Context to individual handlers. // ASSERT (Context =3D=3D NULL); // // Read the MMI command value from the APM Control Port, to see if this = is an // MMI we should care about. // Status =3D mMmCpuIo->Io.Read (mMmCpuIo, MM_IO_UINT8, ICH9_APM_CNT, 1, &ApmControl); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "%a: failed to read ICH9_APM_CNT: %r\n", __FUNCTI= ON__, Status)); // // We couldn't even determine if the MMI was for us or not. // goto Fatal; } =20 if (ApmControl !=3D ICH9_APM_CNT_CPU_HOTPLUG) { // // The MMI is not for us. // return EFI_WARN_INTERRUPT_SOURCE_QUIESCED; } =20 + // + // Collect the CPUs with pending events. + // + Status =3D QemuCpuhpCollectApicIds ( + mMmCpuIo, + mCpuHotPlugData->ArrayLength, // PossibleCpuCount + mCpuHotPlugData->ArrayLength - 1, // ApicIdCount + mPluggedApicIds, + &PluggedCount, + mToUnplugApicIds, + &ToUnplugCount + ); + if (EFI_ERROR (Status)) { + goto Fatal; + } + if (ToUnplugCount > 0) { + DEBUG ((DEBUG_ERROR, "%a: hot-unplug is not supported yet\n", + __FUNCTION__)); + goto Fatal; + } + // // We've handled this MMI. // return EFI_SUCCESS; =20 Fatal: ASSERT (FALSE); CpuDeadLoop (); // // We couldn't handle this MMI. // return EFI_INTERRUPT_PENDING; } =20 =20 // // Entry point function of this driver. // EFI_STATUS EFIAPI CpuHotplugEntry ( IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable ) { EFI_STATUS Status; + UINTN Size; =20 // // This module should only be included when SMM support is required. // ASSERT (FeaturePcdGet (PcdSmmSmramRequire)); // // This driver depends on the dynamically detected "SMRAM at default SMB= ASE" // feature. // if (!PcdGetBool (PcdQ35SmramAtDefaultSmbase)) { return EFI_UNSUPPORTED; } =20 // // Errors from here on are fatal; we cannot allow the boot to proceed if= we // can't set up this driver to handle CPU hotplug. // // First, collect the protocols needed later. All of these protocols are // listed in our module DEPEX. // Status =3D gMmst->MmLocateProtocol (&gEfiMmCpuIoProtocolGuid, NULL /* Registration */, (VOID **)&mMmCpuIo); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "%a: locate MmCpuIo: %r\n", __FUNCTION__, Status)= ); goto Fatal; } + Status =3D gMmst->MmLocateProtocol (&gEfiSmmCpuServiceProtocolGuid, + NULL /* Registration */, (VOID **)&mMmCpuService); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: locate MmCpuService: %r\n", __FUNCTION__, + Status)); + goto Fatal; + } + + // + // Our DEPEX on EFI_SMM_CPU_SERVICE_PROTOCOL guarantees that PiSmmCpuDxe= Smm + // has pointed PcdCpuHotPlugDataAddress to CPU_HOT_PLUG_DATA in SMRAM. + // + mCpuHotPlugData =3D (VOID *)(UINTN)PcdGet64 (PcdCpuHotPlugDataAddress); + if (mCpuHotPlugData =3D=3D NULL) { + Status =3D EFI_NOT_FOUND; + DEBUG ((DEBUG_ERROR, "%a: CPU_HOT_PLUG_DATA: %r\n", __FUNCTION__, Stat= us)); + goto Fatal; + } + // + // If the possible CPU count is 1, there's nothing for this driver to do. + // + if (mCpuHotPlugData->ArrayLength =3D=3D 1) { + return EFI_UNSUPPORTED; + } + // + // Allocate the data structures that depend on the possible CPU count. + // + if (RETURN_ERROR (SafeUintnSub (mCpuHotPlugData->ArrayLength, 1, &Size))= || + RETURN_ERROR (SafeUintnMult (sizeof (APIC_ID), Size, &Size))) { + Status =3D EFI_ABORTED; + DEBUG ((DEBUG_ERROR, "%a: invalid CPU_HOT_PLUG_DATA\n", __FUNCTION__)); + goto Fatal; + } + Status =3D gMmst->MmAllocatePool (EfiRuntimeServicesData, Size, + (VOID **)&mPluggedApicIds); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: MmAllocatePool(): %r\n", __FUNCTION__, Statu= s)); + goto Fatal; + } + Status =3D gMmst->MmAllocatePool (EfiRuntimeServicesData, Size, + (VOID **)&mToUnplugApicIds); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: MmAllocatePool(): %r\n", __FUNCTION__, Statu= s)); + goto ReleasePluggedApicIds; + } =20 // // Sanity-check the CPU hotplug interface. // // Both of the following features are part of QEMU 5.0, introduced prima= rily // in commit range 3e08b2b9cb64..3a61c8db9d25: // // (a) the QEMU_CPUHP_CMD_GET_ARCH_ID command of the modern CPU hotplug // interface, // // (b) the "SMRAM at default SMBASE" feature. // // From these, (b) is restricted to 5.0+ machine type versions, while (a) // does not depend on machine type version. Because we ensured the stric= ter // condition (b) through PcdQ35SmramAtDefaultSmbase above, the (a) // QEMU_CPUHP_CMD_GET_ARCH_ID command must now be available too. While we // can't verify the presence of precisely that command, we can still ver= ify // (sanity-check) that the modern interface is active, at least. // // Consult the "Typical usecases | Detecting and enabling modern CPU hot= plug // interface" section in QEMU's "docs/specs/acpi_cpu_hotplug.txt", on the // following. // QemuCpuhpWriteCpuSelector (mMmCpuIo, 0); QemuCpuhpWriteCpuSelector (mMmCpuIo, 0); QemuCpuhpWriteCommand (mMmCpuIo, QEMU_CPUHP_CMD_GET_PENDING); if (QemuCpuhpReadCommandData2 (mMmCpuIo) !=3D 0) { Status =3D EFI_NOT_FOUND; DEBUG ((DEBUG_ERROR, "%a: modern CPU hotplug interface: %r\n", __FUNCTION__, Status)); - goto Fatal; + goto ReleaseToUnplugApicIds; } =20 // // Register the handler for the CPU Hotplug MMI. // Status =3D gMmst->MmiHandlerRegister ( CpuHotplugMmi, NULL, // HandlerType: root MMI handler &mDispatchHandle ); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "%a: MmiHandlerRegister(): %r\n", __FUNCTION__, Status)); - goto Fatal; + goto ReleaseToUnplugApicIds; } =20 return EFI_SUCCESS; =20 +ReleaseToUnplugApicIds: + gMmst->MmFreePool (mToUnplugApicIds); + mToUnplugApicIds =3D NULL; + +ReleasePluggedApicIds: + gMmst->MmFreePool (mPluggedApicIds); + mPluggedApicIds =3D NULL; + Fatal: ASSERT (FALSE); CpuDeadLoop (); return Status; } --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54743): https://edk2.groups.io/g/devel/message/54743 Mute This Topic: https://groups.io/mt/71494228/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54742+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54742+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478773; cv=none; d=zohomail.com; s=zohoarc; b=E5nU44t0/c5UfWZFLk3x5DtykR/+OZGVRZS+qiRNULvmRMPc2p7PVLpjOyIfRIHLcjOUaSZDH2rtEWi+xIENluM9dWwj3lKmLJj9TwbJnTw64bbjPevPvN/mI0RFGTbR4a3nNiMP/+TUq4XFCvhmKjR6/ft7lu/nmRgQ10YFRZI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478773; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=OUHSBA8ADhmuQP7cNkdQdcg9lask/tQcYswwj7/8qEo=; b=ZaxmjBtg0U+0iE/VgaxXrrLc/Q/X/3grMB6pNhoT3AaAqPEHW+yXbl9sLLFLFMrlOqdjgGFY4JB8YTarIlnA9DfvlVP7yaswCuVZ4Cq0PBrYrZ8FMjHZG3+MbQy/lt/FnEZK7pjFUmi3E9ul/XSPlsZHDV0FWrCENRXrRedXx+k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54742+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 158247877337838.99832438211672; Sun, 23 Feb 2020 09:26:13 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id b35MYY1788612xMlnZC4S3Qa; Sun, 23 Feb 2020 09:26:13 -0800 X-Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [205.139.110.120]) by mx.groups.io with SMTP id smtpd.web09.9144.1582478772205427539 for ; Sun, 23 Feb 2020 09:26:12 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-88-VZ-F1WZzMQeKWMuGYxqJjw-1; Sun, 23 Feb 2020 12:26:09 -0500 X-MC-Unique: VZ-F1WZzMQeKWMuGYxqJjw-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B65A6800D50; Sun, 23 Feb 2020 17:26:08 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id 08D2C9182B; Sun, 23 Feb 2020 17:26:06 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 11/16] OvmfPkg/CpuHotplugSmm: introduce Post-SMM Pen for hot-added CPUs Date: Sun, 23 Feb 2020 18:25:32 +0100 Message-Id: <20200223172537.28464-12-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: 9mr0wabXS50mlhEiGRcETN43x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478773; bh=OUHSBA8ADhmuQP7cNkdQdcg9lask/tQcYswwj7/8qEo=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=DqhyZDN/fvaI9yIEboIcPFX7kMSU1ZImqug9xNjtLEUy1qxCap/Jcw1/45guGUjifqC QXcQJ+ea4GyizW+TWrqa9VUn9OqOtS4OYOwqQIw5w3MZ7Viz8zWQDIoiR/nkx8kN/UIEf yUZI9YC2T6z9Yle9+0+m82RpCaNhppNYrPg= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Once a hot-added CPU finishes the SMBASE relocation, we need to pen it in a HLT loop. Add the NASM implementation (with just a handful of instructions, but much documentation), and some C language helper functions. Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf | 4 + OvmfPkg/CpuHotplugSmm/Smbase.h | 32 +++++ OvmfPkg/CpuHotplugSmm/PostSmmPen.nasm | 137 ++++++++++++++++++++ OvmfPkg/CpuHotplugSmm/Smbase.c | 110 ++++++++++++++++ 4 files changed, 283 insertions(+) diff --git a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf b/OvmfPkg/CpuHotplugSm= m/CpuHotplugSmm.inf index 31c1ee1c9f6d..bf4162299c7c 100644 --- a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf +++ b/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf @@ -5,52 +5,56 @@ # # SPDX-License-Identifier: BSD-2-Clause-Patent ## =20 [Defines] INF_VERSION =3D 1.29 PI_SPECIFICATION_VERSION =3D 0x00010046 # P= I-1.7.0 BASE_NAME =3D CpuHotplugSmm FILE_GUID =3D 84EEA114-C6BE-4445-8F90-51D97863E363 MODULE_TYPE =3D DXE_SMM_DRIVER ENTRY_POINT =3D CpuHotplugEntry =20 # # The following information is for reference only and not required by the = build # tools. # # VALID_ARCHITECTURES =3D IA32 X64 # =20 [Sources] ApicId.h CpuHotplug.c + PostSmmPen.nasm QemuCpuhp.c QemuCpuhp.h + Smbase.c + Smbase.h =20 [Packages] MdePkg/MdePkg.dec OvmfPkg/OvmfPkg.dec UefiCpuPkg/UefiCpuPkg.dec =20 [LibraryClasses] BaseLib + BaseMemoryLib DebugLib MmServicesTableLib PcdLib SafeIntLib UefiDriverEntryPoint =20 [Protocols] gEfiMmCpuIoProtocolGuid ## CON= SUMES gEfiSmmCpuServiceProtocolGuid ## CON= SUMES =20 [Pcd] gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress ## CON= SUMES gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase ## CON= SUMES =20 [FeaturePcd] gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire ## CON= SUMES =20 [Depex] gEfiMmCpuIoProtocolGuid AND gEfiSmmCpuServiceProtocolGuid diff --git a/OvmfPkg/CpuHotplugSmm/Smbase.h b/OvmfPkg/CpuHotplugSmm/Smbase.h new file mode 100644 index 000000000000..cb5aed98cdd3 --- /dev/null +++ b/OvmfPkg/CpuHotplugSmm/Smbase.h @@ -0,0 +1,32 @@ +/** @file + SMBASE relocation for hot-plugged CPUs. + + Copyright (c) 2020, Red Hat, Inc. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef SMBASE_H_ +#define SMBASE_H_ + +#include // EFI_STATUS +#include // EFI_BOOT_SERVICES + +EFI_STATUS +SmbaseAllocatePostSmmPen ( + OUT UINT32 *PenAddress, + IN CONST EFI_BOOT_SERVICES *BootServices + ); + +VOID +SmbaseReinstallPostSmmPen ( + IN UINT32 PenAddress + ); + +VOID +SmbaseReleasePostSmmPen ( + IN UINT32 PenAddress, + IN CONST EFI_BOOT_SERVICES *BootServices + ); + +#endif // SMBASE_H_ diff --git a/OvmfPkg/CpuHotplugSmm/PostSmmPen.nasm b/OvmfPkg/CpuHotplugSmm/= PostSmmPen.nasm new file mode 100644 index 000000000000..3a328be29b1f --- /dev/null +++ b/OvmfPkg/CpuHotplugSmm/PostSmmPen.nasm @@ -0,0 +1,137 @@ +;-------------------------------------------------------------------------= ----- +; @file +; Pen any hot-added CPU in a 16-bit, real mode HLT loop, after it leaves S= MM by +; executing the RSM instruction. +; +; Copyright (c) 2020, Red Hat, Inc. +; +; SPDX-License-Identifier: BSD-2-Clause-Patent +; +; The routine implemented here is stored into normal RAM, under 1MB, at the +; beginning of a page that is allocated as EfiReservedMemoryType. On any +; hot-added CPU, it is executed after *at least* the first RSM (i.e., after +; SMBASE relocation). +; +; The first execution of this code occurs as follows: +; +; - The hot-added CPU is in RESET state. +; +; - The ACPI CPU hotplug event handler triggers a broadcast SMI, from the = OS. +; +; - Existent CPUs (BSP and APs) enter SMM. +; +; - The hot-added CPU remains in RESET state, but an SMI is pending for it= now. +; (See "SYSTEM MANAGEMENT INTERRUPT (SMI)" in the Intel SDM.) +; +; - In SMM, pre-existent CPUs that are not elected SMM Monarch, keep thems= elves +; busy with their wait loops. +; +; - From the root MMI handler, the SMM Monarch: +; +; - places this routine in the reserved page, +; +; - clears the last byte of the reserved page, +; +; - sends an INIT-SIPI-SIPI sequence to the hot-added CPU, +; +; - un-gates the default SMI handler by APIC ID. +; +; - The startup vector in the SIPI that is sent by the SMM Monarch points = to +; this code; i.e., to the reserved page. (Example: 0x9_F000.) +; +; - The SMM Monarch starts polling the last byte in the reserved page. +; +; - The hot-added CPU boots, and immediately enters SMM due to the pending= SMI. +; It starts executing the default SMI handler. +; +; - Importantly, the SMRAM Save State Map captures the following informati= on, +; when the hot-added CPU enters SMM: +; +; - CS selector: assumes the 16 most significant bits of the 20-bit (i.e= ., +; below 1MB) startup vector from the SIPI. (Example: 0x9F00.) +; +; - CS attributes: Accessed, Readable, User (S=3D1), CodeSegment (bit#11= ), +; Present. +; +; - CS limit: 0xFFFF. +; +; - CS base: the CS selector value shifted left by 4 bits. That is, the = CS +; base equals the SIPI startup vector. (Example: 0x9_F000.) +; +; - IP: the least significant 4 bits from the SIPI startup vector. Becau= se +; the routine is page-aligned, these bits are zero (hence IP is zero). +; +; - ES, SS, DS, FS, GS selectors: 0. +; +; - ES, SS, DS, FS, GS attributes: same as the CS attributes, minus +; CodeSegment (bit#11). +; +; - ES, SS, DS, FS, GS limits: 0xFFFF. +; +; - ES, SS, DS, FS, GS bases: 0. +; +; - The hot-added CPU performs SMBASE relocation, then executes the RSM +; instruction, leaving SMM. +; +; - The hot-added CPU jumps ("returns") to the code below (in the reserved +; page), according to the register state listed in the SMRAM Save State = Map. +; +; - The hot-added CPU sets the last byte of the reserved page, then halts +; itself. +; +; - The SMM Monarch notices that the hot-added CPU is done with SMBASE +; relocation. +; +; Note that, if the OS is malicious and sends INIT-SIPI-SIPI to the hot-ad= ded +; CPU before allowing the ACPI CPU hotplug event handler to trigger a broa= dcast +; SMI, then said broadcast SMI will yank the hot-added CPU directly into S= MM, +; without becoming pending for it (as the hot-added CPU is no longer in RE= SET +; state). This is OK, because: +; +; - The default SMI handler copes with this, as it is gated by APIC ID. The +; hot-added CPU won't start the actual SMBASE relocation until the SMM +; Monarch lets it. +; +; - The INIT-SIPI-SIPI sequence that the SMM Monarch sends to the hot-adde= d CPU +; will be ignored in this sate (it won't even be latched). See "SMI HAND= LER +; EXECUTION ENVIRONMENT" in the Intel SDM: "INIT operations are inhibited +; when the processor enters SMM". +; +; - When the hot-added CPU executes the RSM (having relocated SMBASE), it +; returns to the OS. +; +; In other words, we do not / need not prevent a malicious OS from booting= the +; hot-added CPU early; instead we provide benign OSes with a pen for hot-a= dded +; CPUs. +;-------------------------------------------------------------------------= ----- + +SECTION .data +BITS 16 + +GLOBAL ASM_PFX (mPostSmmPen) ; UINT8[] +GLOBAL ASM_PFX (mPostSmmPenSize) ; UINT16 + +ASM_PFX (mPostSmmPen): + ; + ; Point DS at the same reserved page. + ; + mov ax, cs + mov ds, ax + + ; + ; Inform the SMM Monarch that we're done with SMBASE relocation, by sett= ing + ; the last byte in the reserved page. + ; + mov byte [ds : word 0xFFF], 1 + + ; + ; Halt now, until we get woken by another SMI, or (more likely) the OS + ; reboots us with another INIT-SIPI-SIPI. + ; +HltLoop: + cli + hlt + jmp HltLoop + +ASM_PFX (mPostSmmPenSize): + dw $ - ASM_PFX (mPostSmmPen) diff --git a/OvmfPkg/CpuHotplugSmm/Smbase.c b/OvmfPkg/CpuHotplugSmm/Smbase.c new file mode 100644 index 000000000000..ea21153d9145 --- /dev/null +++ b/OvmfPkg/CpuHotplugSmm/Smbase.c @@ -0,0 +1,110 @@ +/** @file + SMBASE relocation for hot-plugged CPUs. + + Copyright (c) 2020, Red Hat, Inc. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include // BASE_1MB +#include // CopyMem() +#include // DEBUG() + +#include "Smbase.h" + +extern CONST UINT8 mPostSmmPen[]; +extern CONST UINT16 mPostSmmPenSize; + +/** + Allocate a non-SMRAM reserved memory page for the Post-SMM Pen for hot-a= dded + CPUs. + + This function may only be called from the entry point function of the dr= iver. + + @param[out] PenAddress The address of the allocated (normal RAM) reser= ved + page. + + @param[in] BootServices Pointer to the UEFI boot services table. Used f= or + allocating the normal RAM (not SMRAM) reserved = page. + + @retval EFI_SUCCESS Allocation successful. + + @retval EFI_BAD_BUFFER_SIZE The Post-SMM Pen template is not smaller th= an + EFI_PAGE_SIZE. + + @return Error codes propagated from underlying serv= ices. + DEBUG_ERROR messages have been logged. No + resources have been allocated. +**/ +EFI_STATUS +SmbaseAllocatePostSmmPen ( + OUT UINT32 *PenAddress, + IN CONST EFI_BOOT_SERVICES *BootServices + ) +{ + EFI_STATUS Status; + EFI_PHYSICAL_ADDRESS Address; + + // + // The pen code must fit in one page, and the last byte must remain free= for + // signaling the SMM Monarch. + // + if (mPostSmmPenSize >=3D EFI_PAGE_SIZE) { + Status =3D EFI_BAD_BUFFER_SIZE; + DEBUG ((DEBUG_ERROR, "%a: mPostSmmPenSize=3D%u: %r\n", __FUNCTION__, + mPostSmmPenSize, Status)); + return Status; + } + + Address =3D BASE_1MB - 1; + Status =3D BootServices->AllocatePages (AllocateMaxAddress, + EfiReservedMemoryType, 1, &Address); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: AllocatePages(): %r\n", __FUNCTION__, Status= )); + return Status; + } + + DEBUG ((DEBUG_INFO, "%a: Post-SMM Pen at 0x%Lx\n", __FUNCTION__, Address= )); + *PenAddress =3D (UINT32)Address; + return EFI_SUCCESS; +} + +/** + Copy the Post-SMM Pen template code into the reserved page allocated with + SmbaseAllocatePostSmmPen(). + + Note that this effects an "SMRAM to normal RAM" copy. + + The SMM Monarch is supposed to call this function from the root MMI hand= ler. + + @param[in] PenAddress The allocation address returned by + SmbaseAllocatePostSmmPen(). +**/ +VOID +SmbaseReinstallPostSmmPen ( + IN UINT32 PenAddress + ) +{ + CopyMem ((VOID *)(UINTN)PenAddress, mPostSmmPen, mPostSmmPenSize); +} + +/** + Release the reserved page allocated with SmbaseAllocatePostSmmPen(). + + This function may only be called from the entry point function of the dr= iver, + on the error path. + + @param[in] PenAddress The allocation address returned by + SmbaseAllocatePostSmmPen(). + + @param[in] BootServices Pointer to the UEFI boot services table. Used f= or + releasing the normal RAM (not SMRAM) reserved p= age. +**/ +VOID +SmbaseReleasePostSmmPen ( + IN UINT32 PenAddress, + IN CONST EFI_BOOT_SERVICES *BootServices + ) +{ + BootServices->FreePages (PenAddress, 1); +} --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54742): https://edk2.groups.io/g/devel/message/54742 Mute This Topic: https://groups.io/mt/71494227/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54744+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54744+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478779; cv=none; d=zohomail.com; s=zohoarc; b=m6G86fEq/j4npVDS+s2mI9LY1Elzr60bukt8LvNfHTHCmsClp66QUBKs1CaI5fdtspPCV9FY4CjecP6OXxyxScsQ5NacLbLPFipyrSpoQhGrfzNFcH5PKueocgWsMLxUT1MDb+1TOoN2e/1NONhxAXGqEwgtJtUQ88ILsd5Nruo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478779; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=hHefIN9sYVU2CwC6yvj6/jZZmaygogxHFvlUEdUR88g=; b=L6+yX+26KE5w4CQ62a/YLADfzpA3TCmSDVYgqr5Bj6UYy2S2ZfQrWOm+/ImUuZ3ggxoRFBNngwdm4FfjT2QoEV40R7o9Hx13p4pME8iX7Goqn03qTT5I0JebiGegmJNV+MHGQgxVntW9QVJ/8oaZUqzpStmVlUzYkaqPoHBkRk0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54744+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478779991636.0604652485064; Sun, 23 Feb 2020 09:26:19 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id yfPEYY1788612x1RyLFIu8Mk; Sun, 23 Feb 2020 09:26:19 -0800 X-Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [207.211.31.120]) by mx.groups.io with SMTP id smtpd.web10.9278.1582478776953977844 for ; Sun, 23 Feb 2020 09:26:17 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-75-zVq4RMYDP4qWeCF2wDx_hQ-1; Sun, 23 Feb 2020 12:26:12 -0500 X-MC-Unique: zVq4RMYDP4qWeCF2wDx_hQ-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id C82E78017CC; Sun, 23 Feb 2020 17:26:10 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id 1940B5C105; Sun, 23 Feb 2020 17:26:08 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 12/16] OvmfPkg/CpuHotplugSmm: introduce First SMI Handler for hot-added CPUs Date: Sun, 23 Feb 2020 18:25:33 +0100 Message-Id: <20200223172537.28464-13-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: ILDpkVkpi25xC5ArOfefZ5Y0x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478779; bh=hHefIN9sYVU2CwC6yvj6/jZZmaygogxHFvlUEdUR88g=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=hGRaQitwTvFtYNITHfcdDYvkEc/ArIXYrlaSberht9gNHSostY024YNUIkbI+FRPqCI 1IO9OHtSkKIqveHYGZi6OIYrbQGUa2uPaZIgiTO8wnRACco/tQ6fV46ia6R7owEPR9R2u sSZqCUIQLaAc6RuIHceziHPECcNvjBR5PrQ= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Implement the First SMI Handler for hot-added CPUs, in NASM. Add the interfacing C-language function that the SMM Monarch calls. This function launches and coordinates SMBASE relocation for a hot-added CPU. Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf | 4 + OvmfPkg/CpuHotplugSmm/FirstSmiHandlerContext.h | 41 ++++++ OvmfPkg/CpuHotplugSmm/Smbase.h | 14 ++ OvmfPkg/CpuHotplugSmm/FirstSmiHandler.nasm | 149 ++++++++++++++++++++ OvmfPkg/CpuHotplugSmm/Smbase.c | 142 +++++++++++++++++++ 5 files changed, 350 insertions(+) diff --git a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf b/OvmfPkg/CpuHotplugSm= m/CpuHotplugSmm.inf index bf4162299c7c..04322b0d7855 100644 --- a/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf +++ b/OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf @@ -5,56 +5,60 @@ # # SPDX-License-Identifier: BSD-2-Clause-Patent ## =20 [Defines] INF_VERSION =3D 1.29 PI_SPECIFICATION_VERSION =3D 0x00010046 # P= I-1.7.0 BASE_NAME =3D CpuHotplugSmm FILE_GUID =3D 84EEA114-C6BE-4445-8F90-51D97863E363 MODULE_TYPE =3D DXE_SMM_DRIVER ENTRY_POINT =3D CpuHotplugEntry =20 # # The following information is for reference only and not required by the = build # tools. # # VALID_ARCHITECTURES =3D IA32 X64 # =20 [Sources] ApicId.h CpuHotplug.c + FirstSmiHandler.nasm + FirstSmiHandlerContext.h PostSmmPen.nasm QemuCpuhp.c QemuCpuhp.h Smbase.c Smbase.h =20 [Packages] MdePkg/MdePkg.dec OvmfPkg/OvmfPkg.dec UefiCpuPkg/UefiCpuPkg.dec =20 [LibraryClasses] BaseLib BaseMemoryLib DebugLib + LocalApicLib MmServicesTableLib PcdLib SafeIntLib + SynchronizationLib UefiDriverEntryPoint =20 [Protocols] gEfiMmCpuIoProtocolGuid ## CON= SUMES gEfiSmmCpuServiceProtocolGuid ## CON= SUMES =20 [Pcd] gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress ## CON= SUMES gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase ## CON= SUMES =20 [FeaturePcd] gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire ## CON= SUMES =20 [Depex] gEfiMmCpuIoProtocolGuid AND gEfiSmmCpuServiceProtocolGuid diff --git a/OvmfPkg/CpuHotplugSmm/FirstSmiHandlerContext.h b/OvmfPkg/CpuHo= tplugSmm/FirstSmiHandlerContext.h new file mode 100644 index 000000000000..7806a5b2ad03 --- /dev/null +++ b/OvmfPkg/CpuHotplugSmm/FirstSmiHandlerContext.h @@ -0,0 +1,41 @@ +/** @file + Define the FIRST_SMI_HANDLER_CONTEXT structure, which is an exchange area + between the SMM Monarch and the hot-added CPU, for relocating the SMBASE= of + the hot-added CPU. + + Copyright (c) 2020, Red Hat, Inc. + + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef FIRST_SMI_HANDLER_CONTEXT_H_ +#define FIRST_SMI_HANDLER_CONTEXT_H_ + +// +// The following structure is used to communicate between the SMM Monarch +// (running the root MMI handler) and the hot-added CPU (handling its first +// SMI). It is placed at SMM_DEFAULT_SMBASE, which is in SMRAM under QEMU's +// "SMRAM at default SMBASE" feature. +// +#pragma pack (1) +typedef struct { + // + // When ApicIdGate is MAX_UINT64, then no hot-added CPU may proceed with + // SMBASE relocation. + // + // Otherwise, the hot-added CPU whose APIC ID equals ApicIdGate may proc= eed + // with SMBASE relocation. + // + // This field is intentionally wider than APIC_ID (UINT32) because we ne= ed a + // "gate locked" value that is different from all possible APIC_IDs. + // + UINT64 ApicIdGate; + // + // The new SMBASE value for the hot-added CPU to set in the SMRAM Save S= tate + // Map, before leaving SMM with the RSM instruction. + // + UINT32 NewSmbase; +} FIRST_SMI_HANDLER_CONTEXT; +#pragma pack () + +#endif // FIRST_SMI_HANDLER_CONTEXT_H_ diff --git a/OvmfPkg/CpuHotplugSmm/Smbase.h b/OvmfPkg/CpuHotplugSmm/Smbase.h index cb5aed98cdd3..e73730d19926 100644 --- a/OvmfPkg/CpuHotplugSmm/Smbase.h +++ b/OvmfPkg/CpuHotplugSmm/Smbase.h @@ -1,32 +1,46 @@ /** @file SMBASE relocation for hot-plugged CPUs. =20 Copyright (c) 2020, Red Hat, Inc. =20 SPDX-License-Identifier: BSD-2-Clause-Patent **/ =20 #ifndef SMBASE_H_ #define SMBASE_H_ =20 #include // EFI_STATUS #include // EFI_BOOT_SERVICES =20 +#include "ApicId.h" // APIC_ID + EFI_STATUS SmbaseAllocatePostSmmPen ( OUT UINT32 *PenAddress, IN CONST EFI_BOOT_SERVICES *BootServices ); =20 VOID SmbaseReinstallPostSmmPen ( IN UINT32 PenAddress ); =20 VOID SmbaseReleasePostSmmPen ( IN UINT32 PenAddress, IN CONST EFI_BOOT_SERVICES *BootServices ); =20 +VOID +SmbaseInstallFirstSmiHandler ( + VOID + ); + +EFI_STATUS +SmbaseRelocate ( + IN APIC_ID ApicId, + IN UINTN Smbase, + IN UINT32 PenAddress + ); + #endif // SMBASE_H_ diff --git a/OvmfPkg/CpuHotplugSmm/FirstSmiHandler.nasm b/OvmfPkg/CpuHotplu= gSmm/FirstSmiHandler.nasm new file mode 100644 index 000000000000..d5ce3472bd14 --- /dev/null +++ b/OvmfPkg/CpuHotplugSmm/FirstSmiHandler.nasm @@ -0,0 +1,149 @@ +;-------------------------------------------------------------------------= ----- +; @file +; Relocate the SMBASE on a hot-added CPU when it services its first SMI. +; +; Copyright (c) 2020, Red Hat, Inc. +; +; SPDX-License-Identifier: BSD-2-Clause-Patent +; +; The routine runs on the hot-added CPU in the following "big real mode", +; 16-bit environment; per "SMI HANDLER EXECUTION ENVIRONMENT" in the Intel= SDM +; (table "Processor Register Initialization in SMM"): +; +; - CS selector: 0x3000 (most significant 16 bits of SMM_DEFAULT_SMBASE). +; +; - CS limit: 0xFFFF_FFFF. +; +; - CS base: SMM_DEFAULT_SMBASE (0x3_0000). +; +; - IP: SMM_HANDLER_OFFSET (0x8000). +; +; - ES, SS, DS, FS, GS selectors: 0. +; +; - ES, SS, DS, FS, GS limits: 0xFFFF_FFFF. +; +; - ES, SS, DS, FS, GS bases: 0. +; +; - Operand-size and address-size override prefixes can be used to access= the +; address space beyond 1MB. +;-------------------------------------------------------------------------= ----- + +SECTION .data +BITS 16 + +; +; Bring in SMM_DEFAULT_SMBASE from +; "MdePkg/Include/Register/Intel/SmramSaveStateMap.h". +; +SMM_DEFAULT_SMBASE: equ 0x3_0000 + +; +; Field offsets in FIRST_SMI_HANDLER_CONTEXT, which resides at +; SMM_DEFAULT_SMBASE. +; +ApicIdGate: equ 0 ; UINT64 +NewSmbase: equ 8 ; UINT32 + +; +; SMRAM Save State Map field offsets, per the AMD (not Intel) layout that = QEMU +; implements. Relative to SMM_DEFAULT_SMBASE. +; +SaveStateRevId: equ 0xFEFC ; UINT32 +SaveStateSmbase: equ 0xFEF8 ; UINT32 +SaveStateSmbase64: equ 0xFF00 ; UINT32 + +; +; CPUID constants, from "MdePkg/Include/Register/Intel/Cpuid.h". +; +CPUID_SIGNATURE: equ 0x00 +CPUID_EXTENDED_TOPOLOGY: equ 0x0B +CPUID_VERSION_INFO: equ 0x01 + +GLOBAL ASM_PFX (mFirstSmiHandler) ; UINT8[] +GLOBAL ASM_PFX (mFirstSmiHandlerSize) ; UINT16 + +ASM_PFX (mFirstSmiHandler): + ; + ; Get our own APIC ID first, so we can contend for ApicIdGate. + ; + ; This basically reimplements GetInitialApicId() from + ; "UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c". + ; + mov eax, CPUID_SIGNATURE + cpuid + cmp eax, CPUID_EXTENDED_TOPOLOGY + jb GetApicIdFromVersionInfo + + mov eax, CPUID_EXTENDED_TOPOLOGY + mov ecx, 0 + cpuid + test ebx, 0xFFFF + jz GetApicIdFromVersionInfo + + ; + ; EDX has the APIC ID, save it to ESI. + ; + mov esi, edx + jmp KnockOnGate + +GetApicIdFromVersionInfo: + mov eax, CPUID_VERSION_INFO + cpuid + shr ebx, 24 + ; + ; EBX has the APIC ID, save it to ESI. + ; + mov esi, ebx + +KnockOnGate: + ; + ; See if ApicIdGate shows our own APIC ID. If so, swap it to MAX_UINT64 + ; (close the gate), and advance. Otherwise, keep knocking. + ; + ; InterlockedCompareExchange64(): + ; - Value :=3D &FIRST_SMI_HANDLER_CONTEXT.ApicIdGate + ; - CompareValue (EDX:EAX) :=3D APIC ID (from ESI) + ; - ExchangeValue (ECX:EBX) :=3D MAX_UINT64 + ; + mov edx, 0 + mov eax, esi + mov ecx, 0xFFFF_FFFF + mov ebx, 0xFFFF_FFFF + lock cmpxchg8b [ds : dword (SMM_DEFAULT_SMBASE + ApicIdGate)] + jz ApicIdMatch + pause + jmp KnockOnGate + +ApicIdMatch: + ; + ; Update the SMBASE field in the SMRAM Save State Map. + ; + ; First, calculate the address of the SMBASE field, based on the SMM Rev= ision + ; ID; store the result in EBX. + ; + mov eax, dword [ds : dword (SMM_DEFAULT_SMBASE + SaveStateRevId)] + test eax, 0xFFFF + jz LegacySaveStateMap + + mov ebx, SMM_DEFAULT_SMBASE + SaveStateSmbase64 + jmp UpdateSmbase + +LegacySaveStateMap: + mov ebx, SMM_DEFAULT_SMBASE + SaveStateSmbase + +UpdateSmbase: + ; + ; Load the new SMBASE value into EAX. + ; + mov eax, dword [ds : dword (SMM_DEFAULT_SMBASE + NewSmbase)] + ; + ; Save it to the SMBASE field whose address we calculated in EBX. + ; + mov dword [ds : dword ebx], eax + ; + ; We're done; leave SMM and continue to the pen. + ; + rsm + +ASM_PFX (mFirstSmiHandlerSize): + dw $ - ASM_PFX (mFirstSmiHandler) diff --git a/OvmfPkg/CpuHotplugSmm/Smbase.c b/OvmfPkg/CpuHotplugSmm/Smbase.c index ea21153d9145..57c9e86f3e93 100644 --- a/OvmfPkg/CpuHotplugSmm/Smbase.c +++ b/OvmfPkg/CpuHotplugSmm/Smbase.c @@ -1,38 +1,46 @@ /** @file SMBASE relocation for hot-plugged CPUs. =20 Copyright (c) 2020, Red Hat, Inc. =20 SPDX-License-Identifier: BSD-2-Clause-Patent **/ =20 #include // BASE_1MB +#include // CpuPause() #include // CopyMem() #include // DEBUG() +#include // SendInitSipiSipi() +#include // InterlockedCompareExchang= e64() +#include // SMM_DEFAULT_SMBASE + +#include "FirstSmiHandlerContext.h" // FIRST_SMI_HANDLER_CONTEXT =20 #include "Smbase.h" =20 extern CONST UINT8 mPostSmmPen[]; extern CONST UINT16 mPostSmmPenSize; +extern CONST UINT8 mFirstSmiHandler[]; +extern CONST UINT16 mFirstSmiHandlerSize; =20 /** Allocate a non-SMRAM reserved memory page for the Post-SMM Pen for hot-a= dded CPUs. =20 This function may only be called from the entry point function of the dr= iver. =20 @param[out] PenAddress The address of the allocated (normal RAM) reser= ved page. =20 @param[in] BootServices Pointer to the UEFI boot services table. Used f= or allocating the normal RAM (not SMRAM) reserved = page. =20 @retval EFI_SUCCESS Allocation successful. =20 @retval EFI_BAD_BUFFER_SIZE The Post-SMM Pen template is not smaller th= an EFI_PAGE_SIZE. =20 @return Error codes propagated from underlying serv= ices. DEBUG_ERROR messages have been logged. No resources have been allocated. **/ @@ -89,22 +97,156 @@ SmbaseReinstallPostSmmPen ( } =20 /** Release the reserved page allocated with SmbaseAllocatePostSmmPen(). =20 This function may only be called from the entry point function of the dr= iver, on the error path. =20 @param[in] PenAddress The allocation address returned by SmbaseAllocatePostSmmPen(). =20 @param[in] BootServices Pointer to the UEFI boot services table. Used f= or releasing the normal RAM (not SMRAM) reserved p= age. **/ VOID SmbaseReleasePostSmmPen ( IN UINT32 PenAddress, IN CONST EFI_BOOT_SERVICES *BootServices ) { BootServices->FreePages (PenAddress, 1); } + +/** + Place the handler routine for the first SMIs of hot-added CPUs at + (SMM_DEFAULT_SMBASE + SMM_HANDLER_OFFSET). + + Note that this effects an "SMRAM to SMRAM" copy. + + Additionally, shut the APIC ID gate in FIRST_SMI_HANDLER_CONTEXT. + + This function may only be called from the entry point function of the dr= iver, + and only after PcdQ35SmramAtDefaultSmbase has been determined to be TRUE. +**/ +VOID +SmbaseInstallFirstSmiHandler ( + VOID + ) +{ + FIRST_SMI_HANDLER_CONTEXT *Context; + + CopyMem ((VOID *)(UINTN)(SMM_DEFAULT_SMBASE + SMM_HANDLER_OFFSET), + mFirstSmiHandler, mFirstSmiHandlerSize); + + Context =3D (VOID *)(UINTN)SMM_DEFAULT_SMBASE; + Context->ApicIdGate =3D MAX_UINT64; +} + +/** + Relocate the SMBASE on a hot-added CPU. Then pen the hot-added CPU in the + normal RAM reserved memory page, set up earlier with + SmbaseAllocatePostSmmPen() and SmbaseReinstallPostSmmPen(). + + The SMM Monarch is supposed to call this function from the root MMI hand= ler. + + The SMM Monarch is responsible for calling SmbaseInstallFirstSmiHandler(= ), + SmbaseAllocatePostSmmPen(), and SmbaseReinstallPostSmmPen() before calli= ng + this function. + + If the OS maliciously boots the hot-added CPU ahead of letting the ACPI = CPU + hotplug event handler broadcast the CPU hotplug MMI, then the hot-added = CPU + returns to the OS rather than to the pen, upon RSM. In that case, this + function will hang forever (unless the OS happens to signal back through= the + last byte of the pen page). + + @param[in] ApicId The APIC ID of the hot-added CPU whose SMBASE sho= uld + be relocated. + + @param[in] Smbase The new SMBASE address. The root MMI handler is + responsible for passing in a free ("unoccupied") + SMBASE address that was pre-configured by + PiSmmCpuDxeSmm in CPU_HOT_PLUG_DATA. + + @param[in] PenAddress The address of the Post-SMM Pen for hot-added CPU= s, as + returned by SmbaseAllocatePostSmmPen(), and insta= lled + by SmbaseReinstallPostSmmPen(). + + @retval EFI_SUCCESS The SMBASE of the hot-added CPU with APIC= ID + ApicId has been relocated to Smbase. The + hot-added CPU has reported back about lea= ving + SMM. + + @retval EFI_PROTOCOL_ERROR Synchronization bug encountered around + FIRST_SMI_HANDLER_CONTEXT.ApicIdGate. + + @retval EFI_INVALID_PARAMETER Smbase does not fit in 32 bits. No reloca= tion + has been attempted. +**/ +EFI_STATUS +SmbaseRelocate ( + IN APIC_ID ApicId, + IN UINTN Smbase, + IN UINT32 PenAddress + ) +{ + EFI_STATUS Status; + volatile UINT8 *SmmVacated; + volatile FIRST_SMI_HANDLER_CONTEXT *Context; + UINT64 ExchangeResult; + + if (Smbase > MAX_UINT32) { + Status =3D EFI_INVALID_PARAMETER; + DEBUG ((DEBUG_ERROR, "%a: ApicId=3D" FMT_APIC_ID " Smbase=3D0x%Lx: %r\= n", + __FUNCTION__, ApicId, (UINT64)Smbase, Status)); + return Status; + } + + SmmVacated =3D (UINT8 *)(UINTN)PenAddress + (EFI_PAGE_SIZE - 1); + Context =3D (VOID *)(UINTN)SMM_DEFAULT_SMBASE; + + // + // Clear the last byte of the reserved page, so we notice when the hot-a= dded + // CPU checks back in from the pen. + // + *SmmVacated =3D 0; + + // + // Boot the hot-added CPU. + // + // If the OS is benign, and so the hot-added CPU is still in RESET state, + // then the broadcast SMI is still pending for it; it will now launch + // directly into SMM. + // + // If the OS is malicious, the hot-added CPU has been booted already, an= d so + // it is already spinning on the APIC ID gate. In that case, the + // INIT-SIPI-SIPI below will be ignored. + // + SendInitSipiSipi (ApicId, PenAddress); + + // + // Expose the desired new SMBASE value to the hot-added CPU. + // + Context->NewSmbase =3D (UINT32)Smbase; + + // + // Un-gate SMBASE relocation for the hot-added CPU whose APIC ID is Apic= Id. + // + ExchangeResult =3D InterlockedCompareExchange64 (&Context->ApicIdGate, + MAX_UINT64, ApicId); + if (ExchangeResult !=3D MAX_UINT64) { + Status =3D EFI_PROTOCOL_ERROR; + DEBUG ((DEBUG_ERROR, "%a: ApicId=3D" FMT_APIC_ID " ApicIdGate=3D0x%Lx:= %r\n", + __FUNCTION__, ApicId, ExchangeResult, Status)); + return Status; + } + + // + // Now wait until the hot-added CPU reports back. + // + while (*SmmVacated =3D=3D 0) { + CpuPause (); + } + + Status =3D EFI_SUCCESS; + return Status; +} --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54744): https://edk2.groups.io/g/devel/message/54744 Mute This Topic: https://groups.io/mt/71494230/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54747+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54747+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478782; cv=none; d=zohomail.com; s=zohoarc; b=KF4gMFBKxsiwDJfEEwpert/cvJ50rdYjbp84gWUl4UEGnDAMPnSu3R3YpbGcpN2t1NVvzxhF+8dJRtUBcyUS0d3bBKfu+6cIBPcQVPxmG6pBIBe0khqIvjA22cx/5N0DYzF489rcUEPRkYTPJGgbagvLKHYyB4WEEXckGPf+yVA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478782; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=kwcLX1MyMAqTr0vNUCZkk+298kX2eW+o47i+t5TovRs=; b=cPiwUmR5IVDaXRcHaoI2I4DuwPUBDssKF+oOVKIMdUeX30rdnPL8r7AuIYF2WKVRbZyitGuqGd+nEGfWTuXUYjahlWG+Gcj/yLCYH5cXxg0Lugslxay4sNGvLxi0LzsZJBVv15bJcdOyXiSPW9JQXYHDZfsIFSvDL120z3+ERLc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54747+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478782208458.7298299502737; Sun, 23 Feb 2020 09:26:22 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 5svDYY1788612xEyDWBo2KZH; Sun, 23 Feb 2020 09:26:21 -0800 X-Received: from us-smtp-delivery-1.mimecast.com (us-smtp-delivery-1.mimecast.com [205.139.110.61]) by mx.groups.io with SMTP id smtpd.web10.9281.1582478781025737440 for ; Sun, 23 Feb 2020 09:26:21 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-370-9P0FUP8wMWuxSVK7Z8QObg-1; Sun, 23 Feb 2020 12:26:14 -0500 X-MC-Unique: 9P0FUP8wMWuxSVK7Z8QObg-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id D9E58800D50; Sun, 23 Feb 2020 17:26:12 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id 2BCF79182B; Sun, 23 Feb 2020 17:26:10 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 13/16] OvmfPkg/CpuHotplugSmm: complete root MMI handler for CPU hotplug Date: Sun, 23 Feb 2020 18:25:34 +0100 Message-Id: <20200223172537.28464-14-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: nyZxLuvcFO1kBxbKALvarFDOx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478781; bh=kwcLX1MyMAqTr0vNUCZkk+298kX2eW+o47i+t5TovRs=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=siJUGmxuvWkaH7X91XgD9EEzTlClVHDIhQxI3sQFRVNmOixmCLyE8tnxDisATApoFPs 407db1Zknc/cpopUhluiky8uAk5wq2seIPALJRTL9l1lSgwfU8O5haFEHLixT0R4DaCtY z1SBufFsCS4MFeEaukQqhYU0ScoDnRT+BzY= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" With the help of the Post-SMM Pen and the SMBASE relocation functions added in the previous patches, we can now complete the root MMI handler for CPU hotplug. In the driver's entry point function: - allocate the pen (in a reserved page in normal RAM), - install the default ("first") SMI handler for hot-added CPUs (which includes priming the exchange area between the MM Monarch and the hot-added CPUs, i.e., shutting the APIC ID gate). In the root MMI handler, for each hot-added CPU: - record the APIC ID of the new CPU in CPU_HOT_PLUG_DATA, - relocate the SMBASE of the new CPU, - inform PiSmmCpuDxeSmm by calling EFI_SMM_CPU_SERVICE_PROTOCOL.AddProcessor(). Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- Notes: (1) At this stage, CPU hotplug with SMM works. =20 Test CPU topology (libvirt domain XML snippet): =20 > > > > > > =20 The firmware logs the following during normal boot: =20 > SmbaseAllocatePostSmmPen: Post-SMM Pen at 0x9F000 =20 CPU hotplug command on the host side: =20 > virsh setvcpu ovmf.fedora.q35 1 --enable --live =20 Firmware log in response: =20 > QemuCpuhpCollectApicIds: CurrentSelector=3D1: insert > QemuCpuhpCollectApicIds: ApicId=3D0x00000001 > QemuCpuhpCollectApicIds: CurrentSelector=3D2 PendingSelector=3D1: > wrap-around > QemuCpuhpCollectApicIds: PluggedCount=3D1 ToUnplugCount=3D0 > CpuHotplugMmi: hot-added APIC ID 0x00000001, SMBASE 0x7D082000, > EFI_SMM_CPU_SERVICE_PROTOCOL assigned number 2 =20 Query the CPU register state on the host side (without onlining the hot-added CPU in the OS just yet): =20 > virsh qemu-monitor-command ovmf.fedora.q35 --hmp 'info registers -a' =20 Output, confirming penned status (pen at 0x9F000): =20 > CPU#1 > EAX=3D00009f00 EBX=3D00000000 ECX=3D00000000 EDX=3D00000600 > ESI=3D00000000 EDI=3D00000000 EBP=3D00000000 ESP=3D00000000 > EIP=3D0000000c EFL=3D00000002 [-------] CPL=3D0 II=3D0 A20=3D1 SMM=3D= 0 HLT=3D1 > ES =3D0000 00000000 0000ffff 00009300 > CS =3D9f00 0009f000 0000ffff 00009b00 > SS =3D0000 00000000 0000ffff 00009300 > DS =3D9f00 0009f000 0000ffff 00009300 > FS =3D0000 00000000 0000ffff 00009300 > GS =3D0000 00000000 0000ffff 00009300 > LDT=3D0000 00000000 0000ffff 00008200 > TR =3D0000 00000000 0000ffff 00008b00 > GDT=3D 00000000 0000ffff > IDT=3D 00000000 0000ffff > CR0=3D60000010 CR2=3D00000000 CR3=3D00000000 CR4=3D00000000 > DR0=3D0000000000000000 DR1=3D0000000000000000 DR2=3D0000000000000000 > DR3=3D0000000000000000 > DR6=3D00000000ffff0ff0 DR7=3D0000000000000400 > EFER=3D0000000000000000 > FCW=3D037f FSW=3D0000 [ST=3D0] FTW=3D00 MXCSR=3D00001f80 > FPR0=3D0000000000000000 0000 FPR1=3D0000000000000000 0000 > FPR2=3D0000000000000000 0000 FPR3=3D0000000000000000 0000 > FPR4=3D0000000000000000 0000 FPR5=3D0000000000000000 0000 > FPR6=3D0000000000000000 0000 FPR7=3D0000000000000000 0000 > XMM00=3D00000000000000000000000000000000 > XMM01=3D00000000000000000000000000000000 > XMM02=3D00000000000000000000000000000000 > XMM03=3D00000000000000000000000000000000 > XMM04=3D00000000000000000000000000000000 > XMM05=3D00000000000000000000000000000000 > XMM06=3D00000000000000000000000000000000 > XMM07=3D00000000000000000000000000000000 =20 Additionally, the dmesg in the Linux guest contains: =20 > CPU2 has been hot-added =20 We can now boot the hot-addad CPU in the Linux guest: =20 > echo 1 > /sys/devices/system/cpu/cpu2/online =20 Dmesg in response: =20 > smpboot: Booting Node 0 Processor 2 APIC 0x1 > kvm-clock: cpu 2, msr 6e01081, secondary cpu clock > KVM setup async PF for cpu 2 > kvm-stealtime: cpu 2, msr 7b52a040 > Will online and init hotplugged CPU: 2 =20 Still in the guest, call UEFI variable services on each CPU (including the hot-added one), per : =20 > taskset -c 0 efibootmgr > taskset -c 1 efibootmgr > taskset -c 2 efibootmgr =20 No delays, no instability. =20 Having booted the hot-added CPU in the Linux guest, the host-side command =20 > virsh qemu-monitor-command ovmf.fedora.q35 --hmp 'info registers -a' =20 now shows: =20 > CPU#1 > RAX=3Dffffffffb39e4b50 RBX=3D0000000000000002 RCX=3D0000000000000000 > RDX=3D0000000000000002 > RSI=3D0000000000000002 RDI=3Dffff932cbb51c520 RBP=3D0000000000000002 > RSP=3Dffffbc5bc0083eb0 > R8 =3D000000cd42e4dffb R9 =3D0000005a22502599 R10=3D0000005a22502599 > R11=3D0000005a22502599 > R12=3Dffff932cbae25dc0 R13=3D0000000000000000 R14=3D0000000000000000 > R15=3Dffff932cbae25dc0 > RIP=3Dffffffffb39e4f2e RFL=3D00000246 [---Z-P-] CPL=3D0 II=3D0 A20=3D= 1 SMM=3D0 > HLT=3D1 > ES =3D0000 0000000000000000 ffffffff 00c00000 > CS =3D0010 0000000000000000 ffffffff 00a09b00 DPL=3D0 CS64 [-RA] > SS =3D0018 0000000000000000 ffffffff 00c09300 DPL=3D0 DS [-WA] > DS =3D0000 0000000000000000 ffffffff 00c00000 > FS =3D0000 0000000000000000 ffffffff 00c00000 > GS =3D0000 ffff932cbb500000 ffffffff 00c00000 > LDT=3D0000 0000000000000000 000fffff 00000000 > TR =3D0040 fffffe0000069000 0000206f 00008b00 DPL=3D0 TSS64-busy > GDT=3D fffffe0000067000 0000007f > IDT=3D fffffe0000000000 00000fff > CR0=3D80050033 CR2=3D00007f54893cbf20 CR3=3D0000000078418001 CR4=3D00= 1606e0 > DR0=3D0000000000000000 DR1=3D0000000000000000 DR2=3D0000000000000000 > DR3=3D0000000000000000 > DR6=3D00000000ffff0ff0 DR7=3D0000000000000400 > EFER=3D0000000000000d01 > FCW=3D037f FSW=3D0000 [ST=3D0] FTW=3D00 MXCSR=3D00001fa0 > FPR0=3D0000000000000000 0000 FPR1=3D0000000000000000 0000 > FPR2=3D0000000000000000 0000 FPR3=3D0000000000000000 0000 > FPR4=3D0000000000000000 0000 FPR5=3D0000000000000000 0000 > FPR6=3D0000000000000000 0000 FPR7=3D0000000000000000 0000 > XMM00=3D000000000000000040ed2be000000000 > XMM01=3D0000000000000000404ddf1a9fbe76c9 > XMM02=3D00000000000000000000000000000000 > XMM03=3D00000000000000000000000000000000 > XMM04=3D00000000000000003ff0000000000000 > XMM05=3D00000000000000000000000000000000 > XMM06=3D00000000000000004078002d0ac487b7 > XMM07=3D0000000000000000404ddf1a9fbe76c9 > XMM08=3D72223d444955412022746f6f72223d44 > XMM09=3D00000000000000000000000000000000 > XMM10=3D00000000000000000000000000000000 > XMM11=3D00000000000000000000000000000000 > XMM12=3D00000000000000000000000000000000 > XMM13=3D00000000000000000000000000000000 > XMM14=3D00000000000000000000000000000000 > XMM15=3D00000000000000000000000000000000 =20 Hotplug another CPU: =20 > virsh setvcpu ovmf.fedora.q35 3 --enable --live =20 Firmware log in response: =20 > QemuCpuhpCollectApicIds: CurrentSelector=3D3: insert > QemuCpuhpCollectApicIds: ApicId=3D0x00000003 > QemuCpuhpCollectApicIds: PluggedCount=3D1 ToUnplugCount=3D0 > CpuHotplugMmi: hot-added APIC ID 0x00000003, SMBASE 0x7D084000, > EFI_SMM_CPU_SERVICE_PROTOCOL assigned number 3 =20 Online the hot-added CPU in the Linux guest: =20 > echo 1 > /sys/devices/system/cpu/cpu3/online =20 Guest dmesg in response: =20 > smpboot: Booting Node 0 Processor 3 APIC 0x3 > kvm-clock: cpu 3, msr 6e010c1, secondary cpu clock > KVM setup async PF for cpu 3 > kvm-stealtime: cpu 3, msr 7b5aa040 > Will online and init hotplugged CPU: 3 =20 (2) Alternative order of actions: =20 Hotplug both CPUs first, on the host: =20 > virsh setvcpu ovmf.fedora.q35 1 --enable --live > virsh setvcpu ovmf.fedora.q35 3 --enable --live =20 *then* online both hot-added CPUs in the Linux guest: =20 > echo 1 > /sys/devices/system/cpu/cpu2/online > echo 1 > /sys/devices/system/cpu/cpu3/online =20 The only difference here is that the broadcast SMI for the second hotplug finds the first hotplugged CPU still in the pen (i.e., not onlined by Linux). There is no difference in observable behavior (beyond the matching log messages and register dumps). =20 (3) What doesn't work yet: =20 - CPU hotplug w/ SMM in SEV guests. =20 See . =20 (NB. I'm uncertain if CPU hotplug works in SEV guests without SMM_REQUIRE to begin with.) =20 - S3 resume w/ SMM after hot-adding a CPU. =20 The remaining patches in the series take care of that. (Only in the absence of SEV; SEV+S3 looks broken regardless of hotplug.) =20 - CPU hot-unplug w/ SMM. =20 Needs separate investigation. EFI_SMM_REMOVE_PROCESSOR in "UefiCpuPkg/Include/Protocol/SmmCpuService.h" is documented as follows: "After this API is called, the removed processor must not respond to SMIs in the coherence domain". This could raise challenging ordering questions between QEMU, the firmware, and the OS. OvmfPkg/CpuHotplugSmm/CpuHotplug.c | 97 +++++++++++++++++++- 1 file changed, 95 insertions(+), 2 deletions(-) diff --git a/OvmfPkg/CpuHotplugSmm/CpuHotplug.c b/OvmfPkg/CpuHotplugSmm/Cpu= Hotplug.c index 42e023cb85c0..20e6bec04f41 100644 --- a/OvmfPkg/CpuHotplugSmm/CpuHotplug.c +++ b/OvmfPkg/CpuHotplugSmm/CpuHotplug.c @@ -1,76 +1,82 @@ /** @file Root SMI handler for VCPU hotplug SMIs. =20 Copyright (c) 2020, Red Hat, Inc. =20 SPDX-License-Identifier: BSD-2-Clause-Patent **/ =20 #include // CPU_HOT_PLUG_DATA #include // ICH9_APM_CNT #include // QEMU_CPUHP_CMD_GET_PENDING #include // CpuDeadLoop() #include // ASSERT() #include // gMmst #include // PcdGetBool() #include // SafeUintnSub() #include // EFI_MM_CPU_IO_PROTOCOL #include // EFI_SMM_CPU_SERVICE_PROTOC= OL #include // EFI_STATUS =20 #include "ApicId.h" // APIC_ID #include "QemuCpuhp.h" // QemuCpuhpWriteCpuSelector() +#include "Smbase.h" // SmbaseAllocatePostSmmPen() =20 // // We use this protocol for accessing IO Ports. // STATIC EFI_MM_CPU_IO_PROTOCOL *mMmCpuIo; // // The following protocol is used to report the addition or removal of a C= PU to // the SMM CPU driver (PiSmmCpuDxeSmm). // STATIC EFI_SMM_CPU_SERVICE_PROTOCOL *mMmCpuService; // // This structure is a communication side-channel between the // EFI_SMM_CPU_SERVICE_PROTOCOL consumer (i.e., this driver) and provider // (i.e., PiSmmCpuDxeSmm). // STATIC CPU_HOT_PLUG_DATA *mCpuHotPlugData; // // SMRAM arrays for fetching the APIC IDs of processors with pending event= s (of // known event types), for the time of just one MMI. // // The lifetimes of these arrays match that of this driver only because we // don't want to allocate SMRAM at OS runtime, and potentially fail (or // fragment the SMRAM map). // // These arrays provide room for ("possible CPU count" minus one) APIC IDs // each, as we don't expect every possible CPU to appear, or disappear, in= a // single MMI. The numbers of used (populated) elements in the arrays are // determined on every MMI separately. // STATIC APIC_ID *mPluggedApicIds; STATIC APIC_ID *mToUnplugApicIds; // +// Address of the non-SMRAM reserved memory page that contains the Post-SM= M Pen +// for hot-added CPUs. +// +STATIC UINT32 mPostSmmPenAddress; +// // Represents the registration of the CPU Hotplug MMI handler. // STATIC EFI_HANDLE mDispatchHandle; =20 =20 /** CPU Hotplug MMI handler function. =20 This is a root MMI handler. =20 @param[in] DispatchHandle The unique handle assigned to this handle= r by EFI_MM_SYSTEM_TABLE.MmiHandlerRegister(). =20 @param[in] Context Context passed in by EFI_MM_SYSTEM_TABLE.MmiManage(). Due to CpuHotplugMmi() being a root MMI handler, Context is ASSERT()ed to be NULL. =20 @param[in,out] CommBuffer Ignored, due to CpuHotplugMmi() being a r= oot MMI handler. =20 @param[in,out] CommBufferSize Ignored, due to CpuHotplugMmi() being a r= oot @@ -97,44 +103,46 @@ STATIC EFI_HANDLE mDispatchHandle; =20 @retval EFI_WARN_INTERRUPT_SOURCE_PENDING The MMI source is still pend= ing, and other handlers should st= ill be called. =20 @retval EFI_INTERRUPT_PENDING The MMI source could not be quiesced. **/ STATIC EFI_STATUS EFIAPI CpuHotplugMmi ( IN EFI_HANDLE DispatchHandle, IN CONST VOID *Context OPTIONAL, IN OUT VOID *CommBuffer OPTIONAL, IN OUT UINTN *CommBufferSize OPTIONAL ) { EFI_STATUS Status; UINT8 ApmControl; UINT32 PluggedCount; UINT32 ToUnplugCount; + UINT32 PluggedIdx; + UINT32 NewSlot; =20 // // Assert that we are entering this function due to our root MMI handler // registration. // ASSERT (DispatchHandle =3D=3D mDispatchHandle); // // When MmiManage() is invoked to process root MMI handlers, the caller = (the // MM Core) is expected to pass in a NULL Context. MmiManage() then pass= es // the same NULL Context to individual handlers. // ASSERT (Context =3D=3D NULL); // // Read the MMI command value from the APM Control Port, to see if this = is an // MMI we should care about. // Status =3D mMmCpuIo->Io.Read (mMmCpuIo, MM_IO_UINT8, ICH9_APM_CNT, 1, &ApmControl); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "%a: failed to read ICH9_APM_CNT: %r\n", __FUNCTI= ON__, Status)); // @@ -152,49 +160,116 @@ CpuHotplugMmi ( =20 // // Collect the CPUs with pending events. // Status =3D QemuCpuhpCollectApicIds ( mMmCpuIo, mCpuHotPlugData->ArrayLength, // PossibleCpuCount mCpuHotPlugData->ArrayLength - 1, // ApicIdCount mPluggedApicIds, &PluggedCount, mToUnplugApicIds, &ToUnplugCount ); if (EFI_ERROR (Status)) { goto Fatal; } if (ToUnplugCount > 0) { DEBUG ((DEBUG_ERROR, "%a: hot-unplug is not supported yet\n", __FUNCTION__)); goto Fatal; } =20 + // + // Process hot-added CPUs. + // + // The Post-SMM Pen need not be reinstalled multiple times within a sing= le + // root MMI handling. Even reinstalling once per root MMI is only pruden= ce; + // in theory installing the pen in the driver's entry point function sho= uld + // suffice. + // + SmbaseReinstallPostSmmPen (mPostSmmPenAddress); + + PluggedIdx =3D 0; + NewSlot =3D 0; + while (PluggedIdx < PluggedCount) { + APIC_ID NewApicId; + UINTN NewProcessorNumberByProtocol; + + NewApicId =3D mPluggedApicIds[PluggedIdx]; + // + // Find the first empty slot in CPU_HOT_PLUG_DATA. + // + while (NewSlot < mCpuHotPlugData->ArrayLength && + mCpuHotPlugData->ApicId[NewSlot] !=3D MAX_UINT64) { + NewSlot++; + } + if (NewSlot =3D=3D mCpuHotPlugData->ArrayLength) { + DEBUG ((DEBUG_ERROR, "%a: no room for APIC ID " FMT_APIC_ID "\n", + __FUNCTION__, NewApicId)); + goto Fatal; + } + + // + // Store the APIC ID of the new processor to the slot. + // + mCpuHotPlugData->ApicId[NewSlot] =3D NewApicId; + + // + // Relocate the SMBASE of the new CPU. + // + Status =3D SmbaseRelocate (NewApicId, mCpuHotPlugData->SmBase[NewSlot], + mPostSmmPenAddress); + if (EFI_ERROR (Status)) { + goto RevokeNewSlot; + } + + // + // Add the new CPU with EFI_SMM_CPU_SERVICE_PROTOCOL. + // + Status =3D mMmCpuService->AddProcessor (mMmCpuService, NewApicId, + &NewProcessorNumberByProtocol); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: AddProcessor(" FMT_APIC_ID "): %r\n", + __FUNCTION__, NewApicId, Status)); + goto RevokeNewSlot; + } + + DEBUG ((DEBUG_INFO, "%a: hot-added APIC ID " FMT_APIC_ID ", SMBASE 0x%= Lx, " + "EFI_SMM_CPU_SERVICE_PROTOCOL assigned number %Lu\n", __FUNCTION__, + NewApicId, (UINT64)mCpuHotPlugData->SmBase[NewSlot], + (UINT64)NewProcessorNumberByProtocol)); + + NewSlot++; + PluggedIdx++; + } + // // We've handled this MMI. // return EFI_SUCCESS; =20 +RevokeNewSlot: + mCpuHotPlugData->ApicId[NewSlot] =3D MAX_UINT64; + Fatal: ASSERT (FALSE); CpuDeadLoop (); // // We couldn't handle this MMI. // return EFI_INTERRUPT_PENDING; } =20 =20 // // Entry point function of this driver. // EFI_STATUS EFIAPI CpuHotplugEntry ( IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable ) { EFI_STATUS Status; UINTN Size; @@ -251,83 +326,101 @@ CpuHotplugEntry ( // // Allocate the data structures that depend on the possible CPU count. // if (RETURN_ERROR (SafeUintnSub (mCpuHotPlugData->ArrayLength, 1, &Size))= || RETURN_ERROR (SafeUintnMult (sizeof (APIC_ID), Size, &Size))) { Status =3D EFI_ABORTED; DEBUG ((DEBUG_ERROR, "%a: invalid CPU_HOT_PLUG_DATA\n", __FUNCTION__)); goto Fatal; } Status =3D gMmst->MmAllocatePool (EfiRuntimeServicesData, Size, (VOID **)&mPluggedApicIds); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "%a: MmAllocatePool(): %r\n", __FUNCTION__, Statu= s)); goto Fatal; } Status =3D gMmst->MmAllocatePool (EfiRuntimeServicesData, Size, (VOID **)&mToUnplugApicIds); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "%a: MmAllocatePool(): %r\n", __FUNCTION__, Statu= s)); goto ReleasePluggedApicIds; } =20 + // + // Allocate the Post-SMM Pen for hot-added CPUs. + // + Status =3D SmbaseAllocatePostSmmPen (&mPostSmmPenAddress, + SystemTable->BootServices); + if (EFI_ERROR (Status)) { + goto ReleaseToUnplugApicIds; + } + // // Sanity-check the CPU hotplug interface. // // Both of the following features are part of QEMU 5.0, introduced prima= rily // in commit range 3e08b2b9cb64..3a61c8db9d25: // // (a) the QEMU_CPUHP_CMD_GET_ARCH_ID command of the modern CPU hotplug // interface, // // (b) the "SMRAM at default SMBASE" feature. // // From these, (b) is restricted to 5.0+ machine type versions, while (a) // does not depend on machine type version. Because we ensured the stric= ter // condition (b) through PcdQ35SmramAtDefaultSmbase above, the (a) // QEMU_CPUHP_CMD_GET_ARCH_ID command must now be available too. While we // can't verify the presence of precisely that command, we can still ver= ify // (sanity-check) that the modern interface is active, at least. // // Consult the "Typical usecases | Detecting and enabling modern CPU hot= plug // interface" section in QEMU's "docs/specs/acpi_cpu_hotplug.txt", on the // following. // QemuCpuhpWriteCpuSelector (mMmCpuIo, 0); QemuCpuhpWriteCpuSelector (mMmCpuIo, 0); QemuCpuhpWriteCommand (mMmCpuIo, QEMU_CPUHP_CMD_GET_PENDING); if (QemuCpuhpReadCommandData2 (mMmCpuIo) !=3D 0) { Status =3D EFI_NOT_FOUND; DEBUG ((DEBUG_ERROR, "%a: modern CPU hotplug interface: %r\n", __FUNCTION__, Status)); - goto ReleaseToUnplugApicIds; + goto ReleasePostSmmPen; } =20 // // Register the handler for the CPU Hotplug MMI. // Status =3D gMmst->MmiHandlerRegister ( CpuHotplugMmi, NULL, // HandlerType: root MMI handler &mDispatchHandle ); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "%a: MmiHandlerRegister(): %r\n", __FUNCTION__, Status)); - goto ReleaseToUnplugApicIds; + goto ReleasePostSmmPen; } =20 + // + // Install the handler for the hot-added CPUs' first SMI. + // + SmbaseInstallFirstSmiHandler (); + return EFI_SUCCESS; =20 +ReleasePostSmmPen: + SmbaseReleasePostSmmPen (mPostSmmPenAddress, SystemTable->BootServices); + mPostSmmPenAddress =3D 0; + ReleaseToUnplugApicIds: gMmst->MmFreePool (mToUnplugApicIds); mToUnplugApicIds =3D NULL; =20 ReleasePluggedApicIds: gMmst->MmFreePool (mPluggedApicIds); mPluggedApicIds =3D NULL; =20 Fatal: ASSERT (FALSE); CpuDeadLoop (); return Status; } --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54747): https://edk2.groups.io/g/devel/message/54747 Mute This Topic: https://groups.io/mt/71494234/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54745+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54745+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478781; cv=none; d=zohomail.com; s=zohoarc; b=gPyECIaj9lssOTXhqV2lMB7IamanosnZIu5e+hyGtmx3WpLK+yTFnxxZYUqSQaNJscFz1iPdy6WcJFrkj/TknQlFo7uGZxFArJKTl4jA+6Xk/VJhJIWEhv+ykEhqnANrJP64dIABhoQYGhTc2+c5yuqveHPW2GHNDD488pR04Fg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478781; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=elCv7xJT0oOSwein/OAauVLOo9O+WCAlrAf38dfx13s=; b=FzQcqdrisi2z0mrDnzTUFWHb5JWqqewGcqmq+BHjg8GOFNcdSHvOr/RnjxC+XB/+YHJtKRiOLGCuPNUBZWfCMhncOgMJaOK2qlGG1NFi1TnpV6NYryToKLxrVcp9Nd3PlZhBAZdn9mSchyotaHTAiWoA59s1OGBzjIN58m9aq6k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54745+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478781044714.6201861396698; Sun, 23 Feb 2020 09:26:21 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 7cStYY1788612xpkV2oZfuis; Sun, 23 Feb 2020 09:26:20 -0800 X-Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [207.211.31.120]) by mx.groups.io with SMTP id smtpd.web09.9158.1582478778981313469 for ; Sun, 23 Feb 2020 09:26:19 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-359--lBEozXwPPW1dSNh_YiwjA-1; Sun, 23 Feb 2020 12:26:16 -0500 X-MC-Unique: -lBEozXwPPW1dSNh_YiwjA-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id ED146107ACC5; Sun, 23 Feb 2020 17:26:14 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3D1E95C105; Sun, 23 Feb 2020 17:26:13 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 14/16] OvmfPkg: clone CpuS3DataDxe from UefiCpuPkg Date: Sun, 23 Feb 2020 18:25:35 +0100 Message-Id: <20200223172537.28464-15-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: rQdqdRuL4WXWFeqTImKLhEeXx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478780; bh=elCv7xJT0oOSwein/OAauVLOo9O+WCAlrAf38dfx13s=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=n4ThjkFcahIRkCr1l2YoAEmlp4Nn8BXWcnzBseqF/8adesHhLGAveMWcBrV7SKFj5bZ hKK/3GBl5NKIebdQdEhnEoPuxjFM06fOKVYGnq+80bCHSiXukMr4qT3d93oQEvYfKPv5U S+P1vh+oRYJ7gJdpcgIcEh2Ppo1FcQXX0Hc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" The @file comments in UefiCpuPkg/CpuS3DataDxe say, [...] It also only supports the number of CPUs reported by the MP Services Protocol, so this module does not support hot plug CPUs. This module can be copied into a CPU specific package and customized if these additional features are required. [...] The driver is so small that the simplest way to extend it with hotplug support is indeed to clone it at first. In this patch, customize the driver only with the following no-op steps: - Update copyright notices. - Update INF_VERSION to the latest INF spec version (1.29). - Update FILE_GUID. - Drop the UNI files. - Replace EFI_D_VERBOSE with DEBUG_VERBOSE, to appease "PatchCheck.py". This patch is best reviewed with: $ git show --find-copies-harder Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/OvmfPkgIa32.dsc | 2 +- OvmfPkg/OvmfPkgIa32X64.dsc | 2 +- OvmfPkg/OvmfPkgX64.dsc | 2 +- OvmfPkg/OvmfPkgIa32.fdf | 2 +- OvmfPkg/OvmfPkgIa32X64.fdf | 2 +- OvmfPkg/OvmfPkgX64.fdf | 2 +- {UefiCpuPkg =3D> OvmfPkg}/CpuS3DataDxe/CpuS3DataDxe.inf | 10 +++------- {UefiCpuPkg =3D> OvmfPkg}/CpuS3DataDxe/CpuS3Data.c | 4 ++-- 8 files changed, 11 insertions(+), 15 deletions(-) diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index 78310da44a5f..8d8ca746ba03 100644 --- a/OvmfPkg/OvmfPkgIa32.dsc +++ b/OvmfPkg/OvmfPkgIa32.dsc @@ -836,45 +836,45 @@ [Components] !endif HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandlePar= singLib.inf PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcf= gCommandLib.inf =20 gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 } =20 !if $(SECURE_BOOT_ENABLE) =3D=3D TRUE SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDx= e.inf OvmfPkg/EnrollDefaultKeys/EnrollDefaultKeys.inf !endif =20 OvmfPkg/PlatformDxe/Platform.inf OvmfPkg/IoMmuDxe/IoMmuDxe.inf =20 !if $(SMM_REQUIRE) =3D=3D TRUE OvmfPkg/SmmAccess/SmmAccess2Dxe.inf OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf - UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf + OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf =20 # # SMM Initial Program Load (a DXE_RUNTIME_DRIVER) # MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf =20 # # SMM_CORE # MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf =20 # # Privileged drivers (DXE_SMM_DRIVER modules) # OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf { LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf } UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index 428578a4f839..acba1f80a431 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -850,45 +850,45 @@ [Components.X64] HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandlePar= singLib.inf PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcf= gCommandLib.inf =20 gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 } =20 !if $(SECURE_BOOT_ENABLE) =3D=3D TRUE SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDx= e.inf OvmfPkg/EnrollDefaultKeys/EnrollDefaultKeys.inf !endif =20 OvmfPkg/PlatformDxe/Platform.inf OvmfPkg/AmdSevDxe/AmdSevDxe.inf OvmfPkg/IoMmuDxe/IoMmuDxe.inf =20 !if $(SMM_REQUIRE) =3D=3D TRUE OvmfPkg/SmmAccess/SmmAccess2Dxe.inf OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf - UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf + OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf =20 # # SMM Initial Program Load (a DXE_RUNTIME_DRIVER) # MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf =20 # # SMM_CORE # MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf =20 # # Privileged drivers (DXE_SMM_DRIVER modules) # OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf { LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf } UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index 73b92f259201..621b27f80d4b 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -848,45 +848,45 @@ [Components] HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandlePar= singLib.inf PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcf= gCommandLib.inf =20 gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000 } =20 !if $(SECURE_BOOT_ENABLE) =3D=3D TRUE SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDx= e.inf OvmfPkg/EnrollDefaultKeys/EnrollDefaultKeys.inf !endif =20 OvmfPkg/PlatformDxe/Platform.inf OvmfPkg/AmdSevDxe/AmdSevDxe.inf OvmfPkg/IoMmuDxe/IoMmuDxe.inf =20 !if $(SMM_REQUIRE) =3D=3D TRUE OvmfPkg/SmmAccess/SmmAccess2Dxe.inf OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf - UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf + OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf =20 # # SMM Initial Program Load (a DXE_RUNTIME_DRIVER) # MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf =20 # # SMM_CORE # MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf =20 # # Privileged drivers (DXE_SMM_DRIVER modules) # OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf { LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf } UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { diff --git a/OvmfPkg/OvmfPkgIa32.fdf b/OvmfPkg/OvmfPkgIa32.fdf index 61b891765c56..004aa318b222 100644 --- a/OvmfPkg/OvmfPkgIa32.fdf +++ b/OvmfPkg/OvmfPkgIa32.fdf @@ -298,45 +298,45 @@ [FV.DXEFV] INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf =20 !ifdef $(CSM_ENABLE) INF OvmfPkg/Csm/BiosThunk/VideoDxe/VideoDxe.inf INF OvmfPkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf INF RuleOverride=3DCSM OvmfPkg/Csm/Csm16/Csm16.inf !else INF OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf !endif =20 INF OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf INF OvmfPkg/VirtioGpuDxe/VirtioGpu.inf INF OvmfPkg/PlatformDxe/Platform.inf INF OvmfPkg/IoMmuDxe/IoMmuDxe.inf =20 !if $(SMM_REQUIRE) =3D=3D TRUE INF OvmfPkg/SmmAccess/SmmAccess2Dxe.inf INF OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf -INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf +INF OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf INF OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf =20 # # Variable driver stack (SMM) # INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf =20 !else =20 # # Variable driver stack (non-SMM) # INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf diff --git a/OvmfPkg/OvmfPkgIa32X64.fdf b/OvmfPkg/OvmfPkgIa32X64.fdf index 501b4fcb7b67..13da8b9dbe65 100644 --- a/OvmfPkg/OvmfPkgIa32X64.fdf +++ b/OvmfPkg/OvmfPkgIa32X64.fdf @@ -305,45 +305,45 @@ [FV.DXEFV] INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf =20 !ifdef $(CSM_ENABLE) INF OvmfPkg/Csm/BiosThunk/VideoDxe/VideoDxe.inf INF OvmfPkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf INF RuleOverride=3DCSM OvmfPkg/Csm/Csm16/Csm16.inf !else INF OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf !endif =20 INF OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf INF OvmfPkg/VirtioGpuDxe/VirtioGpu.inf INF OvmfPkg/PlatformDxe/Platform.inf INF OvmfPkg/AmdSevDxe/AmdSevDxe.inf INF OvmfPkg/IoMmuDxe/IoMmuDxe.inf =20 !if $(SMM_REQUIRE) =3D=3D TRUE INF OvmfPkg/SmmAccess/SmmAccess2Dxe.inf INF OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf -INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf +INF OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf INF OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf =20 # # Variable driver stack (SMM) # INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf =20 !else =20 # # Variable driver stack (non-SMM) # INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf index 501b4fcb7b67..13da8b9dbe65 100644 --- a/OvmfPkg/OvmfPkgX64.fdf +++ b/OvmfPkg/OvmfPkgX64.fdf @@ -305,45 +305,45 @@ [FV.DXEFV] INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf =20 !ifdef $(CSM_ENABLE) INF OvmfPkg/Csm/BiosThunk/VideoDxe/VideoDxe.inf INF OvmfPkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf INF RuleOverride=3DCSM OvmfPkg/Csm/Csm16/Csm16.inf !else INF OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf !endif =20 INF OvmfPkg/QemuRamfbDxe/QemuRamfbDxe.inf INF OvmfPkg/VirtioGpuDxe/VirtioGpu.inf INF OvmfPkg/PlatformDxe/Platform.inf INF OvmfPkg/AmdSevDxe/AmdSevDxe.inf INF OvmfPkg/IoMmuDxe/IoMmuDxe.inf =20 !if $(SMM_REQUIRE) =3D=3D TRUE INF OvmfPkg/SmmAccess/SmmAccess2Dxe.inf INF OvmfPkg/SmmControl2Dxe/SmmControl2Dxe.inf -INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf +INF OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf INF OvmfPkg/CpuHotplugSmm/CpuHotplugSmm.inf INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf =20 # # Variable driver stack (SMM) # INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf =20 !else =20 # # Variable driver stack (non-SMM) # INF OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf diff --git a/UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf b/OvmfPkg/CpuS3DataDx= e/CpuS3DataDxe.inf similarity index 83% copy from UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf copy to OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf index 510133a614ba..0ad8a0b35d25 100644 --- a/UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf +++ b/OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf @@ -1,65 +1,61 @@ ## @file # ACPI CPU Data initialization module # # This module initializes the ACPI_CPU_DATA structure and registers the a= ddress # of this structure in the PcdCpuS3DataAddress PCD. This is a generic/si= mple # version of this module. It does not provide a machine check handler or= CPU # register initialization tables for ACPI S3 resume. It also only suppor= ts the # number of CPUs reported by the MP Services Protocol, so this module doe= s not # support hot plug CPUs. This module can be copied into a CPU specific p= ackage # and customized if these additional features are required. # # Copyright (c) 2013-2016, Intel Corporation. All rights reserved.
-# Copyright (c) 2015, Red Hat, Inc. +# Copyright (c) 2015-2020, Red Hat, Inc. # # SPDX-License-Identifier: BSD-2-Clause-Patent # ## =20 [Defines] - INF_VERSION =3D 0x00010005 + INF_VERSION =3D 1.29 BASE_NAME =3D CpuS3DataDxe - MODULE_UNI_FILE =3D CpuS3DataDxe.uni - FILE_GUID =3D 4D2E57EE-0E3F-44DD-93C4-D3B57E96945D + FILE_GUID =3D 229B7EFD-DA02-46B9-93F4-E20C009F94E9 MODULE_TYPE =3D DXE_DRIVER VERSION_STRING =3D 1.0 ENTRY_POINT =3D CpuS3DataInitialize =20 # The following information is for reference only and not required by the = build # tools. # # VALID_ARCHITECTURES =3D IA32 X64 =20 [Sources] CpuS3Data.c =20 [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec UefiCpuPkg/UefiCpuPkg.dec =20 [LibraryClasses] UefiDriverEntryPoint UefiBootServicesTableLib BaseMemoryLib DebugLib BaseLib MtrrLib MemoryAllocationLib =20 [Guids] gEfiEndOfDxeEventGroupGuid ## CONSUMES ## Event =20 [Protocols] gEfiMpServiceProtocolGuid ## CONSUMES =20 [Pcd] gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress ## PRODUCES gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable ## CONSUMES =20 [Depex] gEfiMpServiceProtocolGuid - -[UserExtensions.TianoCore."ExtraFiles"] - CpuS3DataDxeExtra.uni diff --git a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c b/OvmfPkg/CpuS3DataDxe/Cpu= S3Data.c similarity index 96% copy from UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c copy to OvmfPkg/CpuS3DataDxe/CpuS3Data.c index 2be335d91903..2bb60d591b1e 100644 --- a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c +++ b/OvmfPkg/CpuS3DataDxe/CpuS3Data.c @@ -1,35 +1,35 @@ /** @file ACPI CPU Data initialization module =20 This module initializes the ACPI_CPU_DATA structure and registers the addr= ess of this structure in the PcdCpuS3DataAddress PCD. This is a generic/simple version of this module. It does not provide a machine check handler or CPU register initialization tables for ACPI S3 resume. It also only supports = the number of CPUs reported by the MP Services Protocol, so this module does n= ot support hot plug CPUs. This module can be copied into a CPU specific pack= age and customized if these additional features are required. =20 Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.
-Copyright (c) 2015, Red Hat, Inc. +Copyright (c) 2015 - 2020, Red Hat, Inc. =20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ =20 #include =20 #include =20 #include #include #include #include #include #include =20 #include #include =20 // // Data structure used to allocate ACPI_CPU_DATA and its supporting struct= ures // @@ -107,45 +107,45 @@ VOID EFIAPI CpuS3DataOnEndOfDxe ( IN EFI_EVENT Event, OUT VOID *Context ) { EFI_STATUS Status; ACPI_CPU_DATA_EX *AcpiCpuDataEx; =20 AcpiCpuDataEx =3D (ACPI_CPU_DATA_EX *) Context; // // Allocate a 4KB reserved page below 1MB // AcpiCpuDataEx->AcpiCpuData.StartupVector =3D BASE_1MB - 1; Status =3D gBS->AllocatePages ( AllocateMaxAddress, EfiReservedMemoryType, 1, &AcpiCpuDataEx->AcpiCpuData.StartupVector ); ASSERT_EFI_ERROR (Status); =20 - DEBUG ((EFI_D_VERBOSE, "%a\n", __FUNCTION__)); + DEBUG ((DEBUG_VERBOSE, "%a\n", __FUNCTION__)); MtrrGetAllMtrrs (&AcpiCpuDataEx->MtrrTable); =20 // // Close event, so it will not be invoked again. // gBS->CloseEvent (Event); } =20 /** The entry function of the CpuS3Data driver. =20 Allocate and initialize all fields of the ACPI_CPU_DATA structure excep= t the MTRR settings. Register an event notification on gEfiEndOfDxeEventGrou= pGuid to capture the ACPI_CPU_DATA MTRR settings. The PcdCpuS3DataAddress is= set to the address that ACPI_CPU_DATA is allocated at. =20 @param[in] ImageHandle The firmware allocated handle for the EFI image. @param[in] SystemTable A pointer to the EFI System Table. =20 @retval EFI_SUCCESS The entry point is executed successfully. @retval EFI_UNSUPPORTED Do not support ACPI S3. @retval other Some error occurs when executing this entry poi= nt. --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54745): https://edk2.groups.io/g/devel/message/54745 Mute This Topic: https://groups.io/mt/71494232/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54746+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54746+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478781; cv=none; d=zohomail.com; s=zohoarc; b=SQkHnA9hy5oMVOcaEcki4n52xgrFKlw2E3neEv30PQ5rxKDLfSXHJg5UKDGQKgLbNrG9zpxflmm4yk0e7zdbEEr70DeZ6ZWzlpOVGfIMrN1u5c/P0c8t2gwydU+xM8lQT1flcl1QKrzLj9SvS/27WvSGuNu8kjk2Zm3ruDbFeKw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478781; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Rx4BknKubWc+yLT67iU7TEghZRJkAJlo/e9tJ4oB+xk=; b=SPp33FB+zQnhqrV4H+sqHhGq4h2EpOpagzTWcjjg8Nt9RhRZF/zHHA83sCPjj3exrt8Vxi7/yAmoA2nQ3j27L+0SLNzmJFFjyypcqJqU4VAzWhdIw5dGFll3ycpHeQytD9GuCCyYwUdalrM5TENuUS1Ky4/243xEZpMAD4KlHZs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54746+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478781624584.1457897415706; Sun, 23 Feb 2020 09:26:21 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id w8zEYY1788612xAJvgSzH2pr; Sun, 23 Feb 2020 09:26:21 -0800 X-Received: from us-smtp-delivery-1.mimecast.com (us-smtp-delivery-1.mimecast.com [207.211.31.81]) by mx.groups.io with SMTP id smtpd.web11.9250.1582478780721334920 for ; Sun, 23 Feb 2020 09:26:20 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-425-Pdu-tK9BOk--rjJYqvGFFw-1; Sun, 23 Feb 2020 12:26:18 -0500 X-MC-Unique: Pdu-tK9BOk--rjJYqvGFFw-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 0BDDE8017DF; Sun, 23 Feb 2020 17:26:17 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4F3535C105; Sun, 23 Feb 2020 17:26:15 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 15/16] OvmfPkg/CpuS3DataDxe: superficial cleanups Date: Sun, 23 Feb 2020 18:25:36 +0100 Message-Id: <20200223172537.28464-16-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: 3fjKLsqKhKzE5IhETGzrSE7Qx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478781; bh=Rx4BknKubWc+yLT67iU7TEghZRJkAJlo/e9tJ4oB+xk=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=jsgGSW0CVqsqpQRgemoyyRCqrzgf0VuktIwqTlCxnaeg6D7dJr2XekMs0/7zEbWIqsN yjgmiPmCZfzmGDaPLlXl8FI7ZBZgm/BJqhFfY3LaxaQyLzv9XYjjRBqUkOCnAbPOwiWYX rp4QDuFkmceEsojrSCiyabVagdA0UbOu8PE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Sort the [Packages], [LibraryClasses], and [Pcd] sections in the INF file. Pad the usage notes (CONSUMES, PRODUCES) in the [Pcd] section. Sort the Library #includes in the C file. This patch is functionally a no-op. Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf | 16 ++++++++-------- OvmfPkg/CpuS3DataDxe/CpuS3Data.c | 4 ++-- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf b/OvmfPkg/CpuS3DataDxe/C= puS3DataDxe.inf index 0ad8a0b35d25..f9679e0c33b3 100644 --- a/OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf +++ b/OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf @@ -14,48 +14,48 @@ # # SPDX-License-Identifier: BSD-2-Clause-Patent # ## =20 [Defines] INF_VERSION =3D 1.29 BASE_NAME =3D CpuS3DataDxe FILE_GUID =3D 229B7EFD-DA02-46B9-93F4-E20C009F94E9 MODULE_TYPE =3D DXE_DRIVER VERSION_STRING =3D 1.0 ENTRY_POINT =3D CpuS3DataInitialize =20 # The following information is for reference only and not required by the = build # tools. # # VALID_ARCHITECTURES =3D IA32 X64 =20 [Sources] CpuS3Data.c =20 [Packages] - MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec UefiCpuPkg/UefiCpuPkg.dec =20 [LibraryClasses] - UefiDriverEntryPoint - UefiBootServicesTableLib + BaseLib BaseMemoryLib DebugLib - BaseLib - MtrrLib MemoryAllocationLib + MtrrLib + UefiBootServicesTableLib + UefiDriverEntryPoint =20 [Guids] gEfiEndOfDxeEventGroupGuid ## CONSUMES ## Event =20 [Protocols] gEfiMpServiceProtocolGuid ## CONSUMES =20 [Pcd] - gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES - gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress ## PRODUCES - gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable ## CON= SUMES + gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CON= SUMES + gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress ## PRO= DUCES =20 [Depex] gEfiMpServiceProtocolGuid diff --git a/OvmfPkg/CpuS3DataDxe/CpuS3Data.c b/OvmfPkg/CpuS3DataDxe/CpuS3D= ata.c index 2bb60d591b1e..8bb9807cd501 100644 --- a/OvmfPkg/CpuS3DataDxe/CpuS3Data.c +++ b/OvmfPkg/CpuS3DataDxe/CpuS3Data.c @@ -3,48 +3,48 @@ ACPI CPU Data initialization module =20 This module initializes the ACPI_CPU_DATA structure and registers the addr= ess of this structure in the PcdCpuS3DataAddress PCD. This is a generic/simple version of this module. It does not provide a machine check handler or CPU register initialization tables for ACPI S3 resume. It also only supports = the number of CPUs reported by the MP Services Protocol, so this module does n= ot support hot plug CPUs. This module can be copied into a CPU specific pack= age and customized if these additional features are required. =20 Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.
Copyright (c) 2015 - 2020, Red Hat, Inc. =20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ =20 #include =20 #include =20 #include #include -#include #include -#include #include +#include +#include =20 #include #include =20 // // Data structure used to allocate ACPI_CPU_DATA and its supporting struct= ures // typedef struct { ACPI_CPU_DATA AcpiCpuData; MTRR_SETTINGS MtrrTable; IA32_DESCRIPTOR GdtrProfile; IA32_DESCRIPTOR IdtrProfile; } ACPI_CPU_DATA_EX; =20 /** Allocate EfiACPIMemoryNVS memory. =20 @param[in] Size Size of memory to allocate. =20 @return Allocated address for output. =20 **/ --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54746): https://edk2.groups.io/g/devel/message/54746 Mute This Topic: https://groups.io/mt/71494233/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Mon Apr 29 00:07:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54748+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54748+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1582478784; cv=none; d=zohomail.com; s=zohoarc; b=GwKFL+UJtvJ+HwbSpyy1n9D9u/D+abya7yEQ/nUW9XIGvwsvQ3mdBJ3J9GuEkHIrx73dqNiM7WAuDYicc/pFmeaeMDkb6ZwhbVk9WL3zh4HQ426FxD7hkH8nUtgYb/JHOrfxy9W0vToIv4PyYmnoV5Bbz85/CnT2+eZwlKf0mTA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582478784; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=BXjpREHRv85DuoNpcfzq4otZ0GCvscqzfoeE0wxB524=; b=S8CKglzqReMEToW985RFHeLFfZDcyTtrmorS7z1mK3eeyUGAsxrqhiTxKzmrZGQUpSvzpFvRNMbXQs6G8G57iK0RpcEmSHhiw27MgWHKQcInUABNbl1/1rl3sLX34qzeO/ieavhn5g1FrzRIfHDo8mtNQ/3zWrekD0XKjNIQZqc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54748+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582478784551525.8548390282153; Sun, 23 Feb 2020 09:26:24 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id Y2QzYY1788612xCLfCiqV6Mc; Sun, 23 Feb 2020 09:26:24 -0800 X-Received: from us-smtp-delivery-1.mimecast.com (us-smtp-delivery-1.mimecast.com [207.211.31.81]) by mx.groups.io with SMTP id smtpd.web10.9283.1582478782976034212 for ; Sun, 23 Feb 2020 09:26:23 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-419-QK1WDTTGPEu0navMJcw1ew-1; Sun, 23 Feb 2020 12:26:20 -0500 X-MC-Unique: QK1WDTTGPEu0navMJcw1ew-1 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 1D4BE100726A; Sun, 23 Feb 2020 17:26:19 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-53.ams2.redhat.com [10.36.116.53]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6322F5C105; Sun, 23 Feb 2020 17:26:17 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jiewen Yao , Jordan Justen , Michael Kinney , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [edk2-devel] [PATCH 16/16] OvmfPkg/CpuS3DataDxe: enable S3 resume after CPU hotplug Date: Sun, 23 Feb 2020 18:25:37 +0100 Message-Id: <20200223172537.28464-17-lersek@redhat.com> In-Reply-To: <20200223172537.28464-1-lersek@redhat.com> References: <20200223172537.28464-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: LTwuWKDygljPSgKFUWAGUuPhx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582478784; bh=BXjpREHRv85DuoNpcfzq4otZ0GCvscqzfoeE0wxB524=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=ft5JRRIDSjpgWpj6JqIgzgu/t8jTa/HHyNdQ8kD9ZNb7T7sfCino8mrl3UqGqslkmFi hi5iMAkmVKaiC2aTM2F7Tuunn1PNRVpnk4k9WQ/5zk+B96nESOC6hrRR6jESuh6HN1Yv6 OnT7A7LqBcmaPTkDfKnjZo+wKg8r14CZClE= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" During normal boot, CpuS3DataDxe allocates - an empty CPU_REGISTER_TABLE entry in the "ACPI_CPU_DATA.PreSmmInitRegisterTable" array, and - an empty CPU_REGISTER_TABLE entry in the "ACPI_CPU_DATA.RegisterTable" array, for every CPU whose APIC ID CpuS3DataDxe can learn. Currently EFI_MP_SERVICES_PROTOCOL is used for both determining the number of CPUs -- the protocol reports the present-at-boot CPU count --, and for retrieving the APIC IDs of those CPUs. Consequently, if a CPU is hot-plugged at OS runtime, then S3 resume breaks. That's because PiSmmCpuDxeSmm will not find the hot-added CPU's APIC ID associated with any CPU_REGISTER_TABLE object, in the SMRAM copies of either of the "RegisterTable" and "PreSmmInitRegisterTable" arrays. The failure to match the hot-added CPU's APIC ID trips the ASSERT() in SetRegister() [UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c]. If "PcdQ35SmramAtDefaultSmbase" is TRUE, then: - prepare CPU_REGISTER_TABLE objects for all possible CPUs, not just the present-at-boot CPUs (PlatformPei stored the possible CPU count to "PcdCpuMaxLogicalProcessorNumber"); - use QEMU_CPUHP_CMD_GET_ARCH_ID for filling in the "InitialApicId" fields of the CPU_REGISTER_TABLE objects. This provides full APIC ID coverage for PiSmmCpuDxeSmm during S3 resume, accommodating CPUs hot-added at OS runtime. This patch is best reviewed with $ git show -b Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jiewen Yao Cc: Jordan Justen Cc: Michael Kinney Cc: Philippe Mathieu-Daud=C3=A9 Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1512 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel --- OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf | 4 + OvmfPkg/CpuS3DataDxe/CpuS3Data.c | 91 ++++++++++++++------ 2 files changed, 70 insertions(+), 25 deletions(-) diff --git a/OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf b/OvmfPkg/CpuS3DataDxe/C= puS3DataDxe.inf index f9679e0c33b3..ceae1d4078c7 100644 --- a/OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf +++ b/OvmfPkg/CpuS3DataDxe/CpuS3DataDxe.inf @@ -16,46 +16,50 @@ # ## =20 [Defines] INF_VERSION =3D 1.29 BASE_NAME =3D CpuS3DataDxe FILE_GUID =3D 229B7EFD-DA02-46B9-93F4-E20C009F94E9 MODULE_TYPE =3D DXE_DRIVER VERSION_STRING =3D 1.0 ENTRY_POINT =3D CpuS3DataInitialize =20 # The following information is for reference only and not required by the = build # tools. # # VALID_ARCHITECTURES =3D IA32 X64 =20 [Sources] CpuS3Data.c =20 [Packages] MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec UefiCpuPkg/UefiCpuPkg.dec =20 [LibraryClasses] BaseLib BaseMemoryLib DebugLib + IoLib MemoryAllocationLib MtrrLib UefiBootServicesTableLib UefiDriverEntryPoint =20 [Guids] gEfiEndOfDxeEventGroupGuid ## CONSUMES ## Event =20 [Protocols] gEfiMpServiceProtocolGuid ## CONSUMES =20 [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable ## CON= SUMES gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CON= SUMES + gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## CON= SUMES gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress ## PRO= DUCES + gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase ## CON= SUMES =20 [Depex] gEfiMpServiceProtocolGuid diff --git a/OvmfPkg/CpuS3DataDxe/CpuS3Data.c b/OvmfPkg/CpuS3DataDxe/CpuS3D= ata.c index 8bb9807cd501..bac7285aa2f3 100644 --- a/OvmfPkg/CpuS3DataDxe/CpuS3Data.c +++ b/OvmfPkg/CpuS3DataDxe/CpuS3Data.c @@ -4,51 +4,55 @@ ACPI CPU Data initialization module This module initializes the ACPI_CPU_DATA structure and registers the addr= ess of this structure in the PcdCpuS3DataAddress PCD. This is a generic/simple version of this module. It does not provide a machine check handler or CPU register initialization tables for ACPI S3 resume. It also only supports = the number of CPUs reported by the MP Services Protocol, so this module does n= ot support hot plug CPUs. This module can be copied into a CPU specific pack= age and customized if these additional features are required. =20 Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.
Copyright (c) 2015 - 2020, Red Hat, Inc. =20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ =20 #include =20 #include =20 #include #include #include +#include #include #include #include =20 #include #include =20 +#include +#include + // // Data structure used to allocate ACPI_CPU_DATA and its supporting struct= ures // typedef struct { ACPI_CPU_DATA AcpiCpuData; MTRR_SETTINGS MtrrTable; IA32_DESCRIPTOR GdtrProfile; IA32_DESCRIPTOR IdtrProfile; } ACPI_CPU_DATA_EX; =20 /** Allocate EfiACPIMemoryNVS memory. =20 @param[in] Size Size of memory to allocate. =20 @return Allocated address for output. =20 **/ VOID * AllocateAcpiNvsMemory ( IN UINTN Size ) @@ -144,89 +148,101 @@ CpuS3DataOnEndOfDxe ( to the address that ACPI_CPU_DATA is allocated at. =20 @param[in] ImageHandle The firmware allocated handle for the EFI image. @param[in] SystemTable A pointer to the EFI System Table. =20 @retval EFI_SUCCESS The entry point is executed successfully. @retval EFI_UNSUPPORTED Do not support ACPI S3. @retval other Some error occurs when executing this entry poi= nt. =20 **/ EFI_STATUS EFIAPI CpuS3DataInitialize ( IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable ) { EFI_STATUS Status; ACPI_CPU_DATA_EX *AcpiCpuDataEx; ACPI_CPU_DATA *AcpiCpuData; EFI_MP_SERVICES_PROTOCOL *MpServices; UINTN NumberOfCpus; - UINTN NumberOfEnabledProcessors; VOID *Stack; UINTN TableSize; CPU_REGISTER_TABLE *RegisterTable; UINTN Index; EFI_PROCESSOR_INFORMATION ProcessorInfoBuffer; UINTN GdtSize; UINTN IdtSize; VOID *Gdt; VOID *Idt; EFI_EVENT Event; ACPI_CPU_DATA *OldAcpiCpuData; + BOOLEAN FetchPossibleApicIds; =20 if (!PcdGetBool (PcdAcpiS3Enable)) { return EFI_UNSUPPORTED; } =20 // // Set PcdCpuS3DataAddress to the base address of the ACPI_CPU_DATA stru= cture // OldAcpiCpuData =3D (ACPI_CPU_DATA *) (UINTN) PcdGet64 (PcdCpuS3DataAddre= ss); =20 AcpiCpuDataEx =3D AllocateZeroPages (sizeof (ACPI_CPU_DATA_EX)); ASSERT (AcpiCpuDataEx !=3D NULL); AcpiCpuData =3D &AcpiCpuDataEx->AcpiCpuData; =20 // - // Get MP Services Protocol + // The "SMRAM at default SMBASE" feature guarantees that + // QEMU_CPUHP_CMD_GET_ARCH_ID too is available. // - Status =3D gBS->LocateProtocol ( - &gEfiMpServiceProtocolGuid, - NULL, - (VOID **)&MpServices - ); - ASSERT_EFI_ERROR (Status); + FetchPossibleApicIds =3D PcdGetBool (PcdQ35SmramAtDefaultSmbase); =20 - // - // Get the number of CPUs - // - Status =3D MpServices->GetNumberOfProcessors ( - MpServices, - &NumberOfCpus, - &NumberOfEnabledProcessors - ); - ASSERT_EFI_ERROR (Status); + if (FetchPossibleApicIds) { + NumberOfCpus =3D PcdGet32 (PcdCpuMaxLogicalProcessorNumber); + } else { + UINTN NumberOfEnabledProcessors; + + // + // Get MP Services Protocol + // + Status =3D gBS->LocateProtocol ( + &gEfiMpServiceProtocolGuid, + NULL, + (VOID **)&MpServices + ); + ASSERT_EFI_ERROR (Status); + + // + // Get the number of CPUs + // + Status =3D MpServices->GetNumberOfProcessors ( + MpServices, + &NumberOfCpus, + &NumberOfEnabledProcessors + ); + ASSERT_EFI_ERROR (Status); + } AcpiCpuData->NumberOfCpus =3D (UINT32)NumberOfCpus; =20 // // Initialize ACPI_CPU_DATA fields // AcpiCpuData->StackSize =3D PcdGet32 (PcdCpuApStackSize); AcpiCpuData->ApMachineCheckHandlerBase =3D 0; AcpiCpuData->ApMachineCheckHandlerSize =3D 0; AcpiCpuData->GdtrProfile =3D (EFI_PHYSICAL_ADDRESS)(UINTN)&AcpiCpuDataE= x->GdtrProfile; AcpiCpuData->IdtrProfile =3D (EFI_PHYSICAL_ADDRESS)(UINTN)&AcpiCpuDataE= x->IdtrProfile; AcpiCpuData->MtrrTable =3D (EFI_PHYSICAL_ADDRESS)(UINTN)&AcpiCpuDataE= x->MtrrTable; =20 // // Allocate stack space for all CPUs. // Use ACPI NVS memory type because this data will be directly used by A= Ps // in S3 resume phase in long mode. Also during S3 resume, the stack buf= fer // will only be used as scratch space. i.e. we won't read anything from = it // before we write to it, in PiSmmCpuDxeSmm. // Stack =3D AllocateAcpiNvsMemory (NumberOfCpus * AcpiCpuData->StackSize); ASSERT (Stack !=3D NULL); AcpiCpuData->StackAddress =3D (EFI_PHYSICAL_ADDRESS)(UINTN)Stack; @@ -244,58 +260,83 @@ CpuS3DataInitialize ( IdtSize =3D AcpiCpuDataEx->IdtrProfile.Limit + 1; Gdt =3D AllocateZeroPages (GdtSize + IdtSize); ASSERT (Gdt !=3D NULL); Idt =3D (VOID *)((UINTN)Gdt + GdtSize); CopyMem (Gdt, (VOID *)AcpiCpuDataEx->GdtrProfile.Base, GdtSize); CopyMem (Idt, (VOID *)AcpiCpuDataEx->IdtrProfile.Base, IdtSize); AcpiCpuDataEx->GdtrProfile.Base =3D (UINTN)Gdt; AcpiCpuDataEx->IdtrProfile.Base =3D (UINTN)Idt; =20 if (OldAcpiCpuData !=3D NULL) { AcpiCpuData->RegisterTable =3D OldAcpiCpuData->RegisterTable; AcpiCpuData->PreSmmInitRegisterTable =3D OldAcpiCpuData->PreSmmInitReg= isterTable; AcpiCpuData->ApLocation =3D OldAcpiCpuData->ApLocation; CopyMem (&AcpiCpuData->CpuStatus, &OldAcpiCpuData->CpuStatus, sizeof (= CPU_STATUS_INFORMATION)); } else { // // Allocate buffer for empty RegisterTable and PreSmmInitRegisterTable= for all CPUs // TableSize =3D 2 * NumberOfCpus * sizeof (CPU_REGISTER_TABLE); RegisterTable =3D (CPU_REGISTER_TABLE *)AllocateZeroPages (TableSize); ASSERT (RegisterTable !=3D NULL); =20 + if (FetchPossibleApicIds) { + // + // Write a valid selector so that other hotplug registers can be + // accessed. + // + IoWrite32 (ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_W_CPU_SEL, 0); + // + // We'll be fetching the APIC IDs. + // + IoWrite8 (ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_W_CMD, + QEMU_CPUHP_CMD_GET_ARCH_ID); + } for (Index =3D 0; Index < NumberOfCpus; Index++) { - Status =3D MpServices->GetProcessorInfo ( - MpServices, - Index, - &ProcessorInfoBuffer - ); - ASSERT_EFI_ERROR (Status); + UINT32 InitialApicId; =20 - RegisterTable[Index].InitialApicId =3D (UINT32)ProcessorInfoBuf= fer.ProcessorId; + if (FetchPossibleApicIds) { + IoWrite32 (ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_W_CPU_SEL, + (UINT32)Index); + InitialApicId =3D IoRead32 ( + ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_RW_CMD_DATA); + } else { + Status =3D MpServices->GetProcessorInfo ( + MpServices, + Index, + &ProcessorInfoBuffer + ); + ASSERT_EFI_ERROR (Status); + InitialApicId =3D (UINT32)ProcessorInfoBuffer.ProcessorId; + } + + DEBUG ((DEBUG_VERBOSE, "%a: Index=3D%05Lu ApicId=3D0x%08x\n", __FUNC= TION__, + (UINT64)Index, InitialApicId)); + + RegisterTable[Index].InitialApicId =3D InitialApicId; RegisterTable[Index].TableLength =3D 0; RegisterTable[Index].AllocatedSize =3D 0; RegisterTable[Index].RegisterTableEntry =3D 0; =20 - RegisterTable[NumberOfCpus + Index].InitialApicId =3D (UINT32)P= rocessorInfoBuffer.ProcessorId; + RegisterTable[NumberOfCpus + Index].InitialApicId =3D InitialAp= icId; RegisterTable[NumberOfCpus + Index].TableLength =3D 0; RegisterTable[NumberOfCpus + Index].AllocatedSize =3D 0; RegisterTable[NumberOfCpus + Index].RegisterTableEntry =3D 0; } AcpiCpuData->RegisterTable =3D (EFI_PHYSICAL_ADDRESS)(UINTN)= RegisterTable; AcpiCpuData->PreSmmInitRegisterTable =3D (EFI_PHYSICAL_ADDRESS)(UINTN)= (RegisterTable + NumberOfCpus); } =20 // // Set PcdCpuS3DataAddress to the base address of the ACPI_CPU_DATA stru= cture // Status =3D PcdSet64S (PcdCpuS3DataAddress, (UINT64)(UINTN)AcpiCpuData); ASSERT_EFI_ERROR (Status); =20 // // Register EFI_END_OF_DXE_EVENT_GROUP_GUID event. // The notification function allocates StartupVector and saves MTRRs for= ACPI_CPU_DATA // Status =3D gBS->CreateEventEx ( EVT_NOTIFY_SIGNAL, TPL_CALLBACK, CpuS3DataOnEndOfDxe, --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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