From nobody Mon Feb 9 11:46:45 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54647+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54647+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1582128353; cv=none; d=zohomail.com; s=zohoarc; b=HdGj6Wk+dcx1hVIU/k1Pk7mxnPIwSyjsoyeSVInGE7zQ5vNq7DTX9TyMr10esbf6wfs7keRqt/nsAQVuVwnN1WEJAep+t7843Os574HGB0653QLKR6e0Pya5eH7ojCF8C2VzNW3jPbPeKjUTqe7v1GqtcG42RREVo90TW6o109s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582128353; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=vfrQbAn1fhGiJmLXRM6UevU2wDwa53aoH31a7HW/UQ0=; b=iRKxgD0TeldnTjPpqjYJ+ImljFWjO+zHyYRsz9VC6Pfl9Z+2Wjcur2H9buv1kE3jDZ2HmU0UvDeqgLxKGvDQP3ux+0VgKbLB8Lx+fbGvZcM6HF5jUU4/zoCWWM1kvTwInWYt6KHes/b6u3cD1oJyovKOYH02yPdL2dES1s8wgkw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54647+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582128353344791.9774760671093; Wed, 19 Feb 2020 08:05:53 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id G0gEYY1788612xSaJYmONPza; Wed, 19 Feb 2020 08:05:52 -0800 X-Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web12.14366.1582128352271709858 for ; Wed, 19 Feb 2020 08:05:52 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Feb 2020 08:05:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,461,1574150400"; d="scan'208";a="235933205" X-Received: from gklab-27-32.ger.corp.intel.com ([10.102.28.45]) by orsmga003.jf.intel.com with ESMTP; 19 Feb 2020 08:05:48 -0800 From: "Albecki, Mateusz" To: devel@edk2.groups.io Cc: Mateusz Albecki , Hao A Wu , Marcin Wojtas , Zhichao Gao , Liming Gao Subject: [edk2-devel] [PATCHv2 4/4] MdeModulePkg/SdMmcPciHcDxe: Fix PIO transfer mode Date: Wed, 19 Feb 2020 17:05:08 +0100 Message-Id: <20200219160508.5856-5-mateusz.albecki@intel.com> In-Reply-To: <20200219160508.5856-1-mateusz.albecki@intel.com> References: <20200219160508.5856-1-mateusz.albecki@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mateusz.albecki@intel.com X-Gm-Message-State: k240ytVuOExe3BIfagSlpm8Tx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582128352; bh=6jWtyMzXKd+gj8zrqt7EmR1BtQlV0MAq7wyHeMSA2ro=; h=Cc:Date:From:Reply-To:Subject:To; b=fPEFxk7BpLvezDUQLTL+cP1H+IV7unuNlZQYMZ+/Oyer0rj02UsQ+ucYN1TEB/FOGVT Di+6UwUqExmSVmyDhQ5jgqBVoTklDFiRzx+3dWj80wsP4WEagEJaz+atPCPI4We0DW7Gf 8ZDTKqpbyzgG4SRozSd2aHe5WSEgaqS8gYo= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Current driver does not support PIO transfer mode for commands other then tuning. This change adds the code to transfer PIO data. Cc: Hao A Wu Cc: Marcin Wojtas Cc: Zhichao Gao Cc: Liming Gao Signed-off-by: Mateusz Albecki --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 3 + MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 132 +++++++++++++++++= ---- 2 files changed, 114 insertions(+), 21 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h b/MdeModule= Pkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h index 15b7d12596..fd89306fab 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h @@ -157,6 +157,9 @@ typedef struct { UINT64 Timeout; UINT32 Retries; =20 + BOOLEAN PioModeTransferCompleted; + UINT32 PioBlockIndex; + SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc; SD_MMC_HC_ADMA_64_V3_DESC_LINE *Adma64V3Desc; SD_MMC_HC_ADMA_64_V4_DESC_LINE *Adma64V4Desc; diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePk= g/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index 5bdc200827..73c43110f0 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -1711,6 +1711,8 @@ SdMmcPrintTrb ( DEBUG ((DebugLevel, "CommandComplete: %d\n", Trb->CommandComplete)); DEBUG ((DebugLevel, "Timeout: %ld\n", Trb->Timeout)); DEBUG ((DebugLevel, "Retries: %d\n", Trb->Retries)); + DEBUG ((DebugLevel, "PioModeTransferCompleted: %d\n", Trb->PioModeTransf= erCompleted)); + DEBUG ((DebugLevel, "PioBlockIndex: %d\n", Trb->PioBlockIndex)); DEBUG ((DebugLevel, "Adma32Desc: %p\n", Trb->Adma32Desc)); DEBUG ((DebugLevel, "Adma64V3Desc: %p\n", Trb->Adma64V3Desc)); DEBUG ((DebugLevel, "Adma64V4Desc: %p\n", Trb->Adma64V4Desc)); @@ -1762,6 +1764,8 @@ SdMmcCreateTrb ( Trb->CommandComplete =3D FALSE; Trb->Timeout =3D Packet->Timeout; Trb->Retries =3D SD_MMC_TRB_RETRIES; + Trb->PioModeTransferCompleted =3D FALSE; + Trb->PioBlockIndex =3D 0; Trb->Private =3D Private; =20 if ((Packet->InTransferLength !=3D 0) && (Packet->InDataBuffer !=3D NULL= )) { @@ -2444,6 +2448,104 @@ SdMmcCheckCommandComplete ( return EFI_NOT_READY; } =20 +/** + Transfers data from card using PIO method. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. + @param[in] IntStatus Snapshot of the normal interrupt status register. + + @retval EFI_SUCCESS PIO transfer completed successfully. + @retval EFI_NOT_READY PIO transfer completion still pending. + @retval Others PIO transfer failed to complete. +**/ +EFI_STATUS +SdMmcTransferDataWithPio ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN SD_MMC_HC_TRB *Trb, + IN UINT16 IntStatus + ) +{ + EFI_STATUS Status; + UINT16 Data16; + UINT32 BlockCount; + EFI_PCI_IO_PROTOCOL_WIDTH Width; + UINTN Count; + + BlockCount =3D (Trb->DataLen / Trb->BlockSize); + if (Trb->DataLen % Trb->BlockSize !=3D 0) { + BlockCount +=3D 1; + } + + if (Trb->PioBlockIndex >=3D BlockCount) { + return EFI_SUCCESS; + } + + switch (Trb->BlockSize % sizeof (UINT32)) { + case 0: + Width =3D EfiPciIoWidthFifoUint32; + Count =3D Trb->BlockSize / sizeof (UINT32); + break; + case 2: + Width =3D EfiPciIoWidthFifoUint16; + Count =3D Trb->BlockSize / sizeof (UINT16); + break; + case 1: + case 3: + default: + Width =3D EfiPciIoWidthFifoUint8; + Count =3D Trb->BlockSize; + break; + } + + if (Trb->Read) { + if ((IntStatus & BIT5) =3D=3D 0) { + return EFI_NOT_READY; + } + Data16 =3D BIT5; + SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE= , sizeof (Data16), &Data16); + + Status =3D Private->PciIo->Mem.Read ( + Private->PciIo, + Width, + Trb->Slot, + SD_MMC_HC_BUF_DAT_PORT, + Count, + (VOID*)((UINT8*)Trb->Data + (Trb->BlockSize * Trb->PioBlock= Index)) + ); + if (EFI_ERROR (Status)) { + return Status; + } + Trb->PioBlockIndex++; + } else { + if ((IntStatus & BIT4) =3D=3D 0) { + return EFI_NOT_READY; + } + Data16 =3D BIT4; + SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE= , sizeof (Data16), &Data16); + + Status =3D Private->PciIo->Mem.Write ( + Private->PciIo, + Width, + Trb->Slot, + SD_MMC_HC_BUF_DAT_PORT, + Count, + (VOID*)((UINT8*)Trb->Data + (Trb->BlockSize * Trb->PioBlock= Index)) + ); + if (EFI_ERROR (Status)) { + return Status; + } + Trb->PioBlockIndex++; + } + + if (Trb->PioBlockIndex >=3D BlockCount) { + Trb->PioModeTransferCompleted =3D TRUE; + return EFI_SUCCESS; + } else { + return EFI_NOT_READY; + } +} + /** Update the SDMA address on the SDMA buffer boundary interrupt. =20 @@ -2528,6 +2630,13 @@ SdMmcCheckDataTransfer ( return Status; } =20 + if (Trb->Mode =3D=3D SdMmcPioMode && !Trb->PioModeTransferCompleted) { + Status =3D SdMmcTransferDataWithPio (Private, Trb, IntStatus); + if (EFI_ERROR (Status)) { + return Status; + } + } + if ((Trb->Mode =3D=3D SdMmcSdmaMode) && ((IntStatus & BIT3) !=3D 0)) { Data16 =3D BIT3; Status =3D SdMmcHcRwMmio ( @@ -2570,7 +2679,6 @@ SdMmcCheckTrbResult ( EFI_STATUS Status; EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet; UINT16 IntStatus; - UINT32 PioLength; =20 Packet =3D Trb->Packet; // @@ -2606,26 +2714,8 @@ SdMmcCheckTrbResult ( (Packet->SdMmcCmdBlk->CommandIndex =3D=3D EMMC_SEND_TUNING_BLOCK)) = || ((Private->Slot[Trb->Slot].CardType =3D=3D SdCardType) && (Packet->SdMmcCmdBlk->CommandIndex =3D=3D SD_SEND_TUNING_BLOCK))) { - // - // When performing tuning procedure (Execute Tuning is set to 1) throu= gh PIO mode, - // wait Buffer Read Ready bit of Normal Interrupt Status Register to b= e 1. - // Refer to SD Host Controller Simplified Specification 3.0 figure 2-2= 9 for details. - // - if ((IntStatus & BIT5) =3D=3D BIT5) { - // - // Clear Buffer Read Ready interrupt at first. - // - IntStatus =3D BIT5; - SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FAL= SE, sizeof (IntStatus), &IntStatus); - // - // Read data out from Buffer Port register - // - for (PioLength =3D 0; PioLength < Trb->DataLen; PioLength +=3D 4) { - SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_BUF_DAT_PORT, = TRUE, 4, (UINT8*)Trb->Data + PioLength); - } - Status =3D EFI_SUCCESS; - goto Done; - } + Status =3D SdMmcTransferDataWithPio (Private, Trb, IntStatus); + goto Done; } =20 if (!Trb->CommandComplete) { --=20 2.14.1.windows.1 -------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. 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