From nobody Wed May 1 10:11:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54644+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54644+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1582128337; cv=none; d=zohomail.com; s=zohoarc; b=S7/bTlp1I4aqLZaZO4GdKESFTJNEUUbE7MXDir+9VIO/L6isVwFiZMDokODOLz/RoNgP6oEMkZdnpqFjHzXnopkry1GqW3lA/Df9HW4F4pDqc39QUI1/dwbkh8ChwyWE+17Y2tKXRJII69eMijQ5Cdqiqtu6iKyNQOdoKyXMLqQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582128337; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=gQBCa73nhK1T8zccwLw+sbpCjxNsyRXGabwBGyxjuzI=; b=LLcj5WeslPBcWQpRgHj4MR7Z5/H22rd1iYZQsVOy4cG9Nb+12Fcj/vL44hbVqb59zL1NFo+pJyDbxpPmlYX1XiwvWydfkq9tx8kD0bnji+aoXAYwg3zBdEKHJpvrfnHfoN2TzCTy890i+G6exb2LfwPnlfRMm2Kp0BjRNNfWb10= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54644+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582128337663449.78484312120383; Wed, 19 Feb 2020 08:05:37 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 2kxPYY1788612xVuJ1mFdTbV; Wed, 19 Feb 2020 08:05:37 -0800 X-Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mx.groups.io with SMTP id smtpd.web10.14243.1582128336508962021 for ; Wed, 19 Feb 2020 08:05:36 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Feb 2020 08:05:34 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,461,1574150400"; d="scan'208";a="235933142" X-Received: from gklab-27-32.ger.corp.intel.com ([10.102.28.45]) by orsmga003.jf.intel.com with ESMTP; 19 Feb 2020 08:05:32 -0800 From: "Albecki, Mateusz" To: devel@edk2.groups.io Cc: Mateusz Albecki , Hao A Wu , Marcin Wojtas , Zhichao Gao , Liming Gao Subject: [edk2-devel] [PATCHv2 1/4] MdeModulePkg/SdMmcPciHcDxe: Enhance driver traces Date: Wed, 19 Feb 2020 17:05:05 +0100 Message-Id: <20200219160508.5856-2-mateusz.albecki@intel.com> In-Reply-To: <20200219160508.5856-1-mateusz.albecki@intel.com> References: <20200219160508.5856-1-mateusz.albecki@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mateusz.albecki@intel.com X-Gm-Message-State: kORNo9WZ92N2PEW0hfFsCRrvx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582128337; bh=mvrPudIkwnzC9lmiUMvTmjdJypKZk0/oDgSO0AUjqOo=; h=Cc:Date:From:Reply-To:Subject:To; b=KZclltptvWpAF7u7+E6nJDTS4ayGuq7siYObSk9xCWjVfjkYkouee88jor5lm/+mRv8 1glXo0i5Rjuy7sxOxSmhxIMaUBfHVzr5XKnJCtKMUKO3cIVtiS3jbw/Stwa4j7rWSo56g K2gFefb0x22RXXfcKeNLjsWRJ4GeWI/kAyc= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" To allow for easier debug of failing commands we have added a capability to print TRB and command packet when we start execution of the TRB(on DEBUG_VERBOSE level) and when the TRB failed to execute correctly(on DEBUG_ERROR level). Additionally we will also print error interrupt status and interrupt status register on failed SD command. Cc: Hao A Wu Cc: Marcin Wojtas Cc: Zhichao Gao Cc: Liming Gao Signed-off-by: Mateusz Albecki --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 87 ++++++++++++++++++++= ++++ 1 file changed, 87 insertions(+) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePk= g/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index b05c818462..9bf9963848 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -1643,6 +1643,82 @@ BuildAdmaDescTable ( return EFI_SUCCESS; } =20 +/** + Prints the contents of the command packet to the debug port. + + @param[in] DebugLevel Debug level at which the packet should be printed. + @param[in] Packet Pointer to packet to print. +**/ +VOID +SdMmcPrintPacket ( + IN UINT32 DebugLevel, + IN EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet + ) +{ + if (Packet =3D=3D NULL) { + return; + } + + DEBUG ((DebugLevel, "Printing EFI_SD_MMC_PASS_THRU_COMMAND_PACKET\n")); + if (Packet->SdMmcCmdBlk !=3D NULL) { + DEBUG ((DebugLevel, "Command index: %d, argument: %X\n", Packet->SdMmc= CmdBlk->CommandIndex, Packet->SdMmcCmdBlk->CommandArgument)); + DEBUG ((DebugLevel, "Command type: %d, response type: %d\n", Packet->S= dMmcCmdBlk->CommandType, Packet->SdMmcCmdBlk->ResponseType)); + } + if (Packet->SdMmcStatusBlk !=3D NULL) { + DEBUG ((DebugLevel, "Response 0: %X, 1: %X, 2: %X, 3: %X\n", + Packet->SdMmcStatusBlk->Resp0, + Packet->SdMmcStatusBlk->Resp1, + Packet->SdMmcStatusBlk->Resp2, + Packet->SdMmcStatusBlk->Resp3 + )); + } + DEBUG ((DebugLevel, "Timeout: %ld\n", Packet->Timeout)); + DEBUG ((DebugLevel, "InDataBuffer: %p\n", Packet->InDataBuffer)); + DEBUG ((DebugLevel, "OutDataBuffer: %p\n", Packet->OutDataBuffer)); + DEBUG ((DebugLevel, "InTransferLength: %d\n", Packet->InTransferLength)); + DEBUG ((DebugLevel, "OutTransferLength: %d\n", Packet->OutTransferLength= )); + DEBUG ((DebugLevel, "TransactionStatus: %r\n", Packet->TransactionStatus= )); +} + +/** + Prints the contents of the TRB to the debug port. + + @param[in] DebugLevel Debug level at which the TRB should be printed. + @param[in] Trb Pointer to the TRB structure. +**/ +VOID +SdMmcPrintTrb ( + IN UINT32 DebugLevel, + IN SD_MMC_HC_TRB *Trb + ) +{ + if (Trb =3D=3D NULL) { + return; + } + + DEBUG ((DebugLevel, "Printing SD_MMC_HC_TRB\n")); + DEBUG ((DebugLevel, "Slot: %d\n", Trb->Slot)); + DEBUG ((DebugLevel, "BlockSize: %d\n", Trb->BlockSize)); + DEBUG ((DebugLevel, "Data: %p\n", Trb->Data)); + DEBUG ((DebugLevel, "DataLen: %d\n", Trb->DataLen)); + DEBUG ((DebugLevel, "Read: %d\n", Trb->Read)); + DEBUG ((DebugLevel, "DataPhy: %lX\n", Trb->DataPhy)); + DEBUG ((DebugLevel, "DataMap: %p\n", Trb->DataMap)); + DEBUG ((DebugLevel, "Mode: %d\n", Trb->Mode)); + DEBUG ((DebugLevel, "AdmaLengthMode: %d\n", Trb->AdmaLengthMode)); + DEBUG ((DebugLevel, "Event: %p\n", Trb->Event)); + DEBUG ((DebugLevel, "Started: %d\n", Trb->Started)); + DEBUG ((DebugLevel, "Timeout: %ld\n", Trb->Timeout)); + DEBUG ((DebugLevel, "Retries: %d\n", Trb->Retries)); + DEBUG ((DebugLevel, "Adma32Desc: %p\n", Trb->Adma32Desc)); + DEBUG ((DebugLevel, "Adma64V3Desc: %p\n", Trb->Adma64V3Desc)); + DEBUG ((DebugLevel, "Adma64V4Desc: %p\n", Trb->Adma64V4Desc)); + DEBUG ((DebugLevel, "AdmaMap: %p\n", Trb->AdmaMap)); + DEBUG ((DebugLevel, "AdmaPages: %X\n", Trb->AdmaPages)); + + SdMmcPrintPacket (DebugLevel, Trb->Packet); +} + /** Create a new TRB for the SD/MMC cmd request. =20 @@ -2235,6 +2311,10 @@ SdMmcCheckAndRecoverErrors ( return Status; } =20 + DEBUG ((DEBUG_ERROR, "Error reported by SDHCI\n")); + DEBUG ((DEBUG_ERROR, "Interrupt status =3D %X\n", IntStatus)); + DEBUG ((DEBUG_ERROR, "Error interrupt status =3D %X\n", ErrIntStatus)); + // // If the data timeout error is reported // but data transfer is signaled as completed we @@ -2438,6 +2518,13 @@ Done: =20 if (Status !=3D EFI_NOT_READY) { SdMmcHcLedOnOff (Private->PciIo, Trb->Slot, FALSE); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "TRB failed with %r\n", Status)); + SdMmcPrintTrb (DEBUG_ERROR, Trb); + } else { + DEBUG ((DEBUG_VERBOSE, "TRB success\n")); + SdMmcPrintTrb (DEBUG_VERBOSE, Trb); + } } =20 return Status; --=20 2.14.1.windows.1 -------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. 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View/Reply Online (#54644): https://edk2.groups.io/g/devel/message/54644 Mute This Topic: https://groups.io/mt/71399255/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Wed May 1 10:11:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54645+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54645+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1582128338; cv=none; d=zohomail.com; s=zohoarc; b=DXU+greSQfTlJwidq+kDL9lshVdK/G2Bg0NrSoBT6pYXU4uSndX2Vkivgd6RDOYS0eiZuBF0PLQdXSJZowcgF8hxkEKeEYV9UIxMJnIBDc713PudIEmSZMNyfmZHKyCBfvYDchTmVtd7Cqi2RQnw/SP1NjGQfnVm/bUEY91qU/E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582128338; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=BslGymkJ7q8mf7FFgGls+93+sJfv73Dbio1UJRoty3s=; b=lmjSKz8+DIHLfXW+4mmCXiJFj+VH6kKLVDDdaq6fujAQxyRP15d3Cep/a+Q7qk7pfDfkZnbpySd2OZKzCKK/xJ+p2cXVNaCjnTg0GMv6XG7YhxlbjrhKUKdi10RWBU4WrQTyGe6s3HVzHIyhK1YlHaVH5KfCKdLcVgmTiBG8D0o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54645+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582128338878357.78862203294716; Wed, 19 Feb 2020 08:05:38 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id p9o4YY1788612xeG9eXyVxrr; Wed, 19 Feb 2020 08:05:38 -0800 X-Received: from mga07.intel.com (mga07.intel.com []) by mx.groups.io with SMTP id smtpd.web10.14243.1582128336508962021 for ; Wed, 19 Feb 2020 08:05:37 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Feb 2020 08:05:37 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,461,1574150400"; d="scan'208";a="235933164" X-Received: from gklab-27-32.ger.corp.intel.com ([10.102.28.45]) by orsmga003.jf.intel.com with ESMTP; 19 Feb 2020 08:05:35 -0800 From: "Albecki, Mateusz" To: devel@edk2.groups.io Cc: Mateusz Albecki , Hao A Wu , Marcin Wojtas , Zhichao Gao , Liming Gao Subject: [edk2-devel] [PATCHv2 2/4] MdeModulePkg/SdMmcPciHcDxe: Read response on command completion Date: Wed, 19 Feb 2020 17:05:06 +0100 Message-Id: <20200219160508.5856-3-mateusz.albecki@intel.com> In-Reply-To: <20200219160508.5856-1-mateusz.albecki@intel.com> References: <20200219160508.5856-1-mateusz.albecki@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mateusz.albecki@intel.com X-Gm-Message-State: 14f7DfjbfQZk4bsKHGvUvJsMx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582128338; bh=6rA1AVhV8AXmg31QJgvDmI0Snk/t3YajjNYbB2FWiSM=; h=Cc:Date:From:Reply-To:Subject:To; b=D7MAsgo4RByXBud0CAhQ9korrDml/IiSfb6yXmpQFGBUwbr5imcZUow0DyKhP+mvsgP qTyalhs36DinKGYEfnm1yx3Vk5hgWpwju/y61JnNcHfhjsIznkH9aFF62YsfJLt+Q6UEx /QIpKgn87M+cOor8CqxJ90gNYhCsWLdBync= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" SdMmcPciHcDxe driver used to read response only after command and data transfer completed. According to SDHCI specification response data is ready after the command complete status is set by the host controller. Getting the response data early will help debugging the cases when command completed but data transfer timed out. Cc: Hao A Wu Cc: Marcin Wojtas Cc: Zhichao Gao Cc: Liming Gao Signed-off-by: Mateusz Albecki --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 1 + MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 201 +++++++++++++++--= ---- 2 files changed, 144 insertions(+), 58 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h b/MdeModule= Pkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h index 5bc3577ba2..15b7d12596 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h @@ -153,6 +153,7 @@ typedef struct { =20 EFI_EVENT Event; BOOLEAN Started; + BOOLEAN CommandComplete; UINT64 Timeout; UINT32 Retries; =20 diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePk= g/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index 9bf9963848..38a8099426 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -1708,6 +1708,7 @@ SdMmcPrintTrb ( DEBUG ((DebugLevel, "AdmaLengthMode: %d\n", Trb->AdmaLengthMode)); DEBUG ((DebugLevel, "Event: %p\n", Trb->Event)); DEBUG ((DebugLevel, "Started: %d\n", Trb->Started)); + DEBUG ((DebugLevel, "CommandComplete: %d\n", Trb->CommandComplete)); DEBUG ((DebugLevel, "Timeout: %ld\n", Trb->Timeout)); DEBUG ((DebugLevel, "Retries: %d\n", Trb->Retries)); DEBUG ((DebugLevel, "Adma32Desc: %p\n", Trb->Adma32Desc)); @@ -1758,6 +1759,7 @@ SdMmcCreateTrb ( Trb->Packet =3D Packet; Trb->Event =3D Event; Trb->Started =3D FALSE; + Trb->CommandComplete =3D FALSE; Trb->Timeout =3D Packet->Timeout; Trb->Retries =3D SD_MMC_TRB_RETRIES; Trb->Private =3D Private; @@ -2349,6 +2351,99 @@ SdMmcCheckAndRecoverErrors ( return ErrorStatus; } =20 +/** + Reads the response data into the TRB buffer. + This function assumes that caller made sure that + command has completed. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. + + @retval EFI_SUCCESS Response read successfully. + @retval Others Failed to get response. +**/ +EFI_STATUS +SdMmcGetResponse ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN SD_MMC_HC_TRB *Trb + ) +{ + EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet; + UINT8 Index; + UINT32 Response[4]; + EFI_STATUS Status; + + Packet =3D Trb->Packet; + + if (Packet->SdMmcCmdBlk->CommandType =3D=3D SdMmcCommandTypeBc) { + return EFI_SUCCESS; + } + + for (Index =3D 0; Index < 4; Index++) { + Status =3D SdMmcHcRwMmio ( + Private->PciIo, + Trb->Slot, + SD_MMC_HC_RESPONSE + Index * 4, + TRUE, + sizeof (UINT32), + &Response[Index] + ); + if (EFI_ERROR (Status)) { + return Status; + } + } + CopyMem (Packet->SdMmcStatusBlk, Response, sizeof (Response)); + + return EFI_SUCCESS; +} + +/** + Checks if the command completed. If the command + completed it gets the response and records the + command completion in the TRB. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. + @param[in] IntStatus Snapshot of the normal interrupt status register. + + @retval EFI_SUCCESS Command completed successfully. + @retval EFI_NOT_READY Command completion still pending. + @retval Others Command failed to complete. +**/ +EFI_STATUS +SdMmcCheckCommandComplete ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN SD_MMC_HC_TRB *Trb, + IN UINT16 IntStatus + ) +{ + UINT16 Data16; + EFI_STATUS Status; + + if ((IntStatus & BIT0) !=3D 0) { + Data16 =3D BIT0; + Status =3D SdMmcHcRwMmio ( + Private->PciIo, + Trb->Slot, + SD_MMC_HC_NOR_INT_STS, + FALSE, + sizeof (Data16), + &Data16 + ); + if (EFI_ERROR (Status)) { + return Status; + } + Status =3D SdMmcGetResponse (Private, Trb); + if (EFI_ERROR (Status)) { + return Status; + } + Trb->CommandComplete =3D TRUE; + return EFI_SUCCESS; + } + + return EFI_NOT_READY; +} + /** Check the TRB execution result. =20 @@ -2369,9 +2464,7 @@ SdMmcCheckTrbResult ( EFI_STATUS Status; EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet; UINT16 IntStatus; - UINT32 Response[4]; UINT64 SdmaAddr; - UINT8 Index; UINT32 PioLength; =20 Packet =3D Trb->Packet; @@ -2399,6 +2492,54 @@ SdMmcCheckTrbResult ( goto Done; } =20 + // + // Tuning commands are the only ones that do not generate command + // complete interrupt. Process them here before entering the code + // that waits for command completion. + // + if (((Private->Slot[Trb->Slot].CardType =3D=3D EmmcCardType) && + (Packet->SdMmcCmdBlk->CommandIndex =3D=3D EMMC_SEND_TUNING_BLOCK)) = || + ((Private->Slot[Trb->Slot].CardType =3D=3D SdCardType) && + (Packet->SdMmcCmdBlk->CommandIndex =3D=3D SD_SEND_TUNING_BLOCK))) { + // + // When performing tuning procedure (Execute Tuning is set to 1) throu= gh PIO mode, + // wait Buffer Read Ready bit of Normal Interrupt Status Register to b= e 1. + // Refer to SD Host Controller Simplified Specification 3.0 figure 2-2= 9 for details. + // + if ((IntStatus & BIT5) =3D=3D BIT5) { + // + // Clear Buffer Read Ready interrupt at first. + // + IntStatus =3D BIT5; + SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FAL= SE, sizeof (IntStatus), &IntStatus); + // + // Read data out from Buffer Port register + // + for (PioLength =3D 0; PioLength < Trb->DataLen; PioLength +=3D 4) { + SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_BUF_DAT_PORT, = TRUE, 4, (UINT8*)Trb->Data + PioLength); + } + Status =3D EFI_SUCCESS; + goto Done; + } + } + + if (!Trb->CommandComplete) { + Status =3D SdMmcCheckCommandComplete (Private, Trb, IntStatus); + if (EFI_ERROR (Status)) { + goto Done; + } else { + // + // If the command doesn't require data transfer skip the transfer + // complete checking. + // + if ((Packet->SdMmcCmdBlk->CommandType !=3D SdMmcCommandTypeAdtc) && + (Packet->SdMmcCmdBlk->ResponseType !=3D SdMmcResponseTypeR1b) && + (Packet->SdMmcCmdBlk->ResponseType !=3D SdMmcResponseTypeR5b)) { + goto Done; + } + } + } + // // Check Transfer Complete bit is set or not. // @@ -2456,65 +2597,9 @@ SdMmcCheckTrbResult ( Trb->DataPhy =3D (UINT64)(UINTN)SdmaAddr; } =20 - if ((Packet->SdMmcCmdBlk->CommandType !=3D SdMmcCommandTypeAdtc) && - (Packet->SdMmcCmdBlk->ResponseType !=3D SdMmcResponseTypeR1b) && - (Packet->SdMmcCmdBlk->ResponseType !=3D SdMmcResponseTypeR5b)) { - if ((IntStatus & BIT0) =3D=3D BIT0) { - Status =3D EFI_SUCCESS; - goto Done; - } - } - - if (((Private->Slot[Trb->Slot].CardType =3D=3D EmmcCardType) && - (Packet->SdMmcCmdBlk->CommandIndex =3D=3D EMMC_SEND_TUNING_BLOCK)) = || - ((Private->Slot[Trb->Slot].CardType =3D=3D SdCardType) && - (Packet->SdMmcCmdBlk->CommandIndex =3D=3D SD_SEND_TUNING_BLOCK))) { - // - // When performing tuning procedure (Execute Tuning is set to 1) throu= gh PIO mode, - // wait Buffer Read Ready bit of Normal Interrupt Status Register to b= e 1. - // Refer to SD Host Controller Simplified Specification 3.0 figure 2-2= 9 for details. - // - if ((IntStatus & BIT5) =3D=3D BIT5) { - // - // Clear Buffer Read Ready interrupt at first. - // - IntStatus =3D BIT5; - SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FAL= SE, sizeof (IntStatus), &IntStatus); - // - // Read data out from Buffer Port register - // - for (PioLength =3D 0; PioLength < Trb->DataLen; PioLength +=3D 4) { - SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_BUF_DAT_PORT, = TRUE, 4, (UINT8*)Trb->Data + PioLength); - } - Status =3D EFI_SUCCESS; - goto Done; - } - } =20 Status =3D EFI_NOT_READY; Done: - // - // Get response data when the cmd is executed successfully. - // - if (!EFI_ERROR (Status)) { - if (Packet->SdMmcCmdBlk->CommandType !=3D SdMmcCommandTypeBc) { - for (Index =3D 0; Index < 4; Index++) { - Status =3D SdMmcHcRwMmio ( - Private->PciIo, - Trb->Slot, - SD_MMC_HC_RESPONSE + Index * 4, - TRUE, - sizeof (UINT32), - &Response[Index] - ); - if (EFI_ERROR (Status)) { - SdMmcHcLedOnOff (Private->PciIo, Trb->Slot, FALSE); - return Status; - } - } - CopyMem (Packet->SdMmcStatusBlk, Response, sizeof (Response)); - } - } =20 if (Status !=3D EFI_NOT_READY) { SdMmcHcLedOnOff (Private->PciIo, Trb->Slot, FALSE); --=20 2.14.1.windows.1 -------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. 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View/Reply Online (#54645): https://edk2.groups.io/g/devel/message/54645 Mute This Topic: https://groups.io/mt/71399256/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Wed May 1 10:11:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54646+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54646+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1582128341; cv=none; d=zohomail.com; s=zohoarc; b=CkX2XixWWKZL2yUYF8KkVRMQugEOpnP+qfZM7FdaaMEvov0f28rqBYc8XMc/AjWmGn6mBR7Q1ga10SoYoy5fx4udyoZTyxvl1J8YmvePEtoLR2xumB+fIde5NS9ahi7YEjT6GYzi3XU3SVDQ3l2HhEd7tCJ0wmneV7XChZxEpvI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582128341; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=6TYleXUbHf1E3qfCpT19Ku198HHxZiXB3GcORZ62iL4=; b=QeJesyfiESnMLRQ0DD97+L3pZQNsGpAZreQmrnmYh46i8D0r+u3MWEgFacjbXSf0t0ENWP8+JYfCpHZM9QKMsvfrcYSI2bwYD5ieb5tVJ4ZmIbKTCSUhA2xCizeK3nvkmK19SvLJVxjY8X3cqJq/xQBG/uwhCFbhC10IygZgB3c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54646+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582128341709105.62739243082319; Wed, 19 Feb 2020 08:05:41 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id T6SnYY1788612xZFhpMvV9Ie; Wed, 19 Feb 2020 08:05:41 -0800 X-Received: from mga07.intel.com (mga07.intel.com []) by mx.groups.io with SMTP id smtpd.web10.14243.1582128336508962021 for ; Wed, 19 Feb 2020 08:05:40 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Feb 2020 08:05:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,461,1574150400"; d="scan'208";a="235933173" X-Received: from gklab-27-32.ger.corp.intel.com ([10.102.28.45]) by orsmga003.jf.intel.com with ESMTP; 19 Feb 2020 08:05:38 -0800 From: "Albecki, Mateusz" To: devel@edk2.groups.io Cc: Mateusz Albecki , Hao A Wu , Marcin Wojtas , Zhichao Gao , Liming Gao Subject: [edk2-devel] [PATCHv2 3/4] MdeModulePkg/SdMmcPciHcDxe: Refactor data transfer completion Date: Wed, 19 Feb 2020 17:05:07 +0100 Message-Id: <20200219160508.5856-4-mateusz.albecki@intel.com> In-Reply-To: <20200219160508.5856-1-mateusz.albecki@intel.com> References: <20200219160508.5856-1-mateusz.albecki@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mateusz.albecki@intel.com X-Gm-Message-State: erdGPIz99O6tFxtGgfU36vzjx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582128341; bh=Vn5JETN/nth8HvgRMvmb4jeRuN264QwuSjv7Yy7SMFs=; h=Cc:Date:From:Reply-To:Subject:To; b=t7xNmW7fehGd3jFtMELuAMM/1n57CiGrZGHxyo9JoDMVJE+TLEZxiMWLa7a+BLJHLsf 25LKJNnkaytyJCXGXyLEE6NAirBqu+68BW5FLzU1cRfNnfMILgrJSyXHFopKWYNxIV9lU XsWCg3X5HUIZjKzLF6vriZ+9KrvwOddhxf8= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This patch refactors the way in which the driver will check the data transfer completion. Data transfer related functionalities have been moved to separate function. Cc: Hao A Wu Cc: Marcin Wojtas Cc: Zhichao Gao Cc: Liming Gao Signed-off-by: Mateusz Albecki --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 181 ++++++++++++++-----= ---- 1 file changed, 112 insertions(+), 69 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePk= g/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index 38a8099426..5bdc200827 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -2444,6 +2444,112 @@ SdMmcCheckCommandComplete ( return EFI_NOT_READY; } =20 +/** + Update the SDMA address on the SDMA buffer boundary interrupt. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. + + @retval EFI_SUCCESS Updated SDMA buffer address. + @retval Others Failed to update SDMA buffer address. +**/ +EFI_STATUS +SdMmcUpdateSdmaAddress ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN SD_MMC_HC_TRB *Trb + ) +{ + UINT64 SdmaAddr; + EFI_STATUS Status; + + SdmaAddr =3D SD_MMC_SDMA_ROUND_UP ((UINTN)Trb->DataPhy, SD_MMC_SDMA_BOUN= DARY); + + if (Private->ControllerVersion[Trb->Slot] >=3D SD_MMC_HC_CTRL_VER_400) { + Status =3D SdMmcHcRwMmio ( + Private->PciIo, + Trb->Slot, + SD_MMC_HC_ADMA_SYS_ADDR, + FALSE, + sizeof (UINT64), + &SdmaAddr + ); + } else { + Status =3D SdMmcHcRwMmio ( + Private->PciIo, + Trb->Slot, + SD_MMC_HC_SDMA_ADDR, + FALSE, + sizeof (UINT32), + &SdmaAddr + ); + } + + if (EFI_ERROR (Status)) { + return Status; + } + + Trb->DataPhy =3D (UINT64)(UINTN)SdmaAddr; + return EFI_SUCCESS; +} + +/** + Checks if the data transfer completed and performs any actions + neccessary to continue the data transfer such as SDMA system + address fixup or PIO data transfer. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. + @param[in] IntStatus Snapshot of the normal interrupt status register. + + @retval EFI_SUCCESS Data transfer completed successfully. + @retval EFI_NOT_READY Data transfer completion still pending. + @retval Others Data transfer failed to complete. +**/ +EFI_STATUS +SdMmcCheckDataTransfer ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN SD_MMC_HC_TRB *Trb, + IN UINT16 IntStatus + ) +{ + UINT16 Data16; + EFI_STATUS Status; + + if ((IntStatus & BIT1) !=3D 0) { + Data16 =3D BIT1; + Status =3D SdMmcHcRwMmio ( + Private->PciIo, + Trb->Slot, + SD_MMC_HC_NOR_INT_STS, + FALSE, + sizeof (Data16), + &Data16 + ); + return Status; + } + + if ((Trb->Mode =3D=3D SdMmcSdmaMode) && ((IntStatus & BIT3) !=3D 0)) { + Data16 =3D BIT3; + Status =3D SdMmcHcRwMmio ( + Private->PciIo, + Trb->Slot, + SD_MMC_HC_NOR_INT_STS, + FALSE, + sizeof (Data16), + &Data16 + ); + if (EFI_ERROR (Status)) { + return Status; + } + Status =3D SdMmcUpdateSdmaAddress (Private, Trb); + if (EFI_ERROR (Status)) { + return Status; + } + } + + return EFI_NOT_READY; +} + /** Check the TRB execution result. =20 @@ -2464,7 +2570,6 @@ SdMmcCheckTrbResult ( EFI_STATUS Status; EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet; UINT16 IntStatus; - UINT64 SdmaAddr; UINT32 PioLength; =20 Packet =3D Trb->Packet; @@ -2527,80 +2632,18 @@ SdMmcCheckTrbResult ( Status =3D SdMmcCheckCommandComplete (Private, Trb, IntStatus); if (EFI_ERROR (Status)) { goto Done; - } else { - // - // If the command doesn't require data transfer skip the transfer - // complete checking. - // - if ((Packet->SdMmcCmdBlk->CommandType !=3D SdMmcCommandTypeAdtc) && - (Packet->SdMmcCmdBlk->ResponseType !=3D SdMmcResponseTypeR1b) && - (Packet->SdMmcCmdBlk->ResponseType !=3D SdMmcResponseTypeR5b)) { - goto Done; - } } } =20 - // - // Check Transfer Complete bit is set or not. - // - if ((IntStatus & BIT1) =3D=3D BIT1) { - goto Done; - } - - // - // Check if DMA interrupt is signalled for the SDMA transfer. - // - if ((Trb->Mode =3D=3D SdMmcSdmaMode) && ((IntStatus & BIT3) =3D=3D BIT3)= ) { - // - // Clear DMA interrupt bit. - // - IntStatus =3D BIT3; - Status =3D SdMmcHcRwMmio ( - Private->PciIo, - Trb->Slot, - SD_MMC_HC_NOR_INT_STS, - FALSE, - sizeof (IntStatus), - &IntStatus - ); - if (EFI_ERROR (Status)) { - goto Done; - } - // - // Update SDMA Address register. - // - SdmaAddr =3D SD_MMC_SDMA_ROUND_UP ((UINTN)Trb->DataPhy, SD_MMC_SDMA_BO= UNDARY); - - if (Private->ControllerVersion[Trb->Slot] >=3D SD_MMC_HC_CTRL_VER_400)= { - Status =3D SdMmcHcRwMmio ( - Private->PciIo, - Trb->Slot, - SD_MMC_HC_ADMA_SYS_ADDR, - FALSE, - sizeof (UINT64), - &SdmaAddr - ); - } else { - Status =3D SdMmcHcRwMmio ( - Private->PciIo, - Trb->Slot, - SD_MMC_HC_SDMA_ADDR, - FALSE, - sizeof (UINT32), - &SdmaAddr - ); - } - - if (EFI_ERROR (Status)) { - goto Done; - } - Trb->DataPhy =3D (UINT64)(UINTN)SdmaAddr; + if (Packet->SdMmcCmdBlk->CommandType =3D=3D SdMmcCommandTypeAdtc || + Packet->SdMmcCmdBlk->ResponseType =3D=3D SdMmcResponseTypeR1b || + Packet->SdMmcCmdBlk->ResponseType =3D=3D SdMmcResponseTypeR5b) { + Status =3D SdMmcCheckDataTransfer (Private, Trb, IntStatus); + } else { + Status =3D EFI_SUCCESS; } =20 - - Status =3D EFI_NOT_READY; Done: - if (Status !=3D EFI_NOT_READY) { SdMmcHcLedOnOff (Private->PciIo, Trb->Slot, FALSE); if (EFI_ERROR (Status)) { --=20 2.14.1.windows.1 -------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydz= ial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-31= 6 | Kapital zakladowy 200.000 PLN. Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata= i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wi= adomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiek= olwiek przegladanie lub rozpowszechnianie jest zabronione. This e-mail and any attachments may contain confidential material for the s= ole use of the intended recipient(s). If you are not the intended recipient= , please contact the sender and delete all copies; any review or distributi= on by others is strictly prohibited. -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54646): https://edk2.groups.io/g/devel/message/54646 Mute This Topic: https://groups.io/mt/71399257/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Wed May 1 10:11:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+54647+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54647+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1582128353; cv=none; d=zohomail.com; s=zohoarc; b=HdGj6Wk+dcx1hVIU/k1Pk7mxnPIwSyjsoyeSVInGE7zQ5vNq7DTX9TyMr10esbf6wfs7keRqt/nsAQVuVwnN1WEJAep+t7843Os574HGB0653QLKR6e0Pya5eH7ojCF8C2VzNW3jPbPeKjUTqe7v1GqtcG42RREVo90TW6o109s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1582128353; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=vfrQbAn1fhGiJmLXRM6UevU2wDwa53aoH31a7HW/UQ0=; b=iRKxgD0TeldnTjPpqjYJ+ImljFWjO+zHyYRsz9VC6Pfl9Z+2Wjcur2H9buv1kE3jDZ2HmU0UvDeqgLxKGvDQP3ux+0VgKbLB8Lx+fbGvZcM6HF5jUU4/zoCWWM1kvTwInWYt6KHes/b6u3cD1oJyovKOYH02yPdL2dES1s8wgkw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+54647+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1582128353344791.9774760671093; Wed, 19 Feb 2020 08:05:53 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id G0gEYY1788612xSaJYmONPza; Wed, 19 Feb 2020 08:05:52 -0800 X-Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web12.14366.1582128352271709858 for ; Wed, 19 Feb 2020 08:05:52 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Feb 2020 08:05:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,461,1574150400"; d="scan'208";a="235933205" X-Received: from gklab-27-32.ger.corp.intel.com ([10.102.28.45]) by orsmga003.jf.intel.com with ESMTP; 19 Feb 2020 08:05:48 -0800 From: "Albecki, Mateusz" To: devel@edk2.groups.io Cc: Mateusz Albecki , Hao A Wu , Marcin Wojtas , Zhichao Gao , Liming Gao Subject: [edk2-devel] [PATCHv2 4/4] MdeModulePkg/SdMmcPciHcDxe: Fix PIO transfer mode Date: Wed, 19 Feb 2020 17:05:08 +0100 Message-Id: <20200219160508.5856-5-mateusz.albecki@intel.com> In-Reply-To: <20200219160508.5856-1-mateusz.albecki@intel.com> References: <20200219160508.5856-1-mateusz.albecki@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,mateusz.albecki@intel.com X-Gm-Message-State: k240ytVuOExe3BIfagSlpm8Tx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1582128352; bh=6jWtyMzXKd+gj8zrqt7EmR1BtQlV0MAq7wyHeMSA2ro=; h=Cc:Date:From:Reply-To:Subject:To; b=fPEFxk7BpLvezDUQLTL+cP1H+IV7unuNlZQYMZ+/Oyer0rj02UsQ+ucYN1TEB/FOGVT Di+6UwUqExmSVmyDhQ5jgqBVoTklDFiRzx+3dWj80wsP4WEagEJaz+atPCPI4We0DW7Gf 8ZDTKqpbyzgG4SRozSd2aHe5WSEgaqS8gYo= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Current driver does not support PIO transfer mode for commands other then tuning. This change adds the code to transfer PIO data. Cc: Hao A Wu Cc: Marcin Wojtas Cc: Zhichao Gao Cc: Liming Gao Signed-off-by: Mateusz Albecki --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 3 + MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 132 +++++++++++++++++= ---- 2 files changed, 114 insertions(+), 21 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h b/MdeModule= Pkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h index 15b7d12596..fd89306fab 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h @@ -157,6 +157,9 @@ typedef struct { UINT64 Timeout; UINT32 Retries; =20 + BOOLEAN PioModeTransferCompleted; + UINT32 PioBlockIndex; + SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc; SD_MMC_HC_ADMA_64_V3_DESC_LINE *Adma64V3Desc; SD_MMC_HC_ADMA_64_V4_DESC_LINE *Adma64V4Desc; diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePk= g/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index 5bdc200827..73c43110f0 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -1711,6 +1711,8 @@ SdMmcPrintTrb ( DEBUG ((DebugLevel, "CommandComplete: %d\n", Trb->CommandComplete)); DEBUG ((DebugLevel, "Timeout: %ld\n", Trb->Timeout)); DEBUG ((DebugLevel, "Retries: %d\n", Trb->Retries)); + DEBUG ((DebugLevel, "PioModeTransferCompleted: %d\n", Trb->PioModeTransf= erCompleted)); + DEBUG ((DebugLevel, "PioBlockIndex: %d\n", Trb->PioBlockIndex)); DEBUG ((DebugLevel, "Adma32Desc: %p\n", Trb->Adma32Desc)); DEBUG ((DebugLevel, "Adma64V3Desc: %p\n", Trb->Adma64V3Desc)); DEBUG ((DebugLevel, "Adma64V4Desc: %p\n", Trb->Adma64V4Desc)); @@ -1762,6 +1764,8 @@ SdMmcCreateTrb ( Trb->CommandComplete =3D FALSE; Trb->Timeout =3D Packet->Timeout; Trb->Retries =3D SD_MMC_TRB_RETRIES; + Trb->PioModeTransferCompleted =3D FALSE; + Trb->PioBlockIndex =3D 0; Trb->Private =3D Private; =20 if ((Packet->InTransferLength !=3D 0) && (Packet->InDataBuffer !=3D NULL= )) { @@ -2444,6 +2448,104 @@ SdMmcCheckCommandComplete ( return EFI_NOT_READY; } =20 +/** + Transfers data from card using PIO method. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. + @param[in] IntStatus Snapshot of the normal interrupt status register. + + @retval EFI_SUCCESS PIO transfer completed successfully. + @retval EFI_NOT_READY PIO transfer completion still pending. + @retval Others PIO transfer failed to complete. +**/ +EFI_STATUS +SdMmcTransferDataWithPio ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN SD_MMC_HC_TRB *Trb, + IN UINT16 IntStatus + ) +{ + EFI_STATUS Status; + UINT16 Data16; + UINT32 BlockCount; + EFI_PCI_IO_PROTOCOL_WIDTH Width; + UINTN Count; + + BlockCount =3D (Trb->DataLen / Trb->BlockSize); + if (Trb->DataLen % Trb->BlockSize !=3D 0) { + BlockCount +=3D 1; + } + + if (Trb->PioBlockIndex >=3D BlockCount) { + return EFI_SUCCESS; + } + + switch (Trb->BlockSize % sizeof (UINT32)) { + case 0: + Width =3D EfiPciIoWidthFifoUint32; + Count =3D Trb->BlockSize / sizeof (UINT32); + break; + case 2: + Width =3D EfiPciIoWidthFifoUint16; + Count =3D Trb->BlockSize / sizeof (UINT16); + break; + case 1: + case 3: + default: + Width =3D EfiPciIoWidthFifoUint8; + Count =3D Trb->BlockSize; + break; + } + + if (Trb->Read) { + if ((IntStatus & BIT5) =3D=3D 0) { + return EFI_NOT_READY; + } + Data16 =3D BIT5; + SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE= , sizeof (Data16), &Data16); + + Status =3D Private->PciIo->Mem.Read ( + Private->PciIo, + Width, + Trb->Slot, + SD_MMC_HC_BUF_DAT_PORT, + Count, + (VOID*)((UINT8*)Trb->Data + (Trb->BlockSize * Trb->PioBlock= Index)) + ); + if (EFI_ERROR (Status)) { + return Status; + } + Trb->PioBlockIndex++; + } else { + if ((IntStatus & BIT4) =3D=3D 0) { + return EFI_NOT_READY; + } + Data16 =3D BIT4; + SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE= , sizeof (Data16), &Data16); + + Status =3D Private->PciIo->Mem.Write ( + Private->PciIo, + Width, + Trb->Slot, + SD_MMC_HC_BUF_DAT_PORT, + Count, + (VOID*)((UINT8*)Trb->Data + (Trb->BlockSize * Trb->PioBlock= Index)) + ); + if (EFI_ERROR (Status)) { + return Status; + } + Trb->PioBlockIndex++; + } + + if (Trb->PioBlockIndex >=3D BlockCount) { + Trb->PioModeTransferCompleted =3D TRUE; + return EFI_SUCCESS; + } else { + return EFI_NOT_READY; + } +} + /** Update the SDMA address on the SDMA buffer boundary interrupt. =20 @@ -2528,6 +2630,13 @@ SdMmcCheckDataTransfer ( return Status; } =20 + if (Trb->Mode =3D=3D SdMmcPioMode && !Trb->PioModeTransferCompleted) { + Status =3D SdMmcTransferDataWithPio (Private, Trb, IntStatus); + if (EFI_ERROR (Status)) { + return Status; + } + } + if ((Trb->Mode =3D=3D SdMmcSdmaMode) && ((IntStatus & BIT3) !=3D 0)) { Data16 =3D BIT3; Status =3D SdMmcHcRwMmio ( @@ -2570,7 +2679,6 @@ SdMmcCheckTrbResult ( EFI_STATUS Status; EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet; UINT16 IntStatus; - UINT32 PioLength; =20 Packet =3D Trb->Packet; // @@ -2606,26 +2714,8 @@ SdMmcCheckTrbResult ( (Packet->SdMmcCmdBlk->CommandIndex =3D=3D EMMC_SEND_TUNING_BLOCK)) = || ((Private->Slot[Trb->Slot].CardType =3D=3D SdCardType) && (Packet->SdMmcCmdBlk->CommandIndex =3D=3D SD_SEND_TUNING_BLOCK))) { - // - // When performing tuning procedure (Execute Tuning is set to 1) throu= gh PIO mode, - // wait Buffer Read Ready bit of Normal Interrupt Status Register to b= e 1. - // Refer to SD Host Controller Simplified Specification 3.0 figure 2-2= 9 for details. - // - if ((IntStatus & BIT5) =3D=3D BIT5) { - // - // Clear Buffer Read Ready interrupt at first. - // - IntStatus =3D BIT5; - SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FAL= SE, sizeof (IntStatus), &IntStatus); - // - // Read data out from Buffer Port register - // - for (PioLength =3D 0; PioLength < Trb->DataLen; PioLength +=3D 4) { - SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_BUF_DAT_PORT, = TRUE, 4, (UINT8*)Trb->Data + PioLength); - } - Status =3D EFI_SUCCESS; - goto Done; - } + Status =3D SdMmcTransferDataWithPio (Private, Trb, IntStatus); + goto Done; } =20 if (!Trb->CommandComplete) { --=20 2.14.1.windows.1 -------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydz= ial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-31= 6 | Kapital zakladowy 200.000 PLN. Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata= i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wi= adomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiek= olwiek przegladanie lub rozpowszechnianie jest zabronione. This e-mail and any attachments may contain confidential material for the s= ole use of the intended recipient(s). If you are not the intended recipient= , please contact the sender and delete all copies; any review or distributi= on by others is strictly prohibited. -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54647): https://edk2.groups.io/g/devel/message/54647 Mute This Topic: https://groups.io/mt/71399260/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-