From nobody Mon Feb 9 16:50:48 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+53926+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+53926+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1581037766716549.7422892485274; Thu, 6 Feb 2020 17:09:26 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id Vgn3YY1788612xIYBvKouj4x; Thu, 06 Feb 2020 17:09:26 -0800 X-Received: from us-smtp-delivery-1.mimecast.com (us-smtp-delivery-1.mimecast.com [207.211.31.81]) by mx.groups.io with SMTP id smtpd.web09.6498.1581037765852770861 for ; Thu, 06 Feb 2020 17:09:26 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-277-h8M1wwymMviqGkw2EigarQ-1; Thu, 06 Feb 2020 20:09:22 -0500 X-Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 9C93F1835A0E; Fri, 7 Feb 2020 01:09:21 +0000 (UTC) X-Received: from x1w.redhat.com (ovpn-204-120.brq.redhat.com [10.40.204.120]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 8A5065C1BB; Fri, 7 Feb 2020 01:09:20 +0000 (UTC) From: =?UTF-8?B?UGhpbGlwcGUgTWF0aGlldS1EYXVkw6k=?= To: devel@edk2.groups.io Cc: Laszlo Ersek , Eric Dong Subject: [edk2-devel] [PATCH v3 28/78] MdePkg/Register: Fix various typos Date: Fri, 7 Feb 2020 02:07:41 +0100 Message-Id: <20200207010831.9046-29-philmd@redhat.com> In-Reply-To: <20200207010831.9046-1-philmd@redhat.com> References: <20200207010831.9046-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-MC-Unique: h8M1wwymMviqGkw2EigarQ-1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,philmd@redhat.com X-Gm-Message-State: wt6Ntg68zs0stB3joLdtcRU3x1787277AA= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1581037766; bh=iCdrhuzY74hB+9AOtmHxrCvGaTvxLt+mX0ruH98qtng=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=YR9fNM+RI/TeMy22J90TeFHteMf647UjHiO9jSeJ1vFu/b51WB5mGs1YdkKdqyjmTkJ y3e51YDBYTywjpVQDzxFwaxXH8x0GcbbwAN/T9vmkggBE9eOij8+ZgpBH7Tz7Pkt1PV3f o4CT9Lifk/nJx1rCFTaY6LgUwNlBjdDrE5k= X-ZohoMail-DKIM: pass (identity @groups.io) From: Antoine Coeur Fix various typos in comments and documentation. Cc: Michael D Kinney Cc: Liming Gao Signed-off-by: Antoine Coeur Reviewed-by: Philippe Mathieu-Daude Reviewed-by: Michael D Kinney Reviewed-by: Liming Gao Signed-off-by: Philippe Mathieu-Daude --- MdePkg/Include/Register/Amd/Cpuid.h | 8 ++++---- MdePkg/Include/Register/Amd/Fam17Msr.h | 2 +- MdePkg/Include/Register/Amd/Msr.h | 2 +- MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h | 2 +- MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h | 2 +- MdePkg/Include/Register/Intel/StmResourceDescriptor.h | 2 +- 6 files changed, 9 insertions(+), 9 deletions(-) diff --git a/MdePkg/Include/Register/Amd/Cpuid.h b/MdePkg/Include/Register/= Amd/Cpuid.h index ad1ba4d016e0..8e91e84b767f 100644 --- a/MdePkg/Include/Register/Amd/Cpuid.h +++ b/MdePkg/Include/Register/Amd/Cpuid.h @@ -11,7 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Specification Reference: - AMD64 Architecture Programming Manaul volume 2, March 2017, Sections 15.= 34 + AMD64 Architecture Programming Manual volume 2, March 2017, Sections 15.= 34 =20 **/ =20 @@ -364,7 +364,7 @@ typedef union { /// UINT32 Page1GB:1; /// - /// [Bit 27] RDTSCP intructions. + /// [Bit 27] RDTSCP instructions. /// UINT32 RDTSCP:1; /// @@ -513,9 +513,9 @@ typedef union { =20 @retval EAX Extended APIC ID described by the type CPUID_AMD_PROCESSOR_TOPOLOGY_EAX. - @retval EBX Core Indentifiers described by the type + @retval EBX Core Identifiers described by the type CPUID_AMD_PROCESSOR_TOPOLOGY_EBX. - @retval ECX Node Indentifiers described by the type + @retval ECX Node Identifiers described by the type CPUID_AMD_PROCESSOR_TOPOLOGY_ECX. @retval EDX Reserved. **/ diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h b/MdePkg/Include/Regist= er/Amd/Fam17Msr.h index 37b935dcdb30..6ef45a9b21d3 100644 --- a/MdePkg/Include/Register/Amd/Fam17Msr.h +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h @@ -10,7 +10,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Specification Reference: - AMD64 Architecture Programming Manaul volume 2, March 2017, Sections 15.= 34 + AMD64 Architecture Programming Manual volume 2, March 2017, Sections 15.= 34 =20 **/ =20 diff --git a/MdePkg/Include/Register/Amd/Msr.h b/MdePkg/Include/Register/Am= d/Msr.h index e74de7a1df48..084eb892cdd9 100644 --- a/MdePkg/Include/Register/Amd/Msr.h +++ b/MdePkg/Include/Register/Amd/Msr.h @@ -10,7 +10,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Specification Reference: - AMD64 Architecture Programming Manaul volume 2, March 2017, Sections 15.= 34 + AMD64 Architecture Programming Manual volume 2, March 2017, Sections 15.= 34 =20 **/ =20 diff --git a/MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h b/MdePkg/I= nclude/Register/Intel/Msr/GoldmontPlusMsr.h index 2edc1363b7c4..c56d20df66a4 100644 --- a/MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h +++ b/MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h @@ -1,5 +1,5 @@ /** @file - MSR Defintions for Intel Atom processors based on the Goldmont Plus micr= oarchitecture. + MSR Definitions for Intel Atom processors based on the Goldmont Plus mic= roarchitecture. =20 Provides defines for Machine Specific Registers(MSR) indexes. Data struc= tures are provided for MSRs that contain one or more bit fields. If the MSR v= alue diff --git a/MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h b/MdePkg/Includ= e/Register/Intel/Msr/SkylakeMsr.h index 30f96f0e82fa..03cac77c19a6 100644 --- a/MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h +++ b/MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h @@ -1,5 +1,5 @@ /** @file - MSR Defintions for Intel processors based on the Skylake/Kabylake/Coffee= lake/Cannonlake microarchitecture. + MSR Definitions for Intel processors based on the Skylake/Kabylake/Coffe= elake/Cannonlake microarchitecture. =20 Provides defines for Machine Specific Registers(MSR) indexes. Data struc= tures are provided for MSRs that contain one or more bit fields. If the MSR v= alue diff --git a/MdePkg/Include/Register/Intel/StmResourceDescriptor.h b/MdePkg= /Include/Register/Intel/StmResourceDescriptor.h index da4c91d0f4b8..3e426701e83c 100644 --- a/MdePkg/Include/Register/Intel/StmResourceDescriptor.h +++ b/MdePkg/Include/Register/Intel/StmResourceDescriptor.h @@ -179,7 +179,7 @@ typedef struct { } STM_RSC_ALL_RESOURCES_DESC; =20 /** - STM Register Volation Descriptor + STM Register Violation Descriptor **/ typedef struct { STM_RSC_DESC_HEADER Hdr; --=20 2.21.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#53926): https://edk2.groups.io/g/devel/message/53926 Mute This Topic: https://groups.io/mt/71039560/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-