From nobody Tue Apr 23 17:38:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+53840+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+53840+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1580966642671600.6393087482826; Wed, 5 Feb 2020 21:24:02 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id X21sYY1788612xmI9aowuye4; Wed, 05 Feb 2020 21:24:02 -0800 X-Received: from mga11.intel.com (mga11.intel.com []) by mx.groups.io with SMTP id smtpd.web09.7898.1580966640586255178 for ; Wed, 05 Feb 2020 21:24:01 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Feb 2020 21:24:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,408,1574150400"; d="scan'208";a="264483531" X-Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.8]) by fmsmga002.fm.intel.com with ESMTP; 05 Feb 2020 21:24:00 -0800 From: "Wu, Hao A" To: devel@edk2.groups.io Cc: Hao A Wu , Michael Kubacki , Michael D Kinney , Eric Dong , Ray Ni , Laszlo Ersek Subject: [edk2-devel] [PATCH v1 1/2] Revert UefiCpuPkg/MpInitLib: Relocate microcode patch fields in CPU_MP_DATA Date: Thu, 6 Feb 2020 13:23:55 +0800 Message-Id: <20200206052356.3672-2-hao.a.wu@intel.com> In-Reply-To: <20200206052356.3672-1-hao.a.wu@intel.com> References: <20200206052356.3672-1-hao.a.wu@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,hao.a.wu@intel.com X-Gm-Message-State: GwJ7b1hlnoZCmwTGl99acqK3x1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1580966642; bh=/7Wqhe9mibjGxovQSaBWVJJutMdme4bx9+QIZjvg88Y=; h=Cc:Date:From:Reply-To:Subject:To; b=G17prP1hRTLERmGDQN2/5/0rYGavrN5KrcW8VwVFdw2vtRzS/+nd5omf5APCJ/MZMAg JV5En70SzEyVqFmB0Hub4GcfQu0BEIo/jD6oiGkXM/5Xubhc9hvEOPK0sH2cu06riHApG V4YskbnfyzvVAkSJk334NY6cegfonhEa8wo= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This reverts commit 88bd06616617ef2569f093f7b51893c11ad78e26. REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2465 Commit 88bd0661661 relocates the 'MicrocodePatchAddress' and 'MicrocodePatchRegionSize' fields in structure CPU_MP_DATA to ensure that they can be properly passed between different architectures. However, such change is not backward compatible with the scenario like pre-existing binaries such as FSP. These binaries are built when the code base has a different version of the CPU_MP_DATA structure definition. This may cause issues when accessing the 'MicrocodePatchAddress' and 'MicrocodePatchRegionSize' fields, since their offsets are different (between PEI phase in the FSP binaries and DXE phase in current code implementation). Cc: Michael Kubacki Cc: Michael D Kinney Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Signed-off-by: Hao A Wu Acked-by: Laszlo Ersek Reviewed-by: Eric Dong Reviewed-by: Ray Ni --- UefiCpuPkg/Library/MpInitLib/MpLib.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index 7c62d75acc..d7e20f0b74 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -219,8 +219,6 @@ struct _CPU_MP_DATA { UINT64 CpuInfoInHob; UINT32 CpuCount; UINT32 BspNumber; - UINT64 MicrocodePatchAddress; - UINT64 MicrocodePatchRegionSize; // // The above fields data will be passed from PEI to DXE // Please make sure the fields offset same in the different @@ -264,6 +262,8 @@ struct _CPU_MP_DATA { UINT8 Vector; BOOLEAN PeriodicMode; BOOLEAN TimerInterruptState; + UINT64 MicrocodePatchAddress; + UINT64 MicrocodePatchRegionSize; =20 // // Whether need to use Init-Sipi-Sipi to wake up the APs. --=20 2.12.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#53840): https://edk2.groups.io/g/devel/message/53840 Mute This Topic: https://groups.io/mt/71015995/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Tue Apr 23 17:38:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+53841+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+53841+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1580966644334737.8089416282511; Wed, 5 Feb 2020 21:24:04 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id vFjZYY1788612xXffaqOMuvT; Wed, 05 Feb 2020 21:24:03 -0800 X-Received: from mga11.intel.com (mga11.intel.com []) by mx.groups.io with SMTP id smtpd.web09.7898.1580966640586255178 for ; Wed, 05 Feb 2020 21:24:03 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Feb 2020 21:24:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,408,1574150400"; d="scan'208";a="264483545" X-Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.8]) by fmsmga002.fm.intel.com with ESMTP; 05 Feb 2020 21:24:01 -0800 From: "Wu, Hao A" To: devel@edk2.groups.io Cc: Hao A Wu , Michael Kubacki , Michael D Kinney , Eric Dong , Ray Ni , Laszlo Ersek Subject: [edk2-devel] [PATCH v1 2/2] UefiCpuPkg/MpInitLib: Not pass microcode info between archs in CPU_MP_DATA Date: Thu, 6 Feb 2020 13:23:56 +0800 Message-Id: <20200206052356.3672-3-hao.a.wu@intel.com> In-Reply-To: <20200206052356.3672-1-hao.a.wu@intel.com> References: <20200206052356.3672-1-hao.a.wu@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,hao.a.wu@intel.com X-Gm-Message-State: B9q2v2JvtLWh8SUNjAbo5lnwx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1580966643; bh=AjSpHTBWawBMPK6cDfp9rZAZgwURkCbXP8B67y0JESg=; h=Cc:Date:From:Reply-To:Subject:To; b=HTiVLJC9Pd46nN0IZSGSSqjbPTtw2nLkHL/l6bHGXrtZW7mbijNLVIfynTVahDi7/po CEFHoqF7FqLt5V33pGzNcPnvbGexbIogsaGb1tXVmHzLLESPueAjHVnRd/0gL0jAmS3FZ GtkPsXzZEol5aXFG4z1A3J0I5ZdcUhVrGVA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2465 Commit 89164babec: UefiCpuPkg/MpInitLib: don't shadow the microcode patch twice. attempted to use 'MicrocodePatchRegionSize' and 'MicrocodePatchAddress' fields to avoid loading the microcode patches data into memory again in the DXE phase. However, the CPU_MP_DATA structure has members with type 'UINTN' or pointer before the microcode patch related fields. This may cause issues when PEI and DXE are of different archs (e.g. PEI - IA32, DXE - x64), since the microcode patch related fields will have different offsets in the CPU_MP_DATA structure. Commit 88bd066166: UefiCpuPkg/MpInitLib: Relocate microcode patch fields in CPU_MP_DATA tried to resolve the above-mentioned issue by relocating the fields 'MicrocodePatchRegionSize' and 'MicrocodePatchAddress' before members with different size between different archs. But it failed to take the case of pre-built binaries (e.g. FSP) into consideration. Binaries can be built when the code base had a different version of the CPU_MP_DATA structure definition. This may cause issues when accessing these microcode patch related fields, since their offsets are different (between PEI phase in the binaries and DXE phase in current code implementation). This commit will use the newly introduced EDKII microcode patch HOB instead for the DXE phase to get the information of the loaded microcode patches data done in the PEI phase. And the 'MicrocodePatchRegionSize' and 'MicrocodePatchAddress' fields in CPU_MP_DATA will not be used to pass information between phases. For pre-built binaries, they can be classified into 3 types with regard to the time when they are being built: A. Before commit 89164babec (In other words, 'MicrocodePatchRegionSize' and 'MicrocodePatchAddress' were not being used to skip microcode load in DXE) For this case, the EDKII microcode patch HOB will not be produced. This commit will load the microcode patches data again in DXE. Such behavior is the same with the code base back then. B. After commit 89164babec, before commit e1ed55738e (In other words, 'MicrocodePatchRegionSize' and 'MicrocodePatchAddress' being used to skip microcode load in DXE, but failed to work properly between differnt archs.) For this case, the EDKII microcode patch HOB will not be produced as well. This commit will also load the microcode patches data again in DXE. But since commit 89164babec failed to keep the detection and application of microcode patches working properly in DXE after skipping the load, we fall back to the origin behavior (that is to load the microcode patches data again in DXE). C. After commit e1ed55738e (In other words, EDKII microcode patch HOB will be produced.) For this case, it will have the same behavior with the BIOS built from the current source codes. Cc: Michael Kubacki Cc: Michael D Kinney Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Signed-off-by: Hao A Wu Acked-by: Laszlo Ersek Reviewed-by: Eric Dong Reviewed-by: Ray Ni --- UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 3 +- UefiCpuPkg/Library/MpInitLib/MpLib.h | 23 +++++++++++ UefiCpuPkg/Library/MpInitLib/Microcode.c | 43 ++++++++++++++++++++ UefiCpuPkg/Library/MpInitLib/MpLib.c | 20 +++++---- UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 3 +- 5 files changed, 80 insertions(+), 12 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf b/UefiCpuPkg/Lib= rary/MpInitLib/DxeMpInitLib.inf index bf5d18d521..9e6cce0895 100644 --- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf @@ -1,7 +1,7 @@ ## @file # MP Initialize Library instance for DXE driver. # -# Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.
# SPDX-License-Identifier: BSD-2-Clause-Patent # ## @@ -58,6 +58,7 @@ [Protocols] [Guids] gEfiEventExitBootServicesGuid ## CONSUMES ## Event gEfiEventLegacyBootGuid ## SOMETIMES_CONSUMES ## = Event + gEdkiiMicrocodePatchHobGuid ## SOMETIMES_CONSUMES ## = HOB =20 [Pcd] gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## CONS= UMES diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index d7e20f0b74..a6eab5f3d7 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -29,6 +29,8 @@ #include #include =20 +#include + #include =20 =20 @@ -600,6 +602,27 @@ ShadowMicrocodeUpdatePatch ( ); =20 /** + Get the cached microcode patch base address and size from the microcode = patch + information cache HOB. + + @param[out] Address Base address of the microcode patches data. + It will be updated if the microcode patch + information cache HOB is found. + @param[out] RegionSize Size of the microcode patches data. + It will be updated if the microcode patch + information cache HOB is found. + + @retval TRUE The microcode patch information cache HOB is found. + @retval FALSE The microcode patch information cache HOB is not found. + +**/ +BOOLEAN +GetMicrocodePatchInfoFromHob ( + UINT64 *Address, + UINT64 *RegionSize + ); + +/** Detect whether Mwait-monitor feature is supported. =20 @retval TRUE Mwait-monitor feature is supported. diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c b/UefiCpuPkg/Library/= MpInitLib/Microcode.c index 247f835b09..67e214d463 100644 --- a/UefiCpuPkg/Library/MpInitLib/Microcode.c +++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c @@ -739,3 +739,46 @@ ShadowMicrocodeUpdatePatch ( ShadowMicrocodePatchByPcd (CpuMpData); } } + +/** + Get the cached microcode patch base address and size from the microcode = patch + information cache HOB. + + @param[out] Address Base address of the microcode patches data. + It will be updated if the microcode patch + information cache HOB is found. + @param[out] RegionSize Size of the microcode patches data. + It will be updated if the microcode patch + information cache HOB is found. + + @retval TRUE The microcode patch information cache HOB is found. + @retval FALSE The microcode patch information cache HOB is not found. + +**/ +BOOLEAN +GetMicrocodePatchInfoFromHob ( + UINT64 *Address, + UINT64 *RegionSize + ) +{ + EFI_HOB_GUID_TYPE *GuidHob; + EDKII_MICROCODE_PATCH_HOB *MicrocodePathHob; + + GuidHob =3D GetFirstGuidHob (&gEdkiiMicrocodePatchHobGuid); + if (GuidHob =3D=3D NULL) { + DEBUG((DEBUG_INFO, "%a: Microcode patch cache HOB is not found.\n", __= FUNCTION__)); + return FALSE; + } + + MicrocodePathHob =3D GET_GUID_HOB_DATA (GuidHob); + + *Address =3D MicrocodePathHob->MicrocodePatchAddress; + *RegionSize =3D MicrocodePathHob->MicrocodePatchRegionSize; + + DEBUG(( + DEBUG_INFO, "%a: MicrocodeBase =3D 0x%lx, MicrocodeSize =3D 0x%lx\n", + __FUNCTION__, *Address, *RegionSize + )); + + return TRUE; +} diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index 855d37ba3e..d0fbc17ce5 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -1682,10 +1682,6 @@ MpInitLibInitialize ( CpuMpData->SwitchBspFlag =3D FALSE; CpuMpData->CpuData =3D (CPU_AP_DATA *) (CpuMpData + 1); CpuMpData->CpuInfoInHob =3D (UINT64) (UINTN) (CpuMpData->CpuData + M= axLogicalProcessorNumber); - if (OldCpuMpData !=3D NULL) { - CpuMpData->MicrocodePatchRegionSize =3D OldCpuMpData->MicrocodePatchRe= gionSize; - CpuMpData->MicrocodePatchAddress =3D OldCpuMpData->MicrocodePatchAd= dress; - } InitializeSpinLock(&CpuMpData->MpLock); =20 // @@ -1740,11 +1736,6 @@ MpInitLibInitialize ( // CollectProcessorCount (CpuMpData); } - - // - // Load required microcode patches data into memory - // - ShadowMicrocodeUpdatePatch (CpuMpData); } else { // // APs have been wakeup before, just get the CPU Information @@ -1762,6 +1753,17 @@ MpInitLibInitialize ( } } =20 + if (!GetMicrocodePatchInfoFromHob ( + &CpuMpData->MicrocodePatchAddress, + &CpuMpData->MicrocodePatchRegionSize + )) { + // + // The microcode patch information cache HOB does not exist, which mea= ns + // the microcode patches data has not been loaded into memory yet + // + ShadowMicrocodeUpdatePatch (CpuMpData); + } + // // Detect and apply Microcode on BSP // diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c b/UefiCpuPkg/Library/M= pInitLib/PeiMpLib.c index 06e3f5d0d3..6ecbed39ec 100644 --- a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c @@ -1,7 +1,7 @@ /** @file MP initialize support functions for PEI phase. =20 - Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -9,7 +9,6 @@ #include "MpLib.h" #include #include -#include =20 /** S3 SMM Init Done notification function. --=20 2.12.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#53841): https://edk2.groups.io/g/devel/message/53841 Mute This Topic: https://groups.io/mt/71015996/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-