From nobody Sat Feb 7 06:20:34 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+52759+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+52759+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1578042564; cv=none; d=zohomail.com; s=zohoarc; b=XJBHXbOwrV2gwW+SYPAqRoRbpTGMGmB1iMB42VU5iZ98gXnHOA9YLG1Q/ADHM3TJRxmDqnv7/anH5tcBzvEGps76KgqY2Prhf5cRB8UFmQTFmDOY3rwLmuLs/4Q9qsyMyFmqLl4AqTC1KOlWmxMVsZJv3+EJbm3a6zxB4HstSAw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1578042564; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=jtc53UvSB5dyA/PogDoLZJnz+eQkqlAlKXxGST8IiFs=; b=mVl6c8LRAJheC0OKfFiHhoaGYfYPTeZCqMpQw6fH1lBGbRBnOoYmoMcUkbm3naFhl2I9YJJh1qUGHc+On3uAyyLOA6OJZa+90T9gEz7+cWLtWSIZXJ4a1Sj8Ooa3lc4aTDZEs8BTmaqc1lp2u0Obow8QjNcUtc2S3/SEx0wSmO0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+52759+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 157804256401573.57815379997191; Fri, 3 Jan 2020 01:09:24 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id SMETYY1788612xYD8eNbqHpo; Fri, 03 Jan 2020 01:09:23 -0800 X-Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [207.211.31.120]) by mx.groups.io with SMTP id smtpd.web11.1839.1578042563001728571 for ; Fri, 03 Jan 2020 01:09:23 -0800 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-11-tq3cax2OP0qanYkWpZ-OqQ-1; Fri, 03 Jan 2020 04:09:20 -0500 X-Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 96083800D48; Fri, 3 Jan 2020 09:09:19 +0000 (UTC) X-Received: from x1w.redhat.com (ovpn-116-190.ams2.redhat.com [10.36.116.190]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 28ECE7BA25; Fri, 3 Jan 2020 09:09:17 +0000 (UTC) From: =?UTF-8?B?UGhpbGlwcGUgTWF0aGlldS1EYXVkw6k=?= To: devel@edk2.groups.io Cc: Antoine Coeur , Michael D Kinney , Liming Gao , Philippe Mathieu-Daude Subject: [edk2-devel] [PATCH v2 25/78] MdePkg/Library/Pci: Fix various typos Date: Fri, 3 Jan 2020 10:07:19 +0100 Message-Id: <20200103090812.10592-26-philmd@redhat.com> In-Reply-To: <20200103090812.10592-1-philmd@redhat.com> References: <20200103090812.10592-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-MC-Unique: tq3cax2OP0qanYkWpZ-OqQ-1 X-Mimecast-Spam-Score: 0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,philmd@redhat.com X-Gm-Message-State: U6SEucrN1i85OKHx33u85RTNx1787277AA= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1578042563; bh=Yi3wPM/f0niykjVTPSkNKPxgpHVzDv/UlUqI9tLmG4A=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=HzCol6CWkYbdr71TSS2lAwhJ0Gs8c+ogeWWclbJ7rusaJZAuQ+l+yUxkaVRHUk2Aaja vZJ62C7W/gAnRI5Jf6ZtE6wtHfuF798l+eQTsPrZ8EFm0HmLNTBqPU2aZVUhSarsl15fv YjCGO9OpgL9VqtnVI6SRZTU85QYtp7W9gOg= X-ZohoMail-DKIM: pass (identity @groups.io) From: Antoine Coeur Fix various typos in comments and documentation. Cc: Michael D Kinney Cc: Liming Gao Signed-off-by: Antoine Coeur Reviewed-by: Philippe Mathieu-Daude Reviewed-by: Michael D Kinney Signed-off-by: Philippe Mathieu-Daude Reviewed-by: Liming Gao --- MdePkg/Include/Library/PciCf8Lib.h | 4 ++-- MdePkg/Include/Library/PciExpressLib.h | 4 ++-- MdePkg/Include/Library/PciLib.h | 4 ++-- MdePkg/Include/Library/PciSegmentLib.h | 4 ++-- .../PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLib.c | 2 +- MdePkg/Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.c | 4 ++-- 6 files changed, 11 insertions(+), 11 deletions(-) diff --git a/MdePkg/Include/Library/PciCf8Lib.h b/MdePkg/Include/Library/Pc= iCf8Lib.h index 41558dabddc2..7e22a527a80e 100644 --- a/MdePkg/Include/Library/PciCf8Lib.h +++ b/MdePkg/Include/Library/PciCf8Lib.h @@ -1027,7 +1027,7 @@ PciCf8BitFieldAndThenOr32 ( Size into the buffer specified by Buffer. This function only allows the = PCI configuration registers from a single PCI function to be read. Size is returned. When possible 32-bit PCI configuration read cycles are used to= read - from StartAdress to StartAddress + Size. Due to alignment restrictions, = 8-bit + from StartAddress to StartAddress + Size. Due to alignment restrictions,= 8-bit and 16-bit PCI configuration read cycles may be used at the beginning an= d the end of the range. =20 @@ -1060,7 +1060,7 @@ PciCf8ReadBuffer ( Size from the buffer specified by Buffer. This function only allows the = PCI configuration registers from a single PCI function to be written. Size is returned. When possible 32-bit PCI configuration write cycles are used to - write from StartAdress to StartAddress + Size. Due to alignment restrict= ions, + write from StartAddress to StartAddress + Size. Due to alignment restric= tions, 8-bit and 16-bit PCI configuration write cycles may be used at the begin= ning and the end of the range. =20 diff --git a/MdePkg/Include/Library/PciExpressLib.h b/MdePkg/Include/Librar= y/PciExpressLib.h index aec2b5f3777d..826fdcf7db6c 100644 --- a/MdePkg/Include/Library/PciExpressLib.h +++ b/MdePkg/Include/Library/PciExpressLib.h @@ -997,7 +997,7 @@ PciExpressBitFieldAndThenOr32 ( Size into the buffer specified by Buffer. This function only allows the = PCI configuration registers from a single PCI function to be read. Size is returned. When possible 32-bit PCI configuration read cycles are used to= read - from StartAdress to StartAddress + Size. Due to alignment restrictions, = 8-bit + from StartAddress to StartAddress + Size. Due to alignment restrictions,= 8-bit and 16-bit PCI configuration read cycles may be used at the beginning an= d the end of the range. =20 @@ -1029,7 +1029,7 @@ PciExpressReadBuffer ( Size from the buffer specified by Buffer. This function only allows the = PCI configuration registers from a single PCI function to be written. Size is returned. When possible 32-bit PCI configuration write cycles are used to - write from StartAdress to StartAddress + Size. Due to alignment restrict= ions, + write from StartAddress to StartAddress + Size. Due to alignment restric= tions, 8-bit and 16-bit PCI configuration write cycles may be used at the begin= ning and the end of the range. =20 diff --git a/MdePkg/Include/Library/PciLib.h b/MdePkg/Include/Library/PciLi= b.h index 7a7d42050f0a..836494b6c1d7 100644 --- a/MdePkg/Include/Library/PciLib.h +++ b/MdePkg/Include/Library/PciLib.h @@ -997,7 +997,7 @@ PciBitFieldAndThenOr32 ( Size into the buffer specified by Buffer. This function only allows the = PCI configuration registers from a single PCI function to be read. Size is returned. When possible 32-bit PCI configuration read cycles are used to= read - from StartAdress to StartAddress + Size. Due to alignment restrictions, = 8-bit + from StartAddress to StartAddress + Size. Due to alignment restrictions,= 8-bit and 16-bit PCI configuration read cycles may be used at the beginning an= d the end of the range. =20 @@ -1029,7 +1029,7 @@ PciReadBuffer ( Size from the buffer specified by Buffer. This function only allows the = PCI configuration registers from a single PCI function to be written. Size is returned. When possible 32-bit PCI configuration write cycles are used to - write from StartAdress to StartAddress + Size. Due to alignment restrict= ions, + write from StartAddress to StartAddress + Size. Due to alignment restric= tions, 8-bit and 16-bit PCI configuration write cycles may be used at the begin= ning and the end of the range. =20 diff --git a/MdePkg/Include/Library/PciSegmentLib.h b/MdePkg/Include/Librar= y/PciSegmentLib.h index bd31f05a23fe..fcd98dbfd8df 100644 --- a/MdePkg/Include/Library/PciSegmentLib.h +++ b/MdePkg/Include/Library/PciSegmentLib.h @@ -984,7 +984,7 @@ PciSegmentBitFieldAndThenOr32 ( Size into the buffer specified by Buffer. This function only allows the = PCI configuration registers from a single PCI function to be read. Size is returned. When possible 32-bit PCI configuration read cycles are used to= read - from StartAdress to StartAddress + Size. Due to alignment restrictions, = 8-bit + from StartAddress to StartAddress + Size. Due to alignment restrictions,= 8-bit and 16-bit PCI configuration read cycles may be used at the beginning an= d the end of the range. =20 @@ -1016,7 +1016,7 @@ PciSegmentReadBuffer ( Size from the buffer specified by Buffer. This function only allows the = PCI configuration registers from a single PCI function to be written. Size is returned. When possible 32-bit PCI configuration write cycles are used to - write from StartAdress to StartAddress + Size. Due to alignment restrict= ions, + write from StartAddress to StartAddress + Size. Due to alignment restric= tions, 8-bit and 16-bit PCI configuration write cycles may be used at the begin= ning and the end of the range. =20 diff --git a/MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLi= b.c b/MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLib.c index 2f503ecffe05..36b0b632c124 100644 --- a/MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLib.c +++ b/MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLib.c @@ -211,7 +211,7 @@ PciSegmentRegisterForRuntimeAccess ( Address =3D (UINTN)EcamAddress; =20 // - // See if Address has already been registerd for runtime access + // See if Address has already been registered for runtime access // for (Index =3D 0; Index < mDxeRuntimePciSegmentLibNumberOfRuntimeRanges;= Index++) { if (mDxeRuntimePciSegmentLibRegistrationTable[Index].PhysicalAddress = =3D=3D Address) { diff --git a/MdePkg/Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.c = b/MdePkg/Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.c index 1b42481123c9..a76e9d9adf07 100644 --- a/MdePkg/Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.c +++ b/MdePkg/Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.c @@ -1169,7 +1169,7 @@ PciSegmentBitFieldAndThenOr32 ( Size into the buffer specified by Buffer. This function only allows the = PCI configuration registers from a single PCI function to be read. Size is returned. When possible 32-bit PCI configuration read cycles are used to= read - from StartAdress to StartAddress + Size. Due to alignment restrictions, = 8-bit + from StartAddress to StartAddress + Size. Due to alignment restrictions,= 8-bit and 16-bit PCI configuration read cycles may be used at the beginning an= d the end of the range. =20 @@ -1272,7 +1272,7 @@ PciSegmentReadBuffer ( Size from the buffer specified by Buffer. This function only allows the = PCI configuration registers from a single PCI function to be written. Size is returned. When possible 32-bit PCI configuration write cycles are used to - write from StartAdress to StartAddress + Size. Due to alignment restrict= ions, + write from StartAddress to StartAddress + Size. Due to alignment restric= tions, 8-bit and 16-bit PCI configuration write cycles may be used at the begin= ning and the end of the range. =20 --=20 2.21.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#52759): https://edk2.groups.io/g/devel/message/52759 Mute This Topic: https://groups.io/mt/69395727/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-