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25 Dec 2019 21:42:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,357,1571727600"; d="scan'208";a="214877428" X-Received: from unknown (HELO ethantsa-MOBL1.gar.corp.intel.com) ([10.5.240.208]) by fmsmga008.fm.intel.com with ESMTP; 25 Dec 2019 21:42:20 -0800 From: "Ethan Tsao" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty Subject: [edk2-devel] [Patch V5] IntelSiliconPkg/Include/Library:Add ConfigBlockLib.h Date: Thu, 26 Dec 2019 13:42:17 +0800 Message-Id: <20191226054217.7328-1-ethan.tsao@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ethan.tsao@intel.com X-Gm-Message-State: Rfd1csl9WxSu0DELngkn2bEix1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1577338943; bh=cwBEQHXWXqqis3tmUnXnbQ6+HBIfNwprMX//r0SKnOw=; h=Cc:Date:From:Reply-To:Subject:To; b=YHAhw1ovw+YrCH363D2kUIBEoFcyN5T00oy7URoP0dZiGw9sOVtn5Zy3sFA/s6SQTAQ 6iHG0ORy1hROZEU3OT2OQMx092ITJqkZ4diC22uYZ0+VXgBrfaSM9CmKDJ6D9LGMQjsrg 2oENxitY0Dw3/vCUfA0fOcLJIC7rhEDZ884= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2318 Move ConfigBlockLib.h and ConfigBlock.h to InstelSiliconPkg and remove all = other ConfigBlockLib.h and ConfigBlock.h Signed-off-by: Ethan Tsao Cc: Ray Ni Cc: Rangasai V Chaganty --- Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc = | 2 +- Silicon/Intel/IntelSiliconPkg/Include/ConfigBlock.h = | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++ Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h = | 64 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec = | 4 ++++ Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc = | 1 + Silicon/Intel/IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBlockLi= b.inf | 2 +- 6 files changed, 124 insertions(+), 2 deletions(-) diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc b/= Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc index 37c77d8f63..702a833cc4 100644 --- a/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc +++ b/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc @@ -147,7 +147,7 @@ gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0 # Silicon Init Common Library # !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc -ConfigBlockLib|ClientSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBlock= Lib.inf +ConfigBlockLib|IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBlockL= ib.inf PchTraceHubInitLib|ClientSiliconPkg/Library/BasePchTraceHubInitLib/BasePch= TraceHubInitLib.inf =20 [LibraryClasses.IA32] diff --git a/Silicon/Intel/IntelSiliconPkg/Include/ConfigBlock.h b/Silicon/= Intel/IntelSiliconPkg/Include/ConfigBlock.h new file mode 100644 index 0000000000..d0e3d94418 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Include/ConfigBlock.h @@ -0,0 +1,53 @@ +/** @file + Header file for Config Block Lib implementation + + Copyright (c) 2019 Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef _CONFIG_BLOCK_H_ +#define _CONFIG_BLOCK_H_ + +#include +#include +#include +#include + +#pragma pack (push,1) + +/// +/// Config Block Header +/// +typedef struct _CONFIG_BLOCK_HEADER { + EFI_HOB_GUID_TYPE GuidHob; ///< Offset 0-23 GUID e= xtension HOB header + UINT8 Revision; ///< Offset 24 Revisi= on of this config block + UINT8 Attributes; ///< Offset 25 The ma= in revision for config block + UINT8 Reserved[2]; ///< Offset 26-27 Reserv= ed for future use +} CONFIG_BLOCK_HEADER; + +/// +/// Config Block +/// +typedef struct _CONFIG_BLOCK { + CONFIG_BLOCK_HEADER Header; ///< Offset 0-27 Header= of config block + // + // Config Block Data + // +} CONFIG_BLOCK; + +/// +/// Config Block Table Header +/// +typedef struct _CONFIG_BLOCK_TABLE_STRUCT { + CONFIG_BLOCK_HEADER Header; ///< Offset 0-27 GUID n= umber for main entry of config block + UINT8 Rsvd0[2]; ///< Offset 28-29 Reserv= ed for future use + UINT16 NumberOfBlocks; ///< Offset 30-31 Number= of config blocks (N) + UINT32 AvailableSize; ///< Offset 32-35 Curren= t config block table size +/// +/// Individual Config Block Structures are added here in memory as part of= AddConfigBlock() +/// +} CONFIG_BLOCK_TABLE_HEADER; +#pragma pack (pop) + +#endif // _CONFIG_BLOCK_H_ diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h= b/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h new file mode 100644 index 0000000000..9a3bf373a6 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h @@ -0,0 +1,64 @@ +/** @file + Header file for Config Block Lib implementation + + Copyright (c) 2019 Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef _CONFIG_BLOCK_LIB_H_ +#define _CONFIG_BLOCK_LIB_H_ + +/** + Create config block table + + @param[in] TotalSize - Max size to be allocated f= or the Config Block Table + @param[out] ConfigBlockTableAddress - On return, points to a poi= nter to the beginning of Config Block Table Address + + @retval EFI_INVALID_PARAMETER - Invalid Parameter + @retval EFI_OUT_OF_RESOURCES - Out of resources + @retval EFI_SUCCESS - Successfully created Config Block Table = at ConfigBlockTableAddress +**/ +EFI_STATUS +EFIAPI +CreateConfigBlockTable ( + IN UINT16 TotalSize, + OUT VOID **ConfigBlockTableAddress + ); + +/** + Add config block into config block table structure + + @param[in] ConfigBlockTableAddress - A pointer to the beginning= of Config Block Table Address + @param[out] ConfigBlockAddress - On return, points to a poi= nter to the beginning of Config Block Address + + @retval EFI_OUT_OF_RESOURCES - Config Block Table is full and cannot add= new Config Block or + Config Block Offset Table is full and can= not add new Config Block. + @retval EFI_SUCCESS - Successfully added Config Block +**/ +EFI_STATUS +EFIAPI +AddConfigBlock ( + IN VOID *ConfigBlockTableAddress, + OUT VOID **ConfigBlockAddress + ); + +/** + Retrieve a specific Config Block data by GUID + + @param[in] ConfigBlockTableAddress - A pointer to the beginnin= g of Config Block Table Address + @param[in] ConfigBlockGuid - A pointer to the GUID use= s to search specific Config Block + @param[out] ConfigBlockAddress - On return, points to a po= inter to the beginning of Config Block Address + + @retval EFI_NOT_FOUND - Could not find the Config Block + @retval EFI_SUCCESS - Config Block found and return +**/ +EFI_STATUS +EFIAPI +GetConfigBlock ( + IN VOID *ConfigBlockTableAddress, + IN EFI_GUID *ConfigBlockGuid, + OUT VOID **ConfigBlockAddress + ); + +#endif // _CONFIG_BLOCK_LIB_H_ diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dec index 22ebf19c4e..aad39f88ee 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec @@ -30,6 +30,10 @@ # PeiGetVtdPmrAlignmentLib|Include/Library/PeiGetVtdPmrAlignmentLib.h =20 + ## @libraryclass Provides services to access ConfigBlock + # + ConfigBlockLib|Include/Library/ConfigBlockLib.h + [Guids] ## GUID for Package token space # {A9F8D54E-1107-4F0A-ADD0-4587E7A4A735} diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc b/Silicon/In= tel/IntelSiliconPkg/IntelSiliconPkg.dsc index 0a6509d8b3..d90202d0f3 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc @@ -36,6 +36,7 @@ MicrocodeFlashAccessLib|IntelSiliconPkg/Feature/Capsule/Library/Microcod= eFlashAccessLibNull/MicrocodeFlashAccessLibNull.inf PeiGetVtdPmrAlignmentLib|IntelSiliconPkg/Library/PeiGetVtdPmrAlignmentLi= b/PeiGetVtdPmrAlignmentLib.inf TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurem= entLibNull.inf + ConfigBlockLib|IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBloc= kLib.inf =20 [LibraryClasses.common.PEIM] PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf diff --git a/Silicon/Intel/IntelSiliconPkg/Library/BaseConfigBlockLib/BaseC= onfigBlockLib.inf b/Silicon/Intel/IntelSiliconPkg/Library/BaseConfigBlockLi= b/BaseConfigBlockLib.inf index 37b4faaf65..87e7e315b7 100644 --- a/Silicon/Intel/IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBl= ockLib.inf +++ b/Silicon/Intel/IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBl= ockLib.inf @@ -18,7 +18,7 @@ LIBRARY_CLASS =3D ConfigBlockLib =20 [Packages] MdePkg/MdePkg.dec -KabylakeSiliconPkg/SiPkg.dec +IntelSiliconPkg/IntelSiliconPkg.dec =20 [Sources] BaseConfigBlockLib.c --=20 2.16.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#52575): https://edk2.groups.io/g/devel/message/52575 Mute This Topic: https://groups.io/mt/69268732/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-