From nobody Sun Feb 8 05:20:15 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+52560+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+52560+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1577260708; cv=none; d=zohomail.com; s=zohoarc; b=R1gO8MOq11QGbS4uA7eS2kcfaOwiYkLLYqcPKo1iSopzgLC2k0oAdBl4rgAqAj7FPke8oewBZt3+rkmaeLG3P2Uy8kGf1BOcF3phUsFoyYp/eL1K9iZ3l4s51LmxSEaHxgty1AehrbUk/YirJ+CVy+pncUc0axs+LJqvjyn2LwM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1577260708; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=GmLGw5cYEPJrg0dHG5VR3dfarnd+3LdrIQz5UmEDHzI=; b=n6hbIspElAd5gosn0vnCQVDZC66GwMNKxeVzaMKNokwr+EntlDWhNLSHvIVZ+vKA2SeciEaSgSm1kMT4OPm2TWyftPHs0kaEIUEz3nexSxegYAOdhrBdsf6So7nq9dP4wGAe3ChKaz8iofxRMLJaeaz7NcE00sSloEbxqpoGYv0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+52560+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1577260708091320.1343046273837; Tue, 24 Dec 2019 23:58:28 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id uBrrYY1788612xik28NkDz8P; Tue, 24 Dec 2019 23:58:27 -0800 X-Received: from mga05.intel.com (mga05.intel.com []) by mx.groups.io with SMTP id smtpd.web12.10742.1577260698093845890 for ; Tue, 24 Dec 2019 23:58:27 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Dec 2019 23:58:27 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,353,1571727600"; d="scan'208";a="214704566" X-Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.8]) by fmsmga008.fm.intel.com with ESMTP; 24 Dec 2019 23:58:25 -0800 From: "Wu, Hao A" To: devel@edk2.groups.io Cc: Hao A Wu , Eric Dong , Ray Ni , Laszlo Ersek , Star Zeng , Siyuan Fu , Michael D Kinney Subject: [edk2-devel] [PATCH v2 6/6] UefiCpuPkg/MpInitLib: Remove redundant microcode fields in CPU_MP_DATA Date: Wed, 25 Dec 2019 15:58:14 +0800 Message-Id: <20191225075814.8372-7-hao.a.wu@intel.com> In-Reply-To: <20191225075814.8372-1-hao.a.wu@intel.com> References: <20191225075814.8372-1-hao.a.wu@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,hao.a.wu@intel.com X-Gm-Message-State: TW2VFsYsQSPwkR1ag2IdEkVDx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1577260707; bh=/bgnkW3eKhxo2HiMOHJ4SC9+70Rg/UhnPZVxR9AmMQQ=; h=Cc:Date:From:Reply-To:Subject:To; b=mEMjoTYLBg8hA8mRCRzMVmOxSImib228blI2YcJl4adBXSOt5Plg4F791aq4b6I67bR +kNxtLGKTRgdJvi2qfm5DOrp/l8tdKp+H1CWCNZJTNUHqLQgBaGTg7wWYr8ajbg8PeuuU xhpMMsEhE7O+Lmz8494Xzm1ScD89sUZoHuw= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Previous commits have introduced below fields in structure CPU_AP_DATA: UINT32 ProcessorSignature; UINT8 PlatformId; UINT64 MicrocodeEntryAddr; which store the information of: A. CPUID B. Platform ID C. Detected microcode patch entry address (including the microcode patch header) for each processor within system. Therefore, the below fields in structure CPU_MP_DATA: UINT32 ProcessorSignature; UINT32 ProcessorFlags; UINT64 MicrocodeDataAddress; UINT32 MicrocodeRevision; which store the BSP's information of: A. CPUID B. Platform ID C. The address and revision of detected microcode patch are redundant and can be removed. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Star Zeng Cc: Siyuan Fu Cc: Michael D Kinney Signed-off-by: Hao A Wu --- UefiCpuPkg/Library/MpInitLib/MpLib.h | 5 -- UefiCpuPkg/Library/MpInitLib/Microcode.c | 51 ++++++-------------- 2 files changed, 14 insertions(+), 42 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index 5f50e79744..6609c958ce 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -263,11 +263,6 @@ struct _CPU_MP_DATA { BOOLEAN PeriodicMode; BOOLEAN TimerInterruptState; =20 - UINT32 ProcessorSignature; - UINT32 ProcessorFlags; - UINT64 MicrocodeDataAddress; - UINT32 MicrocodeRevision; - // // Whether need to use Init-Sipi-Sipi to wake up the APs. // Two cases need to set this value to TRUE. One is in HLT diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c b/UefiCpuPkg/Library/= MpInitLib/Microcode.c index 554d3ccddb..110cbadbad 100644 --- a/UefiCpuPkg/Library/MpInitLib/Microcode.c +++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c @@ -85,6 +85,7 @@ MicrocodeDetect ( UINTN Index; UINT8 PlatformId; CPUID_VERSION_INFO_EAX Eax; + CPU_AP_DATA *CpuData; UINT32 CurrentRevision; UINT32 LatestRevision; UINTN TotalSize; @@ -92,16 +93,9 @@ MicrocodeDetect ( UINT32 InCompleteCheckSum32; BOOLEAN CorrectMicrocode; VOID *MicrocodeData; - MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr; - UINT32 ProcessorFlags; UINT32 ThreadId; BOOLEAN IsBspCallIn; =20 - // - // set ProcessorFlags to suppress incorrect compiler/analyzer warnings - // - ProcessorFlags =3D 0; - if (CpuMpData->MicrocodePatchRegionSize =3D=3D 0) { // // There is no microcode patches @@ -127,28 +121,25 @@ MicrocodeDetect ( } =20 ExtendedTableLength =3D 0; - // - // Here data of CPUID leafs have not been collected into context buffer,= so - // GetProcessorCpuid() cannot be used here to retrieve CPUID data. - // - AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, NULL, NULL); - - // - // The index of platform information resides in bits 50:52 of MSR IA32_P= LATFORM_ID - // - PlatformIdMsr.Uint64 =3D AsmReadMsr64 (MSR_IA32_PLATFORM_ID); - PlatformId =3D (UINT8) PlatformIdMsr.Bits.PlatformId; + Eax.Uint32 =3D CpuMpData->CpuData[ProcessorNumber].ProcessorSignature; + PlatformId =3D CpuMpData->CpuData[ProcessorNumber].PlatformId; =20 // // Check whether AP has same processor with BSP. // If yes, direct use microcode info saved by BSP. // if (!IsBspCallIn) { - if ((CpuMpData->ProcessorSignature =3D=3D Eax.Uint32) && - (CpuMpData->ProcessorFlags & (1 << PlatformId)) !=3D 0) { - MicrocodeData =3D (VOID *)(UINTN) CpuMpData->MicrocodeDataAddress; - LatestRevision =3D CpuMpData->MicrocodeRevision; - goto Done; + // + // Get the CPU data for BSP + // + CpuData =3D &(CpuMpData->CpuData[CpuMpData->BspNumber]); + if ((CpuData->ProcessorSignature =3D=3D Eax.Uint32) && + (CpuData->PlatformId =3D=3D PlatformId) && + (CpuData->MicrocodeEntryAddr !=3D 0)) { + MicrocodeEntryPoint =3D (CPU_MICROCODE_HEADER *)(UINTN) CpuData->Mic= rocodeEntryAddr; + MicrocodeData =3D (VOID *) (MicrocodeEntryPoint + 1); + LatestRevision =3D MicrocodeEntryPoint->UpdateRevision; + goto Done; } } =20 @@ -216,7 +207,6 @@ MicrocodeDetect ( CheckSum32 +=3D MicrocodeEntryPoint->Checksum; if (CheckSum32 =3D=3D 0) { CorrectMicrocode =3D TRUE; - ProcessorFlags =3D MicrocodeEntryPoint->ProcessorFlags; } } else if ((MicrocodeEntryPoint->DataSize !=3D 0) && (MicrocodeEntryPoint->UpdateRevision > LatestRevision)) { @@ -260,7 +250,6 @@ MicrocodeDetect ( // Find one // CorrectMicrocode =3D TRUE; - ProcessorFlags =3D ExtendedTable->ProcessorFlag; break; } } @@ -332,18 +321,6 @@ Done: CpuMpData->CpuData[ProcessorNumber].MicrocodeEntryAddr =3D (UINTN) MicrocodeData - sizeof (CPU_MICROCODE_HEADER); } - - if (IsBspCallIn && (LatestRevision !=3D 0)) { - // - // Save BSP processor info and microcode info for later AP use. - // - CpuMpData->ProcessorSignature =3D Eax.Uint32; - CpuMpData->ProcessorFlags =3D ProcessorFlags; - CpuMpData->MicrocodeDataAddress =3D (UINTN) MicrocodeData; - CpuMpData->MicrocodeRevision =3D LatestRevision; - DEBUG ((DEBUG_INFO, "BSP Microcode:: signature [0x%08x], ProcessorFlag= s [0x%08x], \ - MicroData [0x%08x], Revision [0x%08x]\n", Eax.Uint32, ProcessorFlag= s, (UINTN) MicrocodeData, LatestRevision)); - } } =20 /** --=20 2.12.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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