From nobody Mon Feb 9 04:44:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+52513+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+52513+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1577151428; cv=none; d=zohomail.com; s=zohoarc; b=UZ84YgMhes16bJBvlrUILHcvJ5YdmhLU5X8sG2hzFFIOj1V6qFlTR1fAIPEOT0V7FNJGLszRuwPkR7/JhyjxbWfCHR1/0VCnqvFD8V7JpgLka9phjjMGuzmSJLHbPy+KANeuPv2hf95Mbswxp8i7biy+5MvpjJDxRGZ1UIWzmhg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1577151428; h=Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:Message-ID:Reply-To:References:Sender:Subject:To; bh=2gTF+TfoqK3Sd0o7caTjYvQie7j7P4hH8tezjQSVc0U=; b=nQIH/eclu673lfIlR+cp12lpTFxf+UyKk/tbHJn7e86GgO5QZlPOd1gRxG8qx8moIH1VFOFZI+78eWEqFFmHu4bicxkyV5uh0ABMZ2DUQIhTwncrUB+Bsw0Rry3kl4wPcZ503TtYEF1POMVDnNwT/rNOYXZ7W3wu98uLK7xMxfk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+52513+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1577151428693324.8879704221795; Mon, 23 Dec 2019 17:37:08 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id XYkvYY1788612xiuK95mk8f8; Mon, 23 Dec 2019 17:37:08 -0800 X-Received: from mga05.intel.com (mga05.intel.com []) by mx.groups.io with SMTP id smtpd.web09.334.1577151420986085921 for ; Mon, 23 Dec 2019 17:37:07 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Dec 2019 17:37:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,349,1571727600"; d="scan'208";a="249667612" X-Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.8]) by fmsmga002.fm.intel.com with ESMTP; 23 Dec 2019 17:37:05 -0800 From: "Wu, Hao A" To: devel@edk2.groups.io Cc: Hao A Wu , Eric Dong , Ray Ni , Laszlo Ersek , Star Zeng , Siyuan Fu , Michael D Kinney Subject: [edk2-devel] [PATCH v1 4/4] UefiCpuPkg/MpInitLib: Produce EDKII microcode patch HOB Date: Tue, 24 Dec 2019 09:36:56 +0800 Message-Id: <20191224013656.13404-5-hao.a.wu@intel.com> In-Reply-To: <20191224013656.13404-1-hao.a.wu@intel.com> References: <20191224013656.13404-1-hao.a.wu@intel.com> Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,hao.a.wu@intel.com X-Gm-Message-State: jrJIhl0LkP5snoEfYAlkCDDjx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1577151428; bh=jrAxTrwYRLe1k0/YfCRPWRY2m/VLPZX431FNyVwq3nY=; h=Cc:Date:From:Reply-To:Subject:To; b=ReoUFbRN/bVFaId7tIOFOPqZIvsD10J2xczI5XwEi+/pQ6Frt6IJeXk2QnKQ+rOBPEO /pCvI9Fvz/ysLdOOGWkd7O1KGr/9vGBR/VXlXSyJhqnNnOse3l/1ZTkSquVAMnbrCsCkp zUaug5FVRXu1iB5I0kxyMkRpCtq12CGUw44= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2430 This commit will update the MpInitLib to: A. Collect the base address and size information after microcode patches being loaded into memory; B. Collect the applied microcode patch for each processor within system; C. Based on the collected information, produce the EDKII microcode patch HOB. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Star Zeng Cc: Siyuan Fu Cc: Michael D Kinney Signed-off-by: Hao A Wu --- UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 1 + UefiCpuPkg/Library/MpInitLib/MpLib.h | 24 +++++++-- UefiCpuPkg/Library/MpInitLib/Microcode.c | 16 ++++-- UefiCpuPkg/Library/MpInitLib/MpLib.c | 8 ++- UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 55 ++++++++++++++++++++ 5 files changed, 96 insertions(+), 8 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf b/UefiCpuPkg/Lib= rary/MpInitLib/PeiMpInitLib.inf index 1538185ef9..326703cc9a 100644 --- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf +++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf @@ -63,3 +63,4 @@ [Pcd] =20 [Guids] gEdkiiS3SmmInitDoneGuid + gEdkiiMicrocodePatchHobGuid diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index 56b0df664a..fb251d7aef 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -138,6 +138,7 @@ typedef struct { EFI_EVENT WaitEvent; UINT32 ProcessorSignature; UINT8 PlatformId; + UINT64 MicrocodeData; } CPU_AP_DATA; =20 // @@ -580,13 +581,15 @@ CheckAndUpdateApsStatus ( /** Detect whether specified processor can find matching microcode patch and= load it. =20 - @param[in] CpuMpData The pointer to CPU MP Data structure. - @param[in] IsBspCallIn Indicate whether the caller is BSP or not. + @param[in] CpuMpData The pointer to CPU MP Data structure. + @param[in] ProcessorNumber The handle number of the processor. The ran= ge is + from 0 to the total number of logical proce= ssors + minus 1. **/ VOID MicrocodeDetect ( IN CPU_MP_DATA *CpuMpData, - IN BOOLEAN IsBspCallIn + IN UINTN ProcessorNumber ); =20 /** @@ -619,5 +622,20 @@ EnableDebugAgent ( VOID ); =20 +/** + Find the current Processor number by APIC ID. + + @param[in] CpuMpData Pointer to PEI CPU MP Data + @param[out] ProcessorNumber Return the pocessor number found + + @retval EFI_SUCCESS ProcessorNumber is found and returned. + @retval EFI_NOT_FOUND ProcessorNumber is not found. +**/ +EFI_STATUS +GetProcessorNumber ( + IN CPU_MP_DATA *CpuMpData, + OUT UINTN *ProcessorNumber + ); + #endif =20 diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c b/UefiCpuPkg/Library/= MpInitLib/Microcode.c index 68088b26a5..bbc40f81bf 100644 --- a/UefiCpuPkg/Library/MpInitLib/Microcode.c +++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c @@ -65,13 +65,15 @@ GetCurrentMicrocodeSignature ( It does not guarantee that the data has not been modified. CPU has its own mechanism to verify Microcode Binary part. =20 - @param[in] CpuMpData The pointer to CPU MP Data structure. - @param[in] IsBspCallIn Indicate whether the caller is BSP or not. + @param[in] CpuMpData The pointer to CPU MP Data structure. + @param[in] ProcessorNumber The handle number of the processor. The ran= ge is + from 0 to the total number of logical proce= ssors + minus 1. **/ VOID MicrocodeDetect ( IN CPU_MP_DATA *CpuMpData, - IN BOOLEAN IsBspCallIn + IN UINTN ProcessorNumber ) { UINT32 ExtendedTableLength; @@ -93,6 +95,7 @@ MicrocodeDetect ( MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr; UINT32 ProcessorFlags; UINT32 ThreadId; + BOOLEAN IsBspCallIn; =20 // // set ProcessorFlags to suppress incorrect compiler/analyzer warnings @@ -107,6 +110,7 @@ MicrocodeDetect ( } =20 CurrentRevision =3D GetCurrentMicrocodeSignature (); + IsBspCallIn =3D (ProcessorNumber =3D=3D (UINTN)CpuMpData->BspNumber)= ? TRUE : FALSE; if (CurrentRevision !=3D 0 && !IsBspCallIn) { // // Skip loading microcode if it has been loaded successfully @@ -316,6 +320,12 @@ Done: DEBUG ((EFI_D_ERROR, "Updated microcode signature [0x%08x] does not = match \ loaded microcode signature [0x%08x]\n", CurrentRevision, L= atestRevision)); ReleaseSpinLock(&CpuMpData->MpLock); + } else { + // + // Save the detected microcode patch address for each processor. + // It will be used when building the microcode patch cache HOB. + // + CpuMpData->CpuData[ProcessorNumber].MicrocodeData =3D (UINTN) Microc= odeData; } } =20 diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index 199468156b..8f4b2b1973 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -399,12 +399,16 @@ ApInitializeSync ( ) { CPU_MP_DATA *CpuMpData; + UINTN ProcessorNumber; + EFI_STATUS Status; =20 CpuMpData =3D (CPU_MP_DATA *) Buffer; + Status =3D GetProcessorNumber (CpuMpData, &ProcessorNumber); + ASSERT_EFI_ERROR (Status); // // Load microcode on AP // - MicrocodeDetect (CpuMpData, FALSE); + MicrocodeDetect (CpuMpData, ProcessorNumber); // // Sync BSP's MTRR table to AP // @@ -1765,7 +1769,7 @@ MpInitLibInitialize ( // // Detect and apply Microcode on BSP // - MicrocodeDetect (CpuMpData, TRUE); + MicrocodeDetect (CpuMpData, CpuMpData->BspNumber); =20 // // Wakeup APs to do some AP initialize sync (Microcode & MTRR) diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c b/UefiCpuPkg/Library/M= pInitLib/PeiMpLib.c index 3999603c3e..977818fda4 100644 --- a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c @@ -9,6 +9,7 @@ #include "MpLib.h" #include #include +#include =20 /** S3 SMM Init Done notification function. @@ -291,6 +292,59 @@ CheckAndUpdateApsStatus ( } =20 /** + Build the microcode patch HOB that contains the base address and size of= the + microcode patch stored in the memory. + + @param[in] CpuMpData Pointer to the CPU_MP_DATA structure. + +**/ +VOID +BuildMicrocodeCacheHob ( + IN CPU_MP_DATA *CpuMpData + ) +{ + EDKII_MICROCODE_PATCH_HOB *MicrocodeHob; + UINTN HobDataLength; + UINT32 Index; + + HobDataLength =3D sizeof (EDKII_MICROCODE_PATCH_HOB) + + sizeof (UINT64) * CpuMpData->CpuCount; + + MicrocodeHob =3D AllocatePool (HobDataLength); + if (MicrocodeHob =3D=3D NULL) { + ASSERT (FALSE); + return; + } + + // + // Store the information of the memory region that holds the microcode p= atches. + // + MicrocodeHob->MicrocodePatchAddress =3D CpuMpData->MicrocodePatchAddr= ess; + MicrocodeHob->MicrocodePatchRegionSize =3D CpuMpData->MicrocodePatchRegi= onSize; + + // + // Store the detected microcode patch for each processor as well. + // + MicrocodeHob->ProcessorNumber =3D CpuMpData->CpuCount; + for (Index =3D 0; Index < CpuMpData->CpuCount; Index++) { + if (CpuMpData->CpuData[Index].MicrocodeData !=3D 0) { + MicrocodeHob->DetectedPatchOffset[Index] =3D CpuMpData->CpuData[Inde= x].MicrocodeData - + CpuMpData->MicrocodePatch= Address; + } else { + MicrocodeHob->DetectedPatchOffset[Index] =3D MAX_UINT64; + } + } + + BuildGuidDataHob ( + &gEdkiiMicrocodePatchHobGuid, + MicrocodeHob, + HobDataLength + ); + + return; +} + +/** Initialize global data for MP support. =20 @param[in] CpuMpData The pointer to CPU MP Data structure. @@ -303,6 +357,7 @@ InitMpGlobalData ( EFI_STATUS Status; =20 SaveCpuMpData (CpuMpData); + BuildMicrocodeCacheHob (CpuMpData); =20 /// /// Install Notify --=20 2.12.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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