From nobody Fri May 3 09:18:52 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+52013+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+52013+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1575653498; cv=none; d=zohomail.com; s=zohoarc; b=cuU+qrw5MgpcsWoxEK/EqXXAqkSB8Gopc4YrI9mbK9m9W++AihyWRe0XRWZFlkufMyJWpaJzfVEflRgKe2GzN4b6zv1+pqByTKsqEUUf5GDW+d3oEWTaP0/JJ0V915Gcxq892c7TWJg1gyOB/AbfDWL0zhEEwDo3Vh+FmvXv7hQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1575653498; h=Content-Transfer-Encoding:Cc:Date:From:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=7qdFO2qduokJPbpXVlUAI/XsAdYMVwZufv0RIKwGHMg=; b=FzJ25SekiaHGhXQqCx0mYwKDUQtbN9l1l2+3UWH71dblmDhbRjeYb18aTM6RGx3BJChBmRKxuE4EpRnYuIhFSm7+NZP1ubmVwyC26US0WmP4CD35wnQtcGJ6GzKe9FNExkGf6mRc31hwMG6yj1EoWQF5Lw9O0Bkl2J9NmitC5Jo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+52013+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1575653498282248.55956029467302; Fri, 6 Dec 2019 09:31:38 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id aaaaYY1788612xaaaaaaaaaa; Fri, 06 Dec 2019 09:31:37 -0800 X-Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web09.7128.1575653496942580293 for ; Fri, 06 Dec 2019 09:31:37 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Dec 2019 09:31:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,285,1571727600"; d="scan'208";a="224072815" X-Received: from paagyema-desk2.amr.corp.intel.com ([10.24.15.58]) by orsmga002.jf.intel.com with ESMTP; 06 Dec 2019 09:31:35 -0800 From: "Agyeman, Prince" To: devel@edk2.groups.io Cc: Nate DeSimone , Michael Kubacki Subject: [edk2-devel] [PATCH] SimicsOpenBoardPkg: Replace CMOS Hardcoded Addresses Date: Fri, 6 Dec 2019 09:31:35 -0800 Message-Id: <20191206173135.9112-1-prince.agyeman@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,prince.agyeman@intel.com X-Gm-Message-State: aaaaaaaaaaaaaaaaaaaaaaaax1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1575653497; bh=2GGpnziv8BFAJyy5EByDHWncNQOiQSH9Uqtb4EwpTTE=; h=Cc:Date:From:Reply-To:Subject:To; b=lAtU60AM4bQJ2Yx4JSGtZPv7rjWcWTrQxfb78DDsYTTU++IUNbR0QWdnhdb7mMzCjFo cNVDTDYyTUapUcwJSKea6kWveU8Kh+87xDt1bpMyeTdRGDzAVXj/tsWjQq96+BLovmWIm kzEBH4oeZ4UEwQA5yJrlk2MF0Jj2fFJb9ec= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2330 Changes: * Added CmosMap.h that defines CMOS addresses used in SimicsOpenBoardPkg as macros * Replaced hardcoded CMOS addresses with the macros defined in CmosMap.h Cc: Nate DeSimone Cc: Michael Kubacki Signed-off-by: Prince Agyeman Reviewed-by: Michael Kubacki Reviewed-by: Nate DeSimone --- .../SimicsOpenBoardPkg/Include/CmosMap.h | 35 +++++++++++++++++++ .../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 23 ++++++++---- .../SmbiosPlatformDxe/SmbiosPlatformDxe.c | 24 ++++++++----- .../SmbiosPlatformDxe/SmbiosPlatformDxe.h | 1 + 4 files changed, 68 insertions(+), 15 deletions(-) create mode 100644 Platform/Intel/SimicsOpenBoardPkg/Include/CmosMap.h diff --git a/Platform/Intel/SimicsOpenBoardPkg/Include/CmosMap.h b/Platform= /Intel/SimicsOpenBoardPkg/Include/CmosMap.h new file mode 100644 index 0000000000..3221ce9a5b --- /dev/null +++ b/Platform/Intel/SimicsOpenBoardPkg/Include/CmosMap.h @@ -0,0 +1,35 @@ +/** @file +Cmos address definition macros header file. + +Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef _CMOS_MAP_H_ +#define _CMOS_MAP_H_ + +// +// CMOS 0x34/0x35 specifies the system memory above 16 MB. +// * CMOS(0x35) is the high byte +// * CMOS(0x34) is the low byte +// * The size is specified in 64kb chunks +// * Since this is memory above 16MB, the 16MB must be added +// into the calculation to get the total memory size. +// +#define CMOS_SYSTEM_MEM_ABOVE_16MB_LOW_BYTE 0x34 +#define CMOS_SYSTEM_MEM_ABOVE_16MB_HIGH_BYTE 0x35 + +// +// CMOS 0x5b-0x5d specifies the system memory above 4GB MB. +// * CMOS(0x5d) is the most significant size byte +// * CMOS(0x5c) is the middle size byte +// * CMOS(0x5b) is the least significant size byte +// * The size is specified in 64kb chunks +// +#define CMOS_SYSTEM_MEM_ABOVE_4GB_LOW_BYTE 0x5b +#define CMOS_SYSTEM_MEM_ABOVE_4GB_MIDDLE_BYTE 0x5c +#define CMOS_SYSTEM_MEM_ABOVE_4GB_HIGH_BYTE 0x5d + + +#endif // _CMOS_MAP_H_ diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c b/Plat= form/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c index e547de0045..60aa54be9e 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c @@ -26,6 +26,8 @@ #include #include =20 +#include + #include "Platform.h" =20 UINT8 mPhysMemAddressWidth; @@ -74,24 +76,33 @@ X58TsegMbytesInitialization( return; } =20 +/** + Get the system memory size below 4GB =20 + @return The size of system memory below 4GB +**/ UINT32 GetSystemMemorySizeBelow4gb ( VOID ) { + UINT32 Size; // // CMOS 0x34/0x35 specifies the system memory above 16 MB. - // * CMOS(0x35) is the high byte - // * CMOS(0x34) is the low byte // * The size is specified in 64kb chunks // * Since this is memory above 16MB, the 16MB must be added // into the calculation to get the total memory size. // - return (UINT32) (((UINTN)CmosRead16 (0x34) << 16) + SIZE_16MB); + Size =3D (UINT32) ((CmosRead16 (CMOS_SYSTEM_MEM_ABOVE_16MB_LOW_BYTE) << = 16) + + SIZE_16MB); + return Size; } =20 +/** + Get the system memory size above 4GB =20 + @return The size of system memory above 4GB +**/ STATIC UINT64 GetSystemMemorySizeAbove4gb ( @@ -100,12 +111,10 @@ GetSystemMemorySizeAbove4gb ( UINT32 Size; // // CMOS 0x5b-0x5d specifies the system memory above 4GB MB. - // * CMOS(0x5d) is the most significant size byte - // * CMOS(0x5c) is the middle size byte - // * CMOS(0x5b) is the least significant size byte // * The size is specified in 64kb chunks // - Size =3D (CmosRead16 (0x5c) << 8) + CmosRead8 (0x5b); + Size =3D (CmosRead16 (CMOS_SYSTEM_MEM_ABOVE_4GB_MIDDLE_BYTE) << 8) + + CmosRead8 (CMOS_SYSTEM_MEM_ABOVE_4GB_LOW_BYTE); =20 return LShiftU64 (Size, 16); } diff --git a/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlat= formDxe.c b/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlatf= ormDxe.c index 37c659e275..23b284d2fa 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlatformDxe= .c +++ b/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlatformDxe= .c @@ -9,23 +9,33 @@ =20 #include "SmbiosPlatformDxe.h" =20 +/** + Get the system memory size below 4GB =20 + @return The size of system memory below 4GB +**/ UINT32 GetSystemMemorySizeBelow4gb( VOID ) { + UINT32 Size; // // CMOS 0x34/0x35 specifies the system memory above 16 MB. - // * CMOS(0x35) is the high byte - // * CMOS(0x34) is the low byte // * The size is specified in 64kb chunks // * Since this is memory above 16MB, the 16MB must be added // into the calculation to get the total memory size. // - return (UINT32) (((UINTN) CmosRead16 (0x34) << 16) + SIZE_16MB); + Size =3D (UINT32) ((CmosRead16 (CMOS_SYSTEM_MEM_ABOVE_16MB_LOW_BYTE) << = 16) + + SIZE_16MB); + return Size; } =20 +/** + Get the system memory size above 4GB + + @return The size of system memory above 4GB +**/ STATIC UINT64 GetSystemMemorySizeAbove4gb( @@ -35,14 +45,12 @@ GetSystemMemorySizeAbove4gb( UINT32 Size; // // CMOS 0x5b-0x5d specifies the system memory above 4GB MB. - // * CMOS(0x5d) is the most significant size byte - // * CMOS(0x5c) is the middle size byte - // * CMOS(0x5b) is the least significant size byte // * The size is specified in 64kb chunks // - Size =3D (CmosRead16 (0x5c) << 8) + CmosRead8 (0x5b); + Size =3D (CmosRead16 (CMOS_SYSTEM_MEM_ABOVE_4GB_MIDDLE_BYTE) << 8) + + CmosRead8 (CMOS_SYSTEM_MEM_ABOVE_4GB_LOW_BYTE); =20 - return LShiftU64(Size, 16); + return LShiftU64 (Size, 16); } =20 /** diff --git a/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlat= formDxe.h b/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlatf= ormDxe.h index 0dc174421c..ccd35e2924 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlatformDxe= .h +++ b/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlatformDxe= .h @@ -21,6 +21,7 @@ #include #include #include +#include =20 /** Validates the SMBIOS entry point structure --=20 2.19.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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