From nobody Sun May 5 11:13:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+51768+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51768+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1575529689; cv=none; d=zohomail.com; s=zohoarc; b=c1oEnwpMW97YQilfqqJ4V0NZu03BxP7r4xepApbUrlve8UNCEIo1kHgNIMztwZJOZE6adoZXtW3EYg2ny3/ZhhCJ+oSIPV2RF2m+S6SxoIfsQzOwD41ItVXClzFIUbRAZVeiTKZojqWCZ3vCKPHqvvxzrfSa/L61LSptEPtiBjQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1575529689; h=Content-Transfer-Encoding:Cc:Date:From:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=RmboLNAqxgq4SeagGNvox2D74o3X2Jgdtr5Nlnw2ER4=; b=k8+WjW54eASWxWPcoi3VLJoHlgqfEnCq9phdlG0Ys/9c9nPzrqVRsUpM8uunFbhalx67lepWEmh32uYZA2YQGSV+mNjXvjScQ/Y1IXnipAkiL5fac3Qg8AzAZHmwre9y1kT8S0fpEWBxhW3rbs7uQXubyLdtREWfgS75zsIsGuQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51768+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1575529689718491.6423624416566; Wed, 4 Dec 2019 23:08:09 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id vf3gYY1788612xdqkGJ4J5M2; Wed, 04 Dec 2019 23:08:09 -0800 X-Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web10.5889.1575529688459926727 for ; Wed, 04 Dec 2019 23:08:08 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Dec 2019 23:08:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,280,1571727600"; d="scan'208";a="243143247" X-Received: from ydong10-desktop.ccr.corp.intel.com ([10.239.158.133]) by fmsmga002.fm.intel.com with ESMTP; 04 Dec 2019 23:08:07 -0800 From: "Dong, Eric" To: devel@edk2.groups.io Cc: Ray Ni , Laszlo Ersek Subject: [edk2-devel] [PATCH v5] UefiCpuPkg/PiSmmCpuDxeSmm: Avoid allocate Token every time Date: Thu, 5 Dec 2019 15:08:05 +0800 Message-Id: <20191205070805.1951-1-eric.dong@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,eric.dong@intel.com X-Gm-Message-State: k9chFp8w3xtsZ3XqzLH59LDBx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1575529689; bh=QdmOuxUt/5MhTAlhpCqMQAyXOXmsupXcotthZlWQoaQ=; h=Cc:Date:From:Reply-To:Subject:To; b=jPeqCL+0UIMJmtC6ZIbNHkuPYlW0MJEUXSE46vm6sr1UN7Sk8zbXNgG6SUfGn1VCqZL ILmxPLQzIYH9e6iQHOlP5VbOdFfGgz1ln354S5fscmpCqXDSMIw6M+d+UENeDBY9bQ5q+ X0xtFm5adwcO7oSEZaC3fEVIW97m+YDBJA0= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2388 Token is new introduced by MM MP Protocol. Current logic allocate Token every time when need to use it. The logic caused SMI latency raised to very high. Update logic to allocate Token buffer at driver's entry point. Later use the token from the allocated token buffer. Only when all the buffer have been used, then need to allocate new buffer. Signed-off-by: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Acked-by: Laszlo Ersek Reviewed-by: Ray Ni --- V5 changes: Refine PCD names and some code comments. V4 changes: Specify PCD type to FixedPcd in code.=20 V3 changes: Introduce PCD to control the pre allocated toke buffer size. v2 changes: Minor update based on comments. UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 67 ++++++++++++++++++-- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 15 +++++ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 3 + UefiCpuPkg/UefiCpuPkg.dec | 4 ++ UefiCpuPkg/UefiCpuPkg.uni | 3 + 5 files changed, 88 insertions(+), 4 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxe= Smm/MpService.c index 0685637c2b..757f1056f7 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -492,6 +492,24 @@ FreeTokens ( { LIST_ENTRY *Link; PROCEDURE_TOKEN *ProcToken; + TOKEN_BUFFER *TokenBuf; + + // + // Only free the token buffer recorded in the OldTOkenBufList + // upon exiting SMI. Current token buffer stays allocated so + // next SMI doesn't need to re-allocate. + // + gSmmCpuPrivate->UsedTokenNum =3D 0; + + Link =3D GetFirstNode (&gSmmCpuPrivate->OldTokenBufList); + while (!IsNull (&gSmmCpuPrivate->OldTokenBufList, Link)) { + TokenBuf =3D TOKEN_BUFFER_FROM_LINK (Link); + + Link =3D RemoveEntryList (&TokenBuf->Link); + + FreePool (TokenBuf->Buffer); + FreePool (TokenBuf); + } =20 while (!IsListEmpty (&gSmmCpuPrivate->TokenList)) { Link =3D GetFirstNode (&gSmmCpuPrivate->TokenList); @@ -499,7 +517,6 @@ FreeTokens ( =20 RemoveEntryList (&ProcToken->Link); =20 - FreePool ((VOID *)ProcToken->ProcedureToken); FreePool (ProcToken); } } @@ -1115,13 +1132,37 @@ CreateToken ( VOID ) { - PROCEDURE_TOKEN *ProcToken; + PROCEDURE_TOKEN *ProcToken; SPIN_LOCK *CpuToken; UINTN SpinLockSize; + TOKEN_BUFFER *TokenBuf; + UINT32 TokenCountPerChunk; =20 SpinLockSize =3D GetSpinLockProperties (); - CpuToken =3D AllocatePool (SpinLockSize); - ASSERT (CpuToken !=3D NULL); + TokenCountPerChunk =3D FixedPcdGet32 (PcdCpuSmmMpTokenCountPerChunk); + + if (gSmmCpuPrivate->UsedTokenNum =3D=3D TokenCountPerChunk) { + DEBUG ((DEBUG_VERBOSE, "CpuSmm: No free token buffer, allocate new buf= fer!\n")); + + // + // Record current token buffer for later free action usage. + // Current used token buffer not in this list. + // + TokenBuf =3D AllocatePool (sizeof (TOKEN_BUFFER)); + ASSERT (TokenBuf !=3D NULL); + TokenBuf->Signature =3D TOKEN_BUFFER_SIGNATURE; + TokenBuf->Buffer =3D gSmmCpuPrivate->CurrentTokenBuf; + + InsertTailList (&gSmmCpuPrivate->OldTokenBufList, &TokenBuf->Link); + + gSmmCpuPrivate->CurrentTokenBuf =3D AllocatePool (SpinLockSize * Token= CountPerChunk); + ASSERT (gSmmCpuPrivate->CurrentTokenBuf !=3D NULL); + gSmmCpuPrivate->UsedTokenNum =3D 0; + } + + CpuToken =3D (SPIN_LOCK *)(gSmmCpuPrivate->CurrentTokenBuf + SpinLockSiz= e * gSmmCpuPrivate->UsedTokenNum); + gSmmCpuPrivate->UsedTokenNum++; + InitializeSpinLock (CpuToken); AcquireSpinLock (CpuToken); =20 @@ -1732,10 +1773,28 @@ InitializeDataForMmMp ( VOID ) { + UINTN SpinLockSize; + UINT32 TokenCountPerChunk; + + SpinLockSize =3D GetSpinLockProperties (); + TokenCountPerChunk =3D FixedPcdGet32 (PcdCpuSmmMpTokenCountPerChunk); + ASSERT (TokenCountPerChunk !=3D 0); + if (TokenCountPerChunk =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "PcdCpuSmmMpTokenCountPerChunk should not be Zero= !\n")); + CpuDeadLoop (); + } + DEBUG ((DEBUG_INFO, "CpuSmm: SpinLock Size =3D 0x%x, PcdCpuSmmMpTokenCou= ntPerChunk =3D 0x%x\n", SpinLockSize, TokenCountPerChunk)); + + gSmmCpuPrivate->CurrentTokenBuf =3D AllocatePool (SpinLockSize * TokenCo= untPerChunk); + ASSERT (gSmmCpuPrivate->CurrentTokenBuf !=3D NULL); + + gSmmCpuPrivate->UsedTokenNum =3D 0; + gSmmCpuPrivate->ApWrapperFunc =3D AllocatePool (sizeof (PROCEDURE_WRAPPE= R) * gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus); ASSERT (gSmmCpuPrivate->ApWrapperFunc !=3D NULL); =20 InitializeListHead (&gSmmCpuPrivate->TokenList); + InitializeListHead (&gSmmCpuPrivate->OldTokenBufList); } =20 /** diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmC= puDxeSmm/PiSmmCpuDxeSmm.h index 7e7c73f27f..5c1a01e42b 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -217,6 +217,17 @@ typedef struct { =20 #define PROCEDURE_TOKEN_FROM_LINK(a) CR (a, PROCEDURE_TOKEN, Link, PROCED= URE_TOKEN_SIGNATURE) =20 +#define TOKEN_BUFFER_SIGNATURE SIGNATURE_32 ('T', 'K', 'B', 'S') + +typedef struct { + UINTN Signature; + LIST_ENTRY Link; + + UINT8 *Buffer; +} TOKEN_BUFFER; + +#define TOKEN_BUFFER_FROM_LINK(a) CR (a, TOKEN_BUFFER, Link, TOKEN_BUFFER= _SIGNATURE) + // // Private structure for the SMM CPU module that is stored in DXE Runtime = memory // Contains the SMM Configuration Protocols that is produced. @@ -243,6 +254,10 @@ typedef struct { PROCEDURE_WRAPPER *ApWrapperFunc; LIST_ENTRY TokenList; =20 + LIST_ENTRY OldTokenBufList; + + UINT8 *CurrentTokenBuf; + UINT32 UsedTokenNum; // Only record tokens = used in CurrentTokenBuf. } SMM_CPU_PRIVATE_DATA; =20 extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate; diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/UefiCpuPkg/PiSm= mCpuDxeSmm/PiSmmCpuDxeSmm.inf index b12b2691f8..76b1462996 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf @@ -140,6 +140,9 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdHeapGuardPropertyMask ##= CONSUMES gEfiMdePkgTokenSpaceGuid.PcdControlFlowEnforcementPropertyMask ##= CONSUMES =20 +[FixedPcd] + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmMpTokenCountPerChunk ##= CONSUMES + [Pcd.X64] gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmRestrictedMemoryAccess ## CONS= UMES =20 diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 12f4413ea5..797f948631 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -148,6 +148,10 @@ # @Prompt Specify size of good stack of exception which need switching s= tack. gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize|2048|UINT32|0x30002001 =20 + ## Count of pre allocated SMM MP tokens per chunk. + # @Prompt Specify the count of pre allocated SMM MP tokens per chunk. + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmMpTokenCountPerChunk|64|UINT32|0x3000= 2002 + [PcdsFixedAtBuild, PcdsPatchableInModule] ## This value is the CPU Local APIC base address, which aligns the addre= ss on a 4-KByte boundary. # @Prompt Configure base address of CPU Local APIC diff --git a/UefiCpuPkg/UefiCpuPkg.uni b/UefiCpuPkg/UefiCpuPkg.uni index bfd696f48c..442ce5cb85 100644 --- a/UefiCpuPkg/UefiCpuPkg.uni +++ b/UefiCpuPkg/UefiCpuPkg.uni @@ -272,3 +272,6 @@ = "24000000 - 6th and 7th generation Intel Core processor= s and Intel Xeon W Processor Family(24MHz).
\n" = "19200000 - Intel Atom processors based on Goldmont Mic= roarchitecture with CPUID signature 06_5CH(19.2MHz).
\n" =20 +#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuSmmMpTokenCountPerChunk_PROMPT= #language en-US "Specify the count of pre allocated SMM MP tokens per chu= nk.\n" + +#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuSmmMpTokenCountPerChunk_HELP = #language en-US "This value used to specify the count of pre allocated SM= M MP tokens per chunk.\n" \ No newline at end of file --=20 2.23.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#51768): https://edk2.groups.io/g/devel/message/51768 Mute This Topic: https://groups.io/mt/66924873/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-