From nobody Sun Apr 28 00:48:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+51745+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51745+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1575474907; cv=none; d=zohomail.com; s=zohoarc; b=UD3lkf/thbpH38uJWSnUyxgaazS1UhWY76nsu5/tr06ValG/iowY7iqUM6YxRvOeFJNTh9bNLbIEMpg4O+sqsQbuJHBjipkIjCeQTwThSXXDM1TDyAGrRYe7xqvctfkVsVoWKyd1kgr/AF7SHizzAAkaogo9JZKW9Gr0HZZq/Qc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1575474907; h=Content-Transfer-Encoding:Cc:Date:From:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=0xrVjB5v9HwH/jXerQn8YNvKhc042B8vMhomrTr8D3U=; b=JOycORMhk9PM9YP7vLOcixle4yh1Sdwq10PU/O7r42ZUchQOdYwA3GTy5a7NCYCSrRP10GWm/odCBfc02BwMg82AcvjF7SZOvc3ix3BhsuXVawh8oyMeXZ7XhfqZva0oxSVhAt/RiURsOYsskQ8OzXhYC+xnmtT1KvtPjlfKZkw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51745+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1575474907439827.359722338829; Wed, 4 Dec 2019 07:55:07 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id aaaaYY1788612xaaaaaaaaaa; Wed, 04 Dec 2019 07:55:06 -0800 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web12.6313.1575474905298803448 for ; Wed, 04 Dec 2019 07:55:05 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Dec 2019 07:55:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,277,1571727600"; d="scan'208";a="242888134" X-Received: from unknown (HELO PIDSBABIOS005.gar.corp.intel.com) ([10.223.9.183]) by fmsmga002.fm.intel.com with ESMTP; 04 Dec 2019 07:55:01 -0800 From: "Javeed, Ashraf" To: devel@edk2.groups.io Cc: Michael D Kinney , Liming Gao , Ray Ni Subject: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH V5] MdePkg/Protocols: New interface, EFI encodings to PCI Plat protocol Date: Wed, 4 Dec 2019 21:24:56 +0530 Message-Id: <20191204155456.18824-1-ashraf.javeed@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ashraf.javeed@intel.com X-Gm-Message-State: aaaaaaaaaaaaaaaaaaaaaaaax1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1575474906; bh=RdzKrIEjVdJMfhrtDMIDzJx+capca32oP5ipUkQeQLQ=; h=Cc:Date:From:Reply-To:Subject:To; b=BG/RtTcDdnsEJwDYp9Mjcak2cT2Eh9UcOzU9mWtcJFOQ/2TCf/WLhUjbE+arHIQM9zb ut39v5+z3VHxAa9665Qm5IdmvyVwX8+3gXof4BQryoaQgR3ry0uvToPszdrqhU2N7ptrV qnim1peJAT4yNclLz8JVeXZW5dTbQ4Aj0CM= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1954 New interface added to PCI Platform Protocol / PCI Override Protocol to retrieve device-specific platform policy for the following PCI standard features, like Maximum Payload Size (MPS), Maximum Read Request Size (MRRS),Extended Tags, Relax Order, No-Snoop, Active State Power Management (ASPM),Latency Time Reporting (LTR), AtomicOp, Reference Clock Configuration, Extended SYNCH, PTM support, and Completion Timeout (CTO). New source files added with enhanced definitions are in: MdePkg/Include/Protocol/PciPlatform2.h, MdePkg/Include/Protocol/PciOverride2.h Signed-off-by: Ashraf Javeed Cc: Michael D Kinney Cc: Liming Gao Cc: Ray Ni --- In V5: Revised ECR to define new PCI Platform Protocol to support the PCI Express capability features:- EFI_PCI_EXPRESS_PLATFORM_PROTOCOL, EFI_PCI_EXPRESS_OVERRIDE_PROTOCOL. Added new interface -> NotifyDeviceConfiguration Added new EFI encodings / data types for PCIe features:- CPM, L1 PM substates. Enhance the definition of the PCIe feature AtomicOp to support additional attribute - Egress blocking of the port. In V4: Redefinition of the existing interfaces in the EFI_PCI_PLATFORM_- PROTOCOL2, to avoid type casting and to avoid further future change In V3: License update in the header sections of source files In V2: Correction made to header sections of source files --- MdePkg/Include/Protocol/PciOverride2.h | 12 ++++++------ MdePkg/Include/Protocol/PciPlatform2.h | 684 +++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++++++++++-----------------------------------------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= ------------------------------------------------------- MdePkg/MdePkg.dec | 4 ++-- 3 files changed, 365 insertions(+), 335 deletions(-) diff --git a/MdePkg/Include/Protocol/PciOverride2.h b/MdePkg/Include/Protoc= ol/PciOverride2.h index 7e878a4..9dafd28 100644 --- a/MdePkg/Include/Protocol/PciOverride2.h +++ b/MdePkg/Include/Protocol/PciOverride2.h @@ -14,24 +14,24 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #define _PCI_OVERRIDE2_H_ =20 /// -/// EFI_PCI_OVERRIDE_PROTOCOL has the same structure with EFI_PCI_PLATFORM= _PROTOCOL +/// EFI_PCI_EXPRESS_OVERRIDE_PROTOCOL has the same structure as of EFI_PCI= _EXPRESS_PLATFORM_PROTOCOL /// #include =20 /// -/// Global ID for the EFI_PCI_OVERRIDE_PROTOCOL +/// Global ID for the EFI_PCI_EXPRESS_OVERRIDE_PROTOCOL /// -#define EFI_PCI_OVERRIDE2_GUID \ +#define EFI_PCI_EXPRESS_OVERRIDE_GUID \ { \ 0xb9d5ea1, 0x66cb, 0x4546, {0xb0, 0xbb, 0x5c, 0x6d, 0xae, 0xd9, 0x42, = 0x47} \ } =20 /// -/// Declaration for EFI_PCI_OVERRIDE_PROTOCOL +/// Declaration for EFI_PCI_EXPRESS_OVERRIDE_PROTOCOL /// -typedef EFI_PCI_PLATFORM_PROTOCOL2 EFI_PCI_OVERRIDE_PROTOCOL2; +typedef EFI_PCI_EXPRESS_PLATFORM_PROTOCOL EFI_PCI_EXPRESS_OVERRIDE_PROTO= COL; =20 =20 -extern EFI_GUID gEfiPciOverrideProtocol2Guid; +extern EFI_GUID gEfiPciExpressOverrideProtocolGuid; =20 #endif diff --git a/MdePkg/Include/Protocol/PciPlatform2.h b/MdePkg/Include/Protoc= ol/PciPlatform2.h index 6dcae70..f69fa6e 100644 --- a/MdePkg/Include/Protocol/PciPlatform2.h +++ b/MdePkg/Include/Protocol/PciPlatform2.h @@ -14,21 +14,15 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #define _PCI_PLATFORM2_H_ =20 /// -/// This file must be included because the EFI_PCI_PLATFORM_PROTOCOL2 uses +/// This file must be included because the EFI_PCI_EXPRESS_PLATFORM_PROTOC= OL uses /// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE. /// #include =20 /// -/// This file is included to reuse the existing PCI Platform data structure -/// definitions of EFI_PCI_EXECUTION_PHASE,EFI_PCI_PLATFORM_POLICY +/// Global ID for the EFI_PCI_EXPRESS_PLATFORM_PROTOCOL. /// -#include - -/// -/// Global ID for the EFI_PCI_PLATFORM_PROTOCOL2. -/// -#define EFI_PCI_PLATFORM_PROTOCOL2_GUID \ +#define EFI_PCI_EXPRESS_PLATFORM_PROTOCOL_GUID \ { \ 0x787b0367, 0xa945, 0x4d60, {0x8d, 0x34, 0xb9, 0xd1, 0x88, 0xd2, 0xd0,= 0xb6} \ } @@ -39,429 +33,417 @@ SPDX-License-Identifier: BSD-2-Clause-Patent /// shall use these versions number to maintain the backward compatibility= as /// per its specification changes in future. /// -enum EfiPciPlatformProtocolVersion { - EFI_PCI_PLATFORM_PROTOCOL_MAJOR_VERSION =3D 1, - EFI_PCI_PLATFORM_PROTOCOL_MINOR_VERSION =3D 1 +enum EfiPciExpressPlatformProtocolVersion { + EFI_PCI_EXPRESS_PLATFORM_PROTOCOL_MAJOR_VERSION =3D 1, + EFI_PCI_EXPRESS_PLATFORM_PROTOCOL_MINOR_VERSION =3D 1 }; =20 /// -/// Forward declaration for EFI_PCI_PLATFORM_PROTOCOL2. +/// Forward declaration for EFI_PCI_EXPRESS_PLATFORM_PROTOCOL. /// -typedef struct _EFI_PCI_PLATFORM_PROTOCOL2 EFI_PCI_PLATFORM_PROTOCOL2; +typedef struct _EFI_PCI_EXPRESS_PLATFORM_PROTOCOL EFI_PCI_EXPRESS_PLATFOR= M_PROTOCOL; =20 /// /// Related Definitions /// =20 /// -/// Following are the data types for EFI_PCI_PLATYFORM_EXTENDED_POLICY +/// EFI encoding used in notification to the platform, for any of the PCI = Express +/// capabilites features state, to indicate that its is not a supported fe= ature, +/// or its present state is unknown +/// +#define EFI_PCI_EXPRESS_NOT_APPLICABLE 0xFF + +/// +/// Following are the data types for EFI_PCI_EXPRESS_PLATFORM_POLICY /// each for the PCI standard feature and its corresponding bitmask /// representing the valid combinations of PCI attributes /// =20 /// /// This data type is to retrieve the PCI device platform policy for the P= CI- -/// compliant feature Maximum Payload Size (MPS). Refer to PCI Base Specif= ication -/// 4, (chapter 7.5.3.4) on how to translate the below EFI encodings as pe= r the -/// PCI hardware terminology. If this data member value is returned as 0 t= han -/// there is no platform policy to override, this feature would be enabled= as +/// compliant feature PCIe device Maximum Payload Size (MPS). Refer to PCI= Express +/// Base Specification 4 (chapter 7.5.3.4), on how to translate the below = EFI +/// encodings as per the PCI hardware terminology. If this data member val= ue is 0 +/// than there is no platform policy to override, this feature would be en= abled as /// per its PCI specification based on the device capabilities. Below is it /// data type and the macro definitions which the driver uses for interpre= ting /// the platform policy. /// -typedef UINT8 EFI_PCI_CONF_MAX_PAYLOAD_SIZE; +typedef UINT8 EFI_PCI_EXPRESS_MAX_PAYLOAD_SIZE; =20 -#define EFI_PCI_CONF_MAX_PAYLOAD_SIZE_AUTO 0x00 //No request for overri= de -#define EFI_PCI_CONF_MAX_PAYLOAD_SIZE_128B 0x01 //set to default 128B -#define EFI_PCI_CONF_MAX_PAYLOAD_SIZE_256B 0x02 //set to 256B if applic= able -#define EFI_PCI_CONF_MAX_PAYLOAD_SIZE_512B 0x03 //set to 512B if applic= able -#define EFI_PCI_CONF_MAX_PAYLOAD_SIZE_1024B 0x04 //set to 1024B if appli= cable -#define EFI_PCI_CONF_MAX_PAYLOAD_SIZE_2048B 0x05 //set to 2048B if appli= cable -#define EFI_PCI_CONF_MAX_PAYLOAD_SIZE_4096B 0x06 //set to 4096B if appli= cable +#define EFI_PCI_EXPRESS_MAX_PAYLOAD_SIZE_AUTO 0x00 //No request for ove= rride +#define EFI_PCI_EXPRESS_MAX_PAYLOAD_SIZE_128B 0x01 //set to default 128B +#define EFI_PCI_EXPRESS_MAX_PAYLOAD_SIZE_256B 0x02 //set to 256B if app= licable +#define EFI_PCI_EXPRESS_MAX_PAYLOAD_SIZE_512B 0x03 //set to 512B if app= licable +#define EFI_PCI_EXPRESS_MAX_PAYLOAD_SIZE_1024B 0x04 //set to 1024B if ap= plicable +#define EFI_PCI_EXPRESS_MAX_PAYLOAD_SIZE_2048B 0x05 //set to 2048B if ap= plicable +#define EFI_PCI_EXPRESS_MAX_PAYLOAD_SIZE_4096B 0x06 //set to 4096B if ap= plicable =20 /// /// This data type is to retrieve the PCI device platform policy for the P= CI- -/// compliant feature Maximum Read Request Size (MRRS). Refer to PCI Base -/// Specification 4, (chapter 7.5.3.4) on how to translate the below EFI +/// compliant feature Maximum Read Request Size (MRRS). Refer to PCI Expre= ss Base +/// Specification 4 (chapter 7.5.3.4), on how to translate the below EFI /// encodings as per the PCI hardware terminology. If this data member val= ue /// is returned as 0 than there is no platform policy to override, this fe= ature /// would be enabled as per its PCI specification based on the device capa= bilities. /// Below is it data type and the macro definitions which the driver uses = for /// interpreting the platform policy. /// -typedef UINT8 EFI_PCI_CONF_MAX_READ_REQ_SIZE; +typedef UINT8 EFI_PCI_EXPRESS_MAX_READ_REQ_SIZE; =20 -#define EFI_PCI_CONF_MAX_READ_REQ_SIZE_AUTO 0x00 //No request for overri= de -#define EFI_PCI_CONF_MAX_READ_REQ_SIZE_128B 0x01 //set to default 128B -#define EFI_PCI_CONF_MAX_READ_REQ_SIZE_256B 0x02 //set to 256B if applic= able -#define EFI_PCI_CONF_MAX_READ_REQ_SIZE_512B 0x03 //set to 512B if applic= able -#define EFI_PCI_CONF_MAX_READ_REQ_SIZE_1024B 0x04 //set to 1024B if appli= cable -#define EFI_PCI_CONF_MAX_READ_REQ_SIZE_2048B 0x05 //set to 2048B if appli= cable -#define EFI_PCI_CONF_MAX_READ_REQ_SIZE_4096B 0x06 //set to 4096B if appli= cable +#define EFI_PCI_EXPRESS_MAX_READ_REQ_SIZE_AUTO 0x00 //No request for ove= rride +#define EFI_PCI_EXPRESS_MAX_READ_REQ_SIZE_128B 0x01 //set to default 128B +#define EFI_PCI_EXPRESS_MAX_READ_REQ_SIZE_256B 0x02 //set to 256B if app= licable +#define EFI_PCI_EXPRESS_MAX_READ_REQ_SIZE_512B 0x03 //set to 512B if app= licable +#define EFI_PCI_EXPRESS_MAX_READ_REQ_SIZE_1024B 0x04 //set to 1024B if ap= plicable +#define EFI_PCI_EXPRESS_MAX_READ_REQ_SIZE_2048B 0x05 //set to 2048B if ap= plicable +#define EFI_PCI_EXPRESS_MAX_READ_REQ_SIZE_4096B 0x06 //set to 4096B if ap= plicable =20 /// /// This data type is to retrieve the PCI device platform policy for the P= CI- -/// compliant feature Extended Tags. Refer to PCI Base Specification -/// 4, (chapter 7.5.3.4) on how to translate the below EFI encodings as pe= r the +/// compliant feature Extended Tags. Refer to PCI Express Base Specificati= on +/// 4 (chapter 7.5.3.4), on how to translate the below EFI encodings as pe= r the /// PCI hardware terminology. If this data member value is returned as 0 t= han /// there is no platform policy to override, this feature would be enabled= as /// per its PCI specification based on the device capabilities. Below is it /// data type and the macro definitions which the driver uses for interpre= ting /// the platform policy. /// -typedef UINT8 EFI_PCI_CONF_EXTENDED_TAG; +typedef UINT8 EFI_PCI_EXPRESS_EXTENDED_TAG; =20 -#define EFI_PCI_CONF_EXTENDED_TAG_AUTO 0x00 //No request for override -#define EFI_PCI_CONF_EXTENDED_TAG_5BIT 0x01 //set to default 5-bit -#define EFI_PCI_CONF_EXTENDED_TAG_8BIT 0x02 //set to 8-bit if applicable -#define EFI_PCI_CONF_EXTENDED_TAG_10BIT 0x03 //set to 10-bit if applicab= le +#define EFI_PCI_EXPRESS_EXTENDED_TAG_AUTO 0x00 //No request for override +#define EFI_PCI_EXPRESS_EXTENDED_TAG_5BIT 0x01 //set to default 5-bit +#define EFI_PCI_EXPRESS_EXTENDED_TAG_8BIT 0x02 //set to 8-bit if applic= able +#define EFI_PCI_EXPRESS_EXTENDED_TAG_10BIT 0x03 //set to 10-bit if appli= cable =20 /// /// This data type is to retrieve the PCI device platform policy for the P= CI- -/// compliant feature PCIe link's Active State Power Mgmt (ASPM). Refer to= PCI Base -/// Specification 4, (chapter 7.5.3.7) on how to translate the below EFI -/// encodings as per the PCI hardware terminology. If this data member val= ue -/// is returned as 0 than there is no platform policy to override, this fe= ature -/// would be enabled as per its PCI specification based on the device capa= bilities. +/// compliant feature PCIe link's Active State Power Mgmt (ASPM). +/// Refer to PCI Express Base Specification 4 (chapter 7.5.3.7), on how to +/// translate the below EFI encodings as per the PCI hardware terminology. +/// If this data member value is returned as 0 than there is no platform p= olicy +/// to override, this feature would be enabled as per its PCI specificatio= n based +/// on the device capabilities. /// Below is it data type and the macro definitions which the driver uses = for /// interpreting the platform policy. /// -typedef UINT8 EFI_PCI_CONF_ASPM_SUPPORT; +typedef UINT8 EFI_PCI_EXPRESS_ASPM_SUPPORT; =20 -#define EFI_PCI_CONF_ASPM_AUTO 0x00 //No request for override -#define EFI_PCI_CONF_ASPM_DISABLE 0x01 //set to default disable st= ate -#define EFI_PCI_CONF_ASPM_L0s_SUPPORT 0x02 //set to L0s state -#define EFI_PCI_CONF_ASPM_L1_SUPPORT 0x03 //set to L1 state -#define EFI_PCI_CONF_ASPM_L0S_L1_SUPPORT 0x04 //set to L0s and L1 state +#define EFI_PCI_EXPRESS_ASPM_AUTO 0x00 //No request for override +#define EFI_PCI_EXPRESS_ASPM_DISABLE 0x01 //set to default disable= state +#define EFI_PCI_EXPRESS_ASPM_L0s_SUPPORT 0x02 //set to L0s state +#define EFI_PCI_EXPRESS_ASPM_L1_SUPPORT 0x03 //set to L1 state +#define EFI_PCI_EXPRESS_ASPM_L0S_L1_SUPPORT 0x04 //set to L0s and L1 state =20 /// /// This data type is to retrieve the PCI device platform policy for the P= CI- -/// compliant feature PCIe Device's Relax Ordering enable/disable. Refer t= o PCI Base -/// Specification 4, (chapter 7.5.3.4) on how to translate the below EFI -/// encodings as per the PCI hardware terminology. If this data member val= ue -/// is returned as 0 than there is no platform policy to override, this fe= ature -/// would be enabled as per its PCI specification based on the device capa= bilities. +/// compliant feature PCIe Device's Relax Ordering enable/disable. +/// Refer to PCI Express Base Specification 4 (chapter 7.5.3.4), on how to +/// translate the below EFI encodings as per the PCI hardware terminology. +/// If this data member value is returned as 0 than there is no platform p= olicy +/// to override, this feature would be enabled as per its PCI specificatio= n based +/// on the device capabilities. /// Below is it data type and the macro definitions which the driver uses = for /// interpreting the platform policy. /// -typedef UINT8 EFI_PCI_CONF_RELAX_ORDER; +typedef UINT8 EFI_PCI_EXPRESS_RELAX_ORDER; =20 -#define EFI_PCI_CONF_RO_AUTO 0x00 //No request for override -#define EFI_PCI_CONF_RO_DISABLE 0x01 //set to default disable state -#define EFI_PCI_CONF_RO_ENABLE 0x02 //set to enable state +#define EFI_PCI_EXPRESS_RO_AUTO 0x00 //No request for override +#define EFI_PCI_EXPRESS_RO_DISABLE 0x01 //set to default disable state +#define EFI_PCI_EXPRESS_RO_ENABLE 0x02 //set to enable state =20 /// /// This data type is to retrieve the PCI device platform policy for the P= CI- -/// compliant feature PCIe Device's No-Snoop enable/disable. Refer to PCI = Base -/// Specification 4, (chapter 7.5.3.4) on how to translate the below EFI -/// encodings as per the PCI hardware terminology. If this data member val= ue -/// is returned as 0 than there is no platform policy to override, this fe= ature -/// would be enabled as per its PCI specification based on the device capa= bilities. +/// compliant feature PCIe Device's No-Snoop enable/disable. +/// Refer to PCI Express Base Specification 4 (chapter 7.5.3.4), on how to +/// translate the below EFI encodings as per the PCI hardware terminology. +/// If this data member value is returned as 0 than there is no platform p= olicy +/// to override, this feature would be enabled as per its PCI specificatio= n based +/// on the device capabilities. /// Below is it data type and the macro definitions which the driver uses = for /// interpreting the platform policy. /// -typedef UINT8 EFI_PCI_CONF_NO_SNOOP; +typedef UINT8 EFI_PCI_EXPRESS_NO_SNOOP; =20 -#define EFI_PCI_CONF_NS_AUTO 0x00 //No request for override -#define EFI_PCI_CONF_NS_DISABLE 0x01 //set to default disable state -#define EFI_PCI_CONF_NS_ENABLE 0x02 //set to enable state +#define EFI_PCI_EXPRESS_NS_AUTO 0x00 //No request for override +#define EFI_PCI_EXPRESS_NS_DISABLE 0x01 //set to default disable state +#define EFI_PCI_EXPRESS_NS_ENABLE 0x02 //set to enable state =20 /// /// This data type is to retrieve the PCI device platform policy for the P= CI- /// compliant feature PCIe link's Clock configuration is common or discret= e. -/// Refer to PCI Base Specification 4, (chapter 7.5.3.7) on how to transla= te the -/// below EFI encodings as per the PCI hardware terminology. If this data = member +/// Refer to PCI Express Base Specification 4 (chapter 7.5.3.7), on how to= translate +/// the below EFI encodings as per the PCI hardware terminology. If this d= ata member /// value is returned as 0 than there is no platform policy to override, t= his /// feature would be enabled as per its PCI specification based on the dev= ice /// capabilities. Below is its data type and the macro definitions which t= he /// driver uses for interpreting the platform policy. /// -typedef UINT8 EFI_PCI_CONF_COMMON_CLOCK_CFG; +typedef UINT8 EFI_PCI_EXPRESS_COMMON_CLOCK_CFG; =20 -#define EFI_PCI_CONF_CLK_CFG_AUTO 0x00 //No request for override -#define EFI_PCI_CONF_CLK_CFG_ASYNCH 0x01 //set to default asynchronous = clock -#define EFI_PCI_CONF_CLK_CFG_COMMON 0x02 //set to common clock +#define EFI_PCI_EXPRESS_CLK_CFG_AUTO 0x00 //No request for override +#define EFI_PCI_EXPRESS_CLK_CFG_ASYNCH 0x01 //set to default asynchrono= us clock +#define EFI_PCI_EXPRESS_CLK_CFG_COMMON 0x02 //set to common clock =20 /// /// This data type is to retrieve the PCI device platform policy for the P= CI- /// compliant feature PCIe link's Extended Synch enable or disable. -/// Refer to PCI Base Specification 4, (chapter 7.5.3.7) on how to transla= te the -/// below EFI encodings as per the PCI hardware terminology. If this data = member +/// Refer to PCI Express Base Specification 4 (chapter 7.5.3.7), on how to= translate +/// the below EFI encodings as per the PCI hardware terminology. If this d= ata member /// value is returned as 0 than there is no platform policy to override, t= his /// feature would be enabled as per its PCI specification based on the dev= ice /// capabilities. Below is its data type and the macro definitions which t= he /// driver uses for interpreting the platform policy. /// -typedef UINT8 EFI_PCI_CONF_EXTENDED_SYNCH; +typedef UINT8 EFI_PCI_EXPRESS_EXTENDED_SYNCH; =20 -#define EFI_PCI_CONF_EXT_SYNCH_AUTO 0x00 //No request for override -#define EFI_PCI_CONF_EXT_SYNCH_DISABLE 0x01 //set to default disable state -#define EFI_PCI_CONF_EXT_SYNCH_ENABLE 0x02 //set to enable state +#define EFI_PCI_EXPRESS_EXT_SYNCH_AUTO 0x00 //No request for override +#define EFI_PCI_EXPRESS_EXT_SYNCH_DISABLE 0x01 //set to default disable s= tate +#define EFI_PCI_EXPRESS_EXT_SYNCH_ENABLE 0x02 //set to enable state =20 /// /// This data type is to retrieve the PCI device platform policy for the P= CI- -/// compliant feature PCIe Device's AtomicOp Requester enable or disable. -/// Refer to PCI Base Specification 4, (chapter 7.5.3.16) on how to transl= ate the -/// below EFI encodings as per the PCI hardware terminology. If this data = member -/// value is returned as 0 than there is no platform policy to override, t= his -/// feature would be enabled as per its PCI specification based on the dev= ice -/// capabilities. Below is its data type and the macro definitions which t= he -/// driver uses for interpreting the platform policy. -/// -typedef UINT8 EFI_PCI_CONF_ATOMIC_OP; - -#define EFI_PCI_CONF_ATOMIC_OP_AUTO 0x00 //No request for override -#define EFI_PCI_CONF_ATOMIC_OP_DISABLE 0x01 //set to default disable state -#define EFI_PCI_CONF_ATOMIC_OP_ENABLE 0x02 //set to enable state +/// compliant feature PCIe Device's AtomicOp Requester enable or disable, = as well +/// as its Egress blocking based on the port's routing capability. +/// Refer to PCI Express Base Specification 4 (chapter 7.5.3.16), on how t= o translate +/// the given data structure as per the PCI hardware terminology. +/// If the data member "Override" value is 0 than there is no platform pol= icy to +/// override, other data members value has to be ignored. If 1 than other = data +/// members will be used as per the device capabilities. Below is its data= type +/// definitions which the driver uses for interpreting the platform policy. +/// +typedef struct _EFI_PCI_EXPRESS_ATOMIC_OP EFI_PCI_EXPRESS_ATOMIC_OP; + +struct _EFI_PCI_EXPRESS_ATOMIC_OP { + // + // set to indicate the platform request for override based on below data= member + // bit fields; clear bit indicates no platform request for override, ign= ore + // the other data member bit fields. Ignored when passed as input parame= ters. + // + UINT8 Override:1; + // + // set to enable the device as the requester for AtomicOp; clear bit to = force + // default disable state + // + UINT8 Enable_AtomicOpRequester:1; + // + // set to enable the AtomicOp Egress blocking on this port based on its = routing + // capabilitity; clear bit to force default disable state + // + UINT8 Enable_AtomicOpEgressBlocking:1; + // + // the remaining bits are unused for this feature + // + UINT8 Reserved:5; +}; =20 /// /// This data type is to retrieve the PCI device platform policy for the P= CI- /// compliant feature PCIe Device's LTR Mechanism enable/disable. -/// Refer to PCI Base Specification 4, (chapter 7.5.3.16) on how to transl= ate the -/// below EFI encodings as per the PCI hardware terminology. If this data = member +/// Refer to PCI Express Base Specification 4 (chapter 7.5.3.16), on how t= o translate +/// the below EFI encodings as per the PCI hardware terminology. If this d= ata member /// value is returned as 0 than there is no platform policy to override, t= his /// feature would be enabled as per its PCI specification based on the dev= ice /// capabilities. Below is its data type and the macro definitions which t= he /// driver uses for interpreting the platform policy. /// -typedef UINT8 EFI_PCI_CONF_LTR; +typedef UINT8 EFI_PCI_EXPRESS_LTR; =20 -#define EFI_PCI_CONF_LTR_AUTO 0x00 //No request for override -#define EFI_PCI_CONF_LTR_DISABLE 0x01 //set to default disable state -#define EFI_PCI_CONF_LTR_ENABLE 0x02 //set to enable state +#define EFI_PCI_EXPRESS_LTR_AUTO 0x00 //No request for override +#define EFI_PCI_EXPRESS_LTR_DISABLE 0x01 //set to default disable state +#define EFI_PCI_EXPRESS_LTR_ENABLE 0x02 //set to enable state =20 /// /// This data type is to retrieve the PCI device platform policy for the P= CI- /// compliant feature PCIe Device's Precision Time Measurement (PTM) enabl= e/disable. -/// Refer to PCI Base Specification 4, (chapter 7.5.3.16) on how to transl= ate the +/// Refer to PCI Express Base Specification 4 (chapter 7.5.3.16), on how t= o translate the /// below EFI encodings as per the PCI hardware terminology. If this data = member /// value is returned as 0 than there is no platform policy to override, t= his /// feature would be enabled as per its PCI specification based on the dev= ice /// capabilities. Below is its data type and the macro definitions which t= he /// driver uses for interpreting the platform policy. /// -typedef UINT8 EFI_PCI_CONF_PTM; +typedef UINT8 EFI_PCI_EXPRESS_PTM; =20 -#define EFI_PCI_CONF_PTM_AUTO 0x00 //No request for override -#define EFI_PCI_CONF_PTM_DISABLE 0x01 //set to default disable state -#define EFI_PCI_CONF_PTM_ENABLE 0x02 //set to enable state only -#define EFI_PCI_CONF_PTM_ROOT_SEL 0x02 //set to root select & enable +#define EFI_PCI_EXPRESS_PTM_AUTO 0x00 //No request for override +#define EFI_PCI_EXPRESS_PTM_DISABLE 0x01 //set to default disable state +#define EFI_PCI_EXPRESS_PTM_ENABLE 0x02 //set to enable state only +#define EFI_PCI_EXPRESS_PTM_ROOT_SEL 0x02 //set to root select & enable =20 /// /// This data type is to retrieve the PCI device platform policy for the P= CI- /// compliant feature PCIe Device's Completion Timeout (CTO) set to suppor= ted ranges -/// or disable. Refer to PCI Base Specification 4, (chapter 7.5.3.16) on h= ow to +/// or disable. Refer to PCI Express Base Specification 4 (chapter 7.5.3.1= 6), on how to /// translate the below EFI encodings as per the PCI hardware terminology.= If this /// data member value is returned as 0 than there is no platform policy to= override, /// this feature would be enabled as per its PCI specification based on th= e device /// capabilities. Below is its data type and the macro definitions which t= he /// driver uses for interpreting the platform policy. /// -typedef UINT8 EFI_PCI_CONF_CTO_SUPPORT; +typedef UINT8 EFI_PCI_EXPRESS_CTO_SUPPORT; + +#define EFI_PCI_EXPRESS_CTO_AUTO 0x00 //No request for override +#define EFI_PCI_EXPRESS_CTO_DEFAULT 0x01 //set to default range of 5u= s to 50ms if applicable +#define EFI_PCI_EXPRESS_CTO_RANGE_A1 0x02 //set to range of 50us to 10= 0us if applicable +#define EFI_PCI_EXPRESS_CTO_RANGE_A2 0x03 //set to range of 1ms to 10m= s if applicable +#define EFI_PCI_EXPRESS_CTO_RANGE_B1 0x04 //set to range of 16ms to 55= ms if applicable +#define EFI_PCI_EXPRESS_CTO_RANGE_B2 0x05 //set to range of 65ms to 21= 0ms if applicable +#define EFI_PCI_EXPRESS_CTO_RANGE_C1 0x06 //set to range of 260ms to 9= 00ms if applicable +#define EFI_PCI_EXPRESS_CTO_RANGE_C2 0x07 //set to range of 1s to 3.5s= if applicable +#define EFI_PCI_EXPRESS_CTO_RANGE_D1 0x08 //set to range of 4s to 13s = if applicable +#define EFI_PCI_EXPRESS_CTO_RANGE_D2 0x09 //set to range of 17s to 64s= if applicable +#define EFI_PCI_EXPRESS_CTO_DET_DISABLE 0x10 //set to CTO detection disab= le if applicable + +/// +/// This data type is to retrieve the PCI device platform policy for the P= CI- +/// compliant feature PCIe link's Clock Power Management (CPM) enable or d= isable. +/// Refer to PCI Express Base Specification 5 (chapter 7.5.3.7), on how to= translate +/// the below EFI encodings as per the PCI hardware terminology. If this d= ata member +/// value is returned as 0 than there is no platform policy to override, t= his +/// feature would be ignored or disabled/enabled, as per its relation with= other +/// components and its capabilities, as defined in its PCI specification. = Below +/// is its data type and the macro definitions which the driver uses for i= nterpreting +/// the platform policy. +/// +typedef UINT8 EFI_PCI_EXPRESS_CPM; =20 -#define EFI_PCI_CONF_CTO_AUTO 0x00 //No request for override -#define EFI_PCI_CONF_CTO_DEFAULT 0x01 //set to default range of 5us t= o 50ms if applicable -#define EFI_PCI_CONF_CTO_RANGE_A1 0x02 //set to range of 50us to 100us= if applicable -#define EFI_PCI_CONF_CTO_RANGE_A2 0x03 //set to range of 1ms to 10ms i= f applicable -#define EFI_PCI_CONF_CTO_RANGE_B1 0x04 //set to range of 16ms to 55ms = if applicable -#define EFI_PCI_CONF_CTO_RANGE_B2 0x05 //set to range of 65ms to 210ms= if applicable -#define EFI_PCI_CONF_CTO_RANGE_C1 0x06 //set to range of 260ms to 900m= s if applicable -#define EFI_PCI_CONF_CTO_RANGE_C2 0x07 //set to range of 1s to 3.5s if= applicable -#define EFI_PCI_CONF_CTO_RANGE_D1 0x08 //set to range of 4s to 13s if = applicable -#define EFI_PCI_CONF_CTO_RANGE_D2 0x09 //set to range of 17s to 64s if= applicable -#define EFI_PCI_CONF_CTO_DET_DISABLE 0x10 //set to CTO detection disable = if applicable +#define EFI_PCI_EXPRESS_CPM_AUTO 0x00 //No request for override +#define EFI_PCI_EXPRESS_CPM_DISABLE 0x01 //set to default disable state +#define EFI_PCI_EXPRESS_CPM_ENABLE 0x02 //set to enable state + +/// +/// This data type is to retrieve the PCI device platform policy for the P= CI- +/// compliant feature PCIe link's L1 PM substates. +/// Refer to PCI Express Base Specification 5 (chapter 7.8.3.3), on how to= translate +/// the given data structure as per the PCI hardware terminology. If the d= ata member +/// "Override" value is 0 than there is no platform policy to override, ot= her data +/// members will be ignored; if 1 than other data members are used for thi= s feature, +/// to align the states based on its capabilities as well as its relations= hip with +/// other components in the PCI hierarchy. The platform is expected to ret= urn any +/// combination from the four L1 PM substates. +/// Below is its data type definitions which the driver uses for interpret= ing +/// the platform policy. +/// +typedef struct _EFI_PCI_EXPRESS_L1PM_SUBSTATES EFI_PCI_EXPRESS_L1PM_SUBSTA= TES; + +struct _EFI_PCI_EXPRESS_L1PM_SUBSTATES { + // + // set to indicate the platform request to override the L1 PM substates = using + // the other data member bit fields; bit clear means no request from pla= tform + // to override the L1 PM substates for the device. Ignored when passed a= s input + // parameters. + // + UINT8 Override:1; + // + // set to enable the PCI-PM L1.2 state; bit clear to force default disab= le state + // + UINT8 Enable_Pci_Pm_L1_2:1; + // + // set to enable the PCI-PM L1.1 state; bit clear to force default disab= le state + // + UINT8 Enable_Pci_Pm_L1_1:1; + // + // set to enable the ASPM L1.2 state; bit clear to force default disable= state + // + UINT8 Enable_Aspm_L1_2:1; + // + // set to enable the ASPM L1.1 state; bit clear to force default disable= state + // + UINT8 Enable_Aspm_L1_1:1; + // + // rest of the remaining bits are reserved, not utilized; can be reused = in + // future to define additional conditions as per PCIe capabilities + // + UINT8 Reserved:3; +}; =20 /// /// Reserves for future use /// -typedef UINT8 EFI_PCI_CONF_RESERVES; +typedef UINT8 EFI_PCI_EXPRESS_RESERVES; =20 /// -/// The EFI_PCI_PLATYFORM_EXTENDED_POLICY is altogether 128-byte size, wit= h each +/// The EFI_PCI_EXPRESS_PLATFORM_POLICY is altogether 128-byte size, with = each /// byte field representing one PCI standerd feature defined in the PCI Ex= press Base /// Specification 4.0, version 1.0. /// typedef struct { - EFI_PCI_CONF_MAX_PAYLOAD_SIZE DeviceCtlMPS; - EFI_PCI_CONF_MAX_READ_REQ_SIZE DeviceCtlMRRS; - EFI_PCI_CONF_EXTENDED_TAG DeviceCtlExtTag; - EFI_PCI_CONF_RELAX_ORDER DeviceCtlRelaxOrder; - EFI_PCI_CONF_NO_SNOOP DeviceCtlNoSnoop; - EFI_PCI_CONF_ASPM_SUPPORT LinkCtlASPMState; - EFI_PCI_CONF_COMMON_CLOCK_CFG LinkCtlCommonClkCfg; - EFI_PCI_CONF_EXTENDED_SYNCH LinkCtlExtSynch; - EFI_PCI_CONF_ATOMIC_OP DeviceCtl2AtomicOp; - EFI_PCI_CONF_LTR DeviceCtl2LTR; - EFI_PCI_CONF_PTM PTMControl; - EFI_PCI_CONF_CTO_SUPPORT CTOsupport; - EFI_PCI_CONF_RESERVES Reserves[116]; -} EFI_PCI_PLATFORM_EXTENDED_POLICY; + EFI_PCI_EXPRESS_MAX_PAYLOAD_SIZE DeviceCtlMPS; + EFI_PCI_EXPRESS_MAX_READ_REQ_SIZE DeviceCtlMRRS; + EFI_PCI_EXPRESS_EXTENDED_TAG DeviceCtlExtTag; + EFI_PCI_EXPRESS_RELAX_ORDER DeviceCtlRelaxOrder; + EFI_PCI_EXPRESS_NO_SNOOP DeviceCtlNoSnoop; + EFI_PCI_EXPRESS_ASPM_SUPPORT LinkCtlASPMState; + EFI_PCI_EXPRESS_COMMON_CLOCK_CFG LinkCtlCommonClkCfg; + EFI_PCI_EXPRESS_EXTENDED_SYNCH LinkCtlExtSynch; + EFI_PCI_EXPRESS_ATOMIC_OP DeviceCtl2AtomicOp; + EFI_PCI_EXPRESS_LTR DeviceCtl2LTR; + EFI_PCI_EXPRESS_PTM PTMControl; + EFI_PCI_EXPRESS_CTO_SUPPORT CTOsupport; + EFI_PCI_EXPRESS_CPM LinkCtlCPM; + EFI_PCI_EXPRESS_L1PM_SUBSTATES L1PMSubstates; + EFI_PCI_EXPRESS_RESERVES Reserves[114]; +} EFI_PCI_EXPRESS_PLATFORM_POLICY; + +/// +/// The EFI_PCI_EXPRESS_DEVICE_CONFIGURATION is an alias of the data type = of +/// EFI_PCI_EXPRESS_PLATFORM_POLICY, used in returning the PCI feature's d= efinite +/// configuration states, of a device to the platform, through the +/// NotifyDeviceConfiguration interface method. +/// The EFI encoded macros like EFI_PCI_EXPRESS_*_AUTO, with the value 0 w= ill not +/// be used to report the PCI feature definite state; similarly for the da= ta type +/// of DeviceCtl2AtomicOp and L1PMSubstates, its data member "Override" wi= ll not +/// be used. For any device's PCI features that are not supported, or its = state +/// is unknown, it will be returned as EFI_PCI_EXPRESS_NOT_APPLICABLE. +/// +typedef EFI_PCI_EXPRESS_PLATFORM_POLICY EFI_PCI_EXPRESS_DEVICE_CONFIGURATI= ON; =20 /** - The notification from the PCI bus enumerator to the platform that it is - about to enter a certain phase during the enumeration process. - - The PlatformNotify() function can be used to notify the platform driver = so that - it can perform platform-specific actions. No specific actions are requir= ed. - Eight notification points are defined at this time. More synchronization= points - may be added as required in the future. The PCI bus driver calls the pla= tform driver - twice for every Phase-once before the PCI Host Bridge Resource Allocatio= n Protocol - driver is notified, and once after the PCI Host Bridge Resource Allocati= on Protocol - driver has been notified. - This member function may not perform any error checking on the input par= ameters. It - also does not return any error codes. If this member function detects an= y error condition, - it needs to handle those errors on its own because there is no way to su= rface any - errors to the caller. - - @param[in] This The pointer to the EFI_PCI_PLATFORM_PROTOCOL2 = instance. - @param[in] HostBridge The handle of the host bridge controller. - @param[in] Phase The phase of the PCI bus enumeration. - @param[in] ExecPhase Defines the execution phase of the PCI chipset= driver. - - @retval EFI_SUCCESS The function completed successfully. + Interface to retrieve the PCI device-specific platform policies to overr= ide + the PCI Express feature capabilities, of an PCI device. =20 -**/ -typedef -EFI_STATUS -(EFIAPI *EFI_PCI_PLATFORM_PHASE_NOTIFY2)( - IN EFI_PCI_PLATFORM_PROTOCOL2 *This, - IN EFI_HANDLE HostBridge, - IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase, - IN EFI_PCI_EXECUTION_PHASE ExecPhase - ); - -/** - The notification from the PCI bus enumerator to the platform for each PCI - controller at several predefined points during PCI controller initializa= tion. - - The PlatformPrepController() function can be used to notify the platform= driver so that - it can perform platform-specific actions. No specific actions are requir= ed. - Several notification points are defined at this time. More synchronizati= on points may be - added as required in the future. The PCI bus driver calls the platform d= river twice for - every PCI controller-once before the PCI Host Bridge Resource Allocation= Protocol driver - is notified, and once after the PCI Host Bridge Resource Allocation Prot= ocol driver has - been notified. - This member function may not perform any error checking on the input par= ameters. It also - does not return any error codes. If this member function detects any err= or condition, it - needs to handle those errors on its own because there is no way to surfa= ce any errors to - the caller. - - @param[in] This The pointer to the EFI_PCI_PLATFORM_PROTOCOL2 = instance. - @param[in] HostBridge The associated PCI host bridge handle. - @param[in] RootBridge The associated PCI root bridge handle. - @param[in] PciAddress The address of the PCI device on the PCI bus. - @param[in] Phase The phase of the PCI controller enumeration. - @param[in] ExecPhase Defines the execution phase of the PCI chipset= driver. - - @retval EFI_SUCCESS The function completed successfully. - -**/ -typedef -EFI_STATUS -(EFIAPI *EFI_PCI_PLATFORM_PREPROCESS_CONTROLLER2)( - IN EFI_PCI_PLATFORM_PROTOCOL2 *This, - IN EFI_HANDLE HostBridge, - IN EFI_HANDLE RootBridge, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress, - IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase, - IN EFI_PCI_EXECUTION_PHASE ExecPhase - ); - -/** - Retrieves the platform policy regarding enumeration. - - The GetPlatformPolicy() function retrieves the platform policy regarding= PCI - enumeration. The PCI bus driver and the PCI Host Bridge Resource Allocat= ion Protocol - driver can call this member function to retrieve the policy. + The consumer driver(s), like PCI Bus driver and PCI Host Bridge Resource= Allocation + Protocol drivers; can call this member function to retrieve the platform= policies + specific to PCI device, related to its PCI-Express capabilities. The pro= ducer of + this protocol is platform whom shall provide the device-specific pilicie= s to + override its PCIe features. =20 - @param[in] This The pointer to the EFI_PCI_PLATFORM_PROTOCOL2 in= stance. - @param[out] PciPolicy The platform policy with respect to VGA and ISA = aliasing. - - @retval EFI_SUCCESS The function completed successfully. - @retval EFI_INVALID_PARAMETER PciPolicy is NULL. - -**/ -typedef -EFI_STATUS -(EFIAPI *EFI_PCI_PLATFORM_GET_PLATFORM_POLICY2)( - IN CONST EFI_PCI_PLATFORM_PROTOCOL2 *This, - OUT EFI_PCI_PLATFORM_POLICY *PciPolicy - ); - -/** - Gets the PCI device's option ROM from a platform-specific location. - - The GetPciRom() function gets the PCI device's option ROM from a platfor= m-specific location. - The option ROM will be loaded into memory. This member function is used = to return an image - that is packaged as a PCI 2.2 option ROM. The image may contain both leg= acy and EFI option - ROMs. See the UEFI 2.0 Specification for details. This member function c= an be used to return - option ROM images for embedded controllers. Option ROMs for embedded con= trollers are typically - stored in platform-specific storage, and this member function can retrie= ve it from that storage - and return it to the PCI bus driver. The PCI bus driver will call this m= ember function before - scanning the ROM that is attached to any controller, which allows a plat= form to specify a ROM - image that is different from the ROM image on a PCI card. - - @param[in] This The pointer to the EFI_PCI_PLATFORM_PROTOCOL2 in= stance. - @param[in] PciHandle The handle of the PCI device. - @param[out] RomImage If the call succeeds, the pointer to the pointer= to the option ROM image. - Otherwise, this field is undefined. The memory f= or RomImage is allocated - by EFI_PCI_PLATFORM_PROTOCOL2.GetPciRom() using = the EFI Boot Service AllocatePool(). - It is the caller's responsibility to free the me= mory using the EFI Boot Service - FreePool(), when the caller is done with the opt= ion ROM. - @param[out] RomSize If the call succeeds, a pointer to the size of t= he option ROM size. Otherwise, - this field is undefined. - - @retval EFI_SUCCESS The option ROM was available for this dev= ice and loaded into memory. - @retval EFI_NOT_FOUND No option ROM was available for this devi= ce. - @retval EFI_OUT_OF_RESOURCES No memory was available to load the optio= n ROM. - @retval EFI_DEVICE_ERROR An error occurred in obtaining the option= ROM. - -**/ -typedef -EFI_STATUS -(EFIAPI *EFI_PCI_PLATFORM_GET_PCI_ROM2)( - IN CONST EFI_PCI_PLATFORM_PROTOCOL2 *This, - IN EFI_HANDLE PciHandle, - OUT VOID **RomImage, - OUT UINTN *RomSize - ); - -/** - Retrieves the PCI device-specific platform policy regarding enumeration. - - The PCI Bus driver and PCI Host Bridge Resource Allocation Protocol driv= ers - can call this member function to retrieve the platform policies specific= to - PCI device, regarding the PCI enumeration. - - The GetDevicePolicy() function retrieves the platform policy for a parti= cular - component regarding PCI enumeration. The PCI bus driver and the PCI Host= Bridge - Resource Allocation Protocol driver can call this member function to ret= rieve - the policy. - The existing GetPlatformPolicy() member function is used by the PCI Bus = driver - to program the legacy ranges, the data that is returned by that member f= unction - determines the supported attributes that are returned by the - EFI_PCI_IO_PROTOCOL.Attributes() function. The GetDevicePolicy() member function is meant to return data about othe= r PCI compliant features which would be supported by the PCI Bus driver in fut= ure; like for example the MPS, MRRS, Extended Tag, ASPM, etc. The details abo= ut - this PCI features can be obtained from the PCI Base Specification 4.x. T= he - EFI encodings for these feature are defined in the - EFI_PCI_PLATFORM_EXTENDED_POLICY, see the Related Definition section for= this. - This member function will use the associated EFI handle of the PCI IO Pr= otocol - to determine the physical PCI device within the chipset, to return its - device-specific platform policies. It is caller's responsibility to allo= cate - the buffer and pass its pointer to this member function, to get its devi= ce- - specific policy data. - - @param[in] This Pointer to the EFI_PCI_PLATFORM_PROTOCOL2 inst= ance. - @param[in] PciDevice The associated PCI IO Protocol handle of the P= CI - device. Type EFI_HANDLE is defined in - InstallProtocolInterface() in the UEFI 2.1 - Specification - @param[in] PciExtPolicy The pointer to platform policy with respect to= other - PCI features like, the MPS, MRRS, etc. Type - EFI_PCI_PLATFORM_EXTENDED_POLICY is defined in - "Related Definitions" above. + this PCI features can be obtained from the PCI Express Base Specificatio= n (Rev.4 + or 5). The EFI encodings for these features are defined in the EFI_PCI_E= XPRESS + _PLATFORM_POLICY, see the Related Definition section for this. This memb= er function + will use the associated EFI handle of the root bridge instance and the P= CI address + of type EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS to determine the phy= sical + PCI device within the chipset, to return its device-specific platform po= licies. + It is caller's responsibility to allocate the buffer and pass its pointe= r of + type EFI_PCI_EXPRESS_PLATFORM_POLICY to this member function, to get its= device + -specific policy data. On input, it uses the EFI_PCI_EXPRESS_NOT_APPLICA= BLE to + initialize those data members which the consumer do not intend to config= ure. + + At the system-level, the producer and consumer drivers of the platform n= eed + to use the designated bitwise PCD for each of the PCIe features defined = here + in order to synchronize on which PCIe features to be initialized by the = consumer + for which the producer can provide its device-specific overrides. The de= signated + bit value of the PCD if 1 indicates that the consumer can configure that= PCIe + feature for which it can expect the corresponding device-specific platfo= rm policy + provided in the associated data members of the EFI_PCI_EXPRESS_PLATFORM_= POLICY. + The PCD bit value 0 indicates that the platform does not want that corre= sponding + PCIe feature to be configured by the consumer driver. At a device-level,= the + platform can use the EFI_PCI_EXPRESS_PLATFORM_POLICY data member(s) to i= nput + the PCIe features values equivalent to its hardware default state as def= ined in + the PCI Express Base Specification, in order to skip its initialization. + + @param[in] This Pointer to the EFI_PCI_EXPRESS_PLATFORM_P= ROTOCOL instance. + @param[in] RootBridge EFI handle of associated root bridge to th= e PCI device + @param[in] PciDevice PCI device address of type + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS + @param[in,out] PciExPolicy The pointer to platform policy with respec= t to other + PCI features like, the MPS, MRRS, etc. Type + EFI_PCI_EXPRESS_PLATFORM_POLICY is defined= in + "Related Definitions" above. =20 =20 @retval EFI_SUCCESS The function completed successfully, may = returns @@ -474,51 +456,99 @@ EFI_STATUS **/ typedef EFI_STATUS -(EFIAPI * EFI_PCI_PLATFORM_GET_DEVICE_POLICY) ( - IN CONST EFI_PCI_PLATFORM_PROTOCOL2 *This, - IN EFI_HANDLE PciDevice, - OUT EFI_PCI_PLATFORM_EXTENDED_POLICY *PciExtPolicy +(EFIAPI * EFI_PCI_EXPRESS_PLATFORM_GET_DEVICE_POLICY) ( + IN CONST EFI_PCI_EXPRESS_PLATFORM_PROTOCOL *This, + IN EFI_HANDLE RootBridge, + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciDevice, + IN OUT EFI_PCI_EXPRESS_PLATFORM_POLICY *PciExPolicy ); =20 +/** + Notifies the platform about the PCI device current configuration state w= .r.t. + its PCIe capabilites. + + The PCI Bus driver or PCI Host Bridge Resource Allocation Protocol drive= rs + can call this member function to notfy the present PCIe configuration st= ate + of the PCI device, to the platform. This is expected to be invoked after= the + completion of the PCI enumeration phase. + + The NotifyDeviceConfiguration() member function is meant to provide conf= igured + data, to the platform about the PCIe features which would be supported b= y the + PCI Bus driver in future; like for example the MPS, MRRS, Extended Tag, = ASPM, + etc. The details about this PCI features can be obtained from the PCI Ex= press + Base Specification. + + The EFI encodings and data types used to report out the present configur= ation + state, are same as those that were used by the platform to return the de= vice-specific + platform policies, in the EFI_PCI_EXPRESS_PLATFORM_POLICY (see the "Rela= ted + Definition" section for this). The difference is that it should return t= he actual + state in the EFI_PCI_EXPRESS_DEVICE_CONFIGURATION; without any macros co= rresponding + to EFI_PCI_EXPRESS_*_AUTO, and for the data types of DeviceCtl2AtomicOp = and + L1PMSubstates, its corresponding data member "Override" bit field value = shall be + ignored, will not be applicable. Note that, if the notifying driver does= not + support any PCIe feature than it shall return its corresponding value as + EFI_PCI_EXPRESS_NOT_APPLICABLE. This is true for all those PCIe features= that + will be disabled using its designated PCD bit fields masks at system-lev= el. + + This member function will use the associated EFI handle of the PCI IO Pr= otocol + to address the physical PCI device within the chipset. It is caller's + responsibility to allocate the buffer and pass its pointer to this member + function. + + @param[in] This Pointer to the EFI_PCI_EXPRESS_PL= ATFORM_PROTOCOL instance. + @param[in] PciDevice The associated PCI IO Protocol han= dle of the PCI + device. Type EFI_HANDLE is defined= in + InstallProtocolInterface() in the = UEFI 2.1 + Specification + @param[in] PciExDeviceConfiguration The pointer to device configuratio= n state with respect + to other PCI features like, the MP= S, MRRS, etc. Type + EFI_PCI_EXPRESS_DEVICE_CONFIGURATI= ON is an alias to + EFI_PCI_EXPRESS_PLATFORM_POLICY, a= s defined in + "Related Definitions" above. + + + @retval EFI_SUCCESS This function completed successfully, th= e platform + was able to identify the PCI device succ= essfully + @retval EFI_INVALID_PARAMETER Platform was not able to identify the PC= I device; + or its device-specific policy provided w= as not + correct, or was not expected. There is n= o gaurantee + that the caller is expected to take any = action + on this return value + + **/ +typedef +EFI_STATUS +(EFIAPI* EFI_PCI_EXPRESS_NOTIFY_DEVICE_CONFIGURATION) ( + IN CONST EFI_PCI_EXPRESS_PLATFORM_PROTOCOL *This, + IN EFI_HANDLE PciDevice, + IN EFI_PCI_EXPRESS_DEVICE_CONFIGURATION *PciExDeviceConfiguration + ); + /// /// This protocol provides the interface between the PCI bus driver/PCI Ho= st /// Bridge Resource Allocation driver and a platform-specific driver to de= scribe /// the unique features of a platform. /// -struct _EFI_PCI_PLATFORM_PROTOCOL2 { - /// - /// The notification from the PCI bus enumerator to the platform that it= is about to - /// enter a certain phase during the enumeration process. - /// - EFI_PCI_PLATFORM_PHASE_NOTIFY2 PlatformNotify; +struct _EFI_PCI_EXPRESS_PLATFORM_PROTOCOL { /// - /// The notification from the PCI bus enumerator to the platform for eac= h PCI - /// controller at several predefined points during PCI controller initia= lization. + /// The major version of this PCIe Platform Protocol /// - EFI_PCI_PLATFORM_PREPROCESS_CONTROLLER2 PlatformPrepController; + UINT8 MajorVersion; /// - /// Retrieves the platform policy regarding enumeration. + /// The minor version of this PCIe Platform Protocol /// - EFI_PCI_PLATFORM_GET_PLATFORM_POLICY2 GetPlatformPolicy; + UINT8 MinorVersion; /// - /// Gets the PCI device's option ROM from a platform-specific location. + /// Retrieves the PCIe device-specific platform policy regarding enumera= tion. /// - EFI_PCI_PLATFORM_GET_PCI_ROM2 GetPciRom; + EFI_PCI_EXPRESS_PLATFORM_GET_DEVICE_POLICY GetDevicePolicy; /// - /// Retrieves the PCI device-specific platform policy regarding enumerat= ion. + /// Informs the platform about the PCIe capabilities programmed, based o= n the + /// present state of the PCI device /// - EFI_PCI_PLATFORM_GET_DEVICE_POLICY GetDevicePolicy; - /// - /// The major version of this PCI Platform Protocol - /// - UINT8 MajorVersion; - /// - /// The minor version of this PCI Platform Protocol - /// - UINT8 MinorVersion; - + EFI_PCI_EXPRESS_NOTIFY_DEVICE_CONFIGURATION NotifyDeviceConfiguration; }; =20 -extern EFI_GUID gEfiPciPlatformProtocol2Guid; +extern EFI_GUID gEfiPciExpressPlatformProtocolGuid; =20 #endif diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index 2167d99..0ef1cab 100644 --- a/MdePkg/MdePkg.dec +++ b/MdePkg/MdePkg.dec @@ -1017,10 +1017,10 @@ gEfiPciOverrideProtocolGuid =3D { 0xb5b35764, 0x460c, 0x4a06, {0x99, = 0xfc, 0x77, 0xa1, 0x7c, 0x1b, 0x5c, 0xeb }} =20 ## Include/Protocol/PciPlatform2.h - gEfiPciPlatformProtocol2Guid =3D { 0x787b0367, 0xa945, 0x4d60, { 0x8d= , 0x34, 0xb9, 0xd1, 0x88, 0xd2, 0xd0, 0xb6 }} + gEfiPciExpressPlatformProtocolGuid =3D { 0x787b0367, 0xa945, 0x4d60, = { 0x8d, 0x34, 0xb9, 0xd1, 0x88, 0xd2, 0xd0, 0xb6 }} =20 ## Include/Protocol/PciOverride2.h - gEfiPciOverrideProtocol2Guid =3D { 0xb9d5ea1, 0x66cb, 0x4546, { 0xb0,= 0xbb, 0x5c, 0x6d, 0xae, 0xd9, 0x42, 0x47 }} + gEfiPciExpressOverrideProtocolGuid =3D { 0xb9d5ea1, 0x66cb, 0x4546, {= 0xb0, 0xbb, 0x5c, 0x6d, 0xae, 0xd9, 0x42, 0x47 }} =20 ## Include/Protocol/PciEnumerationComplete.h gEfiPciEnumerationCompleteProtocolGuid =3D { 0x30cfe3e7, 0x3de1, 0x45= 86, {0xbe, 0x20, 0xde, 0xab, 0xa1, 0xb3, 0xb7, 0x93}} --=20 2.21.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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