From nobody Sun Feb 8 19:38:16 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+51302+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51302+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1574787545; cv=none; d=zohomail.com; s=zohoarc; b=i2EZh1R/CrpGfYLNJFxT2zBVUhOieuvJrYdLBWIfPnANQVQxX+/b+sApSAX6ljjFCKg+tS6XOIyJb/JU9+ObzqoJ5LH1A7cZzlVH5B/86IYSFo7vHr8k4fW8CAvnaNPUzyocHYxkcTzWB3Obaz1WgS53PVzvLfJpyS0hoZF2enY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1574787545; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=cMrXCdQZ4o3aSnDruh3wsrXp8XZthCM7fgQ6QbQANTw=; b=lOkh1FeKtQKFMGkOpAIKKl2aseFk24Jb7oECx8psYbdQ3hy4X3Qwemqh7MuJhowjeHRn7jTUhjxIHilGc0jhTRAqedIS/nMAb1Ihq/fZhaknMR4kleX6P/d5wetyGwVIsusaQic5AY8RANSG06l65Nt0zhXjzlTny+cDBXB3fhc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51302+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 157478754572425.362729943654813; Tue, 26 Nov 2019 08:59:05 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id tEZuYY1788612xqEVNakfoc4; Tue, 26 Nov 2019 08:59:03 -0800 X-Received: from mga04.intel.com (mga04.intel.com []) by mx.groups.io with SMTP id smtpd.web11.8122.1574749029253111288 for ; Mon, 25 Nov 2019 22:17:12 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Nov 2019 22:17:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,244,1571727600"; d="scan'208";a="408557859" X-Received: from ray-dev.ccr.corp.intel.com ([10.239.9.9]) by fmsmga005.fm.intel.com with ESMTP; 25 Nov 2019 22:17:11 -0800 From: Ray Ni To: devel@edk2.groups.io Cc: Ray Ni , Eric Dong , Star Zeng , Michael D Kinney Subject: [edk2-devel] [PATCH v2 3/3] UefiCpuPkg/CpuFeature: Introduce First to indicate 1st unit. Date: Tue, 26 Nov 2019 14:15:50 +0800 Message-Id: <20191126061550.494828-4-niruiyu@users.noreply.github.com> In-Reply-To: <20191126061550.494828-1-niruiyu@users.noreply.github.com> References: <20191126061550.494828-1-niruiyu@users.noreply.github.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,niruiyu@users.noreply.github.com X-Gm-Message-State: xIWKn84La7xQQguYzb4HpUk6x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1574787543; bh=BXy+MLsYZSCx88GAK6STriXJQ/yGKK5rMuQb6k0Zd7Y=; h=Cc:Date:From:Reply-To:Subject:To; b=v5UMT8xYn/CZ009CjkIwQ18xguObmoPxiol77SK5eKDyWVxtx/e4JDLm2cInXmvTl4X zrbLr9kREWdhSgR2EUvsKdceyKcRpqOQLtUYvEvlaOtRa76GiHxh27HKv83IYTWUmbn23 c/4Cce4eF0Yhj5laYhfARYg7WGCzPPQqb7U= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Ray Ni REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1584 The flow of CPU feature initialization logic is: 1. BSP calls GetConfigDataFunc() for each thread/AP; 2. Each thread/AP calls SupportFunc() to detect its own capability; 3. BSP calls InitializeFunc() for each thread/AP. There is a design gap in step #3. For a package scope feature that only requires one thread of each package does the initialization operation, what InitializeFunc() currently does is to do the initialization operation only CPU physical location Core# is 0. But in certain platform, Core#0 might be disabled in hardware level which results the certain package scope feature isn't initialized at all. The patch adds a new field Fist to indicate the CPU's location in its parent scope. First.Package is set for all APs/threads under first package; First.Core is set for all APs/threads under first core of each package; First.Thread is set for the AP/thread of each core. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Star Zeng Cc: Michael D Kinney Reviewed-by: Eric Dong --- .../Include/Library/RegisterCpuFeaturesLib.h | 36 +++++++++ .../CpuFeaturesInitialize.c | 74 +++++++++++++++++++ 2 files changed, 110 insertions(+) diff --git a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h b/UefiCpuP= kg/Include/Library/RegisterCpuFeaturesLib.h index d075606cdb..7114c8ce89 100644 --- a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h +++ b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h @@ -78,6 +78,37 @@ #define CPU_FEATURE_END MAX_UINT32 /// @} =20 +/// +/// The bit field to indicate whether the processor is the first in its pa= rent scope. +/// +typedef struct { + // + // Set to 1 when current processor is the first thread in the core it re= sides in. + // + UINT32 Thread : 1; + // + // Set to 1 when current processor is a thread of the first core in the = module it resides in. + // + UINT32 Core : 1; + // + // Set to 1 when current processor is a thread of the first module in th= e tile it resides in. + // + UINT32 Module : 1; + // + // Set to 1 when current processor is a thread of the first tile in the = die it resides in. + // + UINT32 Tile : 1; + // + // Set to 1 when current processor is a thread of the first die in the p= ackage it resides in. + // + UINT32 Die : 1; + // + // Set to 1 when current processor is a thread of the first package in t= he system. + // + UINT32 Package : 1; + UINT32 Reserved : 26; +} REGISTER_CPU_FEATURE_FIRST_PROCESSOR; + /// /// CPU Information passed into the SupportFunc and InitializeFunc of the /// RegisterCpuFeature() library function. This structure contains inform= ation @@ -88,6 +119,11 @@ typedef struct { /// The package that the CPU resides /// EFI_PROCESSOR_INFORMATION ProcessorInfo; + + /// + /// The bit flag indicating whether the CPU is the first Thread/Core/Mod= ule/Tile/Die/Package in its parent scope. + /// + REGISTER_CPU_FEATURE_FIRST_PROCESSOR First; /// /// The Display Family of the CPU computed from CPUID leaf CPUID_VERSION= _INFO /// diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitializ= e.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c index 0a4fcff033..23076fd453 100644 --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c @@ -105,6 +105,9 @@ CpuInitDataInitialize ( EFI_CPU_PHYSICAL_LOCATION *Location; BOOLEAN *CoresVisited; UINTN Index; + UINT32 PackageIndex; + UINT32 CoreIndex; + UINT32 First; ACPI_CPU_DATA *AcpiCpuData; CPU_STATUS_INFORMATION *CpuStatus; UINT32 *ValidCoreCountPerPackage; @@ -234,6 +237,77 @@ CpuInitDataInitialize ( ASSERT (CpuFeaturesData->CpuFlags.CoreSemaphoreCount !=3D NULL); CpuFeaturesData->CpuFlags.PackageSemaphoreCount =3D AllocateZeroPool (si= zeof (UINT32) * CpuStatus->PackageCount * CpuStatus->MaxCoreCount * CpuStat= us->MaxThreadCount); ASSERT (CpuFeaturesData->CpuFlags.PackageSemaphoreCount !=3D NULL); + + // + // Initialize CpuFeaturesData->InitOrder[].CpuInfo.First + // + + // + // Set First.Package for each thread belonging to the first package. + // + First =3D MAX_UINT32; + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorNum= ber++) { + Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.Proc= essorInfo.Location; + First =3D MIN (Location->Package, First); + } + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorNum= ber++) { + Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.Proc= essorInfo.Location; + if (Location->Package =3D=3D First) { + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Package = =3D 1; + } + } + + // + // Set First.Die/Tile/Module for each thread assuming: + // single Die under each package, single Tile under each Die, single Mo= dule under each Tile + // + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorNum= ber++) { + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Die =3D 1; + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Tile =3D 1; + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Module =3D 1; + } + + for (PackageIndex =3D 0; PackageIndex < CpuStatus->PackageCount; Package= Index++) { + // + // Set First.Core for each thread in the first core of each package. + // + First =3D MAX_UINT32; + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorN= umber++) { + Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.Pr= ocessorInfo.Location; + if (Location->Package =3D=3D PackageIndex) { + First =3D MIN (Location->Core, First); + } + } + + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorN= umber++) { + Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.Pr= ocessorInfo.Location; + if (Location->Package =3D=3D PackageIndex && Location->Core =3D=3D F= irst) { + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Core =3D= 1; + } + } + } + + for (PackageIndex =3D 0; PackageIndex < CpuStatus->PackageCount; Package= Index++) { + for (CoreIndex =3D 0; CoreIndex < CpuStatus->MaxCoreCount; CoreIndex++= ) { + // + // Set First.Thread for the first thread of each core. + // + First =3D MAX_UINT32; + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; Processo= rNumber++) { + Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.= ProcessorInfo.Location; + if (Location->Package =3D=3D PackageIndex && Location->Core =3D=3D= CoreIndex) { + First =3D MIN (Location->Thread, First); + } + } + + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; Processo= rNumber++) { + Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.= ProcessorInfo.Location; + if (Location->Package =3D=3D PackageIndex && Location->Core =3D=3D= CoreIndex && Location->Thread =3D=3D First) { + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Thread= =3D 1; + } + } + } + } } =20 /** --=20 2.21.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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