From nobody Tue Apr 23 13:27:29 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+51304+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51304+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1574787545; cv=none; d=zohomail.com; s=zohoarc; b=MMFUeuAJf5dbhmPuzTBzFrBVIPCVAbt6Jx2YL06YltWITQEBgH0n/N2o3cFvnhwr97q2LayhDZ4OGeulYWFeDExLJwu7NlubLMng2TtinkmNgcyFsCln1bMO+lnxjzNxK4545S02oFoy+Lv6cJtoONg1VgaZoU6RyDt3fdgdPfU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1574787545; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=fcY6s8X/X4IXB1IVWFuP+56RKehl4xnahwKRXS9lP04=; b=lFMyhJ6rtF6thb5forbcRqK+mHDiK+EJLSD8l7Px6UZtYdAEdWr7BC2csHHBmkRNAOFDQ/tgSHgEfJqB1JbDQTTlEiG3aPMrGi++UB+qMqWStcZUqlC/BZAllyJE81yymoVYS/G4uGq8ob8X4/ynwQAPotyON2Jde0Smix2qbMY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51304+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1574787545714353.0686163654343; Tue, 26 Nov 2019 08:59:05 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id nCfXYY1788612xKuGnNqFcRl; Tue, 26 Nov 2019 08:59:03 -0800 X-Received: from mga04.intel.com (mga04.intel.com []) by mx.groups.io with SMTP id smtpd.web11.8122.1574749029253111288 for ; Mon, 25 Nov 2019 22:17:10 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Nov 2019 22:17:10 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,244,1571727600"; d="scan'208";a="408557829" X-Received: from ray-dev.ccr.corp.intel.com ([10.239.9.9]) by fmsmga005.fm.intel.com with ESMTP; 25 Nov 2019 22:17:09 -0800 From: Ray Ni To: devel@edk2.groups.io Cc: Ray Ni , Eric Dong , Star Zeng Subject: [edk2-devel] [PATCH v2 1/3] UefiCpuPkg/RegisterCpuFeaturesLib: Delete CPU_FEATURE_[BEFORE|AFTER] Date: Tue, 26 Nov 2019 14:15:48 +0800 Message-Id: <20191126061550.494828-2-niruiyu@users.noreply.github.com> In-Reply-To: <20191126061550.494828-1-niruiyu@users.noreply.github.com> References: <20191126061550.494828-1-niruiyu@users.noreply.github.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,niruiyu@users.noreply.github.com X-Gm-Message-State: ZhOgAhp8tiCziPlNOziOTiSJx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1574787543; bh=tZX1YLsiOxOAu3+Mxy6eu46Qyq561WEgYn/8X0yjFmg=; h=Cc:Date:From:Reply-To:Subject:To; b=CtKLTeRwnb1zfLwMZDJeNELTXgbG/DxyYI9bZaO2r/gOwQRmZBiEXbc6zQYtCD/nwnz mDeZKcL+Y2yQHN7dVeQj3+RGyO2HXOz5+82XHG0FINJJ21hqcOcAV755LuTzUMDhX8ot5 PYoODHwtptnkIRikt038vL6f+OLcvGw4Qcw= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Ray Ni REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1366 Commit b3c71b472dff2c02f0cc38d7a1959cfb2ba8420d supported MSR setting in different scopes. It added below macro: CPU_FEATURE_THREAD_BEFORE CPU_FEATURE_THREAD_AFTER CPU_FEATURE_CORE_BEFORE CPU_FEATURE_CORE_AFTER CPU_FEATURE_PACKAGE_BEFORE CPU_FEATURE_PACKAGE_AFTER And it re-interpreted CPU_FEATURE_BEFORE as CPU_FEATURE_THREAD_BEFORE and CPU_FEATURE_AFTER as CPU_FEATURE_THREAD_AFTER. This patch retires CPU_FEATURE_BEFORE and CPU_FEATURE_AFTER completely. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Star Zeng Reviewed-by: Star Zeng --- UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h | 13 ++----------- .../CpuCommonFeaturesLib/CpuCommonFeaturesLib.c | 6 +++--- .../RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c | 10 +++++----- 3 files changed, 10 insertions(+), 19 deletions(-) diff --git a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h b/UefiCpuP= kg/Include/Library/RegisterCpuFeaturesLib.h index f370373d63..d075606cdb 100644 --- a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h +++ b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h @@ -69,17 +69,8 @@ =20 #define CPU_FEATURE_BEFORE_ALL BIT23 #define CPU_FEATURE_AFTER_ALL BIT24 -// -// CPU_FEATURE_BEFORE and CPU_FEATURE_AFTER only mean Thread scope -// before and Thread scope after. -// It will be replace with CPU_FEATURE_THREAD_BEFORE and -// CPU_FEATURE_THREAD_AFTER, and should not be used anymore. -// -#define CPU_FEATURE_BEFORE BIT25 -#define CPU_FEATURE_AFTER BIT26 - -#define CPU_FEATURE_THREAD_BEFORE CPU_FEATURE_BEFORE -#define CPU_FEATURE_THREAD_AFTER CPU_FEATURE_AFTER +#define CPU_FEATURE_THREAD_BEFORE BIT25 +#define CPU_FEATURE_THREAD_AFTER BIT26 #define CPU_FEATURE_CORE_BEFORE BIT27 #define CPU_FEATURE_CORE_AFTER BIT28 #define CPU_FEATURE_PACKAGE_BEFORE BIT29 diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c= b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c index 3ebd9392a9..d1fe14f519 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c @@ -95,7 +95,7 @@ CpuCommonFeaturesLibConstructor ( SmxSupport, SmxInitialize, CPU_FEATURE_SMX, - CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEF= ORE, + CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_THR= EAD_BEFORE, CPU_FEATURE_END ); ASSERT_EFI_ERROR (Status); @@ -107,7 +107,7 @@ CpuCommonFeaturesLibConstructor ( VmxSupport, VmxInitialize, CPU_FEATURE_VMX, - CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEF= ORE, + CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_THR= EAD_BEFORE, CPU_FEATURE_END ); ASSERT_EFI_ERROR (Status); @@ -207,7 +207,7 @@ CpuCommonFeaturesLibConstructor ( LmceSupport, LmceInitialize, CPU_FEATURE_LMCE, - CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEF= ORE, + CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_THR= EAD_BEFORE, CPU_FEATURE_END ); ASSERT_EFI_ERROR (Status); diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesL= ib.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c index 58910b8891..1f953832b9 100644 --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c @@ -858,16 +858,16 @@ RegisterCpuFeature ( !=3D (CPU_FEATURE_CORE_BEFORE | CPU_FEATURE_CORE_AFTER= )); ASSERT ((Feature & (CPU_FEATURE_PACKAGE_BEFORE | CPU_FEATURE_PACKAGE_A= FTER)) !=3D (CPU_FEATURE_PACKAGE_BEFORE | CPU_FEATURE_PACKAGE= _AFTER)); - if (Feature < CPU_FEATURE_BEFORE) { + if (Feature < CPU_FEATURE_THREAD_BEFORE) { BeforeAll =3D ((Feature & CPU_FEATURE_BEFORE_ALL) !=3D 0) ? TRUE : F= ALSE; AfterAll =3D ((Feature & CPU_FEATURE_AFTER_ALL) !=3D 0) ? TRUE : FA= LSE; Feature &=3D ~(CPU_FEATURE_BEFORE_ALL | CPU_FEATURE_AFTER_ALL); ASSERT (FeatureMask =3D=3D NULL); SetCpuFeaturesBitMask (&FeatureMask, Feature, CpuFeaturesData->BitMa= skSize); - } else if ((Feature & CPU_FEATURE_BEFORE) !=3D 0) { - SetCpuFeaturesBitMask (&BeforeFeatureBitMask, Feature & ~CPU_FEATURE= _BEFORE, CpuFeaturesData->BitMaskSize); - } else if ((Feature & CPU_FEATURE_AFTER) !=3D 0) { - SetCpuFeaturesBitMask (&AfterFeatureBitMask, Feature & ~CPU_FEATURE_= AFTER, CpuFeaturesData->BitMaskSize); + } else if ((Feature & CPU_FEATURE_THREAD_BEFORE) !=3D 0) { + SetCpuFeaturesBitMask (&BeforeFeatureBitMask, Feature & ~CPU_FEATURE= _THREAD_BEFORE, CpuFeaturesData->BitMaskSize); + } else if ((Feature & CPU_FEATURE_THREAD_AFTER) !=3D 0) { + SetCpuFeaturesBitMask (&AfterFeatureBitMask, Feature & ~CPU_FEATURE_= THREAD_AFTER, CpuFeaturesData->BitMaskSize); } else if ((Feature & CPU_FEATURE_CORE_BEFORE) !=3D 0) { SetCpuFeaturesBitMask (&CoreBeforeFeatureBitMask, Feature & ~CPU_FEA= TURE_CORE_BEFORE, CpuFeaturesData->BitMaskSize); } else if ((Feature & CPU_FEATURE_CORE_AFTER) !=3D 0) { --=20 2.21.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#51304): https://edk2.groups.io/g/devel/message/51304 Mute This Topic: https://groups.io/mt/61962264/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Tue Apr 23 13:27:29 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+51305+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51305+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1574787545; cv=none; d=zohomail.com; s=zohoarc; b=lYOf2mHatXsli8m5O2WMm+7ylrkDEdbO7lRNjz2LZ9Ccm1TUj45FUXEdlpeKJNZvPJF9WL/9TaUGScWW2lcomMFXBuv/+5+SfGvd2dzfSpJ6qwAIY55soiEEhXhXNMH3faECMKWwhcUXeFXhVusW0eMX97uTAu1NHKYcVeIeHis= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1574787545; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=6LGNMyxiKDnfMzyu7TTbmGnS0ICY8nuFoxhUpq6I+ks=; b=KxSJhb4Ja+nDEvtNa6fw+Db354M0QjIKo1kb4ArDhTVwXeXPsGxSSwbcWTX7zsmPC+V1ROUtdBoktKI2JAZgAvGPxBVHDp3Afdd/pabxrh0YlFeda+rDaQ3t5t4bE3hUzM6KONeJlT1N4dYDbyDKy3pll3u+s/p5PO+5XbLRg74= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51305+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1574787545551954.5477872499755; Tue, 26 Nov 2019 08:59:05 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id X3vhYY1788612x0MCR687qdP; Tue, 26 Nov 2019 08:59:04 -0800 X-Received: from mga04.intel.com (mga04.intel.com []) by mx.groups.io with SMTP id smtpd.web11.8122.1574749029253111288 for ; Mon, 25 Nov 2019 22:17:11 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Nov 2019 22:17:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,244,1571727600"; d="scan'208";a="408557843" X-Received: from ray-dev.ccr.corp.intel.com ([10.239.9.9]) by fmsmga005.fm.intel.com with ESMTP; 25 Nov 2019 22:17:10 -0800 From: Ray Ni To: devel@edk2.groups.io Cc: Ray Ni , Eric Dong Subject: [edk2-devel] [PATCH v2 2/3] UefiCpuPkg/RegisterCpuFeaturesLib: Rename [Before|After]FeatureBitMask Date: Tue, 26 Nov 2019 14:15:49 +0800 Message-Id: <20191126061550.494828-3-niruiyu@users.noreply.github.com> In-Reply-To: <20191126061550.494828-1-niruiyu@users.noreply.github.com> References: <20191126061550.494828-1-niruiyu@users.noreply.github.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,niruiyu@users.noreply.github.com X-Gm-Message-State: iSi3Rvfd8KicmjJ4EXsUymanx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1574787544; bh=FPjatGoVqWtknXiBmF0FdKTuJJjirhjCBhtbnZvLqMc=; h=Cc:Date:From:Reply-To:Subject:To; b=JlXcA0fHV51UBdF71j05hFqmbeElMq3Sv/hlUFpaCthqrjy9y+3FLbOvM0RnYFq+4iN Avp8qmm0K7ySKRJHVsWZUOjDpJd62m+3HA4tQIOf3aexpjKqSqhUM+Em176THjlLvAhxm 0Mbi17GsaoQSOWF/wkwTCH9Nux3ezDZaL6U= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Ray Ni The patch doesn't have any functionality impact. Signed-off-by: Ray Ni Cc: Eric Dong --- .../RegisterCpuFeatures.h | 4 +- .../RegisterCpuFeaturesLib.c | 68 +++++++++++-------- 2 files changed, 40 insertions(+), 32 deletions(-) diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.= h b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h index 7c48b0a645..4780f792d9 100644 --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h @@ -43,8 +43,8 @@ typedef struct { CPU_FEATURE_GET_CONFIG_DATA GetConfigDataFunc; CPU_FEATURE_SUPPORT SupportFunc; CPU_FEATURE_INITIALIZE InitializeFunc; - UINT8 *BeforeFeatureBitMask; - UINT8 *AfterFeatureBitMask; + UINT8 *ThreadBeforeFeatureBitMask; + UINT8 *ThreadAfterFeatureBitMask; UINT8 *CoreBeforeFeatureBitMask; UINT8 *CoreAfterFeatureBitMask; UINT8 *PackageBeforeFeatureBitMask; diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesL= ib.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c index 1f953832b9..3d18b5916f 100644 --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c @@ -194,8 +194,8 @@ DetectFeatureScope ( return CoreDepType; } =20 - if ((CpuFeature->BeforeFeatureBitMask !=3D NULL) && - IsBitMaskMatchCheck (NextCpuFeatureMask, CpuFeature->BeforeFeature= BitMask)) { + if ((CpuFeature->ThreadBeforeFeatureBitMask !=3D NULL) && + IsBitMaskMatchCheck (NextCpuFeatureMask, CpuFeature->ThreadBeforeF= eatureBitMask)) { return ThreadDepType; } =20 @@ -212,8 +212,8 @@ DetectFeatureScope ( return CoreDepType; } =20 - if ((CpuFeature->AfterFeatureBitMask !=3D NULL) && - IsBitMaskMatchCheck (NextCpuFeatureMask, CpuFeature->AfterFeatureBit= Mask)) { + if ((CpuFeature->ThreadAfterFeatureBitMask !=3D NULL) && + IsBitMaskMatchCheck (NextCpuFeatureMask, CpuFeature->ThreadAfterFeat= ureBitMask)) { return ThreadDepType; } =20 @@ -247,8 +247,8 @@ DetectNoneNeighborhoodFeatureScope ( return CoreDepType; } =20 - if ((CpuFeature->BeforeFeatureBitMask !=3D NULL) && - FindSpecifyFeature(FeatureList, &CpuFeature->Link, FALSE, CpuFeatu= re->BeforeFeatureBitMask)) { + if ((CpuFeature->ThreadBeforeFeatureBitMask !=3D NULL) && + FindSpecifyFeature(FeatureList, &CpuFeature->Link, FALSE, CpuFeatu= re->ThreadBeforeFeatureBitMask)) { return ThreadDepType; } =20 @@ -265,8 +265,8 @@ DetectNoneNeighborhoodFeatureScope ( return CoreDepType; } =20 - if ((CpuFeature->AfterFeatureBitMask !=3D NULL) && - FindSpecifyFeature(FeatureList, &CpuFeature->Link, TRUE, CpuFeature-= >AfterFeatureBitMask)) { + if ((CpuFeature->ThreadAfterFeatureBitMask !=3D NULL) && + FindSpecifyFeature(FeatureList, &CpuFeature->Link, TRUE, CpuFeature-= >ThreadAfterFeatureBitMask)) { return ThreadDepType; } =20 @@ -561,15 +561,15 @@ CheckCpuFeaturesDependency ( } } =20 - if (CpuFeature->BeforeFeatureBitMask !=3D NULL) { - Swapped =3D InsertToBeforeEntry (FeatureList, CurrentEntry, CpuFeatu= re->BeforeFeatureBitMask); + if (CpuFeature->ThreadBeforeFeatureBitMask !=3D NULL) { + Swapped =3D InsertToBeforeEntry (FeatureList, CurrentEntry, CpuFeatu= re->ThreadBeforeFeatureBitMask); if (Swapped) { continue; } } =20 - if (CpuFeature->AfterFeatureBitMask !=3D NULL) { - Swapped =3D InsertToAfterEntry (FeatureList, CurrentEntry, CpuFeatur= e->AfterFeatureBitMask); + if (CpuFeature->ThreadAfterFeatureBitMask !=3D NULL) { + Swapped =3D InsertToAfterEntry (FeatureList, CurrentEntry, CpuFeatur= e->ThreadAfterFeatureBitMask); if (Swapped) { continue; } @@ -676,17 +676,17 @@ RegisterCpuFeatureWorker ( ASSERT_EFI_ERROR (Status); FreePool (CpuFeature->FeatureName); } - if (CpuFeature->BeforeFeatureBitMask !=3D NULL) { - if (CpuFeatureEntry->BeforeFeatureBitMask !=3D NULL) { - FreePool (CpuFeatureEntry->BeforeFeatureBitMask); + if (CpuFeature->ThreadBeforeFeatureBitMask !=3D NULL) { + if (CpuFeatureEntry->ThreadBeforeFeatureBitMask !=3D NULL) { + FreePool (CpuFeatureEntry->ThreadBeforeFeatureBitMask); } - CpuFeatureEntry->BeforeFeatureBitMask =3D CpuFeature->BeforeFeatureB= itMask; + CpuFeatureEntry->ThreadBeforeFeatureBitMask =3D CpuFeature->ThreadBe= foreFeatureBitMask; } - if (CpuFeature->AfterFeatureBitMask !=3D NULL) { - if (CpuFeatureEntry->AfterFeatureBitMask !=3D NULL) { - FreePool (CpuFeatureEntry->AfterFeatureBitMask); + if (CpuFeature->ThreadAfterFeatureBitMask !=3D NULL) { + if (CpuFeatureEntry->ThreadAfterFeatureBitMask !=3D NULL) { + FreePool (CpuFeatureEntry->ThreadAfterFeatureBitMask); } - CpuFeatureEntry->AfterFeatureBitMask =3D CpuFeature->AfterFeatureBit= Mask; + CpuFeatureEntry->ThreadAfterFeatureBitMask =3D CpuFeature->ThreadAft= erFeatureBitMask; } if (CpuFeature->CoreBeforeFeatureBitMask !=3D NULL) { if (CpuFeatureEntry->CoreBeforeFeatureBitMask !=3D NULL) { @@ -815,8 +815,8 @@ RegisterCpuFeature ( UINT32 Feature; CPU_FEATURES_ENTRY *CpuFeature; UINT8 *FeatureMask; - UINT8 *BeforeFeatureBitMask; - UINT8 *AfterFeatureBitMask; + UINT8 *ThreadBeforeFeatureBitMask; + UINT8 *ThreadAfterFeatureBitMask; UINT8 *CoreBeforeFeatureBitMask; UINT8 *CoreAfterFeatureBitMask; UINT8 *PackageBeforeFeatureBitMask; @@ -826,8 +826,8 @@ RegisterCpuFeature ( CPU_FEATURES_DATA *CpuFeaturesData; =20 FeatureMask =3D NULL; - BeforeFeatureBitMask =3D NULL; - AfterFeatureBitMask =3D NULL; + ThreadBeforeFeatureBitMask =3D NULL; + ThreadAfterFeatureBitMask =3D NULL; CoreBeforeFeatureBitMask =3D NULL; CoreAfterFeatureBitMask =3D NULL; PackageBeforeFeatureBitMask =3D NULL; @@ -850,10 +850,18 @@ RegisterCpuFeature ( VA_START (Marker, InitializeFunc); Feature =3D VA_ARG (Marker, UINT32); while (Feature !=3D CPU_FEATURE_END) { - ASSERT ((Feature & (CPU_FEATURE_BEFORE | CPU_FEATURE_AFTER)) - !=3D (CPU_FEATURE_BEFORE | CPU_FEATURE_AFTER)); + // + // It's invalid to require a feature is before AND after all other fea= tures. + // ASSERT ((Feature & (CPU_FEATURE_BEFORE_ALL | CPU_FEATURE_AFTER_ALL)) !=3D (CPU_FEATURE_BEFORE_ALL | CPU_FEATURE_AFTER_ALL)); + + // + // It's invalid to require feature A is before AND after before featur= e B, + // either in thread level, core level or package level. + // + ASSERT ((Feature & (CPU_FEATURE_THREAD_BEFORE | CPU_FEATURE_THREAD_AFT= ER)) + !=3D (CPU_FEATURE_THREAD_BEFORE | CPU_FEATURE_THREAD_A= FTER)); ASSERT ((Feature & (CPU_FEATURE_CORE_BEFORE | CPU_FEATURE_CORE_AFTER)) !=3D (CPU_FEATURE_CORE_BEFORE | CPU_FEATURE_CORE_AFTER= )); ASSERT ((Feature & (CPU_FEATURE_PACKAGE_BEFORE | CPU_FEATURE_PACKAGE_A= FTER)) @@ -865,9 +873,9 @@ RegisterCpuFeature ( ASSERT (FeatureMask =3D=3D NULL); SetCpuFeaturesBitMask (&FeatureMask, Feature, CpuFeaturesData->BitMa= skSize); } else if ((Feature & CPU_FEATURE_THREAD_BEFORE) !=3D 0) { - SetCpuFeaturesBitMask (&BeforeFeatureBitMask, Feature & ~CPU_FEATURE= _THREAD_BEFORE, CpuFeaturesData->BitMaskSize); + SetCpuFeaturesBitMask (&ThreadBeforeFeatureBitMask, Feature & ~CPU_F= EATURE_THREAD_BEFORE, CpuFeaturesData->BitMaskSize); } else if ((Feature & CPU_FEATURE_THREAD_AFTER) !=3D 0) { - SetCpuFeaturesBitMask (&AfterFeatureBitMask, Feature & ~CPU_FEATURE_= THREAD_AFTER, CpuFeaturesData->BitMaskSize); + SetCpuFeaturesBitMask (&ThreadAfterFeatureBitMask, Feature & ~CPU_FE= ATURE_THREAD_AFTER, CpuFeaturesData->BitMaskSize); } else if ((Feature & CPU_FEATURE_CORE_BEFORE) !=3D 0) { SetCpuFeaturesBitMask (&CoreBeforeFeatureBitMask, Feature & ~CPU_FEA= TURE_CORE_BEFORE, CpuFeaturesData->BitMaskSize); } else if ((Feature & CPU_FEATURE_CORE_AFTER) !=3D 0) { @@ -885,8 +893,8 @@ RegisterCpuFeature ( ASSERT (CpuFeature !=3D NULL); CpuFeature->Signature =3D CPU_FEATURE_ENTRY_SIGNATURE; CpuFeature->FeatureMask =3D FeatureMask; - CpuFeature->BeforeFeatureBitMask =3D BeforeFeatureBitMask; - CpuFeature->AfterFeatureBitMask =3D AfterFeatureBitMask; + CpuFeature->ThreadBeforeFeatureBitMask =3D ThreadBeforeFeatureBitMask; + CpuFeature->ThreadAfterFeatureBitMask =3D ThreadAfterFeatureBitMask; CpuFeature->CoreBeforeFeatureBitMask =3D CoreBeforeFeatureBitMask; CpuFeature->CoreAfterFeatureBitMask =3D CoreAfterFeatureBitMask; CpuFeature->PackageBeforeFeatureBitMask =3D PackageBeforeFeatureBitMask; --=20 2.21.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#51305): https://edk2.groups.io/g/devel/message/51305 Mute This Topic: https://groups.io/mt/61962265/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Tue Apr 23 13:27:29 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+51302+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51302+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1574787545; cv=none; d=zohomail.com; s=zohoarc; b=i2EZh1R/CrpGfYLNJFxT2zBVUhOieuvJrYdLBWIfPnANQVQxX+/b+sApSAX6ljjFCKg+tS6XOIyJb/JU9+ObzqoJ5LH1A7cZzlVH5B/86IYSFo7vHr8k4fW8CAvnaNPUzyocHYxkcTzWB3Obaz1WgS53PVzvLfJpyS0hoZF2enY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1574787545; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=cMrXCdQZ4o3aSnDruh3wsrXp8XZthCM7fgQ6QbQANTw=; b=lOkh1FeKtQKFMGkOpAIKKl2aseFk24Jb7oECx8psYbdQ3hy4X3Qwemqh7MuJhowjeHRn7jTUhjxIHilGc0jhTRAqedIS/nMAb1Ihq/fZhaknMR4kleX6P/d5wetyGwVIsusaQic5AY8RANSG06l65Nt0zhXjzlTny+cDBXB3fhc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51302+1787277+3901457@groups.io Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 157478754572425.362729943654813; Tue, 26 Nov 2019 08:59:05 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id tEZuYY1788612xqEVNakfoc4; Tue, 26 Nov 2019 08:59:03 -0800 X-Received: from mga04.intel.com (mga04.intel.com []) by mx.groups.io with SMTP id smtpd.web11.8122.1574749029253111288 for ; Mon, 25 Nov 2019 22:17:12 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Nov 2019 22:17:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,244,1571727600"; d="scan'208";a="408557859" X-Received: from ray-dev.ccr.corp.intel.com ([10.239.9.9]) by fmsmga005.fm.intel.com with ESMTP; 25 Nov 2019 22:17:11 -0800 From: Ray Ni To: devel@edk2.groups.io Cc: Ray Ni , Eric Dong , Star Zeng , Michael D Kinney Subject: [edk2-devel] [PATCH v2 3/3] UefiCpuPkg/CpuFeature: Introduce First to indicate 1st unit. Date: Tue, 26 Nov 2019 14:15:50 +0800 Message-Id: <20191126061550.494828-4-niruiyu@users.noreply.github.com> In-Reply-To: <20191126061550.494828-1-niruiyu@users.noreply.github.com> References: <20191126061550.494828-1-niruiyu@users.noreply.github.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,niruiyu@users.noreply.github.com X-Gm-Message-State: xIWKn84La7xQQguYzb4HpUk6x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1574787543; bh=BXy+MLsYZSCx88GAK6STriXJQ/yGKK5rMuQb6k0Zd7Y=; h=Cc:Date:From:Reply-To:Subject:To; b=v5UMT8xYn/CZ009CjkIwQ18xguObmoPxiol77SK5eKDyWVxtx/e4JDLm2cInXmvTl4X zrbLr9kREWdhSgR2EUvsKdceyKcRpqOQLtUYvEvlaOtRa76GiHxh27HKv83IYTWUmbn23 c/4Cce4eF0Yhj5laYhfARYg7WGCzPPQqb7U= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" From: Ray Ni REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1584 The flow of CPU feature initialization logic is: 1. BSP calls GetConfigDataFunc() for each thread/AP; 2. Each thread/AP calls SupportFunc() to detect its own capability; 3. BSP calls InitializeFunc() for each thread/AP. There is a design gap in step #3. For a package scope feature that only requires one thread of each package does the initialization operation, what InitializeFunc() currently does is to do the initialization operation only CPU physical location Core# is 0. But in certain platform, Core#0 might be disabled in hardware level which results the certain package scope feature isn't initialized at all. The patch adds a new field Fist to indicate the CPU's location in its parent scope. First.Package is set for all APs/threads under first package; First.Core is set for all APs/threads under first core of each package; First.Thread is set for the AP/thread of each core. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Star Zeng Cc: Michael D Kinney Reviewed-by: Eric Dong --- .../Include/Library/RegisterCpuFeaturesLib.h | 36 +++++++++ .../CpuFeaturesInitialize.c | 74 +++++++++++++++++++ 2 files changed, 110 insertions(+) diff --git a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h b/UefiCpuP= kg/Include/Library/RegisterCpuFeaturesLib.h index d075606cdb..7114c8ce89 100644 --- a/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h +++ b/UefiCpuPkg/Include/Library/RegisterCpuFeaturesLib.h @@ -78,6 +78,37 @@ #define CPU_FEATURE_END MAX_UINT32 /// @} =20 +/// +/// The bit field to indicate whether the processor is the first in its pa= rent scope. +/// +typedef struct { + // + // Set to 1 when current processor is the first thread in the core it re= sides in. + // + UINT32 Thread : 1; + // + // Set to 1 when current processor is a thread of the first core in the = module it resides in. + // + UINT32 Core : 1; + // + // Set to 1 when current processor is a thread of the first module in th= e tile it resides in. + // + UINT32 Module : 1; + // + // Set to 1 when current processor is a thread of the first tile in the = die it resides in. + // + UINT32 Tile : 1; + // + // Set to 1 when current processor is a thread of the first die in the p= ackage it resides in. + // + UINT32 Die : 1; + // + // Set to 1 when current processor is a thread of the first package in t= he system. + // + UINT32 Package : 1; + UINT32 Reserved : 26; +} REGISTER_CPU_FEATURE_FIRST_PROCESSOR; + /// /// CPU Information passed into the SupportFunc and InitializeFunc of the /// RegisterCpuFeature() library function. This structure contains inform= ation @@ -88,6 +119,11 @@ typedef struct { /// The package that the CPU resides /// EFI_PROCESSOR_INFORMATION ProcessorInfo; + + /// + /// The bit flag indicating whether the CPU is the first Thread/Core/Mod= ule/Tile/Die/Package in its parent scope. + /// + REGISTER_CPU_FEATURE_FIRST_PROCESSOR First; /// /// The Display Family of the CPU computed from CPUID leaf CPUID_VERSION= _INFO /// diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitializ= e.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c index 0a4fcff033..23076fd453 100644 --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c @@ -105,6 +105,9 @@ CpuInitDataInitialize ( EFI_CPU_PHYSICAL_LOCATION *Location; BOOLEAN *CoresVisited; UINTN Index; + UINT32 PackageIndex; + UINT32 CoreIndex; + UINT32 First; ACPI_CPU_DATA *AcpiCpuData; CPU_STATUS_INFORMATION *CpuStatus; UINT32 *ValidCoreCountPerPackage; @@ -234,6 +237,77 @@ CpuInitDataInitialize ( ASSERT (CpuFeaturesData->CpuFlags.CoreSemaphoreCount !=3D NULL); CpuFeaturesData->CpuFlags.PackageSemaphoreCount =3D AllocateZeroPool (si= zeof (UINT32) * CpuStatus->PackageCount * CpuStatus->MaxCoreCount * CpuStat= us->MaxThreadCount); ASSERT (CpuFeaturesData->CpuFlags.PackageSemaphoreCount !=3D NULL); + + // + // Initialize CpuFeaturesData->InitOrder[].CpuInfo.First + // + + // + // Set First.Package for each thread belonging to the first package. + // + First =3D MAX_UINT32; + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorNum= ber++) { + Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.Proc= essorInfo.Location; + First =3D MIN (Location->Package, First); + } + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorNum= ber++) { + Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.Proc= essorInfo.Location; + if (Location->Package =3D=3D First) { + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Package = =3D 1; + } + } + + // + // Set First.Die/Tile/Module for each thread assuming: + // single Die under each package, single Tile under each Die, single Mo= dule under each Tile + // + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorNum= ber++) { + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Die =3D 1; + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Tile =3D 1; + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Module =3D 1; + } + + for (PackageIndex =3D 0; PackageIndex < CpuStatus->PackageCount; Package= Index++) { + // + // Set First.Core for each thread in the first core of each package. + // + First =3D MAX_UINT32; + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorN= umber++) { + Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.Pr= ocessorInfo.Location; + if (Location->Package =3D=3D PackageIndex) { + First =3D MIN (Location->Core, First); + } + } + + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorN= umber++) { + Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.Pr= ocessorInfo.Location; + if (Location->Package =3D=3D PackageIndex && Location->Core =3D=3D F= irst) { + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Core =3D= 1; + } + } + } + + for (PackageIndex =3D 0; PackageIndex < CpuStatus->PackageCount; Package= Index++) { + for (CoreIndex =3D 0; CoreIndex < CpuStatus->MaxCoreCount; CoreIndex++= ) { + // + // Set First.Thread for the first thread of each core. + // + First =3D MAX_UINT32; + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; Processo= rNumber++) { + Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.= ProcessorInfo.Location; + if (Location->Package =3D=3D PackageIndex && Location->Core =3D=3D= CoreIndex) { + First =3D MIN (Location->Thread, First); + } + } + + for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; Processo= rNumber++) { + Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.= ProcessorInfo.Location; + if (Location->Package =3D=3D PackageIndex && Location->Core =3D=3D= CoreIndex && Location->Thread =3D=3D First) { + CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Thread= =3D 1; + } + } + } + } } =20 /** --=20 2.21.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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