From nobody Tue Feb 10 05:27:08 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+51021+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+51021+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1574326769; cv=none; d=zoho.com; s=zohoarc; b=IpbzgB13nB5lTC43Htp+BeHAhwxMJ4WgCLR1sC5MOu657Co3rnzXqX+OpxQBMyaAxQlYnECtwK8Yy25Bj7l2HeZLul12Ym5BVjdnGF0DTUSIpn+deJhS+eCYA9JZcrXpeHxAbH5YfxTjHOErxF/gBvG2gUnh3TDkQdCBry96vFI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1574326769; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; 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21 Nov 2019 00:59:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,224,1571727600"; d="scan'208";a="210033055" X-Received: from nldesimo-desk1.amr.corp.intel.com ([10.7.159.63]) by orsmga006.jf.intel.com with ESMTP; 21 Nov 2019 00:59:20 -0800 From: "Nate DeSimone" To: devel@edk2.groups.io Cc: Chasel Chiu , Michael Kubacki Subject: [edk2-devel] [edk2-platforms] [PATCH V2 07/14] WhiskeylakeOpenBoardPkg: Add SiliconInitLib APIs to BoardInitLib Date: Thu, 21 Nov 2019 00:58:46 -0800 Message-Id: <20191121085853.2626-8-nathaniel.l.desimone@intel.com> In-Reply-To: <20191121085853.2626-1-nathaniel.l.desimone@intel.com> References: <20191121085853.2626-1-nathaniel.l.desimone@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,nathaniel.l.desimone@intel.com X-Gm-Message-State: aaaaaaaaaaaaaaaaaaaaaaaax1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1574326768; bh=jfgUMxdfWD083/OWNhEG9qumbjEt0KPfA7N7jDvS7H8=; h=Cc:Date:From:Reply-To:Subject:To; b=W/sQ4JrzTjrHoFcIduiqHeX3wcx202FEJ3dO5VyBaod8hjmC5Ww4Cyn8s9rouxED5PV 3JsikdEULRDpPzUOcrCc5iznjvSM5ew4E9twZoN9sW92Rd87GjjWBcBXONpsz+eTwAJok xCBBWgPnOzME4OAq8ShNK3MBu7NHwqOn8Zs= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Cc: Chasel Chiu Cc: Michael Kubacki Signed-off-by: Nate DeSimone Reviewed-by: Chasel Chiu Reviewed-by: Michael Kubacki --- .../BoardInitLib/PeiBoardInitPostMemLib.inf | 1 + .../BoardInitLib/PeiBoardInitPreMemLib.inf | 1 + .../PeiMultiBoardInitPostMemLib.inf | 1 + .../PeiMultiBoardInitPreMemLib.inf | 2 +- .../PeiWhiskeylakeURvpInitPostMemLib.c | 6 +- .../PeiWhiskeylakeURvpInitPreMemLib.c | 89 ++----------------- .../BoardInitLib/WhiskeylakeURvpInit.h | 1 + .../WhiskeylakeURvp/OpenBoardPkg.dsc | 5 ++ 8 files changed, 24 insertions(+), 82 deletions(-) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library= /BoardInitLib/PeiBoardInitPostMemLib.inf b/Platform/Intel/WhiskeylakeOpenBo= ardPkg/WhiskeylakeURvp/Library/BoardInitLib/PeiBoardInitPostMemLib.inf index 9bf4d127c5..affc5c56ad 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/PeiBoardInitPostMemLib.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/PeiBoardInitPostMemLib.inf @@ -26,6 +26,7 @@ HdaVerbTableLib MemoryAllocationLib PcdLib + SiliconInitLib =20 [Packages] MinPlatformPkg/MinPlatformPkg.dec diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library= /BoardInitLib/PeiBoardInitPreMemLib.inf b/Platform/Intel/WhiskeylakeOpenBoa= rdPkg/WhiskeylakeURvp/Library/BoardInitLib/PeiBoardInitPreMemLib.inf index 4ab80f9eb3..40e20285e0 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/PeiBoardInitPreMemLib.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/PeiBoardInitPreMemLib.inf @@ -23,6 +23,7 @@ BaseMemoryLib MemoryAllocationLib PcdLib + SiliconInitLib =20 [Packages] MinPlatformPkg/MinPlatformPkg.dec diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library= /BoardInitLib/PeiMultiBoardInitPostMemLib.inf b/Platform/Intel/WhiskeylakeO= penBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/PeiMultiBoardInitPostMemLi= b.inf index c043e32638..21dc2f70c0 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/PeiMultiBoardInitPostMemLib.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/PeiMultiBoardInitPostMemLib.inf @@ -30,6 +30,7 @@ PeiPlatformHookLib PeiPolicyInitLib PchInfoLib + SiliconInitLib =20 [Packages] MinPlatformPkg/MinPlatformPkg.dec diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library= /BoardInitLib/PeiMultiBoardInitPreMemLib.inf b/Platform/Intel/WhiskeylakeOp= enBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.= inf index cd0315377a..7389f1dfcd 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/PeiMultiBoardInitPreMemLib.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/PeiMultiBoardInitPreMemLib.inf @@ -31,6 +31,7 @@ PeiPlatformHookLib PeiPolicyInitLib PlatformHookLib + SiliconInitLib StallPpiLib =20 [Packages] @@ -57,7 +58,6 @@ =20 [Guids] gPchGeneralPreMemConfigGuid ## CONSUMES - gTcoWdtHobGuid ## CONSUMES =20 [Pcd] gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdLpcSioConfigDefaultPort diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library= /BoardInitLib/PeiWhiskeylakeURvpInitPostMemLib.c b/Platform/Intel/Whiskeyla= keOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/PeiWhiskeylakeURvpInitP= ostMemLib.c index 9413620a4a..248a6657d5 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/PeiWhiskeylakeURvpInitPostMemLib.c +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/PeiWhiskeylakeURvpInitPostMemLib.c @@ -430,6 +430,10 @@ WhiskeylakeURvpBoardInitBeforeSiliconInit ( // Status =3D UpdateChipsetInitPtr(); =20 + /// + /// Do Late PCH init + /// + LateSiliconInit (); + return EFI_SUCCESS; } - diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library= /BoardInitLib/PeiWhiskeylakeURvpInitPreMemLib.c b/Platform/Intel/Whiskeylak= eOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/PeiWhiskeylakeURvpInitPr= eMemLib.c index 0124888244..055d731651 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/PeiWhiskeylakeURvpInitPreMemLib.c +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/PeiWhiskeylakeURvpInitPreMemLib.c @@ -45,7 +45,6 @@ #include #include #include -#include #include =20 /// @@ -232,50 +231,8 @@ BoardMiscInitPreMem( return EFI_SUCCESS; } =20 -//@todo it should be moved to Si Pkg. -/** -Early Platform PCH initialization -**/ -VOID -EarlyPlatformPchInit( - VOID -) -{ - UINT8 Data8; - UINT8 TcoRebootHappened; - TCO_WDT_HOB *TcoWdtHobPtr; - EFI_STATUS Status; - - /// - /// Read the Second TO status bit - /// - Data8 =3D IoRead8(PcdGet16(PcdTcoBaseAddress) + R_TCO_IO_TCO2_STS); - if ((Data8 & B_TCO_IO_TCO2_STS_SECOND_TO) =3D=3D B_TCO_IO_TCO2_STS_SECON= D_TO) { - TcoRebootHappened =3D 1; - DEBUG((DEBUG_INFO, "PlatformInitPreMem - TCO Second TO status bit is s= et. This might be a TCO reboot\n")); - } - else { - TcoRebootHappened =3D 0; - } - - /// - /// Create HOB - /// - Status =3D PeiServicesCreateHob(EFI_HOB_TYPE_GUID_EXTENSION, sizeof(TCO_= WDT_HOB), (VOID **)&TcoWdtHobPtr); - if (!EFI_ERROR(Status)) { - TcoWdtHobPtr->Header.Name =3D gTcoWdtHobGuid; - TcoWdtHobPtr->TcoRebootHappened =3D TcoRebootHappened; - } - - /// - /// Clear the Second TO status bit - /// - IoWrite8(PcdGet16(PcdTcoBaseAddress) + R_TCO_IO_TCO2_STS, B_TCO_IO_TCO2_= STS_SECOND_TO); -} - /** Board configuration initialization in the pre-memory boot phase. - **/ VOID BoardConfigInitPreMem ( @@ -341,7 +298,6 @@ PlatformInitPreMemCallBack( ) { EFI_STATUS Status; - UINT16 ABase; UINT8 FwConfig; =20 // @@ -378,16 +334,8 @@ PlatformInitPreMemCallBack( /// /// Configure GPIO and SIO /// - Status =3D BoardInitPreMem(); - ASSERT_EFI_ERROR(Status); - - ABase =3D PmcGetAcpiBase(); - - /// - /// Clear all pending SMI. On S3 clear power button enable so it will no= t generate an SMI. - /// - IoWrite16(ABase + R_ACPI_IO_PM1_EN, 0); - IoWrite32(ABase + R_ACPI_IO_GPE0_EN_127_96, 0); + Status =3D BoardInitPreMem (); + ASSERT_EFI_ERROR (Status); =20 /// /// Install Pre Memory PPIs @@ -550,12 +498,6 @@ WhiskeylakeURvpInitPreMem ( Status =3D InstallStallPpi(); ASSERT_EFI_ERROR(Status); =20 - ///@todo it should be moved to Si Pkg. - /// - /// Do Early PCH init - /// - EarlyPlatformPchInit(); - // // Install PCH RESET PPI and EFI RESET2 PeiService // @@ -588,6 +530,11 @@ WhiskeylakeURvpBoardInitBeforeMemoryInit ( VOID ) { + /// + /// Do basic PCH init + /// + SiliconInit (); + WhiskeylakeURvpInitPreMem (); =20 return EFI_SUCCESS; @@ -600,27 +547,9 @@ WhiskeylakeURvpBoardDebugInit ( ) { /// - /// LPC I/O Configuration + /// Do Early PCH init /// - PchLpcIoDecodeRangesSet ( - (V_LPC_CFG_IOD_LPT_378 << N_LPC_CFG_IOD_LPT) | - (V_LPC_CFG_IOD_COMB_3E8 << N_LPC_CFG_IOD_COMB) | - (V_LPC_CFG_IOD_COMA_3F8 << N_LPC_CFG_IOD_COMA) - ); - - PchLpcIoEnableDecodingSet ( - B_LPC_CFG_IOE_ME2 | - B_LPC_CFG_IOE_SE | - B_LPC_CFG_IOE_ME1 | - B_LPC_CFG_IOE_KE | - B_LPC_CFG_IOE_HGE | - B_LPC_CFG_IOE_LGE | - B_LPC_CFG_IOE_FDE | - B_LPC_CFG_IOE_PPE | - B_LPC_CFG_IOE_CBE | - B_LPC_CFG_IOE_CAE - ); - + EarlySiliconInit (); return EFI_SUCCESS; } =20 diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library= /BoardInitLib/WhiskeylakeURvpInit.h b/Platform/Intel/WhiskeylakeOpenBoardPk= g/WhiskeylakeURvp/Library/BoardInitLib/WhiskeylakeURvpInit.h index 325bcb41df..d3a709b2a9 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/WhiskeylakeURvpInit.h +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardI= nitLib/WhiskeylakeURvpInit.h @@ -15,6 +15,7 @@ #include #include #include +#include #include #include =20 diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoa= rdPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoar= dPkg.dsc index cdaf47b6f7..3cd0478021 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.d= sc +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.d= sc @@ -154,6 +154,11 @@ TimerLib|$(PLATFORM_BOARD_PACKAGE)/Library/AcpiTimerLib/BaseAcpiTimerLib= .inf =20 [LibraryClasses.common.PEIM] + ####################################### + # Silicon Initialization Package + ####################################### + SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSilic= onInitLib.inf + ####################################### # Platform Package ####################################### --=20 2.24.0.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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