From nobody Tue Feb 10 01:16:06 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+50638+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+50638+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1573712560; cv=none; d=zoho.com; s=zohoarc; b=LxgWPXZQkBfQRBD36E3ddCITtXevpYb9PG0OvcrYVtWSxwgcCVFkrS4+LO5m+Sjj5A/zRka7qBvYLoz6FLFoZKGZvKPZUKNMoSINWLrwRgtvTi2+CzhRFUr8tlQETcCmbBKAa6LK7DJWI3UAamrk9w9njswrLalche6INvSWSnM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1573712560; 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smtpd.web11.413.1573712557549508303 for ; Wed, 13 Nov 2019 22:22:37 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Nov 2019 22:22:34 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,302,1569308400"; d="scan'208";a="216641626" X-Received: from nldesimo-desk1.amr.corp.intel.com ([10.7.159.63]) by orsmga002.jf.intel.com with ESMTP; 13 Nov 2019 22:22:34 -0800 From: "Nate DeSimone" To: devel@edk2.groups.io Cc: Michael Kubacki , Chasel Chiu , Liming Gao Subject: [edk2-devel] [edk2-platforms] [PATCH V1 10/13] MinPlatformPkg: Coding style cleanups in MinPlatformPkg.dec Date: Wed, 13 Nov 2019 22:06:52 -0800 Message-Id: <20191114060655.5161-11-nathaniel.l.desimone@intel.com> In-Reply-To: <20191114060655.5161-1-nathaniel.l.desimone@intel.com> References: <20191114060655.5161-1-nathaniel.l.desimone@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,nathaniel.l.desimone@intel.com X-Gm-Message-State: upIvXOHTuhqNR15Hns4jUBcax1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1573712558; bh=FayphBHg/K/nWlCSQKS16cEOvOWuG/YLw+ZiYGZA/ws=; h=Cc:Date:From:Reply-To:Subject:To; b=JZxO/TDm7nk+qiPfg2HBzkN7i2gVZMAKJl9oJhbbhqIvxcSb7MSDZ7ELnTTjZqxRrWH sTNTrl3BuaQA86kOdePPXj1Y+iOiuAxmrhnP4l0qJmFqVUTW92bqRLvmgbTeekMI3sBXs TtShQCqeTmIcnD5Scp0VF5OxQVUIRnUM8RM= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" Cc: Michael Kubacki Cc: Chasel Chiu Cc: Liming Gao Signed-off-by: Nate DeSimone Reviewed-by: Chasel Chiu Reviewed-by: Michael Kubacki --- .../Intel/MinPlatformPkg/MinPlatformPkg.dec | 281 +++++++++--------- 1 file changed, 139 insertions(+), 142 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/In= tel/MinPlatformPkg/MinPlatformPkg.dec index 856c17f737..c6b5881646 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -14,184 +14,182 @@ =20 =20 [Defines] -DEC_SPECIFICATION =3D 0x00010017 -PACKAGE_NAME =3D MinPlatformPkg -PACKAGE_VERSION =3D 0.1 -PACKAGE_GUID =3D 463B3B00-0D18-4a5f-90C0-D5B851D2574B - + DEC_SPECIFICATION =3D 0x00010017 + PACKAGE_NAME =3D MinPlatformPkg + PACKAGE_VERSION =3D 0.1 + PACKAGE_GUID =3D 463B3B00-0D18-4a5f-90C0-D5B851D2574B =20 [Includes] -Include + Include =20 [Ppis] -gEdkiiSiliconInitializedPpiGuid =3D {0x82a72dc8, 0x61ec, 0x403e, {0xb1, 0x= 5a, 0x8d, 0x7a, 0x3a, 0x71, 0x84, 0x98}} + gEdkiiSiliconInitializedPpiGuid =3D {0x82a72dc8, 0x61ec, 0x403e, {0xb1= , 0x5a, 0x8d, 0x7a, 0x3a, 0x71, 0x84, 0x98}} =20 -gPeiBaseMemoryTestPpiGuid =3D { 0xb6ec423c, 0x21d2, 0x490d, { 0x85, = 0xc6, 0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74 } } -gPeiPlatformMemorySizePpiGuid =3D { 0x9a7ef41e, 0xc140, 0x4bd1, { 0xb8, = 0x84, 0x1e, 0x11, 0x24, 0x0b, 0x4c, 0xe6 } } + gPeiBaseMemoryTestPpiGuid =3D {0xb6ec423c, 0x21d2, 0x490d, {0x85= , 0xc6, 0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74}} + gPeiPlatformMemorySizePpiGuid =3D {0x9a7ef41e, 0xc140, 0x4bd1, {0xb8= , 0x84, 0x1e, 0x11, 0x24, 0x0b, 0x4c, 0xe6}} =20 [Guids] -gMinPlatformPkgTokenSpaceGuid =3D {0x69d13bf0, 0xaf91, 0x4d96, {0= xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}} + gMinPlatformPkgTokenSpaceGuid =3D {0x69d13bf0, 0xaf91, 0x4d96, {0xaa= , 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}} =20 -gAdapterInfoPlatformTestPointGuid =3D {0x5381e3ea, 0xb77, 0x4580, {0xad, 0= xdf, 0xa9, 0x1c, 0x8, 0x3b, 0xf2, 0x97}} + gAdapterInfoPlatformTestPointGuid =3D {0x5381e3ea, 0x0b77, 0x4580, {0xad= , 0xdf, 0xa9, 0x1c, 0x08, 0x3b, 0xf2, 0x97}} =20 -gBoardDetectGuid =3D {0x1792429d, 0x9d94, 0x4e08, {0xa0, 0x99, 0= x73, 0xa2, 0x86, 0xae, 0xb4, 0x35}} -gBoardPreMemInitGuid =3D {0x191dcfcf, 0xe16e, 0x43bb, {0x9b, 0xc3, 0= x6e, 0xee, 0x6f, 0xab, 0x3a, 0x27}} -gBoardPostMemInitGuid =3D {0xa0e933ea, 0xa69, 0x47fb, {0xb2, 0xab, 0= xa1, 0x6f, 0x71, 0x2d, 0x6f, 0x58}} -gBoardNotificationInitGuid =3D {0x78dbcabf, 0xc544, 0x4e6f, {0xaf, 0x3a, 0= x71, 0x17, 0xd9, 0x42, 0x4e, 0xd1}} + gBoardDetectGuid =3D {0x1792429d, 0x9d94, 0x4e08, {0xa0= , 0x99, 0x73, 0xa2, 0x86, 0xae, 0xb4, 0x35}} + gBoardPreMemInitGuid =3D {0x191dcfcf, 0xe16e, 0x43bb, {0x9b= , 0xc3, 0x6e, 0xee, 0x6f, 0xab, 0x3a, 0x27}} + gBoardPostMemInitGuid =3D {0xa0e933ea, 0xa69, 0x47fb, {0xb2= , 0xab, 0xa1, 0x6f, 0x71, 0x2d, 0x6f, 0x58}} + gBoardNotificationInitGuid =3D {0x78dbcabf, 0xc544, 0x4e6f, {0xaf= , 0x3a, 0x71, 0x17, 0xd9, 0x42, 0x4e, 0xd1}} =20 -gBoardAcpiTableGuid =3D {0xd70e9f57, 0x69f, 0x4bef, {0x96, 0xc0, 0= x84, 0x74, 0xf4, 0xa2, 0x5f, 0x3a}} -gBoardAcpiEnableGuid =3D {0x9727b610, 0xf645, 0x4429, {0x89, 0x21, 0= x2c, 0x2b, 0x58, 0xdc, 0xbb, 0xa}} + gBoardAcpiTableGuid =3D {0xd70e9f57, 0x69f, 0x4bef, {0x96= , 0xc0, 0x84, 0x74, 0xf4, 0xa2, 0x5f, 0x3a}} + gBoardAcpiEnableGuid =3D {0x9727b610, 0xf645, 0x4429, {0x89= , 0x21, 0x2c, 0x2b, 0x58, 0xdc, 0xbb, 0x0a}} =20 -gDefaultDataFileGuid =3D { 0x1ae42876, 0x008f, 0x41= 61, { 0xb2, 0xb7, 0x1c, 0x0d, 0x15, 0xc5, 0xef, 0x43 }} -gDefaultDataOptSizeFileGuid =3D { 0x003e7b41, 0x98a2, 0x4b= e2, { 0xb2, 0x7a, 0x6c, 0x30, 0xc7, 0x65, 0x52, 0x25 }} + gDefaultDataFileGuid =3D {0x1ae42876, 0x008f, 0x4161, {0xb2= , 0xb7, 0x1c, 0x0d, 0x15, 0xc5, 0xef, 0x43}} + gDefaultDataOptSizeFileGuid =3D {0x003e7b41, 0x98a2, 0x4be2, {0xb2= , 0x7a, 0x6c, 0x30, 0xc7, 0x65, 0x52, 0x25}} =20 [LibraryClasses] =20 -PeiLib|Include/Library/PeiLib.h + PeiLib|Include/Library/PeiLib.h =20 -AslUpdateLib|Include/Library/AslUpdateLib.h -BoardAcpiEnableLib|Include/Library/BoardAcpiEnableLib.h -BoardAcpiTableLib|Include/Library/BoardAcpiTableLib.h + AslUpdateLib|Include/Library/AslUpdateLib.h + BoardAcpiEnableLib|Include/Library/BoardAcpiEnableLib.h + BoardAcpiTableLib|Include/Library/BoardAcpiTableLib.h =20 -SiliconPolicyInitLib|Include/Library/SiliconPolicyInitLib.h -SiliconPolicyUpdateLib|Include/Library/SiliconPolicyUpdateLib.h + SiliconPolicyInitLib|Include/Library/SiliconPolicyInitLib.h + SiliconPolicyUpdateLib|Include/Library/SiliconPolicyUpdateLib.h =20 -SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h + SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h =20 -BoardInitLib|Include/Library/BoardInitLib.h -MultiBoardInitSupportLib|Include/Library/MultiBoardInitSupportLib.h -SecBoardInitLib|Include/Library/SecBoardInitLib.h + BoardInitLib|Include/Library/BoardInitLib.h + MultiBoardInitSupportLib|Include/Library/MultiBoardInitSupportLib.h + SecBoardInitLib|Include/Library/SecBoardInitLib.h =20 -TestPointLib|Include/Library/TestPointLib.h -TestPointCheckLib|Include/Library/TestPointCheckLib.h + TestPointLib|Include/Library/TestPointLib.h + TestPointCheckLib|Include/Library/TestPointCheckLib.h =20 SetCacheMtrrLib|Include/Library/SetCacheMtrrLib.h =20 [PcdsFixedAtBuild, PcdsPatchableInModule] =20 -gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000000 -gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UINT= 32|0x80000001 -gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32|0x8000= 0002 + gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000= 000 + gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UI= NT32|0x80000001 + gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32|0x80= 000002 =20 -gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress|0xFEE00000|UINT32|0x9000= 000B -gMinPlatformPkgTokenSpaceGuid.PcdLocalApicMmioSize|0x1000|UINT32|0x9000000C + gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress|0xFEE00000|UINT32|0x90= 00000B + gMinPlatformPkgTokenSpaceGuid.PcdLocalApicMmioSize|0x1000|UINT32|0x90000= 00C =20 -gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress|0xFEC00000|UINT32|0x9000000D -gMinPlatformPkgTokenSpaceGuid.PcdIoApicMmioSize|0x1000|UINT32|0x9000000E -gMinPlatformPkgTokenSpaceGuid.PcdIoApicId|0x02|UINT8|0x90000014 + gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress|0xFEC00000|UINT32|0x90000= 00D + gMinPlatformPkgTokenSpaceGuid.PcdIoApicMmioSize|0x1000|UINT32|0x9000000E + gMinPlatformPkgTokenSpaceGuid.PcdIoApicId|0x02|UINT8|0x90000014 =20 -gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x90000012 -gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x90000013 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x90000012 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x90000013 =20 -gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount|0|UINT8|0x90000015 -gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase|0x09|UINT8|0x90000016 -gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000|UINT32|0x9= 0000017 -gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase|24|UINT32|0x90000018 + gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount|0|UINT8|0x90000015 + gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase|0x09|UINT8|0x90000016 + gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000|UINT32|0= x90000017 + gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase|24|UINT32|0x90000= 018 =20 -gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2|UINT32|0x90000021 -gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x90000022 -gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90000023 + gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2|UINT32|0x90000021 + gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x90000022 + gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90000023 =20 -gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x90000= 025 -gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x90000026 -gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027 + gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x900= 00025 + gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x900000= 26 + gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027 =20 -gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65|UIN= T32|0x20000500 -gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UINT32|= 0x20000501 -gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402|UINT3= 2|0x20000502 -gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b|UINT32|0= x20000503 -gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25|UINT32|0= x20000504 + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65|U= INT32|0x20000500 + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UINT3= 2|0x20000501 + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402|UIN= T32|0x20000502 + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b|UINT32= |0x20000503 + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25|UINT32= |0x20000504 =20 -# -# The PCDs are used to control the Windows SMM Security Mitigations Table = - Protection Flags -# -# BIT0: If set, expresses that for all synchronous SMM entries,SMM will va= lidate that input and output buffers lie entirely within the expected fixed= memory regions. -# BIT1: If set, expresses that for all synchronous SMM entries, SMM will v= alidate that input and output pointers embedded within the fixed communicat= ion buffer only refer to address ranges \ -# that lie entirely within the expected fixed memory regions. -# BIT2: Firmware setting this bit is an indication that it will not allow = reconfiguration of system resources via non-architectural mechanisms. -# BIT3-31: Reserved -# -gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10001006 + # + # The PCDs are used to control the Windows SMM Security Mitigations Tabl= e - Protection Flags + # + # BIT0: If set, expresses that for all synchronous SMM entries,SMM will = validate that input and output buffers lie entirely within the expected fix= ed memory regions. + # BIT1: If set, expresses that for all synchronous SMM entries, SMM will= validate that input and output pointers embedded within the fixed communic= ation buffer only refer to address ranges \ + # that lie entirely within the expected fixed memory regions. + # BIT2: Firmware setting this bit is an indication that it will not allo= w reconfiguration of system resources via non-architectural mechanisms. + # BIT3-31: Reserved + # + gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10001006 =20 -gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0x0= 0100206 + gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0= x00100206 =20 -# -# See HstiIbvFeatureBit.h for the definition -# -# #define HSTI_BYTE_ BIT -# -# It means BYTE BIT is for feature . -# -gMinPlatformPkgTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, 0x00}= |VOID*|0x00100301 + # + # See HstiIbvFeatureBit.h for the definition + # + # #define HSTI_BYTE_ BIT + # + # It means BYTE BIT is for feature . + # + gMinPlatformPkgTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, 0x0= 0}|VOID*|0x00100301 =20 -# -# See TestPointCheckLib.h for the definition -# -# #define TEST_POINT_BYTE_ BIT -# -# It means BYTE BIT is for feature . -# BYTE0 BYTE= 1 BYTE2 BYTE3 BYTE4 BYTE5 BYTE6 BYTE7 BYTE8 -# Stage debug: {0x03, 0x0= 0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, = 0x00, 0x00} -# Stage memory: {0x03, 0x0= 7, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, = 0x00, 0x00} -# Stage UEFI boot: {0x03, 0x0= 7, 0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, = 0x00, 0x00} -# Stage OS boot: {0x03, 0x0= 7, 0x03, 0x05, 0x3F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, = 0x00, 0x00} -# Stage Secure boot: {0x03, 0x0= F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, = 0x00, 0x00} -# Stage Advanced: {0x03, 0x0= F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, = 0x00, 0x00} -gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, = 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0= 0, 0x00}|VOID*|0x00100302 + # + # See TestPointCheckLib.h for the definition + # + # #define TEST_POINT_BYTE_ BIT + # + # It means BYTE BIT is for feature . + # BYTE0 BY= TE1 BYTE2 BYTE3 BYTE4 BYTE5 BYTE6 BYTE7 BYTE8 + # Stage debug: {0x03, 0= x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00= , 0x00, 0x00} + # Stage memory: {0x03, 0= x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00= , 0x00, 0x00} + # Stage UEFI boot: {0x03, 0= x07, 0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00= , 0x00, 0x00} + # Stage OS boot: {0x03, 0= x07, 0x03, 0x05, 0x3F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00= , 0x00, 0x00} + # Stage Secure boot: {0x03, 0= x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00= , 0x00, 0x00} + # Stage Advanced: {0x03, 0= x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00= , 0x00, 0x00} + gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F= , 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0= x00, 0x00}|VOID*|0x00100302 =20 -[PcdsFixedAtBuild, PcdsPatchableInModule] -## -## The Flash relevant PCD are ineffective and will be patched basing on FD= F definitions during build. -## Set all of them to 0 here to prevent from confusion. -## -gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x= 10000001 -gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002 - -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x= 30000004 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x= 30000005 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|= 0x30000006 - -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x= 20000004 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x= 20000005 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|= 0x20000006 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0= x20000007 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0= x20000008 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32= |0x20000009 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2= 000000A -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2= 000000B -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0= x2000000C -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x200= 0000D -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x200= 0000E -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2= 000000F -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x2= 0000010 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x2= 0000011 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0= x20000012 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x2= 0000013 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x2= 0000014 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0= x20000015 - -gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20= 000016 -gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20= 000017 -gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x= 20000018 -gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|U= INT32|0x20000019 -gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|U= INT32|0x2000001A -gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000= |UINT32|0x2000001B - -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x20000= 021 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x20000= 022 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x200= 00023 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x20000= 024 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x20000= 025 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x200= 00026 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000= 027 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000= 028 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x200= 00029 -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUBase|0x00000000|UINT32|0x20000= 02A -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUSize|0x00000000|UINT32|0x20000= 02B -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUOffset|0x00000000|UINT32|0x200= 0002C + ## + ## The Flash relevant PCD are ineffective and will be patched basing on = FDF definitions during build. + ## Set all of them to 0 here to prevent from confusion. + ## + gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|= 0x10000001 + gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000= 002 + + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|= 0x30000004 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|= 0x30000005 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT3= 2|0x30000006 + + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|= 0x20000004 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|= 0x20000005 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT3= 2|0x20000006 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32= |0x20000007 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32= |0x20000008 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT= 32|0x20000009 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0= x2000000A + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0= x2000000B + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32= |0x2000000C + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2= 000000D + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2= 000000E + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0= x2000000F + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0= x20000010 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0= x20000011 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32= |0x20000012 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0= x20000013 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0= x20000014 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32= |0x20000015 + + gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x= 20000016 + gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x= 20000017 + gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|= 0x20000018 + gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000= |UINT32|0x20000019 + gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000= |UINT32|0x2000001A + gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x000000= 00|UINT32|0x2000001B + + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x200= 00021 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x200= 00022 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x2= 0000023 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x200= 00024 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x200= 00025 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x2= 0000026 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x200= 00027 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x200= 00028 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x2= 0000029 + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUBase|0x00000000|UINT32|0x200= 0002A + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUSize|0x00000000|UINT32|0x200= 0002B + gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUOffset|0x00000000|UINT32|0x2= 000002C =20 [PcdsDynamic, PcdsDynamicEx] -gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000019 + gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000019 =20 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] =20 @@ -261,7 +259,7 @@ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UIN= T32|0x90000019 =20 [PcdsFixedAtBuild] =20 - # + ## MinPlatform Boot Stage Selector # Stage 1 - enable debug (system deadloop after debug init) # Stage 2 - mem init (system deadloop after mem init) # Stage 3 - boot to shell only @@ -305,4 +303,3 @@ gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UIN= T32|0x90000019 gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable |FALSE|BOOLEAN|0= xF00000A5 gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE|BOOLEAN|0= xF00000A6 gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable |FALSE|BOOLEAN|0= xF00000A7 - --=20 2.23.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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