From nobody Mon Feb 9 16:13:02 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+50220+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+50220+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1573133919; cv=none; d=zoho.com; s=zohoarc; b=HwIxq18ZQ1rOexmGLfbV7RZIUPO8hJkYIHh2rULQiA/2cpqOHGIEQbJPT1H+2rOnp3H7ic2EKbsulIppvmCM3beCllVQAjh3Y9SWZg4HLpclxJS+CmKjhZisLCws5KoX/kUIuIWFK+Ty3R+ILAsGsvetMh2nJTBYDYVzf3jXm2k= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1573133919; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=1PngJ2g5V653UF8/zG+QX2oxOcoVQOyZoghsQkJsLiM=; b=I6gYjHr5FaZ2X0Gx6cqPV8q7dlx7FkGcEclKEQv5n5Hsz+7+uO8xARL8PPjYZkvbJS5/KD+35H3vHYrHz1GG4ogt76QdsgqZmU2WTDgxS9WONRFqk7oihPBeTHNvhM9+fQbiuOiD8jAbWOT5Qob8O9v5Hn4EMbhyn6OsjTzac5s= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+50220+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1573133919867268.91093477316576; Thu, 7 Nov 2019 05:38:39 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id oYlqYY1788612xK9w0IjhrTW; Thu, 07 Nov 2019 05:38:39 -0800 X-Received: from mga02.intel.com (mga02.intel.com []) by mx.groups.io with SMTP id smtpd.web12.4107.1573133917633868106 for ; Thu, 07 Nov 2019 05:38:38 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Nov 2019 05:38:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,278,1569308400"; d="scan'208";a="205678747" X-Received: from jyao1-mobl2.ccr.corp.intel.com ([10.254.209.46]) by orsmga003.jf.intel.com with ESMTP; 07 Nov 2019 05:38:37 -0800 From: "Yao, Jiewen" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty , Yun Lou Subject: [edk2-devel] [PATCH V3 1/6] IntelSiliconPkg/Include: Add Intel PciSecurity definition. Date: Thu, 7 Nov 2019 21:38:26 +0800 Message-Id: <20191107133831.22412-2-jiewen.yao@intel.com> In-Reply-To: <20191107133831.22412-1-jiewen.yao@intel.com> References: <20191107133831.22412-1-jiewen.yao@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jiewen.yao@intel.com X-Gm-Message-State: g5trOOGLVvOhEyjHlNIAgkfwx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1573133919; bh=GRROKtDHW5kVBWtGAmaTVyEuFihdT7EVOjrp2U+HlK4=; h=Cc:Date:From:Reply-To:Subject:To; b=LfgsatzdtFtqeROZKL5Sdn8JM7DyOmXxSgNu67oiFcWybmdsdL/aBKDajRa2wRdJLoz 9GTUPah/GCdQOt0bkCjIS1ZDZUdH9HUjXaFsPoqXMx34DeHZdQMundu5cKnBIWENUfi0P W7FWXJ3IjnBaR4sdn3+IBrljnmLIvBzuBTY= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2303 Cc: Ray Ni Cc: Rangasai V Chaganty Cc: Yun Lou Signed-off-by: Jiewen Yao Reviewed-by: Ray Ni --- .../IndustryStandard/IntelPciSecurity.h | 92 +++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/= IntelPciSecurity.h diff --git a/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPc= iSecurity.h b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelP= ciSecurity.h new file mode 100644 index 0000000000..f2bdb7ee2d --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPciSecuri= ty.h @@ -0,0 +1,92 @@ +/** @file + Intel PCI security data structure definition from + PCIe* Device Security Enhancements Specification. + + https://www.intel.com/content/www/us/en/io/pci-express/pcie-device-secur= ity-enhancements-spec.html + + NOTE: The data structure is not fully match the current specification, + because it is aligned with the real hardware implementation with minor a= djustment + on INTEL_PCI_DIGEST_CAPABILITY_STRUCTURE, INTEL_PCI_DIGEST_DATA_MODIFIED= and + INTEL_PCI_DIGEST_DATA_VALID. + +Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef __INTEL_PCI_SECURITY_H__ +#define __INTEL_PCI_SECURITY_H__ + +#pragma pack(1) + +/// +/// The PCIE capability structure header for Intel PCI DVSEC extension. +/// +typedef struct { + UINT16 CapId; // 0x23: DVSEC + UINT16 CapVersion:4; // 1 + UINT16 NextOffset:12; + UINT16 DvSecVendorId; // 0x8086 + UINT16 DvSecRevision:4; // 1 + UINT16 DvSecLength:12; + UINT16 DvSecId; // 0x3E: Measure +} INTEL_PCI_DIGEST_CAPABILITY_HEADER; + +#define INTEL_PCI_CAPID_DVSEC 0x23 +#define INTEL_PCI_DVSEC_VENDORID_INTEL 0x8086 +#define INTEL_PCI_DVSEC_DVSECID_MEASUREMENT 0x3E + +/// +/// The Intel PCI digest modified macro. +/// +#define INTEL_PCI_DIGEST_MODIFIED BIT0 + +/// +/// The Intel PCI DVSEC digest data modified structure. +/// +typedef union { + struct { + UINT8 DigestModified:1; // RW1C + UINT8 Reserved0:7; + } Bits; + UINT8 Data; +} INTEL_PCI_DIGEST_DATA_MODIFIED; + +/// +/// The Intel PCI digest valid macro. +/// +#define INTEL_PCI_DIGEST_0_VALID BIT0 +#define INTEL_PCI_DIGEST_0_LOCKED BIT1 +#define INTEL_PCI_DIGEST_1_VALID BIT2 +#define INTEL_PCI_DIGEST_1_LOCKED BIT3 + +/// +/// The Intel PCI DVSEC digest data valid structure. +/// +typedef union { + struct { + UINT8 Digest0Valid:1; // RO + UINT8 Digest0Locked:1; // RO + UINT8 Digest1Valid:1; // RO + UINT8 Digest1Locked:1; // RO + UINT8 Reserved1:4; + } Bits; + UINT8 Data; +} INTEL_PCI_DIGEST_DATA_VALID; + +/// +/// The PCIE capability structure for Intel PCI DVSEC extension with diges= t. +/// +typedef struct { + INTEL_PCI_DIGEST_DATA_MODIFIED Modified; // RW1C + INTEL_PCI_DIGEST_DATA_VALID Valid; // RO + UINT16 TcgAlgId; // RO + UINT8 FirmwareID; // RO + UINT8 Reserved; +//UINT8 Digest[]; +} INTEL_PCI_DIGEST_CAPABILITY_STRUCTURE; + +#pragma pack() + +#endif + --=20 2.19.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#50220): https://edk2.groups.io/g/devel/message/50220 Mute This Topic: https://groups.io/mt/46027867/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-