From nobody Mon Feb 9 19:30:16 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+49769+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49769+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1572525095; cv=none; d=zoho.com; s=zohoarc; b=oCp8RXguRO+mR7vkLQwSbKa3YIXQv0Q0YO5hxhByOeDU2OCiTf/0iPYmvXhJaq+ZwVRpTarrOj1PcZiowvD1VSHwE7HUGUMfbjbcoo+5aD3/q5fI+0cpLgqe3v5rf24wMJR5nOI0uLpDXuy5l8SKuIe1/jhW70kQLaeEL/a0MGA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1572525095; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=BmHpYXwsAQJUDZ3g00lX819dP4F+oF16H+WmFLfIbWY=; b=U2rike9KdTvGVjHMnwj2tE00QPcm2u1a2c1ONWV790g7HB46weXY9atRBhss6a/6Yu9HzQW3Oqz3mc5O2V1+ozqdySpFynYTl0l34BITOV9tHBOcl2pmaLOfMPcYDpY5hHY747BfMoTThQOjZiSFboFT3LQ8Ix2OlFUSmqduSVw= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49769+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1572525095750156.31240277778056; Thu, 31 Oct 2019 05:31:35 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id gEwIYY1788612xKWOaOuWug0; Thu, 31 Oct 2019 05:31:35 -0700 X-Received: from mga02.intel.com (mga02.intel.com []) by mx.groups.io with SMTP id smtpd.web11.5236.1572525094034209064 for ; Thu, 31 Oct 2019 05:31:34 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 Oct 2019 05:31:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,250,1569308400"; d="scan'208";a="283875670" X-Received: from jyao1-mobl2.ccr.corp.intel.com ([10.254.211.198]) by orsmga001.jf.intel.com with ESMTP; 31 Oct 2019 05:31:33 -0700 From: "Yao, Jiewen" To: devel@edk2.groups.io Cc: Ray Ni , Rangasai V Chaganty , Yun Lou Subject: [edk2-devel] [PATCH V2 1/6] IntelSiliconPkg/Include: Add Intel PciSecurity definition. Date: Thu, 31 Oct 2019 20:31:22 +0800 Message-Id: <20191031123127.10900-2-jiewen.yao@intel.com> In-Reply-To: <20191031123127.10900-1-jiewen.yao@intel.com> References: <20191031123127.10900-1-jiewen.yao@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jiewen.yao@intel.com X-Gm-Message-State: ySuAamaGoQ0auIoAUIYck6c2x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1572525095; bh=tsTMMUH9iprgKv5WEkUzATKccaYwXgp9dFLWiwY3eic=; h=Cc:Date:From:Reply-To:Subject:To; b=GImcHcSF7TPlnyx5CLRWjZCKzjtj4XBEAWjV8OpApfKU349PIVy/V4sZF+mdnjTSlZ6 fw/otM86geTsSwALkbdaDfre1YUAYLYU2WNQNjSzMECNBWF4zDXT3qvLdt+qaHQZHdmYk fewjA+YNvOK0ll1YxI0SgAVaNd04JyhELkk= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2303 Cc: Ray Ni Cc: Rangasai V Chaganty Cc: Yun Lou Signed-off-by: Jiewen Yao --- Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPciSecurity.h = | 66 ++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPc= iSecurity.h b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelP= ciSecurity.h new file mode 100644 index 0000000000..a8c5483165 --- /dev/null +++ b/Silicon/Intel/IntelSiliconPkg/Include/IndustryStandard/IntelPciSecuri= ty.h @@ -0,0 +1,66 @@ +/** @file + Intel PCI security data structure + +Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef __INTEL_PCI_SECURITY_H__ +#define __INTEL_PCI_SECURITY_H__ + +#pragma pack(1) + +typedef struct { + UINT16 CapId; // 0x23: DVSEC + UINT16 CapVersion:4; // 1 + UINT16 NextOffset:12; + UINT16 DvSecVendorId; // 0x8086 + UINT16 DvSecRevision:4; // 1 + UINT16 DvSecLength:12; + UINT16 DvSecId; // 0x3E: Measure +} INTEL_PCI_DIGEST_CAPABILITY_HEADER; + +#define INTEL_PCI_CAPID_DVSEC 0x23 +#define INTEL_PCI_DVSEC_VENDORID_INTEL 0x8086 +#define INTEL_PCI_DVSEC_DVSECID_MEASUREMENT 0x3E + +typedef union { + struct { + UINT8 DigestModified:1; // RW1C + UINT8 Reserved0:7; + } Bits; + UINT8 Data; +} INTEL_PCI_DIGEST_DATA_MODIFIED; + +#define INTEL_PCI_DIGEST_MODIFIED BIT0 + +typedef union { + struct { + UINT8 Digest0Valid:1; // RO + UINT8 Digest0Locked:1; // RO + UINT8 Digest1Valid:1; // RO + UINT8 Digest1Locked:1; // RO + UINT8 Reserved1:4; + } Bits; + UINT8 Data; +} INTEL_PCI_DIGEST_DATA_VALID; + +#define INTEL_PCI_DIGEST_0_VALID BIT0 +#define INTEL_PCI_DIGEST_0_LOCKED BIT1 +#define INTEL_PCI_DIGEST_1_VALID BIT2 +#define INTEL_PCI_DIGEST_1_LOCKED BIT3 + +typedef struct { + INTEL_PCI_DIGEST_DATA_MODIFIED Modified; // RW1C + INTEL_PCI_DIGEST_DATA_VALID Valid; // RO + UINT16 TcgAlgId; // RO + UINT8 FirmwareID; // RO + UINT8 Reserved; +//UINT8 Digest[]; +} INTEL_PCI_DIGEST_CAPABILITY_STRUCTURE; + +#pragma pack() + +#endif + --=20 2.19.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#49769): https://edk2.groups.io/g/devel/message/49769 Mute This Topic: https://groups.io/mt/40117796/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-