From nobody Tue May 7 22:00:41 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+49366+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49366+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571782569; cv=none; d=zoho.com; s=zohoarc; b=d67T4umQfQzpe6mq69vH345xOHZG+6D8FLEYfu+F2ssgmDP5euYX3O40hvC6GoKGEvJ5mtoScQs6a7esWqsIpgMA7a63Z5UXEJFLOyP2dLQ5oQ5aKxm5xzdyR+mKrYam85xxTEC2fN4ugExEBYI1WXqBKUhCW00spHf240Nq8PQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571782569; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=oO7PHfDG8+Jr6mUh4xjak9+5tdl7WpTGqLQWKMIpTXk=; b=QyClsNagX5u12bAGM90DcTy+tO0POwVIWBlYHsGo9b1y87nJVFKrMiMNflQOHXCusLyngLU7K9BPwOw/jAWNIM6Bqgj6IDMH4FP1h4OOzmGpFWDSAodlDFEQoxHo3wAor6ibCxD9GfVuQXxRe/BHSQmw+bdeJ5rRbd4u9vTfA/o= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49366+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1571782569402973.6566950595137; Tue, 22 Oct 2019 15:16:09 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id JsklYY1788612xK7OtVPAD5q; Tue, 22 Oct 2019 15:16:08 -0700 X-Received: from us-smtp-delivery-1.mimecast.com (us-smtp-delivery-1.mimecast.com [207.211.31.81]) by mx.groups.io with SMTP id smtpd.web09.1922.1571782568040207950 for ; Tue, 22 Oct 2019 15:16:08 -0700 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-203-oHPMWhEXO0KxGEaLAU4n2g-1; Tue, 22 Oct 2019 18:16:01 -0400 X-Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 659AD47B; Tue, 22 Oct 2019 22:16:00 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (unknown [10.36.118.54]) by smtp.corp.redhat.com (Postfix) with ESMTP id C2A315DA32; Tue, 22 Oct 2019 22:15:58 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Anthony Perard , Ard Biesheuvel , Igor Mammedov , Jordan Justen , Julien Grall Subject: [edk2-devel] [PATCH v2 1/3] OvmfPkg/OvmfXen.dsc: remove PcdCpu* dynamic defaults Date: Wed, 23 Oct 2019 00:15:52 +0200 Message-Id: <20191022221554.14963-2-lersek@redhat.com> In-Reply-To: <20191022221554.14963-1-lersek@redhat.com> References: <20191022221554.14963-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-MC-Unique: oHPMWhEXO0KxGEaLAU4n2g-1 X-Mimecast-Spam-Score: 0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: XTjqw2PVL5RA6ImImDKML0RLx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1571782568; bh=NoL/2SGJMx8rDBK/SAGJ+oYplB/i+wsOcfksCQroYbE=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=J9Xpdkcy2qYpjT/9jt1Kl+pC+AxJ4XgmW/tBUUelH0ff8UAdL4op8xqM38rLKJ6ZHTD vkWsV6a1yxBEERklczWmBDdLPw9+5B80jbk/7FbHIR57S/ha2SohX4qREg3cwrYOSW8Yl 4Qe2/MYGMkHq++InW1ycXQx5LBBjnJ+DG1k= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" PcdCpuMaxLogicalProcessorNumber and PcdCpuApInitTimeOutInMicroSeconds are only referenced in "OvmfPkg/PlatformPei/PlatformPei.inf", and OvmfXen does not include that module. Remove the unnecessary dynamic PCD defaults from "OvmfXen.dsc". Cc: Anthony Perard Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jordan Justen Cc: Julien Grall Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1515 Signed-off-by: Laszlo Ersek Reviewed-by: Philippe Mathieu-Daude Acked-by: Ard Biesheuvel Acked-by: Anthony PERARD --- Notes: v2: - pick up Phil's R-b - pick up Ard's A-b OvmfPkg/OvmfXen.dsc | 4 ---- 1 file changed, 4 deletions(-) diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc index 8c11efe9b709..1b18f1769bbc 100644 --- a/OvmfPkg/OvmfXen.dsc +++ b/OvmfPkg/OvmfXen.dsc @@ -480,14 +480,10 @@ [PcdsDynamicDefault] =20 # Noexec settings for DXE. gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable|FALSE =20 - # UefiCpuPkg PCDs related to initial AP bringup and general AP managemen= t. - gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64 - gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000 - # Set memory encryption mask gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0 =20 gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x00 =20 --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#49366): https://edk2.groups.io/g/devel/message/49366 Mute This Topic: https://groups.io/mt/36465016/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Tue May 7 22:00:41 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+49365+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49365+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571782567; cv=none; d=zoho.com; s=zohoarc; b=k9Hemnp95lXUVLhJU4v0XfiveZxrFomlvr6x8ygPfDu0U73xtaPLb4SGs7f9pdGblGiEjPf0D+Dp1wh73KABtigUBXkz9tPuTIrquSTjE8BedlAVSkJ/M1VIflDGBgrefG064hhwqTAT0pYVDZTpxtChIRasMBbrlWSnkOkjh2s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571782567; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=sz7CnwP21BkKkKPFS5w4H2u9Ndv5V1rRGyZ0y6W/V2I=; b=ZVY3rQ8JHOiXCwP38q+XfmnamiY4Ma3KZ4FSu2aPR307cFUT/71QGC0Mgq9QW10TK6DWJC27/z2BUQL2wFMMNZVpVCNJhYnPdbb3brjpFJ9eYi1JHIGPuFL180WX/BvWqoq9gSTBJlCawR5DjhAcdvDmyy9i/sLfiiCvqB+CKIo= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49365+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1571782567162470.29122952062596; Tue, 22 Oct 2019 15:16:07 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id I068YY1788612xQWEPYSXvDw; Tue, 22 Oct 2019 15:16:06 -0700 X-Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [205.139.110.120]) by mx.groups.io with SMTP id smtpd.web09.1920.1571782566082555229 for ; Tue, 22 Oct 2019 15:16:06 -0700 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-366-Ar2FOLvMNIKFTW7B9JoNvA-1; Tue, 22 Oct 2019 18:16:02 -0400 X-Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id DAC1280183E; Tue, 22 Oct 2019 22:16:01 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (unknown [10.36.118.54]) by smtp.corp.redhat.com (Postfix) with ESMTP id BADF75DC18; Tue, 22 Oct 2019 22:16:00 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Ard Biesheuvel , Igor Mammedov , Jordan Justen Subject: [edk2-devel] [PATCH v2 2/3] OvmfPkg/IndustryStandard: define macros for QEMU's CPU hotplug registers Date: Wed, 23 Oct 2019 00:15:53 +0200 Message-Id: <20191022221554.14963-3-lersek@redhat.com> In-Reply-To: <20191022221554.14963-1-lersek@redhat.com> References: <20191022221554.14963-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-MC-Unique: Ar2FOLvMNIKFTW7B9JoNvA-1 X-Mimecast-Spam-Score: 0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: zDBGYxTqf8UF6Y7FCg9bOXUWx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1571782566; bh=PD6GeRTqyXhlEohhvosLPqEC6Xc/lE0l5vJvC/RzkUc=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=Q3pIxxFjSQ3SaiE8mpyPMBlnn9G7dW9hWXiQFCrVMVvspg66/ZFC8Nl19nv2QKwOCeb FIajsWUtKUVVuM2bh/MtYk8vE0r6e29ka7pz1lGk50aqRJDcMHOx9moC+GOaY4A55vqSK XBURIOZ48LriV9Yn59pBPMql8mD5giZvp7M= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" In v1.5.0, QEMU's "pc" (i440fx) board gained a "CPU present bitmap" register block. In v2.0.0, this was extended to the "q35" board. In v2.7.0, a new (read/write) register interface was laid over the "CPU present bitmap", with an option for the guest to switch the register block to the new (a.k.a. modern) interface. Both interfaces are documented in "docs/specs/acpi_cpu_hotplug.txt" in the QEMU tree. Add macros for a minimal subset of the modern interface, just so we can count the possible CPUs (as opposed to boot CPUs) in a later patch in this series. Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jordan Justen Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1515 Signed-off-by: Laszlo Ersek Acked-by: Ard Biesheuvel Reviewed-by: Philippe Mathieu-Daude --- Notes: v2: - use QEMU's existent CPU hotplug register block, rather than a new named file in fw_cfg [Igor] OvmfPkg/Include/IndustryStandard/I440FxPiix4.h | 5 +++ OvmfPkg/Include/IndustryStandard/Q35MchIch9.h | 2 + OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h | 43 ++++++++++++++++++++ 3 files changed, 50 insertions(+) diff --git a/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h b/OvmfPkg/Inclu= de/IndustryStandard/I440FxPiix4.h index e7d7fde14c65..3973ff0a95b4 100644 --- a/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h +++ b/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h @@ -44,6 +44,11 @@ BIT10 | BIT9 | BIT8 | BIT7 | BIT6) =20 #define PIIX4_PMREGMISC 0x80 #define PIIX4_PMREGMISC_PMIOSE BIT0 =20 +// +// IO ports +// +#define PIIX4_CPU_HOTPLUG_BASE 0xAF00 + #endif diff --git a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h b/OvmfPkg/Includ= e/IndustryStandard/Q35MchIch9.h index 391cb4622226..2ac16f19c62e 100644 --- a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h +++ b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h @@ -104,10 +104,12 @@ // IO ports // #define ICH9_APM_CNT 0xB2 #define ICH9_APM_STS 0xB3 =20 +#define ICH9_CPU_HOTPLUG_BASE 0x0CD8 + // // IO ports relative to PMBASE // #define ICH9_PMBASE_OFS_SMI_EN 0x30 #define ICH9_SMI_EN_APMC_EN BIT5 diff --git a/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h b/OvmfPkg/In= clude/IndustryStandard/QemuCpuHotplug.h new file mode 100644 index 000000000000..cf0745610f2c --- /dev/null +++ b/OvmfPkg/Include/IndustryStandard/QemuCpuHotplug.h @@ -0,0 +1,43 @@ +/** @file + Macros for accessing QEMU's CPU hotplug register block. + + Copyright (C) 2019, Red Hat, Inc. + + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference: + + - "docs/specs/acpi_cpu_hotplug.txt" in the QEMU source tree. + + The original (now "legacy") CPU hotplug interface appeared in QEMU v1.= 5.0. + The new ("modern") hotplug interface appeared in QEMU v2.7.0. + + The macros in this header file map to the minimal subset of the modern + interface that OVMF needs. +**/ + +#ifndef QEMU_CPU_HOTPLUG_H_ +#define QEMU_CPU_HOTPLUG_H_ + +#include + +// +// Each register offset is: +// - relative to the board-dependent IO base address of the register block, +// - named QEMU_CPUHP_(R|W|RW)_*, according to the possible access modes o= f the +// register, +// - followed by distinguished bitmasks or values in the register. +// +#define QEMU_CPUHP_R_CMD_DATA2 0x0 + +#define QEMU_CPUHP_R_CPU_STAT 0x4 +#define QEMU_CPUHP_STAT_ENABLED BIT0 + +#define QEMU_CPUHP_RW_CMD_DATA 0x8 + +#define QEMU_CPUHP_W_CPU_SEL 0x0 + +#define QEMU_CPUHP_W_CMD 0x5 +#define QEMU_CPUHP_CMD_GET_PENDING 0x0 + +#endif // QEMU_CPU_HOTPLUG_H_ --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#49365): https://edk2.groups.io/g/devel/message/49365 Mute This Topic: https://groups.io/mt/36465006/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Tue May 7 22:00:41 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+49367+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49367+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571782576; cv=none; d=zoho.com; s=zohoarc; b=AhZKxvTQfmtT/+CY7pchN5HISVu9MGS6gTW3hhygc1dDZKtkg4LVQRnlQQp0zT85zfQsO9enNc/wmX/9uAxu8n1Rqr2AUne7bR7bUd80ByJ8++i2abyzi8cfnf8VmmYHT+1YA7E4d1d8iQGgnaR2hockwtEJT7At2itUKLbFOqQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571782576; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=gvbnrpzPkr55ke1PYBsveF73H4UYsp2n2F3YXEZKS2g=; b=kVX0TlGTTO3uJgQrTG2HtjI+KT5dy5Ptlr1WFWR/poe2ulM1DGLaqFHSXC38Xi/WuhZhCOHkwa5dT1kifh5HkXZv+uBgs0iuEy0KzjfAYm99BARxNE/QmiLQj2zFpys3y4OIJSM24ZaqvU669n/bocoEn7p0udNqPqVmPD2N1bg= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=pass; spf=pass (zoho.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+49367+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 157178257607224.58775753037878; Tue, 22 Oct 2019 15:16:16 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id E7c7YY1788612xOXRjwdcCQq; Tue, 22 Oct 2019 15:16:15 -0700 X-Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [205.139.110.120]) by mx.groups.io with SMTP id smtpd.web09.1924.1571782574318235105 for ; Tue, 22 Oct 2019 15:16:14 -0700 X-Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-314-BrcDDQnSPEaNDeYi0hk0kA-1; Tue, 22 Oct 2019 18:16:05 -0400 X-Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id BBB35800D49; Tue, 22 Oct 2019 22:16:03 +0000 (UTC) X-Received: from lacos-laptop-7.usersys.redhat.com (unknown [10.36.118.54]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3DD635DAAF; Tue, 22 Oct 2019 22:16:02 +0000 (UTC) From: "Laszlo Ersek" To: edk2-devel-groups-io Cc: Anthony Perard , Ard Biesheuvel , Igor Mammedov , Jordan Justen , Julien Grall Subject: [edk2-devel] [PATCH v2 3/3] OvmfPkg/PlatformPei: rewrite MaxCpuCountInitialization() for CPU hotplug Date: Wed, 23 Oct 2019 00:15:54 +0200 Message-Id: <20191022221554.14963-4-lersek@redhat.com> In-Reply-To: <20191022221554.14963-1-lersek@redhat.com> References: <20191022221554.14963-1-lersek@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-MC-Unique: BrcDDQnSPEaNDeYi0hk0kA-1 X-Mimecast-Spam-Score: 0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com X-Gm-Message-State: fyn8aKMWc5EcvovrgCWi9IOpx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1571782575; bh=CDMExhTBft3pY/WBIoxhwaR5SPVU8eHl1j4dhipd4oY=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=cBN7SYNIskbFK81aytWD06nNSatUs8J3L9GJRrmEvO1PnOpVGQMDVH8pN3Sk/rZkGvb To5QyZyS59W6qGfEQzdxzD4Nlk1Tdd9pgs/QGzoxKXnUQ5mtBqv43mndQJIjaSGKPnHnm DW1LFHgSoOdiEp6A/2mw8m8OBnkIY5yf6z0= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Type: text/plain; charset="utf-8" MaxCpuCountInitialization() currently handles the following options: (1) QEMU does not report the boot CPU count (FW_CFG_NB_CPUS is 0) In this case, PlatformPei makes MpInitLib enumerate APs up to the default PcdCpuMaxLogicalProcessorNumber value (64) minus 1, or until the default PcdCpuApInitTimeOutInMicroSeconds (50,000) elapses. (Whichever is reached first.) Time-limited AP enumeration had never been reliable on QEMU/KVM, which is why commit 45a70db3c3a5 strated handling case (2) below, in OVMF. (2) QEMU reports the boot CPU count (FW_CFG_NB_CPUS is nonzero) In this case, PlatformPei sets - PcdCpuMaxLogicalProcessorNumber to the reported boot CPU count (FW_CFG_NB_CPUS, which exports "PCMachineState.boot_cpus"), - and PcdCpuApInitTimeOutInMicroSeconds to practically "infinity" (MAX_UINT32, ~71 minutes). That causes MpInitLib to enumerate exactly the present (boot) APs. With CPU hotplug in mind, this method is not good enough. Because, using QEMU terminology, UefiCpuPkg expects PcdCpuMaxLogicalProcessorNumber to provide the "possible CPUs" count ("MachineState.smp.max_cpus"), which includes present and not present CPUs both (with not present CPUs being subject for hot-plugging). FW_CFG_NB_CPUS does not include not present CPUs. Rewrite MaxCpuCountInitialization() for handling the following cases: (1) The behavior of case (1) does not change. (No UefiCpuPkg PCDs are set to values different from the defaults.) (2) QEMU reports the boot CPU count ("PCMachineState.boot_cpus", via FW_CFG_NB_CPUS), but not the possible CPUs count ("MachineState.smp.max_cpus"). In this case, the behavior remains unchanged. The way MpInitLib is instructed to do the same differs however: we now set the new PcdCpuBootLogicalProcessorNumber to the boot CPU count (while continuing to set PcdCpuMaxLogicalProcessorNumber identically). PcdCpuApInitTimeOutInMicroSeconds becomes irrelevant. (3) QEMU reports both the boot CPU count ("PCMachineState.boot_cpus", via FW_CFG_NB_CPUS), and the possible CPUs count ("MachineState.smp.max_cpus"). We tell UefiCpuPkg about the possible CPUs count through PcdCpuMaxLogicalProcessorNumber. We also tell MpInitLib the boot CPU count for precise and quick AP enumeration, via PcdCpuBootLogicalProcessorNumber. PcdCpuApInitTimeOutInMicroSeconds is irrelevant again. This patch is a pre-requisite for enabling CPU hotplug with SMM_REQUIRE. As a side effect, the patch also enables S3 to work with CPU hotplug at once, *without* SMM_REQUIRE. (Without the patch, S3 resume fails, if a CPU is hot-plugged at OS runtime, prior to suspend: the FW_CFG_NB_CPUS increase seen during resume causes PcdCpuMaxLogicalProcessorNumber to increase as well, which is not permitted. With the patch, PcdCpuMaxLogicalProcessorNumber stays the same, namely "MachineState.smp.max_cpus". Therefore, the CPU structures allocated during normal boot can accommodate the CPUs at S3 resume that have been hotplugged prior to S3 suspend.) Cc: Anthony Perard Cc: Ard Biesheuvel Cc: Igor Mammedov Cc: Jordan Justen Cc: Julien Grall Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1515 Signed-off-by: Laszlo Ersek Acked-by: Anthony PERARD Acked-by: Ard Biesheuvel Reviewed-by: Philippe Mathieu-Daude --- Notes: v2: =20 - use "possible CPUs" term in the code and the commit message [Igor] =20 - add details about S3 to the commit message [Igor] =20 - use QEMU's existent CPU hotplug register block, rather than a new named file in fw_cfg [Igor] =20 - tested on QEMU v2.6.2 (legacy-only CPU hotplug register block), v2.7.1 (modern register block, but buggy fw_cfg), v2.8.1.1 (no QEMU issues), v4.0.0 (no QEMU issues) OvmfPkg/OvmfPkgIa32.dsc | 2 +- OvmfPkg/OvmfPkgIa32X64.dsc | 2 +- OvmfPkg/OvmfPkgX64.dsc | 2 +- OvmfPkg/PlatformPei/PlatformPei.inf | 2 +- OvmfPkg/PlatformPei/Platform.c | 172 +++++++++++++++++--- 5 files changed, 151 insertions(+), 29 deletions(-) diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index 4301e7821902..68d8a9fb9655 100644 --- a/OvmfPkg/OvmfPkgIa32.dsc +++ b/OvmfPkg/OvmfPkgIa32.dsc @@ -553,11 +553,11 @@ [PcdsDynamicDefault] gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable|FALSE =20 # UefiCpuPkg PCDs related to initial AP bringup and general AP managemen= t. gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64 - gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000 + gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber|0 =20 # Set memory encryption mask gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0 =20 !if $(SMM_REQUIRE) =3D=3D TRUE diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index 803fd74ae8e4..e5a6260b6088 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -565,11 +565,11 @@ [PcdsDynamicDefault] gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable|FALSE =20 # UefiCpuPkg PCDs related to initial AP bringup and general AP managemen= t. gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64 - gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000 + gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber|0 =20 # Set memory encryption mask gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0 =20 !if $(SMM_REQUIRE) =3D=3D TRUE diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index 5dbd1b793a90..f5d904945103 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -564,11 +564,11 @@ [PcdsDynamicDefault] gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable|FALSE =20 # UefiCpuPkg PCDs related to initial AP bringup and general AP managemen= t. gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64 - gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000 + gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber|0 =20 # Set memory encryption mask gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0 =20 !if $(SMM_REQUIRE) =3D=3D TRUE diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/Plat= formPei.inf index d9fd9c8f05b3..30eaebdfae63 100644 --- a/OvmfPkg/PlatformPei/PlatformPei.inf +++ b/OvmfPkg/PlatformPei/PlatformPei.inf @@ -96,11 +96,11 @@ [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber - gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds + gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize =20 [FixedPcd] gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress =20 diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index 3ba2459872d9..e5e8581752b5 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -28,11 +28,14 @@ #include #include #include #include #include +#include #include +#include +#include #include =20 #include "Platform.h" #include "Cmos.h" =20 @@ -562,47 +565,165 @@ S3Verification ( #endif } =20 =20 /** - Fetch the number of boot CPUs from QEMU and expose it to UefiCpuPkg modu= les. - Set the mMaxCpuCount variable. + Fetch the boot CPU count and the possible CPU count from QEMU, and expose + them to UefiCpuPkg modules. Set the mMaxCpuCount variable. **/ VOID MaxCpuCountInitialization ( VOID ) { - UINT16 ProcessorCount; + UINT16 BootCpuCount; RETURN_STATUS PcdStatus; =20 + // + // Try to fetch the boot CPU count. + // QemuFwCfgSelectItem (QemuFwCfgItemSmpCpuCount); - ProcessorCount =3D QemuFwCfgRead16 (); - // - // If the fw_cfg key or fw_cfg entirely is unavailable, load mMaxCpuCount - // from the PCD default. No change to PCDs. - // - if (ProcessorCount =3D=3D 0) { + BootCpuCount =3D QemuFwCfgRead16 (); + if (BootCpuCount =3D=3D 0) { + // + // QEMU doesn't report the boot CPU count. (BootCpuCount =3D=3D 0) wil= l let + // MpInitLib count APs up to (PcdCpuMaxLogicalProcessorNumber - 1), or + // until PcdCpuApInitTimeOutInMicroSeconds elapses (whichever is reach= ed + // first). + // + DEBUG ((DEBUG_WARN, "%a: boot CPU count unavailable\n", __FUNCTION__)); mMaxCpuCount =3D PcdGet32 (PcdCpuMaxLogicalProcessorNumber); - return; + } else { + // + // We will expose BootCpuCount to MpInitLib. MpInitLib will count APs = up to + // (BootCpuCount - 1) precisely, regardless of timeout. + // + // Now try to fetch the possible CPU count. + // + UINTN CpuHpBase; + UINT32 CmdData2; + + CpuHpBase =3D ((mHostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID) ? + ICH9_CPU_HOTPLUG_BASE : PIIX4_CPU_HOTPLUG_BASE); + + // + // If only legacy mode is available in the CPU hotplug register block,= or + // the register block is completely missing, then the writes below are + // no-ops. + // + // 1. Switch the hotplug register block to modern mode. + // + IoWrite32 (CpuHpBase + QEMU_CPUHP_W_CPU_SEL, 0); + // + // 2. Select a valid CPU for deterministic reading of + // QEMU_CPUHP_R_CMD_DATA2. + // + // CPU#0 is always valid; it is the always present and non-removable + // BSP. + // + IoWrite32 (CpuHpBase + QEMU_CPUHP_W_CPU_SEL, 0); + // + // 3. Send a command after which QEMU_CPUHP_R_CMD_DATA2 is specified to + // read as zero, and which does not invalidate the selector. (The + // selector may change, but it must not become invalid.) + // + // Send QEMU_CPUHP_CMD_GET_PENDING, as it will prove useful later. + // + IoWrite8 (CpuHpBase + QEMU_CPUHP_W_CMD, QEMU_CPUHP_CMD_GET_PENDING); + // + // 4. Read QEMU_CPUHP_R_CMD_DATA2. + // + // If the register block is entirely missing, then this is an unass= igned + // IO read, returning all-bits-one. + // + // If only legacy mode is available, then bit#0 stands for CPU#0 in= the + // "CPU present bitmap". CPU#0 is always present. + // + // Otherwise, QEMU_CPUHP_R_CMD_DATA2 is either still reserved (retu= rning + // all-bits-zero), or it is specified to read as zero after the abo= ve + // steps. Both cases confirm modern mode. + // + CmdData2 =3D IoRead32 (CpuHpBase + QEMU_CPUHP_R_CMD_DATA2); + DEBUG ((DEBUG_VERBOSE, "%a: CmdData2=3D0x%x\n", __FUNCTION__, CmdData2= )); + if (CmdData2 !=3D 0) { + // + // QEMU doesn't support the modern CPU hotplug interface. Assume tha= t the + // possible CPU count equals the boot CPU count (precluding hotplug). + // + DEBUG ((DEBUG_WARN, "%a: modern CPU hotplug interface unavailable\n", + __FUNCTION__)); + mMaxCpuCount =3D BootCpuCount; + } else { + // + // Grab the possible CPU count from the modern CPU hotplug interface. + // + UINT32 Present, Possible, Selected; + + Present =3D 0; + Possible =3D 0; + + // + // We've sent QEMU_CPUHP_CMD_GET_PENDING last; this ensures + // QEMU_CPUHP_RW_CMD_DATA can now be read usefully. However, + // QEMU_CPUHP_CMD_GET_PENDING may have selected a CPU with actual pe= nding + // hotplug events; therefore, select CPU#0 forcibly. + // + IoWrite32 (CpuHpBase + QEMU_CPUHP_W_CPU_SEL, Possible); + + do { + UINT8 CpuStatus; + + // + // Read the status of the currently selected CPU. This will help w= ith a + // sanity check against "BootCpuCount". + // + CpuStatus =3D IoRead8 (CpuHpBase + QEMU_CPUHP_R_CPU_STAT); + if ((CpuStatus & QEMU_CPUHP_STAT_ENABLED) !=3D 0) { + ++Present; + } + // + // Attempt to select the next CPU. + // + ++Possible; + IoWrite32 (CpuHpBase + QEMU_CPUHP_W_CPU_SEL, Possible); + // + // If the selection is successful, then the following read will re= turn + // the selector (which we know is positive at this point). Otherwi= se, + // the read will return 0. + // + Selected =3D IoRead32 (CpuHpBase + QEMU_CPUHP_RW_CMD_DATA); + ASSERT (Selected =3D=3D Possible || Selected =3D=3D 0); + } while (Selected > 0); + + // + // Sanity check: fw_cfg and the modern CPU hotplug interface should + // return the same boot CPU count. + // + if (BootCpuCount !=3D Present) { + DEBUG ((DEBUG_WARN, "%a: QEMU v2.7 reset bug: BootCpuCount=3D%d " + "Present=3D%u\n", __FUNCTION__, BootCpuCount, Present)); + // + // The handling of QemuFwCfgItemSmpCpuCount, across CPU hotplug pl= us + // platform reset (including S3), was corrected in QEMU commit + // e3cadac073a9 ("pc: fix FW_CFG_NB_CPUS to account for -device ad= ded + // CPUs", 2016-11-16), part of release v2.8.0. + // + BootCpuCount =3D (UINT16)Present; + } + + mMaxCpuCount =3D Possible; + } } - // - // Otherwise, set mMaxCpuCount to the value reported by QEMU. - // - mMaxCpuCount =3D ProcessorCount; - // - // Additionally, tell UefiCpuPkg modules (a) the exact number of VCPUs, = (b) - // to wait, in the initial AP bringup, exactly as long as it takes for a= ll of - // the APs to report in. For this, we set the longest representable time= out - // (approx. 71 minutes). - // - PcdStatus =3D PcdSet32S (PcdCpuMaxLogicalProcessorNumber, ProcessorCount= ); + + DEBUG ((DEBUG_INFO, "%a: BootCpuCount=3D%d mMaxCpuCount=3D%u\n", __FUNCT= ION__, + BootCpuCount, mMaxCpuCount)); + ASSERT (BootCpuCount <=3D mMaxCpuCount); + + PcdStatus =3D PcdSet32S (PcdCpuBootLogicalProcessorNumber, BootCpuCount); ASSERT_RETURN_ERROR (PcdStatus); - PcdStatus =3D PcdSet32S (PcdCpuApInitTimeOutInMicroSeconds, MAX_UINT32); + PcdStatus =3D PcdSet32S (PcdCpuMaxLogicalProcessorNumber, mMaxCpuCount); ASSERT_RETURN_ERROR (PcdStatus); - DEBUG ((DEBUG_INFO, "%a: QEMU reports %d processor(s)\n", __FUNCTION__, - ProcessorCount)); } =20 =20 /** Perform Platform PEI initialization. @@ -636,17 +757,18 @@ InitializePlatform ( } =20 S3Verification (); BootModeInitialization (); AddressWidthInitialization (); - MaxCpuCountInitialization (); =20 // // Query Host Bridge DID // mHostBridgeDevId =3D PciRead16 (OVMF_HOSTBRIDGE_DID); =20 + MaxCpuCountInitialization (); + if (FeaturePcdGet (PcdSmmSmramRequire)) { Q35TsegMbytesInitialization (); } =20 PublishPeiMemory (); --=20 2.19.1.3.g30247aa5d201 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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